From 2a341f5cf57dce9d89b41484a69e88adc6422f6c Mon Sep 17 00:00:00 2001 From: David Brownell Date: Fri, 22 Feb 2008 17:23:23 -0800 Subject: atmel_tc library Create based on and the at91sam9263 and at32ap7000 datasheets. Most AT91 and AT32 SOCs have one or two of these TC blocks, which include three 16-bit timers that can be interconnected in various ways. These TC blocks can be used for external interfacing (such as PWM and measurement), or used as somewhat quirky sixteen-bit timers. Changes relative to the original version: * Drop unneeded inclusion of * Support an arbitrary number of TC blocks * Return a struct with information about a TC block from atmel_tc_alloc() instead of using a combination of return values and "out" parameters. * ioremap() the I/O registers on allocation * Look up clocks and irqs for all channels * Add "name" parameter to atmel_tc_alloc() and use this when requesting the iomem resource. * Check if the platform provided the necessary resources at probe() time instead of when the TCB is allocated. Signed-off-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 982e27b..b3ba681 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -22,6 +22,14 @@ config ATMEL_PWM purposes including software controlled power-efficent backlights on LCD displays, motor control, and waveform generation. +config ATMEL_TCLIB + bool "Atmel AT32/AT91 Timer/Counter Library" + depends on (AVR32 || ARCH_AT91) + help + Select this if you want a library to allocate the Timer/Counter + blocks found on many Atmel processors. This facilitates using + these blocks by different drivers despite processor differences. + config IBM_ASM tristate "Device driver for IBM RSA service processor" depends on X86 && PCI && INPUT && EXPERIMENTAL diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 3b12f5d..c975028 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_ACER_WMI) += acer-wmi.o obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o +obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o obj-$(CONFIG_TC1100_WMI) += tc1100-wmi.o obj-$(CONFIG_LKDTM) += lkdtm.o obj-$(CONFIG_TIFM_CORE) += tifm_core.o diff --git a/drivers/misc/atmel_tclib.c b/drivers/misc/atmel_tclib.c new file mode 100644 index 0000000..05dc8a3 --- /dev/null +++ b/drivers/misc/atmel_tclib.c @@ -0,0 +1,161 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +/* Number of bytes to reserve for the iomem resource */ +#define ATMEL_TC_IOMEM_SIZE 256 + + +/* + * This is a thin library to solve the problem of how to portably allocate + * one of the TC blocks. For simplicity, it doesn't currently expect to + * share individual timers between different drivers. + */ + +#if defined(CONFIG_AVR32) +/* AVR32 has these divide PBB */ +const u8 atmel_tc_divisors[5] = { 0, 4, 8, 16, 32, }; +EXPORT_SYMBOL(atmel_tc_divisors); + +#elif defined(CONFIG_ARCH_AT91) +/* AT91 has these divide MCK */ +const u8 atmel_tc_divisors[5] = { 2, 8, 32, 128, 0, }; +EXPORT_SYMBOL(atmel_tc_divisors); + +#endif + +static DEFINE_SPINLOCK(tc_list_lock); +static LIST_HEAD(tc_list); + +/** + * atmel_tc_alloc - allocate a specified TC block + * @block: which block to allocate + * @name: name to be associated with the iomem resource + * + * Caller allocates a block. If it is available, a pointer to a + * pre-initialized struct atmel_tc is returned. The caller can access + * the registers directly through the "regs" field. + */ +struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name) +{ + struct atmel_tc *tc; + struct platform_device *pdev = NULL; + struct resource *r; + + spin_lock(&tc_list_lock); + list_for_each_entry(tc, &tc_list, node) { + if (tc->pdev->id == block) { + pdev = tc->pdev; + break; + } + } + + if (!pdev || tc->iomem) + goto fail; + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + r = request_mem_region(r->start, ATMEL_TC_IOMEM_SIZE, name); + if (!r) + goto fail; + + tc->regs = ioremap(r->start, ATMEL_TC_IOMEM_SIZE); + if (!tc->regs) + goto fail_ioremap; + + tc->iomem = r; + +out: + spin_unlock(&tc_list_lock); + return tc; + +fail_ioremap: + release_resource(r); +fail: + tc = NULL; + goto out; +} +EXPORT_SYMBOL_GPL(atmel_tc_alloc); + +/** + * atmel_tc_free - release a specified TC block + * @tc: Timer/counter block that was returned by atmel_tc_alloc() + * + * This reverses the effect of atmel_tc_alloc(), unmapping the I/O + * registers, invalidating the resource returned by that routine and + * making the TC available to other drivers. + */ +void atmel_tc_free(struct atmel_tc *tc) +{ + spin_lock(&tc_list_lock); + if (tc->regs) { + iounmap(tc->regs); + release_resource(tc->iomem); + tc->regs = NULL; + tc->iomem = NULL; + } + spin_unlock(&tc_list_lock); +} +EXPORT_SYMBOL_GPL(atmel_tc_free); + +static int __init tc_probe(struct platform_device *pdev) +{ + struct atmel_tc *tc; + struct clk *clk; + int irq; + + if (!platform_get_resource(pdev, IORESOURCE_MEM, 0)) + return -EINVAL; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return -EINVAL; + + tc = kzalloc(sizeof(struct atmel_tc), GFP_KERNEL); + if (!tc) + return -ENOMEM; + + tc->pdev = pdev; + + clk = clk_get(&pdev->dev, "t0_clk"); + if (IS_ERR(clk)) { + kfree(tc); + return -EINVAL; + } + + tc->clk[0] = clk; + tc->clk[1] = clk_get(&pdev->dev, "t1_clk"); + if (IS_ERR(tc->clk[1])) + tc->clk[1] = clk; + tc->clk[2] = clk_get(&pdev->dev, "t2_clk"); + if (IS_ERR(tc->clk[2])) + tc->clk[2] = clk; + + tc->irq[0] = irq; + tc->irq[1] = platform_get_irq(pdev, 1); + if (tc->irq[1] < 0) + tc->irq[1] = irq; + tc->irq[2] = platform_get_irq(pdev, 2); + if (tc->irq[2] < 0) + tc->irq[2] = irq; + + spin_lock(&tc_list_lock); + list_add_tail(&tc->node, &tc_list); + spin_unlock(&tc_list_lock); + + return 0; +} + +static struct platform_driver tc_driver = { + .driver.name = "atmel_tcb", +}; + +static int __init tc_init(void) +{ + return platform_driver_probe(&tc_driver, tc_probe); +} +arch_initcall(tc_init); diff --git a/include/linux/atmel_tc.h b/include/linux/atmel_tc.h new file mode 100644 index 0000000..53ba65e --- /dev/null +++ b/include/linux/atmel_tc.h @@ -0,0 +1,252 @@ +/* + * Timer/Counter Unit (TC) registers. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef ATMEL_TC_H +#define ATMEL_TC_H + +#include +#include + +/* + * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds + * three general-purpose 16-bit timers. These timers share one register bank. + * Depending on the SOC, each timer may have its own clock and IRQ, or those + * may be shared by the whole TC block. + * + * These TC blocks may have up to nine external pins: TCLK0..2 signals for + * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM + * or triggering. Those pins need to be set up for use with the TC block, + * else they will be used as GPIOs or for a different controller. + * + * Although we expect each TC block to have a platform_device node, those + * nodes are not what drivers bind to. Instead, they ask for a specific + * TC block, by number ... which is a common approach on systems with many + * timers. Then they use clk_get() and platform_get_irq() to get clock and + * IRQ resources. + */ + +struct clk; + +/** + * struct atmel_tc - information about a Timer/Counter Block + * @pdev: physical device + * @iomem: resource associated with the I/O register + * @regs: mapping through which the I/O registers can be accessed + * @irq: irq for each of the three channels + * @clk: internal clock source for each of the three channels + * @node: list node, for tclib internal use + * + * On some platforms, each TC channel has its own clocks and IRQs, + * while on others, all TC channels share the same clock and IRQ. + * Drivers should clk_enable() all the clocks they need even though + * all the entries in @clk may point to the same physical clock. + * Likewise, drivers should request irqs independently for each + * channel, but they must use IRQF_SHARED in case some of the entries + * in @irq are actually the same IRQ. + */ +struct atmel_tc { + struct platform_device *pdev; + struct resource *iomem; + void __iomem *regs; + int irq[3]; + struct clk *clk[3]; + struct list_head node; +}; + +extern struct atmel_tc *atmel_tc_alloc(unsigned block, const char *name); +extern void atmel_tc_free(struct atmel_tc *tc); + +/* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */ +extern const u8 atmel_tc_divisors[5]; + + +/* + * Two registers have block-wide controls. These are: configuring the three + * "external" clocks (or event sources) used by the timer channels; and + * synchronizing the timers by resetting them all at once. + * + * "External" can mean "external to chip" using the TCLK0, TCLK1, or TCLK2 + * signals. Or, it can mean "external to timer", using the TIOA output from + * one of the other two timers that's being run in waveform mode. + */ + +#define ATMEL_TC_BCR 0xc0 /* TC Block Control Register */ +#define ATMEL_TC_SYNC (1 << 0) /* synchronize timers */ + +#define ATMEL_TC_BMR 0xc4 /* TC Block Mode Register */ +#define ATMEL_TC_TC0XC0S (3 << 0) /* external clock 0 source */ +#define ATMEL_TC_TC0XC0S_TCLK0 (0 << 0) +#define ATMEL_TC_TC0XC0S_NONE (1 << 0) +#define ATMEL_TC_TC0XC0S_TIOA1 (2 << 0) +#define ATMEL_TC_TC0XC0S_TIOA2 (3 << 0) +#define ATMEL_TC_TC1XC1S (3 << 2) /* external clock 1 source */ +#define ATMEL_TC_TC1XC1S_TCLK1 (0 << 2) +#define ATMEL_TC_TC1XC1S_NONE (1 << 2) +#define ATMEL_TC_TC1XC1S_TIOA0 (2 << 2) +#define ATMEL_TC_TC1XC1S_TIOA2 (3 << 2) +#define ATMEL_TC_TC2XC2S (3 << 4) /* external clock 2 source */ +#define ATMEL_TC_TC2XC2S_TCLK2 (0 << 4) +#define ATMEL_TC_TC2XC2S_NONE (1 << 4) +#define ATMEL_TC_TC2XC2S_TIOA0 (2 << 4) +#define ATMEL_TC_TC2XC2S_TIOA1 (3 << 4) + + +/* + * Each TC block has three "channels", each with one counter and controls. + * + * Note that the semantics of ATMEL_TC_TIMER_CLOCKx (input clock selection + * when it's not "external") is silicon-specific. AT91 platforms use one + * set of definitions; AVR32 platforms use a different set. Don't hard-wire + * such knowledge into your code, use the global "atmel_tc_divisors" ... + * where index N is the divisor for clock N+1, else zero to indicate it uses + * the 32 KiHz clock. + * + * The timers can be chained in various ways, and operated in "waveform" + * generation mode (including PWM) or "capture" mode (to time events). In + * both modes, behavior can be configured in many ways. + * + * Each timer has two I/O pins, TIOA and TIOB. Waveform mode uses TIOA as a + * PWM output, and TIOB as either another PWM or as a trigger. Capture mode + * uses them only as inputs. + */ +#define ATMEL_TC_CHAN(idx) ((idx)*0x40) +#define ATMEL_TC_REG(idx, reg) (ATMEL_TC_CHAN(idx) + ATMEL_TC_ ## reg) + +#define ATMEL_TC_CCR 0x00 /* Channel Control Register */ +#define ATMEL_TC_CLKEN (1 << 0) /* clock enable */ +#define ATMEL_TC_CLKDIS (1 << 1) /* clock disable */ +#define ATMEL_TC_SWTRG (1 << 2) /* software trigger */ + +#define ATMEL_TC_CMR 0x04 /* Channel Mode Register */ + +/* Both modes share some CMR bits */ +#define ATMEL_TC_TCCLKS (7 << 0) /* clock source */ +#define ATMEL_TC_TIMER_CLOCK1 (0 << 0) +#define ATMEL_TC_TIMER_CLOCK2 (1 << 0) +#define ATMEL_TC_TIMER_CLOCK3 (2 << 0) +#define ATMEL_TC_TIMER_CLOCK4 (3 << 0) +#define ATMEL_TC_TIMER_CLOCK5 (4 << 0) +#define ATMEL_TC_XC0 (5 << 0) +#define ATMEL_TC_XC1 (6 << 0) +#define ATMEL_TC_XC2 (7 << 0) +#define ATMEL_TC_CLKI (1 << 3) /* clock invert */ +#define ATMEL_TC_BURST (3 << 4) /* clock gating */ +#define ATMEL_TC_GATE_NONE (0 << 4) +#define ATMEL_TC_GATE_XC0 (1 << 4) +#define ATMEL_TC_GATE_XC1 (2 << 4) +#define ATMEL_TC_GATE_XC2 (3 << 4) +#define ATMEL_TC_WAVE (1 << 15) /* true = Waveform mode */ + +/* CAPTURE mode CMR bits */ +#define ATMEL_TC_LDBSTOP (1 << 6) /* counter stops on RB load */ +#define ATMEL_TC_LDBDIS (1 << 7) /* counter disable on RB load */ +#define ATMEL_TC_ETRGEDG (3 << 8) /* external trigger edge */ +#define ATMEL_TC_ETRGEDG_NONE (0 << 8) +#define ATMEL_TC_ETRGEDG_RISING (1 << 8) +#define ATMEL_TC_ETRGEDG_FALLING (2 << 8) +#define ATMEL_TC_ETRGEDG_BOTH (3 << 8) +#define ATMEL_TC_ABETRG (1 << 10) /* external trigger is TIOA? */ +#define ATMEL_TC_CPCTRG (1 << 14) /* RC compare trigger enable */ +#define ATMEL_TC_LDRA (3 << 16) /* RA loading edge (of TIOA) */ +#define ATMEL_TC_LDRA_NONE (0 << 16) +#define ATMEL_TC_LDRA_RISING (1 << 16) +#define ATMEL_TC_LDRA_FALLING (2 << 16) +#define ATMEL_TC_LDRA_BOTH (3 << 16) +#define ATMEL_TC_LDRB (3 << 18) /* RB loading edge (of TIOA) */ +#define ATMEL_TC_LDRB_NONE (0 << 18) +#define ATMEL_TC_LDRB_RISING (1 << 18) +#define ATMEL_TC_LDRB_FALLING (2 << 18) +#define ATMEL_TC_LDRB_BOTH (3 << 18) + +/* WAVEFORM mode CMR bits */ +#define ATMEL_TC_CPCSTOP (1 << 6) /* RC compare stops counter */ +#define ATMEL_TC_CPCDIS (1 << 7) /* RC compare disables counter */ +#define ATMEL_TC_EEVTEDG (3 << 8) /* external event edge */ +#define ATMEL_TC_EEVTEDG_NONE (0 << 8) +#define ATMEL_TC_EEVTEDG_RISING (1 << 8) +#define ATMEL_TC_EEVTEDG_FALLING (2 << 8) +#define ATMEL_TC_EEVTEDG_BOTH (3 << 8) +#define ATMEL_TC_EEVT (3 << 10) /* external event source */ +#define ATMEL_TC_EEVT_TIOB (0 << 10) +#define ATMEL_TC_EEVT_XC0 (1 << 10) +#define ATMEL_TC_EEVT_XC1 (2 << 10) +#define ATMEL_TC_EEVT_XC2 (3 << 10) +#define ATMEL_TC_ENETRG (1 << 12) /* external event is trigger */ +#define ATMEL_TC_WAVESEL (3 << 13) /* waveform type */ +#define ATMEL_TC_WAVESEL_UP (0 << 13) +#define ATMEL_TC_WAVESEL_UPDOWN (1 << 13) +#define ATMEL_TC_WAVESEL_UP_AUTO (2 << 13) +#define ATMEL_TC_WAVESEL_UPDOWN_AUTO (3 << 13) +#define ATMEL_TC_ACPA (3 << 16) /* RA compare changes TIOA */ +#define ATMEL_TC_ACPA_NONE (0 << 16) +#define ATMEL_TC_ACPA_SET (1 << 16) +#define ATMEL_TC_ACPA_CLEAR (2 << 16) +#define ATMEL_TC_ACPA_TOGGLE (3 << 16) +#define ATMEL_TC_ACPC (3 << 18) /* RC compare changes TIOA */ +#define ATMEL_TC_ACPC_NONE (0 << 18) +#define ATMEL_TC_ACPC_SET (1 << 18) +#define ATMEL_TC_ACPC_CLEAR (2 << 18) +#define ATMEL_TC_ACPC_TOGGLE (3 << 18) +#define ATMEL_TC_AEEVT (3 << 20) /* external event changes TIOA */ +#define ATMEL_TC_AEEVT_NONE (0 << 20) +#define ATMEL_TC_AEEVT_SET (1 << 20) +#define ATMEL_TC_AEEVT_CLEAR (2 << 20) +#define ATMEL_TC_AEEVT_TOGGLE (3 << 20) +#define ATMEL_TC_ASWTRG (3 << 22) /* software trigger changes TIOA */ +#define ATMEL_TC_ASWTRG_NONE (0 << 22) +#define ATMEL_TC_ASWTRG_SET (1 << 22) +#define ATMEL_TC_ASWTRG_CLEAR (2 << 22) +#define ATMEL_TC_ASWTRG_TOGGLE (3 << 22) +#define ATMEL_TC_BCPB (3 << 24) /* RB compare changes TIOB */ +#define ATMEL_TC_BCPB_NONE (0 << 24) +#define ATMEL_TC_BCPB_SET (1 << 24) +#define ATMEL_TC_BCPB_CLEAR (2 << 24) +#define ATMEL_TC_BCPB_TOGGLE (3 << 24) +#define ATMEL_TC_BCPC (3 << 26) /* RC compare changes TIOB */ +#define ATMEL_TC_BCPC_NONE (0 << 26) +#define ATMEL_TC_BCPC_SET (1 << 26) +#define ATMEL_TC_BCPC_CLEAR (2 << 26) +#define ATMEL_TC_BCPC_TOGGLE (3 << 26) +#define ATMEL_TC_BEEVT (3 << 28) /* external event changes TIOB */ +#define ATMEL_TC_BEEVT_NONE (0 << 28) +#define ATMEL_TC_BEEVT_SET (1 << 28) +#define ATMEL_TC_BEEVT_CLEAR (2 << 28) +#define ATMEL_TC_BEEVT_TOGGLE (3 << 28) +#define ATMEL_TC_BSWTRG (3 << 30) /* software trigger changes TIOB */ +#define ATMEL_TC_BSWTRG_NONE (0 << 30) +#define ATMEL_TC_BSWTRG_SET (1 << 30) +#define ATMEL_TC_BSWTRG_CLEAR (2 << 30) +#define ATMEL_TC_BSWTRG_TOGGLE (3 << 30) + +#define ATMEL_TC_CV 0x10 /* counter Value */ +#define ATMEL_TC_RA 0x14 /* register A */ +#define ATMEL_TC_RB 0x18 /* register B */ +#define ATMEL_TC_RC 0x1c /* register C */ + +#define ATMEL_TC_SR 0x20 /* status (read-only) */ +/* Status-only flags */ +#define ATMEL_TC_CLKSTA (1 << 16) /* clock enabled */ +#define ATMEL_TC_MTIOA (1 << 17) /* TIOA mirror */ +#define ATMEL_TC_MTIOB (1 << 18) /* TIOB mirror */ + +#define ATMEL_TC_IER 0x24 /* interrupt enable (write-only) */ +#define ATMEL_TC_IDR 0x28 /* interrupt disable (write-only) */ +#define ATMEL_TC_IMR 0x2c /* interrupt mask (read-only) */ + +/* Status and IRQ flags */ +#define ATMEL_TC_COVFS (1 << 0) /* counter overflow */ +#define ATMEL_TC_LOVRS (1 << 1) /* load overrun */ +#define ATMEL_TC_CPAS (1 << 2) /* RA compare */ +#define ATMEL_TC_CPBS (1 << 3) /* RB compare */ +#define ATMEL_TC_CPCS (1 << 4) /* RC compare */ +#define ATMEL_TC_LDRAS (1 << 5) /* RA loading */ +#define ATMEL_TC_LDRBS (1 << 6) /* RB loading */ +#define ATMEL_TC_ETRGS (1 << 7) /* external trigger */ + +#endif -- cgit v0.10.2 From 4d243f92e48a7913938f48fa9ebea5239168bb11 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Fri, 22 Feb 2008 17:28:37 -0800 Subject: atmel_tc clocksource/clockevent code Clocksource and clockevent device based on the Atmel TC blocks. The clockevent device handles both periodic and oneshot modes, so this enables NO_HZ and high res timers on some platforms that previously couldn't use those mechanisms. This works on both AVR32 and AT91 chips, given relevant patches for tclib support (always) and clockevents (or else this will only look like a higher precision clocksource). It's an updated and modularized version of an AT91-only patch that has circulated for some time now. Changes relative to the original patch: * Update to use new tclib API * Replace open-coded do-while loop using goto with a real do-while loop * Minor irq handler optimization: Load register base address from dev_id instead of a global variable. * Aggressively turn off clocks when the clockevent isn't being used * Include the clockevent code on AT91RM9200 as well. The rating is lower than the System Timer, so the clock will usually stay off. * Don't assume that the number of clocks is always equal to the number of irqs. Signed-off-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index a522254..1525882 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c new file mode 100644 index 0000000..17facda --- /dev/null +++ b/drivers/clocksource/tcb_clksrc.c @@ -0,0 +1,305 @@ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +/* + * We're configured to use a specific TC block, one that's not hooked + * up to external hardware, to provide a time solution: + * + * - Two channels combine to create a free-running 32 bit counter + * with a base rate of 5+ MHz, packaged as a clocksource (with + * resolution better than 200 nsec). + * + * - The third channel may be used to provide a 16-bit clockevent + * source, used in either periodic or oneshot mode. This runs + * at 32 KiHZ, and can handle delays of up to two seconds. + * + * A boot clocksource and clockevent source are also currently needed, + * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so + * this code can be used when init_timers() is called, well before most + * devices are set up. (Some low end AT91 parts, which can run uClinux, + * have only the timers in one TC block... they currently don't support + * the tclib code, because of that initialization issue.) + * + * REVISIT behavior during system suspend states... we should disable + * all clocks and save the power. Easily done for clockevent devices, + * but clocksources won't necessarily get the needed notifications. + * For deeper system sleep states, this will be mandatory... + */ + +static void __iomem *tcaddr; + +static cycle_t tc_get_cycles(void) +{ + unsigned long flags; + u32 lower, upper; + + raw_local_irq_save(flags); + do { + upper = __raw_readl(tcaddr + ATMEL_TC_REG(1, CV)); + lower = __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); + } while (upper != __raw_readl(tcaddr + ATMEL_TC_REG(1, CV))); + + raw_local_irq_restore(flags); + return (upper << 16) | lower; +} + +static struct clocksource clksrc = { + .name = "tcb_clksrc", + .rating = 200, + .read = tc_get_cycles, + .mask = CLOCKSOURCE_MASK(32), + .shift = 18, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +#ifdef CONFIG_GENERIC_CLOCKEVENTS + +struct tc_clkevt_device { + struct clock_event_device clkevt; + struct clk *clk; + void __iomem *regs; +}; + +static struct tc_clkevt_device *to_tc_clkevt(struct clock_event_device *clkevt) +{ + return container_of(clkevt, struct tc_clkevt_device, clkevt); +} + +/* For now, we always use the 32K clock ... this optimizes for NO_HZ, + * because using one of the divided clocks would usually mean the + * tick rate can never be less than several dozen Hz (vs 0.5 Hz). + * + * A divided clock could be good for high resolution timers, since + * 30.5 usec resolution can seem "low". + */ +static u32 timer_clock; + +static void tc_mode(enum clock_event_mode m, struct clock_event_device *d) +{ + struct tc_clkevt_device *tcd = to_tc_clkevt(d); + void __iomem *regs = tcd->regs; + + if (tcd->clkevt.mode == CLOCK_EVT_MODE_PERIODIC + || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) { + __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR)); + __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR)); + clk_disable(tcd->clk); + } + + switch (m) { + + /* By not making the gentime core emulate periodic mode on top + * of oneshot, we get lower overhead and improved accuracy. + */ + case CLOCK_EVT_MODE_PERIODIC: + clk_enable(tcd->clk); + + /* slow clock, count up to RC, then irq and restart */ + __raw_writel(timer_clock + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, + regs + ATMEL_TC_REG(2, CMR)); + __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); + + /* Enable clock and interrupts on RC compare */ + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); + + /* go go gadget! */ + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG, + regs + ATMEL_TC_REG(2, CCR)); + break; + + case CLOCK_EVT_MODE_ONESHOT: + clk_enable(tcd->clk); + + /* slow clock, count up to RC, then irq and stop */ + __raw_writel(timer_clock | ATMEL_TC_CPCSTOP + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, + regs + ATMEL_TC_REG(2, CMR)); + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); + + /* set_next_event() configures and starts the timer */ + break; + + default: + break; + } +} + +static int tc_next_event(unsigned long delta, struct clock_event_device *d) +{ + __raw_writel(delta, tcaddr + ATMEL_TC_REG(2, RC)); + + /* go go gadget! */ + __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG, + tcaddr + ATMEL_TC_REG(2, CCR)); + return 0; +} + +static struct tc_clkevt_device clkevt = { + .clkevt = { + .name = "tc_clkevt", + .features = CLOCK_EVT_FEAT_PERIODIC + | CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + /* Should be lower than at91rm9200's system timer */ + .rating = 125, + .cpumask = CPU_MASK_CPU0, + .set_next_event = tc_next_event, + .set_mode = tc_mode, + }, +}; + +static irqreturn_t ch2_irq(int irq, void *handle) +{ + struct tc_clkevt_device *dev = handle; + unsigned int sr; + + sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR)); + if (sr & ATMEL_TC_CPCS) { + dev->clkevt.event_handler(&dev->clkevt); + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + +static struct irqaction tc_irqaction = { + .name = "tc_clkevt", + .flags = IRQF_TIMER | IRQF_DISABLED, + .handler = ch2_irq, +}; + +static void __init setup_clkevents(struct atmel_tc *tc, + struct clk *t0_clk, int clk32k_divisor_idx) +{ + struct platform_device *pdev = tc->pdev; + struct clk *t2_clk = tc->clk[2]; + int irq = tc->irq[2]; + + clkevt.regs = tc->regs; + clkevt.clk = t2_clk; + tc_irqaction.dev_id = &clkevt; + + timer_clock = clk32k_divisor_idx; + + clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift); + clkevt.clkevt.max_delta_ns + = clockevent_delta2ns(0xffff, &clkevt.clkevt); + clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1; + + setup_irq(irq, &tc_irqaction); + + clockevents_register_device(&clkevt.clkevt); +} + +#else /* !CONFIG_GENERIC_CLOCKEVENTS */ + +static void __init setup_clkevents(struct atmel_tc *tc, + struct clk *t0_clk, int clk32k_divisor_idx) +{ + /* NOTHING */ +} + +#endif + +static int __init tcb_clksrc_init(void) +{ + static char bootinfo[] __initdata + = KERN_DEBUG "%s: tc%d at %d.%03d MHz\n"; + + struct platform_device *pdev; + struct atmel_tc *tc; + struct clk *t0_clk, *t1_clk; + u32 rate, divided_rate = 0; + int best_divisor_idx = -1; + int clk32k_divisor_idx = -1; + int i; + + tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name); + if (!tc) { + pr_debug("can't alloc TC for clocksource\n"); + return -ENODEV; + } + tcaddr = tc->regs; + pdev = tc->pdev; + + t0_clk = tc->clk[0]; + clk_enable(t0_clk); + + /* How fast will we be counting? Pick something over 5 MHz. */ + rate = (u32) clk_get_rate(t0_clk); + for (i = 0; i < 5; i++) { + unsigned divisor = atmel_tc_divisors[i]; + unsigned tmp; + + /* remember 32 KiHz clock for later */ + if (!divisor) { + clk32k_divisor_idx = i; + continue; + } + + tmp = rate / divisor; + pr_debug("TC: %u / %-3u [%d] --> %u\n", rate, divisor, i, tmp); + if (best_divisor_idx > 0) { + if (tmp < 5 * 1000 * 1000) + continue; + } + divided_rate = tmp; + best_divisor_idx = i; + } + + clksrc.mult = clocksource_hz2mult(divided_rate, clksrc.shift); + + printk(bootinfo, clksrc.name, CONFIG_ATMEL_TCB_CLKSRC_BLOCK, + divided_rate / 1000000, + ((divided_rate + 500000) % 1000000) / 1000); + + /* tclib will give us three clocks no matter what the + * underlying platform supports. + */ + clk_enable(tc->clk[1]); + + /* channel 0: waveform mode, input mclk/8, clock TIOA0 on overflow */ + __raw_writel(best_divisor_idx /* likely divide-by-8 */ + | ATMEL_TC_WAVE + | ATMEL_TC_WAVESEL_UP /* free-run */ + | ATMEL_TC_ACPA_SET /* TIOA0 rises at 0 */ + | ATMEL_TC_ACPC_CLEAR, /* (duty cycle 50%) */ + tcaddr + ATMEL_TC_REG(0, CMR)); + __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA)); + __raw_writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC)); + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(0, IDR)); /* no irqs */ + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR)); + + /* channel 1: waveform mode, input TIOA0 */ + __raw_writel(ATMEL_TC_XC1 /* input: TIOA0 */ + | ATMEL_TC_WAVE + | ATMEL_TC_WAVESEL_UP, /* free-run */ + tcaddr + ATMEL_TC_REG(1, CMR)); + __raw_writel(0xff, tcaddr + ATMEL_TC_REG(1, IDR)); /* no irqs */ + __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR)); + + /* chain channel 0 to channel 1, then reset all the timers */ + __raw_writel(ATMEL_TC_TC1XC1S_TIOA0, tcaddr + ATMEL_TC_BMR); + __raw_writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR); + + /* and away we go! */ + clocksource_register(&clksrc); + + /* channel 2: periodic and oneshot timer support */ + setup_clkevents(tc, t0_clk, clk32k_divisor_idx); + + return 0; +} +arch_initcall(tcb_clksrc_init); diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index b3ba681..4cf928e 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -30,6 +30,31 @@ config ATMEL_TCLIB blocks found on many Atmel processors. This facilitates using these blocks by different drivers despite processor differences. +config ATMEL_TCB_CLKSRC + bool "TC Block Clocksource" + depends on ATMEL_TCLIB && GENERIC_TIME + default y + help + Select this to get a high precision clocksource based on a + TC block with a 5+ MHz base clock rate. Two timer channels + are combined to make a single 32-bit timer. + + When GENERIC_CLOCKEVENTS is defined, the third timer channel + may be used as a clock event device supporting oneshot mode + (delays of up to two seconds) based on the 32 KiHz clock. + +config ATMEL_TCB_CLKSRC_BLOCK + int + depends on ATMEL_TCB_CLKSRC + prompt "TC Block" if ARCH_AT91RM9200 || ARCH_AT91SAM9260 || CPU_AT32AP700X + default 0 + range 0 1 + help + Some chips provide more than one TC block, so you have the + choice of which one to use for the clock framework. The other + TC can be used for other purposes, such as PWM generation and + interval timing. + config IBM_ASM tristate "Device driver for IBM RSA service processor" depends on X86 && PCI && INPUT && EXPERIMENTAL -- cgit v0.10.2 From 3ee08aea72f44a6d176af7a97f3ad0c67bc65a44 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Thu, 13 Mar 2008 09:44:48 -0800 Subject: tclib: Fix compile warnings Does that have something analagous to this "remove warnings" patch? Seems setup_clkevents() no longer needs a t0_clk parameter either... Signed-off-by: Haavard Skinnemoen diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c index 17facda..f450588 100644 --- a/drivers/clocksource/tcb_clksrc.c +++ b/drivers/clocksource/tcb_clksrc.c @@ -180,10 +180,8 @@ static struct irqaction tc_irqaction = { .handler = ch2_irq, }; -static void __init setup_clkevents(struct atmel_tc *tc, - struct clk *t0_clk, int clk32k_divisor_idx) +static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) { - struct platform_device *pdev = tc->pdev; struct clk *t2_clk = tc->clk[2]; int irq = tc->irq[2]; @@ -205,8 +203,7 @@ static void __init setup_clkevents(struct atmel_tc *tc, #else /* !CONFIG_GENERIC_CLOCKEVENTS */ -static void __init setup_clkevents(struct atmel_tc *tc, - struct clk *t0_clk, int clk32k_divisor_idx) +static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) { /* NOTHING */ } @@ -220,7 +217,7 @@ static int __init tcb_clksrc_init(void) struct platform_device *pdev; struct atmel_tc *tc; - struct clk *t0_clk, *t1_clk; + struct clk *t0_clk; u32 rate, divided_rate = 0; int best_divisor_idx = -1; int clk32k_divisor_idx = -1; @@ -298,7 +295,7 @@ static int __init tcb_clksrc_init(void) clocksource_register(&clksrc); /* channel 2: periodic and oneshot timer support */ - setup_clkevents(tc, t0_clk, clk32k_divisor_idx); + setup_clkevents(tc, clk32k_divisor_idx); return 0; } -- cgit v0.10.2 From 5d4c2707cf605fbf205b6d0a3c63d07204295f22 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Tue, 4 Mar 2008 15:48:37 +0100 Subject: atmel_usba: Kill copy_to_fifo() and copy_from_fifo() These functions do exactly the same as memcpy_toio() and memcpy_fromio() respectively. Signed-off-by: Haavard Skinnemoen Acked-by: David Brownell diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index af8b2a3..33a797b 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -324,53 +324,6 @@ static int vbus_is_present(struct usba_udc *udc) return 1; } -static void copy_to_fifo(void __iomem *fifo, const void *buf, int len) -{ - unsigned long tmp; - - DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len); - for (; len > 0; len -= 4, buf += 4, fifo += 4) { - tmp = *(unsigned long *)buf; - if (len >= 4) { - DBG(DBG_FIFO, " -> %08lx\n", tmp); - __raw_writel(tmp, fifo); - } else { - do { - DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24); - __raw_writeb(tmp >> 24, fifo); - fifo++; - tmp <<= 8; - } while (--len); - break; - } - } -} - -static void copy_from_fifo(void *buf, void __iomem *fifo, int len) -{ - union { - unsigned long *w; - unsigned char *b; - } p; - unsigned long tmp; - - DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len); - for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) { - if (len >= 4) { - tmp = __raw_readl(fifo); - *p.w = tmp; - DBG(DBG_FIFO, " -> %08lx\n", tmp); - } else { - do { - tmp = __raw_readb(fifo); - *p.b = tmp; - DBG(DBG_FIFO, " -> %02lx\n", tmp); - fifo++, p.b++; - } while (--len); - } - } -} - static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) { unsigned int transaction_len; @@ -387,7 +340,7 @@ static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) ep->ep.name, req, transaction_len, req->last_transaction ? ", done" : ""); - copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len); + memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len); usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); req->req.actual += transaction_len; } @@ -476,7 +429,7 @@ static void receive_data(struct usba_ep *ep) bytecount = req->req.length - req->req.actual; } - copy_from_fifo(req->req.buf + req->req.actual, + memcpy_fromio(req->req.buf + req->req.actual, ep->fifo, bytecount); req->req.actual += bytecount; @@ -1231,7 +1184,7 @@ static int do_test_mode(struct usba_udc *udc) } else { usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); usba_writel(udc, TST, USBA_TST_PKT_MODE); - copy_to_fifo(ep->fifo, test_packet_buffer, + memcpy_toio(ep->fifo, test_packet_buffer, sizeof(test_packet_buffer)); usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); dev_info(dev, "Entering Test_Packet mode...\n"); @@ -1536,7 +1489,7 @@ restart: } DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); - copy_from_fifo(crq.data, ep->fifo, sizeof(crq)); + memcpy_fromio(crq.data, ep->fifo, sizeof(crq)); /* Free up one bank in the FIFO so that we can * generate or receive a reply right away. */ -- cgit v0.10.2 From 7a242471af4d15c2637025f0acd352c0a92a4cc4 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Wed, 5 Mar 2008 22:59:15 +0100 Subject: atmel_usba_udc: Fix endpoint names. The endpoints of the atmel_usba_udc driver do not have directional (in/out) or usage (ctrl/bulk/iso) restrictions, as their names incorrectly implied. Signed-off-by: Stelian Pop Acked-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index 33a797b..d5a2c51 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -999,13 +999,13 @@ static const struct usb_gadget_ops usba_udc_ops = { } static struct usba_ep usba_ep[] = { - EP("ep0", 0, 64, 1, 0, 0), - EP("ep1in-bulk", 1, 512, 2, 1, 1), - EP("ep2out-bulk", 2, 512, 2, 1, 1), - EP("ep3in-int", 3, 64, 3, 1, 0), - EP("ep4out-int", 4, 64, 3, 1, 0), - EP("ep5in-iso", 5, 1024, 3, 1, 1), - EP("ep6out-iso", 6, 1024, 3, 1, 1), + EP("ep0", 0, 64, 1, 0, 0), + EP("ep1", 1, 512, 2, 1, 1), + EP("ep2", 2, 512, 2, 1, 1), + EP("ep3-int", 3, 64, 3, 1, 0), + EP("ep4-int", 4, 64, 3, 1, 0), + EP("ep5", 5, 1024, 3, 1, 1), + EP("ep6", 6, 1024, 3, 1, 1), }; #undef EP -- cgit v0.10.2 From 8d12c32c19a2719f6a96a23e94d95699c47e55d0 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Wed, 5 Mar 2008 22:20:36 +0100 Subject: atmel_usba_udc: Kill GPIO_PIN_NONE GPIO_PIN_NONE should no longer be used. Replace it with a simple test against negative values. This is a transitional patch, waiting for gpio_is_valid() to be merged at which point the tests should be revisited. Signed-off-by: Stelian Pop Acked-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index d5a2c51..39d187f 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -1937,7 +1937,7 @@ static int __init usba_udc_probe(struct platform_device *pdev) goto err_device_add; } - if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) { + if (pdata && pdata->vbus_pin >= 0) { if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { udc->vbus_pin = pdata->vbus_pin; -- cgit v0.10.2 From 8d855317fcf7fd9bd900d1e5ef1bea1b14bbe6af Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Wed, 5 Mar 2008 00:00:00 +0100 Subject: atmel_usba_udc: move endpoint declarations into platform data. The atmel_usba_udc driver is being used by several platforms and arches (avr32 and at91 ATM), and each platform may have different endpoint settings. The patch below moves the endpoint declarations into the platform data and make the necessary adjustments for AVR32 (improved by Haavard Skinnemoen ). Signed-off-by: Stelian Pop Acked-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 7678fee..cb47afc 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -1351,9 +1352,39 @@ static struct clk usba0_hclk = { .index = 6, }; +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ + [idx] = { \ + .name = nam, \ + .index = idx, \ + .fifo_size = maxpkt, \ + .nr_banks = maxbk, \ + .can_dma = dma, \ + .can_isoc = isoc, \ + } + +static struct usba_ep_data at32_usba_ep[] __initdata = { + EP("ep0", 0, 64, 1, 0, 0), + EP("ep1", 1, 512, 2, 1, 1), + EP("ep2", 2, 512, 2, 1, 1), + EP("ep3-int", 3, 64, 3, 1, 0), + EP("ep4-int", 4, 64, 3, 1, 0), + EP("ep5", 5, 1024, 3, 1, 1), + EP("ep6", 6, 1024, 3, 1, 1), +}; + +#undef EP + struct platform_device *__init at32_add_device_usba(unsigned int id, struct usba_platform_data *data) { + /* + * pdata doesn't have room for any endpoints, so we need to + * append room for the ones we need right after it. + */ + struct { + struct usba_platform_data pdata; + struct usba_ep_data ep[7]; + } usba_data; struct platform_device *pdev; if (id != 0) @@ -1367,13 +1398,20 @@ at32_add_device_usba(unsigned int id, struct usba_platform_data *data) ARRAY_SIZE(usba0_resource))) goto out_free_pdev; - if (data) { - if (platform_device_add_data(pdev, data, sizeof(*data))) - goto out_free_pdev; + if (data) + usba_data.pdata.vbus_pin = data->vbus_pin; + else + usba_data.pdata.vbus_pin = -EINVAL; - if (data->vbus_pin != GPIO_PIN_NONE) - at32_select_gpio(data->vbus_pin, 0); - } + data = &usba_data.pdata; + data->num_ep = ARRAY_SIZE(at32_usba_ep); + memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep)); + + if (platform_device_add_data(pdev, data, sizeof(usba_data))) + goto out_free_pdev; + + if (data->vbus_pin >= 0) + at32_select_gpio(data->vbus_pin, 0); usba0_pclk.dev = &pdev->dev; usba0_hclk.dev = &pdev->dev; diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index 39d187f..71d3c51 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -27,6 +28,7 @@ static struct usba_udc the_udc; +static struct usba_ep *usba_ep; #ifdef CONFIG_USB_GADGET_DEBUG_FS #include @@ -982,33 +984,6 @@ static const struct usb_gadget_ops usba_udc_ops = { .set_selfpowered = usba_udc_set_selfpowered, }; -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ -{ \ - .ep = { \ - .ops = &usba_ep_ops, \ - .name = nam, \ - .maxpacket = maxpkt, \ - }, \ - .udc = &the_udc, \ - .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \ - .fifo_size = maxpkt, \ - .nr_banks = maxbk, \ - .index = idx, \ - .can_dma = dma, \ - .can_isoc = isoc, \ -} - -static struct usba_ep usba_ep[] = { - EP("ep0", 0, 64, 1, 0, 0), - EP("ep1", 1, 512, 2, 1, 1), - EP("ep2", 2, 512, 2, 1, 1), - EP("ep3-int", 3, 64, 3, 1, 0), - EP("ep4-int", 4, 64, 3, 1, 0), - EP("ep5", 5, 1024, 3, 1, 1), - EP("ep6", 6, 1024, 3, 1, 1), -}; -#undef EP - static struct usb_endpoint_descriptor usba_ep0_desc = { .bLength = USB_DT_ENDPOINT_SIZE, .bDescriptorType = USB_DT_ENDPOINT, @@ -1027,7 +1002,6 @@ static void nop_release(struct device *dev) static struct usba_udc the_udc = { .gadget = { .ops = &usba_udc_ops, - .ep0 = &usba_ep[0].ep, .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), .is_dualspeed = 1, .name = "atmel_usba_udc", @@ -1861,7 +1835,7 @@ static int __init usba_udc_probe(struct platform_device *pdev) regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); - if (!regs || !fifo) + if (!regs || !fifo || !pdata) return -ENXIO; irq = platform_get_irq(pdev, 0); @@ -1909,16 +1883,44 @@ static int __init usba_udc_probe(struct platform_device *pdev) usba_writel(udc, CTRL, 0); clk_disable(pclk); + usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep, + GFP_KERNEL); + if (!usba_ep) + goto err_alloc_ep; + + the_udc.gadget.ep0 = &usba_ep[0].ep; + INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) { + usba_ep[0].ep.ops = &usba_ep_ops; + usba_ep[0].ep.name = pdata->ep[0].name; + usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size; + usba_ep[0].udc = &the_udc; + INIT_LIST_HEAD(&usba_ep[0].queue); + usba_ep[0].fifo_size = pdata->ep[0].fifo_size; + usba_ep[0].nr_banks = pdata->ep[0].nr_banks; + usba_ep[0].index = pdata->ep[0].index; + usba_ep[0].can_dma = pdata->ep[0].can_dma; + usba_ep[0].can_isoc = pdata->ep[0].can_isoc; + + for (i = 1; i < pdata->num_ep; i++) { struct usba_ep *ep = &usba_ep[i]; ep->ep_regs = udc->regs + USBA_EPT_BASE(i); ep->dma_regs = udc->regs + USBA_DMA_BASE(i); ep->fifo = udc->fifo + USBA_FIFO_BASE(i); + ep->ep.ops = &usba_ep_ops; + ep->ep.name = pdata->ep[i].name; + ep->ep.maxpacket = pdata->ep[i].fifo_size; + ep->udc = &the_udc; + INIT_LIST_HEAD(&ep->queue); + ep->fifo_size = pdata->ep[i].fifo_size; + ep->nr_banks = pdata->ep[i].nr_banks; + ep->index = pdata->ep[i].index; + ep->can_dma = pdata->ep[i].can_dma; + ep->can_isoc = pdata->ep[i].can_isoc; list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); } @@ -1937,7 +1939,7 @@ static int __init usba_udc_probe(struct platform_device *pdev) goto err_device_add; } - if (pdata && pdata->vbus_pin >= 0) { + if (pdata->vbus_pin >= 0) { if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { udc->vbus_pin = pdata->vbus_pin; @@ -1957,7 +1959,7 @@ static int __init usba_udc_probe(struct platform_device *pdev) } usba_init_debugfs(udc); - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) + for (i = 1; i < pdata->num_ep; i++) usba_ep_init_debugfs(udc, &usba_ep[i]); return 0; @@ -1965,6 +1967,8 @@ static int __init usba_udc_probe(struct platform_device *pdev) err_device_add: free_irq(irq, udc); err_request_irq: + kfree(usba_ep); +err_alloc_ep: iounmap(udc->fifo); err_map_fifo: iounmap(udc->regs); @@ -1982,10 +1986,11 @@ static int __exit usba_udc_remove(struct platform_device *pdev) { struct usba_udc *udc; int i; + struct usba_platform_data *pdata = pdev->dev.platform_data; udc = platform_get_drvdata(pdev); - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) + for (i = 1; i < pdata->num_ep; i++) usba_ep_cleanup_debugfs(&usba_ep[i]); usba_cleanup_debugfs(udc); diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h index 7597b0b..3fea200 100644 --- a/include/asm-avr32/arch-at32ap/board.h +++ b/include/asm-avr32/arch-at32ap/board.h @@ -38,9 +38,7 @@ struct platform_device * at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, unsigned long fbmem_start, unsigned long fbmem_len); -struct usba_platform_data { - int vbus_pin; -}; +struct usba_platform_data; struct platform_device * at32_add_device_usba(unsigned int id, struct usba_platform_data *data); diff --git a/include/linux/usb/atmel_usba_udc.h b/include/linux/usb/atmel_usba_udc.h new file mode 100644 index 0000000..6311fa2 --- /dev/null +++ b/include/linux/usb/atmel_usba_udc.h @@ -0,0 +1,22 @@ +/* + * Platform data definitions for Atmel USBA gadget driver. + */ +#ifndef __LINUX_USB_USBA_H +#define __LINUX_USB_USBA_H + +struct usba_ep_data { + char *name; + int index; + int fifo_size; + int nr_banks; + int can_dma; + int can_isoc; +}; + +struct usba_platform_data { + int vbus_pin; + int num_ep; + struct usba_ep_data ep[0]; +}; + +#endif /* __LINUX_USB_USBA_H */ -- cgit v0.10.2 From 5275653fa12b30cea6e309cc03e518bfd00073a5 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Thu, 3 Apr 2008 14:51:41 +0200 Subject: atmel_usba_udc: Add missing kfree() in usba_udc_remove() Signed-off-by: Stelian Pop Signed-off-by: Haavard Skinnemoen diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index 71d3c51..ddb7301 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -1998,6 +1998,7 @@ static int __exit usba_udc_remove(struct platform_device *pdev) gpio_free(udc->vbus_pin); free_irq(udc->irq, udc); + kfree(usba_ep); iounmap(udc->fifo); iounmap(udc->regs); clk_put(udc->hclk); -- cgit v0.10.2 From 16a45bc82e61891daec1ffcd057679bdf962aeb8 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Sat, 5 Apr 2008 22:25:47 +0200 Subject: atmel_usba_udc: Add support for AT91CAP9 UDPHS This patch is part of the series adding support for the USB High Speed Device Port on the AT91CAP9 system on chip. The AT91CAP9 uses the same UDPHS IP as the AVR32 and the AT91SAM9RL. The only differences between the AVR32 and the AT91 version of the device are in the enable/disable and suspend/wakeup sequences: the AT91 version needs to toggle the USB bias and pulldown explicitly. Signed-off-by: Stelian Pop Acked-by: Andrew Victor Acked-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 6f45dd6..d681bb2 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -118,10 +118,10 @@ config USB_AMD5536UDC config USB_GADGET_ATMEL_USBA boolean "Atmel USBA" select USB_GADGET_DUALSPEED - depends on AVR32 + depends on AVR32 || ARCH_AT91CAP9 help USBA is the integrated high-speed USB Device controller on - the AT32AP700x processors from Atmel. + the AT32AP700x and AT91CAP9 processors from Atmel. config USB_ATMEL_USBA tristate diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index ddb7301..c9a3c2a 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -326,6 +326,28 @@ static int vbus_is_present(struct usba_udc *udc) return 1; } +#if defined(CONFIG_AVR32) + +static void toggle_bias(int is_on) +{ +} + +#elif defined(CONFIG_ARCH_AT91) + +#include + +static void toggle_bias(int is_on) +{ + unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR); + + if (is_on) + at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); + else + at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); +} + +#endif /* CONFIG_ARCH_AT91 */ + static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) { unsigned int transaction_len; @@ -1457,7 +1479,7 @@ restart: DBG(DBG_HW, "Packet length: %u\n", pkt_len); if (pkt_len != sizeof(crq)) { pr_warning("udc: Invalid packet length %u " - "(expected %lu)\n", pkt_len, sizeof(crq)); + "(expected %zu)\n", pkt_len, sizeof(crq)); set_protocol_stall(udc, ep); return; } @@ -1615,6 +1637,7 @@ static irqreturn_t usba_udc_irq(int irq, void *devid) DBG(DBG_INT, "irq, status=%#08x\n", status); if (status & USBA_DET_SUSPEND) { + toggle_bias(0); usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); DBG(DBG_BUS, "Suspend detected\n"); if (udc->gadget.speed != USB_SPEED_UNKNOWN @@ -1626,6 +1649,7 @@ static irqreturn_t usba_udc_irq(int irq, void *devid) } if (status & USBA_WAKE_UP) { + toggle_bias(1); usba_writel(udc, INT_CLR, USBA_WAKE_UP); DBG(DBG_BUS, "Wake Up CPU detected\n"); } @@ -1719,12 +1743,14 @@ static irqreturn_t usba_vbus_irq(int irq, void *devid) vbus = gpio_get_value(udc->vbus_pin); if (vbus != udc->vbus_prev) { if (vbus) { - usba_writel(udc, CTRL, USBA_EN_USBA); + toggle_bias(1); + usba_writel(udc, CTRL, USBA_ENABLE_MASK); usba_writel(udc, INT_ENB, USBA_END_OF_RESET); } else { udc->gadget.speed = USB_SPEED_UNKNOWN; reset_all_endpoints(udc); - usba_writel(udc, CTRL, 0); + toggle_bias(0); + usba_writel(udc, CTRL, USBA_DISABLE_MASK); spin_unlock(&udc->lock); udc->driver->disconnect(&udc->gadget); spin_lock(&udc->lock); @@ -1777,7 +1803,8 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver) /* If Vbus is present, enable the controller and wait for reset */ spin_lock_irqsave(&udc->lock, flags); if (vbus_is_present(udc) && udc->vbus_prev == 0) { - usba_writel(udc, CTRL, USBA_EN_USBA); + toggle_bias(1); + usba_writel(udc, CTRL, USBA_ENABLE_MASK); usba_writel(udc, INT_ENB, USBA_END_OF_RESET); } spin_unlock_irqrestore(&udc->lock, flags); @@ -1810,7 +1837,8 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) spin_unlock_irqrestore(&udc->lock, flags); /* This will also disable the DP pullup */ - usba_writel(udc, CTRL, 0); + toggle_bias(0); + usba_writel(udc, CTRL, USBA_DISABLE_MASK); driver->unbind(&udc->gadget); udc->gadget.dev.driver = NULL; @@ -1880,7 +1908,8 @@ static int __init usba_udc_probe(struct platform_device *pdev) /* Make sure we start from a clean slate */ clk_enable(pclk); - usba_writel(udc, CTRL, 0); + toggle_bias(0); + usba_writel(udc, CTRL, USBA_DISABLE_MASK); clk_disable(pclk); usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep, diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h index 08bf6f9..f7baea3 100644 --- a/drivers/usb/gadget/atmel_usba_udc.h +++ b/drivers/usb/gadget/atmel_usba_udc.h @@ -41,6 +41,15 @@ #define USBA_EN_USBA (1 << 8) #define USBA_DETACH (1 << 9) #define USBA_REMOTE_WAKE_UP (1 << 10) +#define USBA_PULLD_DIS (1 << 11) + +#if defined(CONFIG_AVR32) +#define USBA_ENABLE_MASK USBA_EN_USBA +#define USBA_DISABLE_MASK 0 +#elif defined(CONFIG_ARCH_AT91) +#define USBA_ENABLE_MASK (USBA_EN_USBA | USBA_PULLD_DIS) +#define USBA_DISABLE_MASK USBA_DETACH +#endif /* CONFIG_ARCH_AT91 */ /* Bitfields in FNUM */ #define USBA_MICRO_FRAME_NUM_OFFSET 0 -- cgit v0.10.2 From 3a4e832cccc5baba98ba010e38c58266954228a7 Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Tue, 4 Dec 2007 13:15:41 +0100 Subject: Generate raw keyboard codes for AVR32 architecture This patchs adds the AVR32 architecture to the list of archs to generate a table of raw keyboard keycodes. Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c index 4dbd342..9769bf8 100644 --- a/drivers/char/keyboard.c +++ b/drivers/char/keyboard.c @@ -1033,7 +1033,8 @@ DECLARE_TASKLET_DISABLED(keyboard_tasklet, kbd_bh, 0); #if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) ||\ defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) ||\ defined(CONFIG_PARISC) || defined(CONFIG_SUPERH) ||\ - (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) + (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) ||\ + defined(CONFIG_AVR32) #define HW_RAW(dev) (test_bit(EV_MSC, dev->evbit) && test_bit(MSC_RAW, dev->mscbit) &&\ ((dev)->id.bustype == BUS_I8042) && ((dev)->id.vendor == 0x0001) && ((dev)->id.product == 0x0001)) -- cgit v0.10.2 From e573ebb0326f2f4a29ee2bd143bfc88ab0332926 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 3 Feb 2008 14:22:18 +0300 Subject: avr32: cleanup - use _AC macro to define PAGE_SIZE PAGE_SIZE is used both from assembly and C code. We want to have type specifiers when using it from C, but this will make the assembler confused, so we need to make it conditional. This is exactly what the _AC macro is for, so using it allows us to get rid of a few lines of cpp noise. Signed-off-by: Cyrill Gorcunov Signed-off-by: Haavard Skinnemoen diff --git a/include/asm-avr32/page.h b/include/asm-avr32/page.h index 5582968..cbbc5ca 100644 --- a/include/asm-avr32/page.h +++ b/include/asm-avr32/page.h @@ -8,13 +8,11 @@ #ifndef __ASM_AVR32_PAGE_H #define __ASM_AVR32_PAGE_H +#include + /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 -#ifdef __ASSEMBLY__ -#define PAGE_SIZE (1 << PAGE_SHIFT) -#else -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#endif +#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #define PTE_MASK PAGE_MASK -- cgit v0.10.2 From 040b28fc0a69281a46adcebd6b31dd74da4a8d49 Mon Sep 17 00:00:00 2001 From: Ben Nizette Date: Thu, 7 Feb 2008 15:28:57 +1100 Subject: avr32: pass i2c board info through at32_add_device_twi New-style I2C drivers require that motherboard-mounted I2C devices are registered with the I2C core, typically at arch_initcall time. This can be done nice and neat by passing the struct i2c_board_info[] through at32_add_device_twi just like we do for the SPI board info. While we've got the hood up, remove a duplicate declaration of at32_add_device_twi() in board.h. [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration] Signed-Off-By: Ben Nizette Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index cb47afc..6302bfd 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -990,7 +990,9 @@ static struct clk atmel_twi0_pclk = { .index = 2, }; -struct platform_device *__init at32_add_device_twi(unsigned int id) +struct platform_device *__init at32_add_device_twi(unsigned int id, + struct i2c_board_info *b, + unsigned int n) { struct platform_device *pdev; @@ -1010,6 +1012,9 @@ struct platform_device *__init at32_add_device_twi(unsigned int id) atmel_twi0_pclk.dev = &pdev->dev; + if (b) + i2c_register_board_info(id, b, n); + platform_device_add(pdev); return pdev; diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h index 3fea200..a4e2d28 100644 --- a/include/asm-avr32/arch-at32ap/board.h +++ b/include/asm-avr32/arch-at32ap/board.h @@ -66,7 +66,10 @@ struct platform_device *at32_add_device_pwm(u32 mask); struct platform_device * at32_add_device_ssc(unsigned int id, unsigned int flags); -struct platform_device *at32_add_device_twi(unsigned int id); +struct i2c_board_info; +struct platform_device *at32_add_device_twi(unsigned int id, + struct i2c_board_info *b, + unsigned int n); struct platform_device *at32_add_device_mci(unsigned int id); struct platform_device *at32_add_device_ac97c(unsigned int id); struct platform_device *at32_add_device_abdac(unsigned int id); -- cgit v0.10.2 From 62c6df62f9575cffd673bfc395270e6896a12a60 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Tue, 12 Feb 2008 14:45:49 -0800 Subject: avr32: start clocksource cleanup Start cleaning up the AVR32 clocksource mess, starting with the cycle counter clocksource: remove unneeded pseudo-RTC (just inline that call to mktime) and associated build warning, and unused sysdev. Add comment about the problem using the cycle counter register, and adjust the clocksource rating accordingly. Later patches can make this usable again (by disabling use of the idle state and providing a proper clocksource without the weak binding hacks) and move towards TCB-based clockevent support (including high resolution timers) that's shared between AT91 and AVR32. Signed-off-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c index 36a46c3..bf2f762 100644 --- a/arch/avr32/kernel/time.c +++ b/arch/avr32/kernel/time.c @@ -38,9 +38,15 @@ cycle_t __weak read_cycle_count(void) return (cycle_t)sysreg_read(COUNT); } +/* + * The architectural cycle count registers are a fine clocksource unless + * the system idle loop use sleep states like "idle": the CPU cycles + * measured by COUNT (and COMPARE) don't happen during sleep states. + * So we rate the clocksource using COUNT as very low quality. + */ struct clocksource __weak clocksource_avr32 = { .name = "avr32", - .rating = 350, + .rating = 50, .read = read_cycle_count, .mask = CLOCKSOURCE_MASK(32), .shift = 16, @@ -55,22 +61,6 @@ struct irqaction timer_irqaction = { .name = "timer", }; -/* - * By default we provide the null RTC ops - */ -static unsigned long null_rtc_get_time(void) -{ - return mktime(2007, 1, 1, 0, 0, 0); -} - -static int null_rtc_set_time(unsigned long sec) -{ - return 0; -} - -static unsigned long (*rtc_get_time)(void) = null_rtc_get_time; -static int (*rtc_set_time)(unsigned long) = null_rtc_set_time; - static void avr32_timer_ack(void) { u32 count; @@ -190,7 +180,7 @@ void __init time_init(void) */ sysreg_write(COMPARE, 0); - xtime.tv_sec = rtc_get_time(); + xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0); xtime.tv_nsec = 0; set_normalized_timespec(&wall_to_monotonic, @@ -212,22 +202,3 @@ void __init time_init(void) return; } } - -static struct sysdev_class timer_class = { - .name = "timer", -}; - -static struct sys_device timer_device = { - .id = 0, - .cls = &timer_class, -}; - -static int __init init_timer_sysfs(void) -{ - int err = sysdev_class_register(&timer_class); - if (!err) - err = sysdev_register(&timer_device); - return err; -} - -device_initcall(init_timer_sysfs); -- cgit v0.10.2 From 46acb55b4b745256a33b2eaeb6d21fffdb091745 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Sun, 24 Feb 2008 14:09:25 +0100 Subject: avr32: Delete mostly unused header asm/intc.h Move the only thing that was actually implemented and used in asm/intc.h, intc_get_pending(), into asm/irq.h and delete asm/intc.h Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c index 0b286cd..097cf4e 100644 --- a/arch/avr32/mach-at32ap/intc.c +++ b/arch/avr32/mach-at32ap/intc.c @@ -13,7 +13,6 @@ #include #include -#include #include #include "intc.h" diff --git a/arch/avr32/oprofile/op_model_avr32.c b/arch/avr32/oprofile/op_model_avr32.c index e2f876b..df42325 100644 --- a/arch/avr32/oprofile/op_model_avr32.c +++ b/arch/avr32/oprofile/op_model_avr32.c @@ -16,7 +16,6 @@ #include #include -#include #include #include diff --git a/include/asm-avr32/intc.h b/include/asm-avr32/intc.h deleted file mode 100644 index 1ac9ca7..0000000 --- a/include/asm-avr32/intc.h +++ /dev/null @@ -1,128 +0,0 @@ -#ifndef __ASM_AVR32_INTC_H -#define __ASM_AVR32_INTC_H - -#include -#include - -struct irq_controller; -struct irqaction; -struct pt_regs; - -struct platform_device; - -/* Information about the internal interrupt controller */ -struct intc_device { - /* ioremapped address of configuration block */ - void __iomem *regs; - - /* the physical device */ - struct platform_device *pdev; - - /* Number of interrupt lines per group. */ - unsigned int irqs_per_group; - - /* The highest group ID + 1 */ - unsigned int nr_groups; - - /* - * Bitfield indicating which groups are actually in use. The - * size of the array is - * ceil(group_max / (8 * sizeof(unsigned int))). - */ - unsigned int group_mask[]; -}; - -struct irq_controller_class { - /* - * A short name identifying this kind of controller. - */ - const char *typename; - /* - * Handle the IRQ. Must do any necessary acking and masking. - */ - irqreturn_t (*handle)(int irq, void *dev_id, struct pt_regs *regs); - /* - * Register a new IRQ handler. - */ - int (*setup)(struct irq_controller *ctrl, unsigned int irq, - struct irqaction *action); - /* - * Unregister a IRQ handler. - */ - void (*free)(struct irq_controller *ctrl, unsigned int irq, - void *dev_id); - /* - * Mask the IRQ in the interrupt controller. - */ - void (*mask)(struct irq_controller *ctrl, unsigned int irq); - /* - * Unmask the IRQ in the interrupt controller. - */ - void (*unmask)(struct irq_controller *ctrl, unsigned int irq); - /* - * Set the type of the IRQ. See below for possible types. - * Return -EINVAL if a given type is not supported - */ - int (*set_type)(struct irq_controller *ctrl, unsigned int irq, - unsigned int type); - /* - * Return the IRQ type currently set - */ - unsigned int (*get_type)(struct irq_controller *ctrl, unsigned int irq); -}; - -struct irq_controller { - struct irq_controller_class *class; - unsigned int irq_group; - unsigned int first_irq; - unsigned int nr_irqs; - struct list_head list; -}; - -struct intc_group_desc { - struct irq_controller *ctrl; - irqreturn_t (*handle)(int, void *, struct pt_regs *); - unsigned long flags; - void *dev_id; - const char *devname; -}; - -/* - * The internal interrupt controller. Defined in board/part-specific - * devices.c. - * TODO: Should probably be defined per-cpu. - */ -extern struct intc_device intc; - -extern int request_internal_irq(unsigned int irq, - irqreturn_t (*handler)(int, void *, struct pt_regs *), - unsigned long irqflags, - const char *devname, void *dev_id); -extern void free_internal_irq(unsigned int irq); - -/* Only used by time_init() */ -extern int setup_internal_irq(unsigned int irq, struct intc_group_desc *desc); - -/* - * Set interrupt priority for a given group. `group' can be found by - * using irq_to_group(irq). Priority can be from 0 (lowest) to 3 - * (highest). Higher-priority interrupts will preempt lower-priority - * interrupts (unless interrupts are masked globally). - * - * This function does not check for conflicts within a group. - */ -extern int intc_set_priority(unsigned int group, - unsigned int priority); - -/* - * Returns a bitmask of pending interrupts in a group. - */ -extern unsigned long intc_get_pending(unsigned int group); - -/* - * Register a new external interrupt controller. Returns the first - * external IRQ number that is assigned to the new controller. - */ -extern int intc_register_controller(struct irq_controller *ctrl); - -#endif /* __ASM_AVR32_INTC_H */ diff --git a/include/asm-avr32/irq.h b/include/asm-avr32/irq.h index 9315724..c563b77 100644 --- a/include/asm-avr32/irq.h +++ b/include/asm-avr32/irq.h @@ -14,6 +14,11 @@ #ifndef __ASSEMBLER__ int nmi_enable(void); void nmi_disable(void); + +/* + * Returns a bitmask of pending interrupts in a group. + */ +extern unsigned long intc_get_pending(unsigned int group); #endif #endif /* __ASM_AVR32_IOCTLS_H */ -- cgit v0.10.2 From 02f99d1ca70d190ce12d040971819be22ea710c8 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Sun, 24 Feb 2008 23:19:22 +0100 Subject: avr32: Use constants from sysreg.h in asm.h Signed-off-by: Haavard Skinnemoen diff --git a/include/asm-avr32/asm.h b/include/asm-avr32/asm.h index 515c761..a2c64f4 100644 --- a/include/asm-avr32/asm.h +++ b/include/asm-avr32/asm.h @@ -12,10 +12,10 @@ #include #include -#define mask_interrupts ssrf SR_GM_BIT -#define mask_exceptions ssrf SR_EM_BIT -#define unmask_interrupts csrf SR_GM_BIT -#define unmask_exceptions csrf SR_EM_BIT +#define mask_interrupts ssrf SYSREG_GM_OFFSET +#define mask_exceptions ssrf SYSREG_EM_OFFSET +#define unmask_interrupts csrf SYSREG_GM_OFFSET +#define unmask_exceptions csrf SYSREG_EM_OFFSET #ifdef CONFIG_FRAME_POINTER .macro save_fp -- cgit v0.10.2 From 7e59128f31e0c57d52e86d57730d4c9281494dda Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Sun, 24 Feb 2008 23:24:26 +0100 Subject: avr32: Move sleep code into mach-at32ap Create a new file, pm-at32ap700x.S, in mach-at32ap and move the CPU idle sleep code there. Make it possible to disable the sleep code. Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S index 8cf16d7..5f31702 100644 --- a/arch/avr32/kernel/entry-avr32b.S +++ b/arch/avr32/kernel/entry-avr32b.S @@ -741,26 +741,6 @@ irq_level\level: .section .irq.text,"ax",@progbits -.global cpu_idle_sleep -cpu_idle_sleep: - mask_interrupts - get_thread_info r8 - ld.w r9, r8[TI_flags] - bld r9, TIF_NEED_RESCHED - brcs cpu_idle_enable_int_and_exit - sbr r9, TIF_CPU_GOING_TO_SLEEP - st.w r8[TI_flags], r9 - unmask_interrupts - sleep 0 -cpu_idle_skip_sleep: - mask_interrupts - ld.w r9, r8[TI_flags] - cbr r9, TIF_CPU_GOING_TO_SLEEP - st.w r8[TI_flags], r9 -cpu_idle_enable_int_and_exit: - unmask_interrupts - retal r12 - .global irq_level0 .global irq_level1 .global irq_level2 diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c index 7f4af0b..3de1154 100644 --- a/arch/avr32/kernel/process.c +++ b/arch/avr32/kernel/process.c @@ -18,11 +18,11 @@ #include #include +#include + void (*pm_power_off)(void) = NULL; EXPORT_SYMBOL(pm_power_off); -extern void cpu_idle_sleep(void); - /* * This file handles the architecture-dependent parts of process handling.. */ diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile index 5e9f821..83cab2a 100644 --- a/arch/avr32/mach-at32ap/Makefile +++ b/arch/avr32/mach-at32ap/Makefile @@ -1,4 +1,4 @@ obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o -obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o +obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o diff --git a/arch/avr32/mach-at32ap/pm-at32ap700x.S b/arch/avr32/mach-at32ap/pm-at32ap700x.S new file mode 100644 index 0000000..949e248 --- /dev/null +++ b/arch/avr32/mach-at32ap/pm-at32ap700x.S @@ -0,0 +1,66 @@ +/* + * Low-level Power Management code. + * + * Copyright (C) 2008 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include + + .section .bss, "wa", @nobits + .global disable_idle_sleep + .type disable_idle_sleep, @object +disable_idle_sleep: + .int 4 + .size disable_idle_sleep, . - disable_idle_sleep + + /* Keep this close to the irq handlers */ + .section .irq.text, "ax", @progbits + + /* + * void cpu_enter_idle(void) + * + * Put the CPU into "idle" mode, in which it will consume + * significantly less power. + * + * If an interrupt comes along in the window between + * unmask_interrupts and the sleep instruction below, the + * interrupt code will adjust the return address so that we + * never execute the sleep instruction. This is required + * because the AP7000 doesn't unmask interrupts when entering + * sleep modes; later CPUs may not need this workaround. + */ + .global cpu_enter_idle + .type cpu_enter_idle, @function +cpu_enter_idle: + mask_interrupts + get_thread_info r8 + ld.w r9, r8[TI_flags] + bld r9, TIF_NEED_RESCHED + brcs .Lret_from_sleep + sbr r9, TIF_CPU_GOING_TO_SLEEP + st.w r8[TI_flags], r9 + unmask_interrupts + sleep CPU_SLEEP_IDLE + .size cpu_idle_sleep, . - cpu_idle_sleep + + /* + * Common return path for PM functions that don't run from + * SRAM. + */ + .global cpu_idle_skip_sleep + .type cpu_idle_skip_sleep, @function +cpu_idle_skip_sleep: + mask_interrupts + ld.w r9, r8[TI_flags] + cbr r9, TIF_CPU_GOING_TO_SLEEP + st.w r8[TI_flags], r9 +.Lret_from_sleep: + unmask_interrupts + retal r12 + .size cpu_idle_skip_sleep, . - cpu_idle_skip_sleep diff --git a/include/asm-avr32/arch-at32ap/pm.h b/include/asm-avr32/arch-at32ap/pm.h new file mode 100644 index 0000000..356e430 --- /dev/null +++ b/include/asm-avr32/arch-at32ap/pm.h @@ -0,0 +1,48 @@ +/* + * AVR32 AP Power Management. + * + * Copyright (C) 2008 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_AVR32_ARCH_PM_H +#define __ASM_AVR32_ARCH_PM_H + +/* Possible arguments to the "sleep" instruction */ +#define CPU_SLEEP_IDLE 0 +#define CPU_SLEEP_FROZEN 1 +#define CPU_SLEEP_STANDBY 2 +#define CPU_SLEEP_STOP 3 +#define CPU_SLEEP_STATIC 5 + +#ifndef __ASSEMBLY__ +extern void cpu_enter_idle(void); + +extern bool disable_idle_sleep; + +static inline void cpu_disable_idle_sleep(void) +{ + disable_idle_sleep = true; +} + +static inline void cpu_enable_idle_sleep(void) +{ + disable_idle_sleep = false; +} + +static inline void cpu_idle_sleep(void) +{ + /* + * If we're using the COUNT and COMPARE registers for + * timekeeping, we can't use the IDLE state. + */ + if (disable_idle_sleep) + cpu_relax(); + else + cpu_enter_idle(); +} +#endif + +#endif /* __ASM_AVR32_ARCH_PM_H */ -- cgit v0.10.2 From e723ff666a5da8f7fda4e36ebfeafac2175a5c6e Mon Sep 17 00:00:00 2001 From: David Brownell Date: Thu, 14 Feb 2008 11:24:02 -0800 Subject: avr32: Generic clockevents support This combines three patches from David Brownell: * avr32: tclib support * avr32: simplify clocksources * avr32: Turn count/compare into a oneshot clockevent device Register both TC blocks (instead of just the first one) so that the AT32/AT91 tclib code will pick them up (instead of just the avr32-only PIT-style clocksource). Rename the first one and its resources appropriately. More cleanups to the cycle counter clocksource code - Disable all the weak symbol magic; remove the AVR32-only TCB-based clocksource code (source and header). - Mark the __init code properly. - Don't forget to report IRQF_TIMER. - Make the system work properly with this clocksource, by preventing use of the CPU "idle" sleep state in the idle loop when it's used. Package the avr32 count/compare timekeeping support as a oneshot clockevent device, so it supports NO_HZ and high res timers. This means it also supports plugging in other clockevent devices and clocksources. Signed-off-by: David Brownell Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 28e0caf..09ad799 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -47,6 +47,9 @@ config RWSEM_GENERIC_SPINLOCK config GENERIC_TIME def_bool y +config GENERIC_CLOCKEVENTS + def_bool y + config RWSEM_XCHGADD_ALGORITHM def_bool n @@ -70,6 +73,8 @@ source "init/Kconfig" menu "System Type and features" +source "kernel/time/Kconfig" + config SUBARCH_AVR32B bool config MMU diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c index bf2f762..00a9862 100644 --- a/arch/avr32/kernel/time.c +++ b/arch/avr32/kernel/time.c @@ -1,16 +1,12 @@ /* * Copyright (C) 2004-2007 Atmel Corporation * - * Based on MIPS implementation arch/mips/kernel/time.c - * Copyright 2001 MontaVista Software Inc. - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - #include -#include +#include #include #include #include @@ -27,13 +23,10 @@ #include #include -/* how many counter cycles in a jiffy? */ -static u32 cycles_per_jiffy; +#include -/* the count value for the next timer interrupt */ -static u32 expirelo; -cycle_t __weak read_cycle_count(void) +static cycle_t read_cycle_count(void) { return (cycle_t)sysreg_read(COUNT); } @@ -42,10 +35,11 @@ cycle_t __weak read_cycle_count(void) * The architectural cycle count registers are a fine clocksource unless * the system idle loop use sleep states like "idle": the CPU cycles * measured by COUNT (and COMPARE) don't happen during sleep states. + * Their duration also changes if cpufreq changes the CPU clock rate. * So we rate the clocksource using COUNT as very low quality. */ -struct clocksource __weak clocksource_avr32 = { - .name = "avr32", +static struct clocksource counter = { + .name = "avr32_counter", .rating = 50, .read = read_cycle_count, .mask = CLOCKSOURCE_MASK(32), @@ -53,152 +47,109 @@ struct clocksource __weak clocksource_avr32 = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -irqreturn_t __weak timer_interrupt(int irq, void *dev_id); - -struct irqaction timer_irqaction = { - .handler = timer_interrupt, - .flags = IRQF_DISABLED, - .name = "timer", -}; - -static void avr32_timer_ack(void) -{ - u32 count; - - /* Ack this timer interrupt and set the next one */ - expirelo += cycles_per_jiffy; - /* setting COMPARE to 0 stops the COUNT-COMPARE */ - if (expirelo == 0) { - sysreg_write(COMPARE, expirelo + 1); - } else { - sysreg_write(COMPARE, expirelo); - } - - /* Check to see if we have missed any timer interrupts */ - count = sysreg_read(COUNT); - if ((count - expirelo) < 0x7fffffff) { - expirelo = count + cycles_per_jiffy; - sysreg_write(COMPARE, expirelo); - } -} - -int __weak avr32_hpt_init(void) +static irqreturn_t timer_interrupt(int irq, void *dev_id) { - int ret; - unsigned long mult, shift, count_hz; - - count_hz = clk_get_rate(boot_cpu_data.clk); - shift = clocksource_avr32.shift; - mult = clocksource_hz2mult(count_hz, shift); - clocksource_avr32.mult = mult; + struct clock_event_device *evdev = dev_id; - { - u64 tmp; + /* + * Disable the interrupt until the clockevent subsystem + * reprograms it. + */ + sysreg_write(COMPARE, 0); - tmp = TICK_NSEC; - tmp <<= shift; - tmp += mult / 2; - do_div(tmp, mult); + evdev->event_handler(evdev); + return IRQ_HANDLED; +} - cycles_per_jiffy = tmp; - } +static struct irqaction timer_irqaction = { + .handler = timer_interrupt, + .flags = IRQF_TIMER | IRQF_DISABLED, + .name = "avr32_comparator", +}; - ret = setup_irq(0, &timer_irqaction); - if (ret) { - pr_debug("timer: could not request IRQ 0: %d\n", ret); - return -ENODEV; - } +static int comparator_next_event(unsigned long delta, + struct clock_event_device *evdev) +{ + unsigned long flags; - printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, " - "%lu.%03lu MHz\n", - ((count_hz + 500) / 1000) / 1000, - ((count_hz + 500) / 1000) % 1000); + raw_local_irq_save(flags); - return 0; -} + /* The time to read COUNT then update COMPARE must be less + * than the min_delta_ns value for this clockevent source. + */ + sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1); -/* - * Taken from MIPS c0_hpt_timer_init(). - * - * The reason COUNT is written twice is probably to make sure we don't get any - * timer interrupts while we are messing with the counter. - */ -int __weak avr32_hpt_start(void) -{ - u32 count = sysreg_read(COUNT); - expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy; - sysreg_write(COUNT, expirelo - cycles_per_jiffy); - sysreg_write(COMPARE, expirelo); - sysreg_write(COUNT, count); + raw_local_irq_restore(flags); return 0; } -/* - * local_timer_interrupt() does profiling and process accounting on a - * per-CPU basis. - * - * In UP mode, it is invoked from the (global) timer_interrupt. - */ -void local_timer_interrupt(int irq, void *dev_id) +static void comparator_mode(enum clock_event_mode mode, + struct clock_event_device *evdev) { - if (current->pid) - profile_tick(CPU_PROFILING); - update_process_times(user_mode(get_irq_regs())); + switch (mode) { + case CLOCK_EVT_MODE_ONESHOT: + pr_debug("%s: start\n", evdev->name); + /* FALLTHROUGH */ + case CLOCK_EVT_MODE_RESUME: + cpu_disable_idle_sleep(); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + sysreg_write(COMPARE, 0); + pr_debug("%s: stop\n", evdev->name); + cpu_enable_idle_sleep(); + break; + default: + BUG(); + } } -irqreturn_t __weak timer_interrupt(int irq, void *dev_id) -{ - /* ack timer interrupt and try to set next interrupt */ - avr32_timer_ack(); - - /* - * Call the generic timer interrupt handler - */ - write_seqlock(&xtime_lock); - do_timer(1); - write_sequnlock(&xtime_lock); - - /* - * In UP mode, we call local_timer_interrupt() to do profiling - * and process accounting. - * - * SMP is not supported yet. - */ - local_timer_interrupt(irq, dev_id); - - return IRQ_HANDLED; -} +static struct clock_event_device comparator = { + .name = "avr32_comparator", + .features = CLOCK_EVT_FEAT_ONESHOT, + .shift = 16, + .rating = 50, + .cpumask = CPU_MASK_CPU0, + .set_next_event = comparator_next_event, + .set_mode = comparator_mode, +}; void __init time_init(void) { + unsigned long counter_hz; int ret; - /* - * Make sure we don't get any COMPARE interrupts before we can - * handle them. - */ - sysreg_write(COMPARE, 0); - xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0); xtime.tv_nsec = 0; set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); - ret = avr32_hpt_init(); - if (ret) { - pr_debug("timer: failed setup: %d\n", ret); - return; - } + /* figure rate for counter */ + counter_hz = clk_get_rate(boot_cpu_data.clk); + counter.mult = clocksource_hz2mult(counter_hz, counter.shift); - ret = clocksource_register(&clocksource_avr32); + ret = clocksource_register(&counter); if (ret) pr_debug("timer: could not register clocksource: %d\n", ret); - ret = avr32_hpt_start(); - if (ret) { - pr_debug("timer: failed starting: %d\n", ret); - return; + /* setup COMPARE clockevent */ + comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift); + comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator); + comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1; + + sysreg_write(COMPARE, 0); + timer_irqaction.dev_id = &comparator; + + ret = setup_irq(0, &timer_irqaction); + if (ret) + pr_debug("timer: could not request IRQ 0: %d\n", ret); + else { + clockevents_register_device(&comparator); + + pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name, + ((counter_hz + 500) / 1000) / 1000, + ((counter_hz + 500) / 1000) % 1000); } } diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile index 83cab2a..e890094 100644 --- a/arch/avr32/mach-at32ap/Makefile +++ b/arch/avr32/mach-at32ap/Makefile @@ -1,4 +1,3 @@ obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o -obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 6302bfd..22c302a 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -606,19 +606,32 @@ static inline void set_ebi_sfr_bits(u32 mask) } /* -------------------------------------------------------------------- - * System Timer/Counter (TC) + * Timer/Counter (TC) * -------------------------------------------------------------------- */ -static struct resource at32_systc0_resource[] = { + +static struct resource at32_tcb0_resource[] = { PBMEM(0xfff00c00), IRQ(22), }; -struct platform_device at32_systc0_device = { - .name = "systc", +static struct platform_device at32_tcb0_device = { + .name = "atmel_tcb", .id = 0, - .resource = at32_systc0_resource, - .num_resources = ARRAY_SIZE(at32_systc0_resource), + .resource = at32_tcb0_resource, + .num_resources = ARRAY_SIZE(at32_tcb0_resource), +}; +DEV_CLK(t0_clk, at32_tcb0, pbb, 3); + +static struct resource at32_tcb1_resource[] = { + PBMEM(0xfff01000), + IRQ(23), +}; +static struct platform_device at32_tcb1_device = { + .name = "atmel_tcb", + .id = 1, + .resource = at32_tcb1_resource, + .num_resources = ARRAY_SIZE(at32_tcb1_resource), }; -DEV_CLK(pclk, at32_systc0, pbb, 3); +DEV_CLK(t0_clk, at32_tcb1, pbb, 4); /* -------------------------------------------------------------------- * PIO @@ -670,7 +683,8 @@ void __init at32_add_system_devices(void) platform_device_register(&pdc_device); platform_device_register(&dmaca0_device); - platform_device_register(&at32_systc0_device); + platform_device_register(&at32_tcb0_device); + platform_device_register(&at32_tcb1_device); platform_device_register(&pio0_device); platform_device_register(&pio1_device); @@ -1737,7 +1751,8 @@ struct clk *at32_clock_list[] = { &pio2_mck, &pio3_mck, &pio4_mck, - &at32_systc0_pclk, + &at32_tcb0_t0_clk, + &at32_tcb1_t0_clk, &atmel_usart0_usart, &atmel_usart1_usart, &atmel_usart2_usart, diff --git a/arch/avr32/mach-at32ap/time-tc.c b/arch/avr32/mach-at32ap/time-tc.c deleted file mode 100644 index 1026586..0000000 --- a/arch/avr32/mach-at32ap/time-tc.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright (C) 2004-2007 Atmel Corporation - * - * Based on MIPS implementation arch/mips/kernel/time.c - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -/* how many counter cycles in a jiffy? */ -static u32 cycles_per_jiffy; - -/* the count value for the next timer interrupt */ -static u32 expirelo; - -/* the I/O registers of the TC module */ -static void __iomem *ioregs; - -cycle_t read_cycle_count(void) -{ - return (cycle_t)timer_read(ioregs, 0, CV); -} - -struct clocksource clocksource_avr32 = { - .name = "avr32", - .rating = 342, - .read = read_cycle_count, - .mask = CLOCKSOURCE_MASK(16), - .shift = 16, - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static void avr32_timer_ack(void) -{ - u16 count = expirelo; - - /* Ack this timer interrupt and set the next one, use a u16 - * variable so it will wrap around correctly */ - count += cycles_per_jiffy; - expirelo = count; - timer_write(ioregs, 0, RC, expirelo); - - /* Check to see if we have missed any timer interrupts */ - count = timer_read(ioregs, 0, CV); - if ((count - expirelo) < 0x7fff) { - expirelo = count + cycles_per_jiffy; - timer_write(ioregs, 0, RC, expirelo); - } -} - -u32 avr32_hpt_read(void) -{ - return timer_read(ioregs, 0, CV); -} - -static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk) -{ - unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2; - unsigned int divs[] = { 4, 8, 16, 32 }; - int divs_size = ARRAY_SIZE(divs); - int i = 0; - unsigned long count_hz; - unsigned long shift; - unsigned long mult; - int clock_div = -1; - u64 tmp; - - shift = clocksource_avr32.shift; - - do { - count_hz = clk_get_rate(pclk) / divs[i]; - mult = clocksource_hz2mult(count_hz, shift); - clocksource_avr32.mult = mult; - - tmp = TICK_NSEC; - tmp <<= shift; - tmp += mult / 2; - do_div(tmp, mult); - - cycles_per_jiffy = tmp; - } while (cycles_per_jiffy > cycles_max && ++i < divs_size); - - clock_div = i + 1; - - if (clock_div > divs_size) { - pr_debug("timer: could not calculate clock divider\n"); - return -EFAULT; - } - - /* Set the clock divider */ - timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div)); - - return 0; -} - -int avr32_hpt_init(unsigned int count) -{ - struct resource *regs; - struct clk *pclk; - int irq = -1; - int ret = 0; - - ret = -ENXIO; - - irq = platform_get_irq(&at32_systc0_device, 0); - if (irq < 0) { - pr_debug("timer: could not get irq\n"); - goto out_error; - } - - pclk = clk_get(&at32_systc0_device.dev, "pclk"); - if (IS_ERR(pclk)) { - pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk)); - goto out_error; - } - clk_enable(pclk); - - regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0); - if (!regs) { - pr_debug("timer: could not get resource\n"); - goto out_error_clk; - } - - ioregs = ioremap(regs->start, regs->end - regs->start + 1); - if (!ioregs) { - pr_debug("timer: could not get ioregs\n"); - goto out_error_clk; - } - - ret = avr32_timer_calc_div_and_set_jiffies(pclk); - if (ret) - goto out_error_io; - - ret = setup_irq(irq, &timer_irqaction); - if (ret) { - pr_debug("timer: could not request irq %d: %d\n", - irq, ret); - goto out_error_io; - } - - expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1) - * cycles_per_jiffy; - - /* Enable clock and interrupts on RC compare */ - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN)); - timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS)); - /* Set cycles to first interrupt */ - timer_write(ioregs, 0, RC, expirelo); - - printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n", - ioregs, irq); - - return 0; - -out_error_io: - iounmap(ioregs); -out_error_clk: - clk_put(pclk); -out_error: - return ret; -} - -int avr32_hpt_start(void) -{ - timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG)); - return 0; -} - -irqreturn_t timer_interrupt(int irq, void *dev_id) -{ - unsigned int sr = timer_read(ioregs, 0, SR); - - if (sr & TIMER_BIT(SR_CPCS)) { - /* ack timer interrupt and try to set next interrupt */ - avr32_timer_ack(); - - /* - * Call the generic timer interrupt handler - */ - write_seqlock(&xtime_lock); - do_timer(1); - write_sequnlock(&xtime_lock); - - /* - * In UP mode, we call local_timer_interrupt() to do profiling - * and process accounting. - * - * SMP is not supported yet. - */ - local_timer_interrupt(irq, dev_id); - - return IRQ_HANDLED; - } - - return IRQ_NONE; -} diff --git a/include/asm-avr32/arch-at32ap/time.h b/include/asm-avr32/arch-at32ap/time.h deleted file mode 100644 index cc8a434..0000000 --- a/include/asm-avr32/arch-at32ap/time.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H -#define _ASM_AVR32_ARCH_AT32AP_TIME_H - -#include - -extern struct irqaction timer_irqaction; -extern struct platform_device at32_systc0_device; -extern void local_timer_interrupt(int irq, void *dev_id); - -#define TIMER_BCR 0x000000c0 -#define TIMER_BCR_SYNC 0 -#define TIMER_BMR 0x000000c4 -#define TIMER_BMR_TC0XC0S 0 -#define TIMER_BMR_TC1XC1S 2 -#define TIMER_BMR_TC2XC2S 4 -#define TIMER_CCR 0x00000000 -#define TIMER_CCR_CLKDIS 1 -#define TIMER_CCR_CLKEN 0 -#define TIMER_CCR_SWTRG 2 -#define TIMER_CMR 0x00000004 -#define TIMER_CMR_ABETRG 10 -#define TIMER_CMR_ACPA 16 -#define TIMER_CMR_ACPC 18 -#define TIMER_CMR_AEEVT 20 -#define TIMER_CMR_ASWTRG 22 -#define TIMER_CMR_BCPB 24 -#define TIMER_CMR_BCPC 26 -#define TIMER_CMR_BEEVT 28 -#define TIMER_CMR_BSWTRG 30 -#define TIMER_CMR_BURST 4 -#define TIMER_CMR_CLKI 3 -#define TIMER_CMR_CPCDIS 7 -#define TIMER_CMR_CPCSTOP 6 -#define TIMER_CMR_CPCTRG 14 -#define TIMER_CMR_EEVT 10 -#define TIMER_CMR_EEVTEDG 8 -#define TIMER_CMR_ENETRG 12 -#define TIMER_CMR_ETRGEDG 8 -#define TIMER_CMR_LDBDIS 7 -#define TIMER_CMR_LDBSTOP 6 -#define TIMER_CMR_LDRA 16 -#define TIMER_CMR_LDRB 18 -#define TIMER_CMR_TCCLKS 0 -#define TIMER_CMR_WAVE 15 -#define TIMER_CMR_WAVSEL 13 -#define TIMER_CV 0x00000010 -#define TIMER_CV_CV 0 -#define TIMER_IDR 0x00000028 -#define TIMER_IDR_COVFS 0 -#define TIMER_IDR_CPAS 2 -#define TIMER_IDR_CPBS 3 -#define TIMER_IDR_CPCS 4 -#define TIMER_IDR_ETRGS 7 -#define TIMER_IDR_LDRAS 5 -#define TIMER_IDR_LDRBS 6 -#define TIMER_IDR_LOVRS 1 -#define TIMER_IER 0x00000024 -#define TIMER_IER_COVFS 0 -#define TIMER_IER_CPAS 2 -#define TIMER_IER_CPBS 3 -#define TIMER_IER_CPCS 4 -#define TIMER_IER_ETRGS 7 -#define TIMER_IER_LDRAS 5 -#define TIMER_IER_LDRBS 6 -#define TIMER_IER_LOVRS 1 -#define TIMER_IMR 0x0000002c -#define TIMER_IMR_COVFS 0 -#define TIMER_IMR_CPAS 2 -#define TIMER_IMR_CPBS 3 -#define TIMER_IMR_CPCS 4 -#define TIMER_IMR_ETRGS 7 -#define TIMER_IMR_LDRAS 5 -#define TIMER_IMR_LDRBS 6 -#define TIMER_IMR_LOVRS 1 -#define TIMER_RA 0x00000014 -#define TIMER_RA_RA 0 -#define TIMER_RB 0x00000018 -#define TIMER_RB_RB 0 -#define TIMER_RC 0x0000001c -#define TIMER_RC_RC 0 -#define TIMER_SR 0x00000020 -#define TIMER_SR_CLKSTA 16 -#define TIMER_SR_COVFS 0 -#define TIMER_SR_CPAS 2 -#define TIMER_SR_CPBS 3 -#define TIMER_SR_CPCS 4 -#define TIMER_SR_ETRGS 7 -#define TIMER_SR_LDRAS 5 -#define TIMER_SR_LDRBS 6 -#define TIMER_SR_LOVRS 1 -#define TIMER_SR_MTIOA 17 -#define TIMER_SR_MTIOB 18 - -/* Bit manipulation macros */ -#define TIMER_BIT(name) (1 << TIMER_##name) -#define TIMER_BF(name,value) ((value) << TIMER_##name) - -/* Register access macros */ -#define timer_read(port,instance,reg) \ - __raw_readl(port + (0x40 * instance) + TIMER_##reg) -#define timer_write(port,instance,reg,value) \ - __raw_writel((value), port + (0x40 * instance) + TIMER_##reg) - -#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */ -- cgit v0.10.2 From 35bf50ccc80584a1404982f02fc4368e991ff55c Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Wed, 19 Dec 2007 09:29:19 +0100 Subject: avr32: Implement set_rate(), set_parent() and mode() for pll1 This patch is a take two of adding full functionality to PLL1 on AT32AP7000. This allows board-specific code and drivers to configure and enable PLL1. This is useful when precise control over the frequency of e.g. a genclock is needed and requested by users for the ABDAC device. The patch is based upon previous patches from both Haavard Skinnemoen and David Brownell. Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 22c302a..0f24b4f8 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -6,6 +6,7 @@ * published by the Free Software Foundation. */ #include +#include #include #include #include @@ -99,6 +100,9 @@ unsigned long at32ap7000_osc_rates[3] = { [2] = 12000000, }; +static struct clk osc0; +static struct clk osc1; + static unsigned long osc_get_rate(struct clk *clk) { return at32ap7000_osc_rates[clk->index]; @@ -108,9 +112,6 @@ static unsigned long pll_get_rate(struct clk *clk, unsigned long control) { unsigned long div, mul, rate; - if (!(control & PM_BIT(PLLEN))) - return 0; - div = PM_BFEXT(PLLDIV, control) + 1; mul = PM_BFEXT(PLLMUL, control) + 1; @@ -121,6 +122,71 @@ static unsigned long pll_get_rate(struct clk *clk, unsigned long control) return rate; } +static long pll_set_rate(struct clk *clk, unsigned long rate, + u32 *pll_ctrl) +{ + unsigned long mul; + unsigned long mul_best_fit = 0; + unsigned long div; + unsigned long div_min; + unsigned long div_max; + unsigned long div_best_fit = 0; + unsigned long base; + unsigned long pll_in; + unsigned long actual = 0; + unsigned long rate_error; + unsigned long rate_error_prev = ~0UL; + u32 ctrl; + + /* Rate must be between 80 MHz and 200 Mhz. */ + if (rate < 80000000UL || rate > 200000000UL) + return -EINVAL; + + ctrl = PM_BF(PLLOPT, 4); + base = clk->parent->get_rate(clk->parent); + + /* PLL input frequency must be between 6 MHz and 32 MHz. */ + div_min = DIV_ROUND_UP(base, 32000000UL); + div_max = base / 6000000UL; + + if (div_max < div_min) + return -EINVAL; + + for (div = div_min; div <= div_max; div++) { + pll_in = (base + div / 2) / div; + mul = (rate + pll_in / 2) / pll_in; + + if (mul == 0) + continue; + + actual = pll_in * mul; + rate_error = abs(actual - rate); + + if (rate_error < rate_error_prev) { + mul_best_fit = mul; + div_best_fit = div; + rate_error_prev = rate_error; + } + + if (rate_error == 0) + break; + } + + if (div_best_fit == 0) + return -EINVAL; + + ctrl |= PM_BF(PLLMUL, mul_best_fit - 1); + ctrl |= PM_BF(PLLDIV, div_best_fit - 1); + ctrl |= PM_BF(PLLCOUNT, 16); + + if (clk->parent == &osc1) + ctrl |= PM_BIT(PLLOSC); + + *pll_ctrl = ctrl; + + return actual; +} + static unsigned long pll0_get_rate(struct clk *clk) { u32 control; @@ -130,6 +196,41 @@ static unsigned long pll0_get_rate(struct clk *clk) return pll_get_rate(clk, control); } +static void pll1_mode(struct clk *clk, int enabled) +{ + unsigned long timeout; + u32 status; + u32 ctrl; + + ctrl = pm_readl(PLL1); + + if (enabled) { + if (!PM_BFEXT(PLLMUL, ctrl) && !PM_BFEXT(PLLDIV, ctrl)) { + pr_debug("clk %s: failed to enable, rate not set\n", + clk->name); + return; + } + + ctrl |= PM_BIT(PLLEN); + pm_writel(PLL1, ctrl); + + /* Wait for PLL lock. */ + for (timeout = 10000; timeout; timeout--) { + status = pm_readl(ISR); + if (status & PM_BIT(LOCK1)) + break; + udelay(10); + } + + if (!(status & PM_BIT(LOCK1))) + printk(KERN_ERR "clk %s: timeout waiting for lock\n", + clk->name); + } else { + ctrl &= ~PM_BIT(PLLEN); + pm_writel(PLL1, ctrl); + } +} + static unsigned long pll1_get_rate(struct clk *clk) { u32 control; @@ -139,6 +240,49 @@ static unsigned long pll1_get_rate(struct clk *clk) return pll_get_rate(clk, control); } +static long pll1_set_rate(struct clk *clk, unsigned long rate, int apply) +{ + u32 ctrl = 0; + unsigned long actual_rate; + + actual_rate = pll_set_rate(clk, rate, &ctrl); + + if (apply) { + if (actual_rate != rate) + return -EINVAL; + if (clk->users > 0) + return -EBUSY; + pr_debug(KERN_INFO "clk %s: new rate %lu (actual rate %lu)\n", + clk->name, rate, actual_rate); + pm_writel(PLL1, ctrl); + } + + return actual_rate; +} + +static int pll1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 ctrl; + + if (clk->users > 0) + return -EBUSY; + + ctrl = pm_readl(PLL1); + WARN_ON(ctrl & PM_BIT(PLLEN)); + + if (parent == &osc0) + ctrl &= ~PM_BIT(PLLOSC); + else if (parent == &osc1) + ctrl |= PM_BIT(PLLOSC); + else + return -EINVAL; + + pm_writel(PLL1, ctrl); + clk->parent = parent; + + return 0; +} + /* * The AT32AP7000 has five primary clock sources: One 32kHz * oscillator, two crystal oscillators and two PLLs. @@ -167,7 +311,10 @@ static struct clk pll0 = { }; static struct clk pll1 = { .name = "pll1", + .mode = pll1_mode, .get_rate = pll1_get_rate, + .set_rate = pll1_set_rate, + .set_parent = pll1_set_parent, .parent = &osc0, }; -- cgit v0.10.2 From e6bef83af76dc373a27b3e9b617f65daa7dff2f4 Mon Sep 17 00:00:00 2001 From: Johannes Weiner Date: Thu, 10 Apr 2008 06:40:54 +0200 Subject: avr32: Remove two unused #defines from mm/init.c Signed-off-by: Johannes Weiner Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c index 480760b..0e64ddc 100644 --- a/arch/avr32/mm/init.c +++ b/arch/avr32/mm/init.c @@ -34,9 +34,6 @@ struct page *empty_zero_page; */ unsigned long mmu_context_cache = NO_CONTEXT; -#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT) -#define MAX_LOW_PFN (NODE_DATA(0)->bdata->node_low_pfn) - void show_mem(void) { int total = 0, reserved = 0, cached = 0; -- cgit v0.10.2 From 5e840eca468135cd9a392da5004e5016a3006d43 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 14 Apr 2008 17:16:32 +0300 Subject: add include/asm-avr32/xor.h This patch fixes the following compile error with CONFIG_MD_RAID456 on avr32: <-- snip --> ... CC [M] crypto/xor.o /home/bunk/linux/kernel-2.6/git/linux-2.6/crypto/xor.c:23:21: error: asm/xor.h: No such file or directory /home/bunk/linux/kernel-2.6/git/linux-2.6/crypto/xor.c: In function 'calibrate_xor_blocks': /home/bunk/linux/kernel-2.6/git/linux-2.6/crypto/xor.c:131: error: 'XOR_TRY_TEMPLATES' undeclared (first use in this function) /home/bunk/linux/kernel-2.6/git/linux-2.6/crypto/xor.c:131: error: (Each undeclared identifier is reported only once /home/bunk/linux/kernel-2.6/git/linux-2.6/crypto/xor.c:131: error: for each function it appears in.) make[2]: *** [crypto/xor.o] Error 1 <-- snip --> Signed-off-by: Adrian Bunk Signed-off-by: Haavard Skinnemoen diff --git a/include/asm-avr32/xor.h b/include/asm-avr32/xor.h new file mode 100644 index 0000000..99c87aa --- /dev/null +++ b/include/asm-avr32/xor.h @@ -0,0 +1,6 @@ +#ifndef _ASM_XOR_H +#define _ASM_XOR_H + +#include + +#endif -- cgit v0.10.2 From 17015aafd6d356d5d780a6f2c286a9ff137eb211 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 14 Apr 2008 17:16:40 +0300 Subject: avr32: don't offer CONFIG_RTC This patch fixes the following compile error: <-- snip --> ... CC [M] drivers/char/rtc.o In file included from /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/char/rtc.c:70: /home/bunk/linux/kernel-2.6/git/linux-2.6/include/linux/mc146818rtc.h:16:59: error: asm/mc146818rtc.h: No such file or directory ... make[3]: *** [drivers/char/rtc.o] Error 1 <-- snip --> Signed-off-by: Adrian Bunk Signed-off-by: Haavard Skinnemoen diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 47c6be8..79c6fd1 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -706,7 +706,7 @@ config NVRAM config RTC tristate "Enhanced Real Time Clock Support" - depends on !PPC && !PARISC && !IA64 && !M68K && !SPARC && !FRV && !ARM && !SUPERH && !S390 + depends on !PPC && !PARISC && !IA64 && !M68K && !SPARC && !FRV && !ARM && !SUPERH && !S390 && !AVR32 ---help--- If you say Y here and create a character special file /dev/rtc with major number 10 and minor number 135 using mknod ("man mknod"), you -- cgit v0.10.2 From cc65d90fcffe82f516ce5c9e1b8423841868d035 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 14 Apr 2008 17:16:44 +0300 Subject: avr32: don't offer CONFIG_GEN_RTC This patch fixes the following compile error: <-- snip --> ... CC [M] drivers/char/genrtc.o /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/char/genrtc.c:58:21: error: asm/rtc.h: No such file or directory ... make[3]: *** [drivers/char/genrtc.o] Error 1 <-- snip --> Signed-off-by: Adrian Bunk Signed-off-by: Haavard Skinnemoen diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 79c6fd1..a87b89d 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -776,7 +776,7 @@ config SGI_IP27_RTC config GEN_RTC tristate "Generic /dev/rtc emulation" - depends on RTC!=y && !IA64 && !ARM && !M32R && !MIPS && !SPARC && !FRV && !S390 && !SUPERH + depends on RTC!=y && !IA64 && !ARM && !M32R && !MIPS && !SPARC && !FRV && !S390 && !SUPERH && !AVR32 ---help--- If you say Y here and create a character special file /dev/rtc with major number 10 and minor number 135 using mknod ("man mknod"), you -- cgit v0.10.2 From cf2d3ff994f19151fb9200c94c24daaed82700a2 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 14 Apr 2008 17:16:53 +0300 Subject: avr32: don't offer PARPORT_PC This patch fixes the following compile error: <-- snip --> ... CC [M] drivers/parport/parport_pc.o /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/parport/parport_pc.c:67:25: error: asm/parport.h: No such file or directory /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/parport/parport_pc.c: In function 'parport_pc_find_ports': /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/parport/parport_pc.c:3215: error: implicit declaration of function 'parport_pc_find_nonpci_ports' make[3]: *** [drivers/parport/parport_pc.o] Error 1 <-- snip --> Signed-off-by: Adrian Bunk Signed-off-by: Haavard Skinnemoen diff --git a/drivers/parport/Kconfig b/drivers/parport/Kconfig index b7bcdcc..209b4a4 100644 --- a/drivers/parport/Kconfig +++ b/drivers/parport/Kconfig @@ -36,7 +36,7 @@ if PARPORT config PARPORT_PC tristate "PC-style hardware" depends on (!SPARC64 || PCI) && !SPARC32 && !M32R && !FRV && \ - (!M68K || ISA) && !MN10300 + (!M68K || ISA) && !MN10300 && !AVR32 ---help--- You should say Y here if you have a PC-style parallel port. All IBM PC compatible computers and some Alphas have PC-style -- cgit v0.10.2 From 29a0c39386a4c33af21f1d92ebce277a7535ec7e Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 14 Apr 2008 21:42:20 +0300 Subject: avr32: add include/asm-avr32/serial.h On Mon, Apr 14, 2008 at 03:36:24PM +0100, Alan Cox wrote: > On Mon, 14 Apr 2008 17:17:21 +0300 > Adrian Bunk wrote: > > > This patch fixes the following build error: > > > > <-- snip --> > > > > ... > > CC [M] drivers/serial/8250.o > > /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/serial/8250.c:95:24: error: asm/serial.h: No such file or directory > > make[3]: *** [drivers/serial/8250.o] Error 1 > > > > <-- snip --> > > > > Signed-off-by: Adrian Bunk > > > > --- > > 3cb4ef80d75e118ccfd44f7006aea3db54afb31c diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig > > index b1bbaa0..b0e216d 100644 > > --- a/drivers/serial/Kconfig > > +++ b/drivers/serial/Kconfig > > @@ -11,7 +11,7 @@ menu "Serial drivers" > > # The new 8250/16550 serial drivers > > config SERIAL_8250 > > tristate "8250/16550 and compatible serial support" > > - depends on (BROKEN || !SPARC) > > + depends on (BROKEN || !SPARC) && !AVR32 > > select SERIAL_CORE > > ---help--- > > NAK. > > Add an asm/serial.h to the platform as it has PCI so will have 8250 PCI > devices available to it. A copy of the MIPS one should be right. Patch below. > Alan cu Adrian <-- snip --> This patch fixes the following build error with CONFIG_SERIAL_8250: <-- snip --> ... CC [M] drivers/serial/8250.o /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/serial/8250.c:95:24: error: asm/serial.h: No such file or directory make[3]: *** [drivers/serial/8250.o] Error 1 <-- snip --> Signed-off-by: Adrian Bunk Acked-by: Alan Cox Signed-off-by: Haavard Skinnemoen diff --git a/include/asm-avr32/serial.h b/include/asm-avr32/serial.h new file mode 100644 index 0000000..5ecaebc --- /dev/null +++ b/include/asm-avr32/serial.h @@ -0,0 +1,13 @@ +#ifndef _ASM_SERIAL_H +#define _ASM_SERIAL_H + +/* + * This assumes you have a 1.8432 MHz clock for your UART. + * + * It'd be nice if someone built a serial card with a 24.576 MHz + * clock, since the 16550A is capable of handling a top speed of 1.5 + * megabits/second; but this requires the faster clock. + */ +#define BASE_BAUD (1843200 / 16) + +#endif /* _ASM_SERIAL_H */ -- cgit v0.10.2 From ed3fa7c9510cde67d232299cab8052ff50a08285 Mon Sep 17 00:00:00 2001 From: Peter Ma Date: Sat, 19 Apr 2008 00:24:25 -0700 Subject: avr32: Add hardware power-down function call This patch adds in the indirect call to pm_power_off(), as is done in other architectures (e.g. ARM). Tested on NGW100, with custom board with GPIO control over main DC power. Signed-off-by: Peter Ma Signed-off-by: Haavard Skinnemoen diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c index 3de1154..6cf9df1 100644 --- a/arch/avr32/kernel/process.c +++ b/arch/avr32/kernel/process.c @@ -54,6 +54,8 @@ void machine_halt(void) void machine_power_off(void) { + if (pm_power_off) + pm_power_off(); } void machine_restart(char *cmd) -- cgit v0.10.2