From 833b5794e3303cc97a0d2d4ba97f26cc9d9b4b79 Mon Sep 17 00:00:00 2001 From: Chanho Park Date: Tue, 1 Sep 2015 23:17:03 +0900 Subject: ARM: EXYNOS: reset Little cores when cpu is up The cpu booting of exynos5422 has been still broken since we discussed it in last year[1]. This patch is inspired from Odroid XU3 code (Actually, it was from samsung exynos vendor kernel)[2]. This weird reset code was founded exynos5420 octa cores series SoCs and only required for the first boot core is the Little core (Cortex A7). Some of the exynos5420 boards and all of the exynos5422 boards will require this code. There is two ways to check the little core is the first cpu. One is checking GPG2CON[1] GPIO value and the other is checking the cluster number of the first cpu. I selected the latter because it's more easier than the former. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html [2] https://patchwork.kernel.org/patch/6782891/ Cc: Kevin Hilman Cc: Javier Martinez Canillas Cc: Krzysztof Kozlowski Tested-by: Kevin Hilman Signed-off-by: Chanho Park Cc: # 4.1+ [k.kozlowski: Adding stable for v4.1+, reformat comment] Signed-off-by: Krzysztof Kozlowski diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 9bdf547..5697819 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "regs-pmu.h" #include "common.h" @@ -70,7 +71,31 @@ static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster) cluster >= EXYNOS5420_NR_CLUSTERS) return -EINVAL; - exynos_cpu_power_up(cpunr); + if (!exynos_cpu_power_state(cpunr)) { + exynos_cpu_power_up(cpunr); + + /* + * This assumes the cluster number of the big cores(Cortex A15) + * is 0 and the Little cores(Cortex A7) is 1. + * When the system was booted from the Little core, + * they should be reset during power up cpu. + */ + if (cluster && + cluster == MPIDR_AFFINITY_LEVEL(cpu_logical_map(0), 1)) { + /* + * Before we reset the Little cores, we should wait + * the SPARE2 register is set to 1 because the init + * codes of the iROM will set the register after + * initialization. + */ + while (!pmu_raw_readl(S5P_PMU_SPARE2)) + udelay(10); + + pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu), + EXYNOS_SWRESET); + } + } + return 0; } diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index b761433..fba9068 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -513,6 +513,12 @@ static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr) #define SPREAD_ENABLE 0xF #define SPREAD_USE_STANDWFI 0xF +#define EXYNOS5420_KFC_CORE_RESET0 BIT(8) +#define EXYNOS5420_KFC_ETM_RESET0 BIT(20) + +#define EXYNOS5420_KFC_CORE_RESET(_nr) \ + ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) + #define EXYNOS5420_BB_CON1 0x0784 #define EXYNOS5420_BB_SEL_EN BIT(31) #define EXYNOS5420_BB_PMOS_EN BIT(7) -- cgit v0.10.2 From a68371632b86d682992185ecf97316700a5a0f14 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 16 Sep 2015 08:37:02 +0900 Subject: ARM: dts: Fix LEDs on exynos5422-odroidxu3 The LEDs on Odroid XU3 family boards could not properly probe because PWM outputs were reduced only to PWM for fan. Fix it for Odroid XU3 and XU3-Lite boards by switching to usage of all 4 outputs (although the PWM for MIPI probably is redundant because board does not have MIPI connector available). This fixes warnings on dmesg: [ 4.838712] samsung-pwm 12dd0000.pwm: tried to request PWM channel 1 without output [ 4.838725] leds_pwm pwmleds: unable to request PWM for green:mmc0: -22 [ 4.838767] leds_pwm: probe of pwmleds failed with error -22 Fixes: b685d540cc26 ("ARM: dts: Add pwm-fan node for exynos5422-odroidxu3") Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 79ffdfe..3b43e57 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -472,7 +472,6 @@ */ pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; pinctrl-names = "default"; - samsung,pwm-outputs = <0>; status = "okay"; }; -- cgit v0.10.2 From 1605b60ad064c7019db8ade07f0b7bdc8c197b93 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Thu, 17 Sep 2015 07:46:28 +0900 Subject: ARM: dts: add suspend opp to exynos4412 Mark 800MHz OPP as a suspend opp for Exynos4412 based boards so effectively cpufreq-dt driver behavior w.r.t. suspend frequency matches what the old exynos-cpufreq driver has been doing. This patch fixes suspend/resume support on Exynos4412 based Trats2 board and reboot hang on Exynos4412 based Odroid U3 board. Cc: Thomas Abraham Cc: Javier Martinez Canillas Cc: Marek Szyprowski Cc: Tobias Jakobi Acked-by: Viresh Kumar Signed-off-by: Bartlomiej Zolnierkiewicz Acked-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index ca0e3c1..294cfe4 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -98,6 +98,7 @@ opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1000000>; clock-latency-ns = <200000>; + opp-suspend; }; opp07 { opp-hz = /bits/ 64 <900000000>; -- cgit v0.10.2 From f404e7a730c59f58bc1e9a3142cfdf7ec2d29f3d Mon Sep 17 00:00:00 2001 From: Yadwinder Singh Brar Date: Sun, 23 Aug 2015 13:59:48 +0900 Subject: ARM: dts: Fix bootup thermal issue on smdk5250 With default config on smdk5250 latest tree throws below message: [ 2.226049] thermal thermal_zone0: critical temperature reached(224 C),shutting down [ 2.227840] reboot: Failed to start orderly shutdown: forcing the issue and hangs randomly because it reads wrong temperature value. I can't figure out any direct relation between LDO10 and TMU from board schematics which I have. So making LDO10 always-on to fix issue for now. Signed-off-by: Yadwinder Singh Brar [pankaj.dubey: resubmitted after rebasing to latest kgene tree] Signed-off-by: Pankaj Dubey Tested-by: Pankaj Dubey Signed-off-by: Krzysztof Kozlowski diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 15aea76..c625e71 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -197,6 +197,7 @@ regulator-name = "P1.8V_LDO_OUT10"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; ldo11_reg: LDO11 { -- cgit v0.10.2 From c7d2ecd9f64c351cb4d551f1f472d0fc09c3cae8 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Wed, 23 Sep 2015 16:41:55 +0900 Subject: ARM: dts: Fix wrong clock binding for sysmmu_fimd1_1 on exynos5420 The sysmmu_fimd1_1 should bind the clock CLK_SMMU_FIMD1M1, not the clock CLK_SMMU_FIMD1M0. CLK_SMMU_FIMD1M0 is a clock for the sysmmu_fimd1_0. This wrong clock binding causes the problem that is blocked in iommu_map function when IOMMU is enabled and exynos-drm driver tries to allocate buffer via DMA mapping API on Odroid-XU3 board. Fixes: b70045167815 ("ARM: dts: add sysmmu nodes for exynos5420") Signed-off-by: Joonyoung Shim Cc: # v4.2 Reviewed-by: Javier Martinez Canillas Acked-by: Marek Szyprowski Signed-off-by: Krzysztof Kozlowski diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index df9aee9..1b3d6c7 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -1117,7 +1117,7 @@ interrupt-parent = <&combiner>; interrupts = <3 0>; clock-names = "sysmmu", "master"; - clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>; + clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>; power-domains = <&disp_pd>; #iommu-cells = <0>; }; -- cgit v0.10.2