From ade7ffbb9b6f2ab65e69496bc4076e215e2cd8ba Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Thu, 6 Dec 2012 17:02:44 +0900 Subject: ARM: EXYNOS: fix build error when MFC is not selected This fixes following: arch/arm/mach-exynos/built-in.o: In function `exynos5_reserve': arch/arm/mach-exynos/mach-exynos5-dt.c:177: undefined reference to `s5p_fdt_find_mfc_mem' arch/arm/mach-exynos/mach-exynos5-dt.c:177: undefined reference to `s5p_fdt_find_mfc_mem' arch/arm/mach-exynos/mach-exynos5-dt.c:178: undefined reference to `s5p_mfc_reserve_mem' Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index f038c8c..e99d3d8 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -163,6 +163,7 @@ static char const *exynos5_dt_compat[] __initdata = { static void __init exynos5_reserve(void) { +#ifdef CONFIG_S5P_DEV_MFC struct s5p_mfc_dt_meminfo mfc_mem; /* Reserve memory for MFC only if it's available */ @@ -170,6 +171,7 @@ static void __init exynos5_reserve(void) if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, mfc_mem.lsize); +#endif } DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") -- cgit v0.10.2 From 12fee1949e2b302009026ce28e4ef6fac721d7ea Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Thu, 6 Dec 2012 15:31:10 +0900 Subject: ARM: EXYNOS: fix GIC using for EXYNOS5440 Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index ddd4b72..d6d0dc6 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -679,7 +679,8 @@ void __init exynos5_init_irq(void) * Theses parameters should be NULL and 0 because EXYNOS4 * uses GIC instead of VIC. */ - s5p_init_irq(NULL, 0); + if (!of_machine_is_compatible("samsung,exynos5440")) + s5p_init_irq(NULL, 0); gic_arch_extn.irq_set_wake = s3c_irq_wake; } -- cgit v0.10.2 From 83e877a334eb5ff14f6e822b6f3d8d31b5057be2 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Thu, 6 Dec 2012 15:32:14 +0900 Subject: ARM: EXYNOS: fix skip scu_enable() for EXYNOS5440 Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 4ca8ff1..c5c840e 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -198,7 +198,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) { int i; - if (!soc_is_exynos5250()) + if (!(soc_is_exynos5250() || soc_is_exynos5440())) scu_enable(scu_base_addr()); /* -- cgit v0.10.2 From 88f2324fa99de208096425b8290186b9ab434612 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Mon, 10 Dec 2012 09:45:55 +0900 Subject: pinctrl: samsung: Fix a typo in pinctrl-samsung.h struct samsung_pin_bank does not have a member called reg_offset. It should be pctl_offset instead. Signed-off-by: Sachin Kamat Acked-by: Linus Walleij Signed-off-by: Kukjin Kim diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h index 5addfd1..e2d4e67 100644 --- a/drivers/pinctrl/pinctrl-samsung.h +++ b/drivers/pinctrl/pinctrl-samsung.h @@ -104,7 +104,7 @@ struct samsung_pinctrl_drv_data; /** * struct samsung_pin_bank: represent a controller pin-bank. - * @reg_offset: starting offset of the pin-bank registers. + * @pctl_offset: starting offset of the pin-bank registers. * @pin_base: starting pin number of the bank. * @nr_pins: number of pins included in this bank. * @func_width: width of the function selector bit field. -- cgit v0.10.2 From d5fd5da290cef159be1295c162b4c71b8c1971a2 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Mon, 10 Dec 2012 09:54:03 +0900 Subject: pinctrl: exynos5440/samsung: Staticize pcfgs I got below build error with random config if CONFIG_PINCTRL_SAMSUNG=y && CONFIG_PINCTRL_EXYNOS5440=y. Fix the build error by making pcfgs static. LD drivers/pinctrl/built-in.o drivers/pinctrl/pinctrl-exynos5440.o: In function `.LANCHOR0': pinctrl-exynos5440.c:(.data+0x54): multiple definition of `pcfgs' drivers/pinctrl/pinctrl-samsung.o:pinctrl-samsung.c:(.data+0x54): first defined here make[2]: *** [drivers/pinctrl/built-in.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin Acked-by: Linus Walleij Acked-by: Thomas Abraham Signed-off-by: Kukjin Kim diff --git a/drivers/pinctrl/pinctrl-exynos5440.c b/drivers/pinctrl/pinctrl-exynos5440.c index b8635f6..07db895 100644 --- a/drivers/pinctrl/pinctrl-exynos5440.c +++ b/drivers/pinctrl/pinctrl-exynos5440.c @@ -117,7 +117,7 @@ struct exynos5440_pinctrl_priv_data { }; /* list of all possible config options supported */ -struct pin_config { +static struct pin_config { char *prop_cfg; unsigned int cfg_type; } pcfgs[] = { diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index 8f31b65..864fed8 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -37,7 +37,7 @@ #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX) /* list of all possible config options supported */ -struct pin_config { +static struct pin_config { char *prop_cfg; unsigned int cfg_type; } pcfgs[] = { -- cgit v0.10.2 From d5c1b541baa43d09206a1f6bcad6b32f50deb8be Mon Sep 17 00:00:00 2001 From: Michael Spang Date: Mon, 10 Dec 2012 10:08:00 +0900 Subject: ARM: SAMSUNG: Add missing include guard to gpio-core.h Signed-off-by: Michael Spang Signed-off-by: Kukjin Kim diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index dfd8b7a..f7a3ea2 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +#ifndef __PLAT_SAMSUNG_GPIO_CORE_H +#define __PLAT_SAMSUNG_GPIO_CORE_H + #define GPIOCON_OFF (0x00) #define GPIODAT_OFF (0x04) @@ -124,3 +127,5 @@ extern struct samsung_gpio_pm samsung_gpio_pm_4bit; /* locking wrappers to deal with multiple access to the same gpio bank */ #define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) #define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) + +#endif /* __PLAT_SAMSUNG_GPIO_CORE_H */ -- cgit v0.10.2 From 479dda22188220acb000310759ed0470b58573e4 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 18 Dec 2012 08:55:12 -0800 Subject: ARM: EXYNOS: Fix NULL pointer dereference bug in Origen When DRM support for Samsung SoC and Samsung S3C framebuffer support are selected, the kernel crashes as it does not get the required platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD to fix this. Without this patch the following crash occurs during bootup: Unable to handle kernel NULL pointer dereference at virtual address 00000000 PC is at 0x0 LR is at s3c_fb_probe+0x198/0x788 [] (s3c_fb_probe+0x198/0x788) from [] (platform_drv_probe+0x18/0x1c) [] (platform_drv_probe+0x18/0x1c) from [] (driver_probe_device+0x70/0x1f0) [] (driver_probe_device+0x70/0x1f0) from [] (__driver_attach+0x8c/0x90) [] (__driver_attach+0x8c/0x90) from [] (bus_for_each_dev+0x50/0x7c) [] (bus_for_each_dev+0x50/0x7c) from [] (bus_add_driver+0x170/0x23c) [] (bus_add_driver+0x170/0x23c) from [] (driver_register+0x78/0x144) [] (driver_register+0x78/0x144) from [] (do_one_initcall+0x34/0x174) [] (do_one_initcall+0x34/0x174) from [] (kernel_init+0x100/0x2a0) [] (kernel_init+0x100/0x2a0) from [] (ret_from_fork+0x14/0x3c) Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index e6f4191..5e34b9c 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c @@ -621,7 +621,7 @@ static struct pwm_lookup origen_pwm_lookup[] = { PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL), }; -#ifdef CONFIG_DRM_EXYNOS +#ifdef CONFIG_DRM_EXYNOS_FIMD static struct exynos_drm_fimd_pdata drm_fimd_pdata = { .panel = { .timing = { @@ -793,7 +793,7 @@ static void __init origen_machine_init(void) s5p_i2c_hdmiphy_set_platdata(NULL); s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0); -#ifdef CONFIG_DRM_EXYNOS +#ifdef CONFIG_DRM_EXYNOS_FIMD s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else -- cgit v0.10.2 From bdd1853212609ef1b1826ffc8b43439b0c54b2eb Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 18 Dec 2012 08:55:17 -0800 Subject: ARM: EXYNOS: Fix NULL pointer dereference bug in SMDK4X12 When DRM support for Samsung SoC and Samsung S3C framebuffer support are selected, the kernel crashes as it does not get the required platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD to fix this. Fixes the following boot time crash: Unable to handle kernel NULL pointer dereference at virtual address 00000000 PC is at 0x0 LR is at s3c_fb_probe+0x198/0x788 [] (s3c_fb_probe+0x198/0x788) from [] (platform_drv_probe+0x18/0x1c) [] (platform_drv_probe+0x18/0x1c) from [] (driver_probe_device+0x70/0x1f0) [] (driver_probe_device+0x70/0x1f0) from [] (__driver_attach+0x8c/0x90) [] (__driver_attach+0x8c/0x90) from [] (bus_for_each_dev+0x50/0x7c) [] (bus_for_each_dev+0x50/0x7c) from [] (bus_add_driver+0x170/0x23c) [] (bus_add_driver+0x170/0x23c) from [] (driver_register+0x78/0x144) [] (driver_register+0x78/0x144) from [] (do_one_initcall+0x34/0x174) [] (do_one_initcall+0x34/0x174) from [] (kernel_init+0x100/0x2a0) [] (kernel_init+0x100/0x2a0) from [] (ret_from_fork+0x14/0x3c) Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index a1555a7..ae6da40 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c @@ -246,7 +246,7 @@ static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = { .cols = 8, }; -#ifdef CONFIG_DRM_EXYNOS +#ifdef CONFIG_DRM_EXYNOS_FIMD static struct exynos_drm_fimd_pdata drm_fimd_pdata = { .panel = { .timing = { @@ -360,7 +360,7 @@ static void __init smdk4x12_machine_init(void) s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata); -#ifdef CONFIG_DRM_EXYNOS +#ifdef CONFIG_DRM_EXYNOS_FIMD s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else -- cgit v0.10.2 From 873673d302e48051c5b90c6e27f86400bdd366ba Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 18 Dec 2012 08:55:20 -0800 Subject: ARM: EXYNOS: Fix NULL pointer dereference bug in SMDKV310 When DRM support for Samsung SoC and Samsung S3C framebuffer support are selected, the kernel crashes as it does not get the required platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD to fix this. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index b738424..35548e3 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c @@ -159,7 +159,7 @@ static struct platform_device smdkv310_lcd_lte480wv = { .dev.platform_data = &smdkv310_lcd_lte480wv_data, }; -#ifdef CONFIG_DRM_EXYNOS +#ifdef CONFIG_DRM_EXYNOS_FIMD static struct exynos_drm_fimd_pdata drm_fimd_pdata = { .panel = { .timing = { @@ -402,7 +402,7 @@ static void __init smdkv310_machine_init(void) samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup)); -#ifdef CONFIG_DRM_EXYNOS +#ifdef CONFIG_DRM_EXYNOS_FIMD s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; exynos4_fimd0_gpio_setup_24bpp(); #else -- cgit v0.10.2 From 454696fdc864aacaab978755d44d73d418c59788 Mon Sep 17 00:00:00 2001 From: Dongjin Kim Date: Tue, 18 Dec 2012 08:57:06 -0800 Subject: ARM: EXYNOS: Fix MSHC clocks instance names Replace clock instance name of MSHC controller for BIC and CIU of Exynos4412. Signed-off-by: Dongjin Kim Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index efead60..bbcb3de 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = { .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 8), }, { - .name = "dwmmc", + .name = "biu", .parent = &exynos4_clk_aclk_133.clk, .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), @@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = { .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 }, }, { .clk = { - .name = "sclk_dwmmc", + .name = "ciu", .parent = &exynos4_clk_dout_mmc4.clk, .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 16), -- cgit v0.10.2 From db7af96ee96d1c2f208611022740f9469158d3a8 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Wed, 19 Dec 2012 09:49:29 -0800 Subject: ARM: S3C64XX: Add I2S clkdev support I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna Acked-by: Sangbeom Kim Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 1a6f857..803711e 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -149,25 +149,6 @@ static struct clk init_clocks_off[] = { .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_IIS0, - }, { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_IIS1, - }, { -#ifdef CONFIG_CPU_S3C6410 - .name = "iis", - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, - }, { -#endif .name = "keypad", .parent = &clk_p, .enable = s3c64xx_pclk_ctrl, @@ -337,6 +318,32 @@ static struct clk clk_48m_spi1 = { .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, }; +static struct clk clk_i2s0 = { + .name = "iis", + .devname = "samsung-i2s.0", + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_IIS0, +}; + +static struct clk clk_i2s1 = { + .name = "iis", + .devname = "samsung-i2s.1", + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_IIS1, +}; + +#ifdef CONFIG_CPU_S3C6410 +static struct clk clk_i2s2 = { + .name = "iis", + .devname = "samsung-i2s.2", + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, +}; +#endif + static struct clk init_clocks[] = { { .name = "lcd", @@ -660,6 +667,7 @@ static struct clksrc_sources clkset_audio1 = { .nr_sources = ARRAY_SIZE(clkset_audio1_list), }; +#ifdef CONFIG_CPU_S3C6410 static struct clk *clkset_audio2_list[] = { [0] = &clk_mout_epll.clk, [1] = &clk_dout_mpll, @@ -672,6 +680,7 @@ static struct clksrc_sources clkset_audio2 = { .sources = clkset_audio2_list, .nr_sources = ARRAY_SIZE(clkset_audio2_list), }; +#endif static struct clksrc_clk clksrcs[] = { { @@ -685,36 +694,6 @@ static struct clksrc_clk clksrcs[] = { .sources = &clkset_uhost, }, { .clk = { - .name = "audio-bus", - .devname = "samsung-i2s.0", - .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, - .sources = &clkset_audio0, - }, { - .clk = { - .name = "audio-bus", - .devname = "samsung-i2s.1", - .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, - .sources = &clkset_audio1, - }, { - .clk = { - .name = "audio-bus", - .devname = "samsung-i2s.2", - .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 }, - .sources = &clkset_audio2, - }, { - .clk = { .name = "irda-bus", .ctrlbit = S3C_CLKCON_SCLK_IRDA, .enable = s3c64xx_sclk_ctrl, @@ -805,6 +784,43 @@ static struct clksrc_clk clk_sclk_spi1 = { .sources = &clkset_spi_mmc, }; +static struct clksrc_clk clk_audio_bus0 = { + .clk = { + .name = "audio-bus", + .devname = "samsung-i2s.0", + .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, + .sources = &clkset_audio0, +}; + +static struct clksrc_clk clk_audio_bus1 = { + .clk = { + .name = "audio-bus", + .devname = "samsung-i2s.1", + .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, + .sources = &clkset_audio1, +}; + +#ifdef CONFIG_CPU_S3C6410 +static struct clksrc_clk clk_audio_bus2 = { + .clk = { + .name = "audio-bus", + .devname = "samsung-i2s.2", + .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 }, + .sources = &clkset_audio2, +}; +#endif /* Clock initialisation code */ static struct clksrc_clk *init_parents[] = { @@ -820,6 +836,8 @@ static struct clksrc_clk *clksrc_cdev[] = { &clk_sclk_mmc2, &clk_sclk_spi0, &clk_sclk_spi1, + &clk_audio_bus0, + &clk_audio_bus1, }; static struct clk *clk_cdev[] = { @@ -828,6 +846,8 @@ static struct clk *clk_cdev[] = { &clk_hsmmc2, &clk_48m_spi0, &clk_48m_spi1, + &clk_i2s0, + &clk_i2s1, }; static struct clk_lookup s3c64xx_clk_lookup[] = { @@ -844,6 +864,14 @@ static struct clk_lookup s3c64xx_clk_lookup[] = { CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0), CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus0.clk), + CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1), + CLKDEV_INIT("samsung-i2s.1", "i2s_opclk1", &clk_audio_bus1.clk), +#ifdef CONFIG_CPU_S3C6410 + CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2), + CLKDEV_INIT("samsung-i2s.2", "i2s_opclk1", &clk_audio_bus2.clk), +#endif }; #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index 35f3e07..e367e87 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -23,11 +23,6 @@ #include #include -static const char *rclksrc[] = { - [0] = "iis", - [1] = "audio-bus", -}; - static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev) { unsigned int base; @@ -64,11 +59,6 @@ static struct resource s3c64xx_iis0_resource[] = { static struct s3c_audio_pdata i2sv3_pdata = { .cfg_gpio = s3c64xx_i2s_cfg_gpio, - .type = { - .i2s = { - .src_clk = rclksrc, - }, - }, }; struct platform_device s3c64xx_device_iis0 = { @@ -110,7 +100,6 @@ static struct s3c_audio_pdata i2sv4_pdata = { .type = { .i2s = { .quirks = QUIRK_PRI_6CHAN, - .src_clk = rclksrc, }, }, }; -- cgit v0.10.2 From eaff82ed0f18022d089dbb157df49c0d79379168 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Wed, 19 Dec 2012 09:49:29 -0800 Subject: ARM: S5PC100: Add I2S clkdev support I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna Acked-by: Sangbeom Kim Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index 9262197..a206dc3 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c @@ -606,24 +606,6 @@ static struct clk init_clocks_off[] = { .enable = s5pc100_d1_4_ctrl, .ctrlbit = (1 << 13), }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 2), - }, { .name = "ac97", .parent = &clk_div_pclkd1.clk, .enable = s5pc100_d1_5_ctrl, @@ -724,6 +706,30 @@ static struct clk clk_48m_spi2 = { .ctrlbit = (1 << 9), }; +static struct clk clk_i2s0 = { + .name = "iis", + .devname = "samsung-i2s.0", + .parent = &clk_div_pclkd1.clk, + .enable = s5pc100_d1_5_ctrl, + .ctrlbit = (1 << 0), +}; + +static struct clk clk_i2s1 = { + .name = "iis", + .devname = "samsung-i2s.1", + .parent = &clk_div_pclkd1.clk, + .enable = s5pc100_d1_5_ctrl, + .ctrlbit = (1 << 1), +}; + +static struct clk clk_i2s2 = { + .name = "iis", + .devname = "samsung-i2s.2", + .parent = &clk_div_pclkd1.clk, + .enable = s5pc100_d1_5_ctrl, + .ctrlbit = (1 << 2), +}; + static struct clk clk_vclk54m = { .name = "vclk_54m", .rate = 54000000, @@ -1154,6 +1160,9 @@ static struct clk *clk_cdev[] = { &clk_48m_spi0, &clk_48m_spi1, &clk_48m_spi2, + &clk_i2s0, + &clk_i2s1, + &clk_i2s2, }; static struct clksrc_clk *clksrc_cdev[] = { @@ -1321,6 +1330,9 @@ static struct clk_lookup s5pc100_clk_lookup[] = { CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk), CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2), CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), + CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1), + CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2), }; void __init s5pc100_register_clocks(void) diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c index 1cc252c..46f488b 100644 --- a/arch/arm/mach-s5pc100/dev-audio.c +++ b/arch/arm/mach-s5pc100/dev-audio.c @@ -39,18 +39,12 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev) return 0; } -static const char *rclksrc_v5[] = { - [0] = "iis", - [1] = "i2sclkd2", -}; - static struct s3c_audio_pdata i2sv5_pdata = { .cfg_gpio = s5pc100_cfg_i2s, .type = { .i2s = { .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, - .src_clk = rclksrc_v5, }, }, }; @@ -72,18 +66,8 @@ struct platform_device s5pc100_device_iis0 = { }, }; -static const char *rclksrc_v3[] = { - [0] = "iis", - [1] = "sclk_audio", -}; - static struct s3c_audio_pdata i2sv3_pdata = { .cfg_gpio = s5pc100_cfg_i2s, - .type = { - .i2s = { - .src_clk = rclksrc_v3, - }, - }, }; static struct resource s5pc100_iis1_resource[] = { -- cgit v0.10.2 From d690b313a6008215428d4bae303c9ecab593b508 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Wed, 19 Dec 2012 09:49:29 -0800 Subject: ARM: S5P64X0: Add I2S clkdev support I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna Acked-by: Sangbeom Kim Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 0004455..5112371 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c @@ -243,12 +243,6 @@ static struct clk init_clocks_off[] = { .enable = s5p64x0_pclk_ctrl, .ctrlbit = (1 << 25), }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 26), - }, { .name = "dsim", .parent = &clk_pclk_low.clk, .enable = s5p64x0_pclk_ctrl, @@ -405,15 +399,6 @@ static struct clksrc_clk clksrcs[] = { .sources = &clkset_group1, .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 }, .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 }, - }, { - .clk = { - .name = "sclk_audio2", - .ctrlbit = (1 << 11), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_audio, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 }, }, }; @@ -464,6 +449,26 @@ static struct clksrc_clk clk_sclk_uclk = { .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, }; +static struct clk clk_i2s0 = { + .name = "iis", + .devname = "samsung-i2s.0", + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 26), +}; + +static struct clksrc_clk clk_audio_bus2 = { + .clk = { + .name = "sclk_audio2", + .devname = "samsung-i2s.0", + .ctrlbit = (1 << 11), + .enable = s5p64x0_sclk_ctrl, + }, + .sources = &clkset_audio, + .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 }, + .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 }, +}; + static struct clksrc_clk clk_sclk_spi0 = { .clk = { .name = "sclk_spi", @@ -506,13 +511,18 @@ static struct clk dummy_apb_pclk = { .id = -1, }; +static struct clk *clk_cdev[] = { + &clk_i2s0, +}; + static struct clksrc_clk *clksrc_cdev[] = { &clk_sclk_uclk, &clk_sclk_spi0, &clk_sclk_spi1, &clk_sclk_mmc0, &clk_sclk_mmc1, - &clk_sclk_mmc2 + &clk_sclk_mmc2, + &clk_audio_bus2, }; static struct clk_lookup s5p6440_clk_lookup[] = { @@ -524,6 +534,8 @@ static struct clk_lookup s5p6440_clk_lookup[] = { CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk), }; void __init_or_cpufreq s5p6440_setup_clocks(void) @@ -596,12 +608,17 @@ static struct clk *clks[] __initdata = { void __init s5p6440_register_clocks(void) { int ptr; + unsigned int cnt; s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) s3c_register_clksrc(sysclks[ptr], 1); + s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); + for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++) + s3c_disable_clocks(clk_cdev[cnt], 1); + s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index f3e0ef3..154dea7 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c @@ -247,24 +247,6 @@ static struct clk init_clocks_off[] = { .enable = s5p64x0_pclk_ctrl, .ctrlbit = (1 << 22), }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 26), - }, { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 15), - }, { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 16), - }, { .name = "i2c", .devname = "s3c2440-i2c.1", .parent = &clk_pclk_low.clk, @@ -402,6 +384,7 @@ static struct clksrc_sources clkset_sclk_audio0 = { static struct clksrc_clk clk_sclk_audio0 = { .clk = { .name = "audio-bus", + .devname = "samsung-i2s.0", .enable = s5p64x0_sclk_ctrl, .ctrlbit = (1 << 8), .parent = &clk_dout_epll.clk, @@ -549,6 +532,36 @@ static struct clksrc_clk clk_sclk_spi1 = { .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, }; +static struct clk clk_i2s0 = { + .name = "iis", + .devname = "samsung-i2s.0", + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 26), +}; + +static struct clk clk_i2s1 = { + .name = "iis", + .devname = "samsung-i2s.1", + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 15), +}; + +static struct clk clk_i2s2 = { + .name = "iis", + .devname = "samsung-i2s.2", + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 16), +}; + +static struct clk *clk_cdev[] = { + &clk_i2s0, + &clk_i2s1, + &clk_i2s2, +}; + static struct clksrc_clk *clksrc_cdev[] = { &clk_sclk_uclk, &clk_sclk_spi0, @@ -556,6 +569,7 @@ static struct clksrc_clk *clksrc_cdev[] = { &clk_sclk_mmc0, &clk_sclk_mmc1, &clk_sclk_mmc2, + &clk_sclk_audio0, }; static struct clk_lookup s5p6450_clk_lookup[] = { @@ -567,6 +581,10 @@ static struct clk_lookup s5p6450_clk_lookup[] = { CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), + CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk), + CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1), + CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2), }; /* Clock initialization code */ @@ -584,7 +602,6 @@ static struct clksrc_clk *sysclks[] = { &clk_pclk, &clk_hclk_low, &clk_pclk_low, - &clk_sclk_audio0, }; static struct clk dummy_apb_pclk = { @@ -661,10 +678,16 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) void __init s5p6450_register_clocks(void) { int ptr; + unsigned int cnt; for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) s3c_register_clksrc(sysclks[ptr], 1); + + s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); + for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++) + s3c_disable_clocks(clk_cdev[cnt], 1); + s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c index a0d6edf..723d4773c 100644 --- a/arch/arm/mach-s5p64x0/dev-audio.c +++ b/arch/arm/mach-s5p64x0/dev-audio.c @@ -19,11 +19,6 @@ #include #include -static const char *rclksrc[] = { - [0] = "iis", - [1] = "sclk_audio2", -}; - static int s5p6440_cfg_i2s(struct platform_device *pdev) { switch (pdev->id) { @@ -45,7 +40,6 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = { .type = { .i2s = { .quirks = QUIRK_PRI_6CHAN, - .src_clk = rclksrc, }, }, }; @@ -93,7 +87,6 @@ static struct s3c_audio_pdata s5p6450_i2s0_pdata = { .type = { .i2s = { .quirks = QUIRK_PRI_6CHAN, - .src_clk = rclksrc, }, }, }; @@ -110,11 +103,6 @@ struct platform_device s5p6450_device_iis0 = { static struct s3c_audio_pdata s5p6450_i2s_pdata = { .cfg_gpio = s5p6450_cfg_i2s, - .type = { - .i2s = { - .src_clk = rclksrc, - }, - }, }; static struct resource s5p6450_i2s1_resource[] = { -- cgit v0.10.2 From 1fa49e46972d76b2e7d80410d95aff7ab59a3d23 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Wed, 19 Dec 2012 09:49:29 -0800 Subject: ARM: S5PV210: Avoid passing the clks through platform data I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna Acked-by: Sangbeom Kim Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c index 0a5480b..addfb16 100644 --- a/arch/arm/mach-s5pv210/dev-audio.c +++ b/arch/arm/mach-s5pv210/dev-audio.c @@ -20,11 +20,6 @@ #include #include -static const char *rclksrc[] = { - [0] = "busclk", - [1] = "i2sclk", -}; - static int s5pv210_cfg_i2s(struct platform_device *pdev) { /* configure GPIO for i2s port */ @@ -52,7 +47,6 @@ static struct s3c_audio_pdata i2sv5_pdata = { .i2s = { .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, - .src_clk = rclksrc, .idma_addr = S5PV210_AUDSS_INT_MEM, }, }, @@ -75,18 +69,8 @@ struct platform_device s5pv210_device_iis0 = { }, }; -static const char *rclksrc_v3[] = { - [0] = "iis", - [1] = "audio-bus", -}; - static struct s3c_audio_pdata i2sv3_pdata = { .cfg_gpio = s5pv210_cfg_i2s, - .type = { - .i2s = { - .src_clk = rclksrc_v3, - }, - }, }; static struct resource s5pv210_iis1_resource[] = { -- cgit v0.10.2 From fb0a20594787f8a1f10389eec46a2cd51fa6a533 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Wed, 19 Dec 2012 09:49:29 -0800 Subject: ARM: EXYNOS: Avoid passing the clks through platform data I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna Acked-by: Sangbeom Kim Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c index a1cb42c..9d1a609 100644 --- a/arch/arm/mach-exynos/dev-audio.c +++ b/arch/arm/mach-exynos/dev-audio.c @@ -23,11 +23,6 @@ #include #include -static const char *rclksrc[] = { - [0] = "busclk", - [1] = "i2sclk", -}; - static int exynos4_cfg_i2s(struct platform_device *pdev) { /* configure GPIO for i2s port */ @@ -55,7 +50,6 @@ static struct s3c_audio_pdata i2sv5_pdata = { .i2s = { .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, - .src_clk = rclksrc, .idma_addr = EXYNOS4_AUDSS_INT_MEM, }, }, @@ -78,17 +72,11 @@ struct platform_device exynos4_device_i2s0 = { }, }; -static const char *rclksrc_v3[] = { - [0] = "sclk_i2s", - [1] = "no_such_clock", -}; - static struct s3c_audio_pdata i2sv3_pdata = { .cfg_gpio = exynos4_cfg_i2s, .type = { .i2s = { .quirks = QUIRK_NO_MUXPSR, - .src_clk = rclksrc_v3, }, }, }; -- cgit v0.10.2 From febd41d59dc4a8125b1b5fd0b947ab795bfe4aa5 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 12 Dec 2012 17:08:23 +0100 Subject: ARM: sunxi: rename device tree source files This is the rename portion of "ARM: sunxi: Change device tree naming scheme for sunxi" that were missed when the patch was applied. Signed-off-by: Olof Johansson diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts new file mode 100644 index 0000000..5cab825 --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -0,0 +1,38 @@ +/* + * Copyright 2012 Stefan Roese + * Stefan Roese + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "sun4i-a10.dtsi" + +/ { + model = "Cubietech Cubieboard"; + compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + bootargs = "earlyprintk console=ttyS0,115200"; + }; + + soc { + uart0: uart@01c28000 { + status = "okay"; + }; + + uart1: uart@01c28400 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi new file mode 100644 index 0000000..e61fdd4 --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -0,0 +1,19 @@ +/* + * Copyright 2012 Stefan Roese + * Stefan Roese + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "sunxi.dtsi" + +/ { + memory { + reg = <0x40000000 0x80000000>; + }; +}; diff --git a/arch/arm/boot/dts/sun4i-cubieboard.dts b/arch/arm/boot/dts/sun4i-cubieboard.dts deleted file mode 100644 index 5cab825..0000000 --- a/arch/arm/boot/dts/sun4i-cubieboard.dts +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright 2012 Stefan Roese - * Stefan Roese - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -/include/ "sun4i-a10.dtsi" - -/ { - model = "Cubietech Cubieboard"; - compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - serial1 = &uart1; - }; - - chosen { - bootargs = "earlyprintk console=ttyS0,115200"; - }; - - soc { - uart0: uart@01c28000 { - status = "okay"; - }; - - uart1: uart@01c28400 { - status = "okay"; - }; - }; -}; diff --git a/arch/arm/boot/dts/sun4i.dtsi b/arch/arm/boot/dts/sun4i.dtsi deleted file mode 100644 index e61fdd4..0000000 --- a/arch/arm/boot/dts/sun4i.dtsi +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2012 Stefan Roese - * Stefan Roese - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/include/ "sunxi.dtsi" - -/ { - memory { - reg = <0x40000000 0x80000000>; - }; -}; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts new file mode 100644 index 0000000..498a091 --- /dev/null +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -0,0 +1,30 @@ +/* + * Copyright 2012 Maxime Ripard + * + * Maxime Ripard + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "sun5i-a13.dtsi" + +/ { + model = "Olimex A13-Olinuxino"; + compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13"; + + chosen { + bootargs = "earlyprintk console=ttyS0,115200"; + }; + + soc { + uart1: uart@01c28400 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi new file mode 100644 index 0000000..59a2d26 --- /dev/null +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -0,0 +1,20 @@ +/* + * Copyright 2012 Maxime Ripard + * + * Maxime Ripard + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "sunxi.dtsi" + +/ { + memory { + reg = <0x40000000 0x20000000>; + }; +}; diff --git a/arch/arm/boot/dts/sun5i-olinuxino.dts b/arch/arm/boot/dts/sun5i-olinuxino.dts deleted file mode 100644 index 498a091..0000000 --- a/arch/arm/boot/dts/sun5i-olinuxino.dts +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard - * - * Maxime Ripard - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -/include/ "sun5i-a13.dtsi" - -/ { - model = "Olimex A13-Olinuxino"; - compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13"; - - chosen { - bootargs = "earlyprintk console=ttyS0,115200"; - }; - - soc { - uart1: uart@01c28400 { - status = "okay"; - }; - }; -}; diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi deleted file mode 100644 index 59a2d26..0000000 --- a/arch/arm/boot/dts/sun5i.dtsi +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard - * - * Maxime Ripard - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/include/ "sunxi.dtsi" - -/ { - memory { - reg = <0x40000000 0x20000000>; - }; -}; -- cgit v0.10.2 From 2727da8595d6a134502ce576b812f0bb0e3c14ed Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 19 Dec 2012 10:50:09 +0100 Subject: ARM: OMAP2+: Fix compillation error in mach-omap2/timer.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit prom_add_property() has been renamed to of_add_property() This patch fixes the following comilation error: arch/arm/mach-omap2/timer.c: In function ‘omap_get_timer_dt’: arch/arm/mach-omap2/timer.c:178:3: error: implicit declaration of function ‘prom_add_property’ [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[1]: *** [arch/arm/mach-omap2/timer.o] Error 1 make[1]: *** Waiting for unfinished jobs.... Signed-off-by: Peter Ujfalusi Signed-off-by: Tony Lindgren Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 06e1415..691aa67 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -175,7 +175,7 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match, continue; } - prom_add_property(np, &device_disabled); + of_add_property(np, &device_disabled); return np; } -- cgit v0.10.2