From 63b77d6d5a2dad95a9fe0c0459f10f632ae70248 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 24 Aug 2016 15:38:56 +0200 Subject: Documentation: devicetree: changesets do locking on their own meanwhile Since commit 183223770ae862 ("drivers/of: Export OF changeset functions"), the mentioned functions do all necessary locking. Signed-off-by: Wolfram Sang Fixes: 183223770ae862 ("drivers/of: Export OF changeset functions") Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/changesets.txt b/Documentation/devicetree/changesets.txt index 935ba5a..cb488ee 100644 --- a/Documentation/devicetree/changesets.txt +++ b/Documentation/devicetree/changesets.txt @@ -21,20 +21,11 @@ a set of changes. No changes to the active tree are made at this point. All the change operations are recorded in the of_changeset 'entries' list. -3. mutex_lock(of_mutex) - starts a changeset; The global of_mutex -ensures there can only be one editor at a time. - -4. of_changeset_apply() - Apply the changes to the tree. Either the +3. of_changeset_apply() - Apply the changes to the tree. Either the entire changeset will get applied, or if there is an error the tree will -be restored to the previous state - -5. mutex_unlock(of_mutex) - All operations complete, release the mutex +be restored to the previous state. The core ensures proper serialization +through locking. An unlocked version __of_changeset_apply is available, +if needed. If a successfully applied changeset needs to be removed, it can be done -with the following sequence. - -1. mutex_lock(of_mutex) - -2. of_changeset_revert() - -3. mutex_unlock(of_mutex) +with of_changeset_revert(). -- cgit v0.10.2 From a24f7253f26d1ece36e6f3d81cb87636f90fd747 Mon Sep 17 00:00:00 2001 From: Rask Ingemann Lambertsen Date: Fri, 19 Aug 2016 19:38:42 +0200 Subject: devicetree: Sort vendor prefixes in alphabetical order Vendor prefixes should be listed in alphabetical order, which some of them weren't, so this patch corrects that. Signed-off-by: Rask Ingemann Lambertsen Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 1992aa9..69b0576 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -3,8 +3,8 @@ Device tree binding vendor prefix registry. Keep list in alphabetical order. This isn't an exhaustive list, but you should add new prefixes to it before using them to avoid name-space collisions. -abilis Abilis Systems abcn Abracon Corporation +abilis Abilis Systems active-semi Active-Semi International Inc ad Avionic Design GmbH adapteva Adapteva, Inc. @@ -101,8 +101,8 @@ focaltech FocalTech Systems Co.,Ltd fsl Freescale Semiconductor ge General Electric Company geekbuying GeekBuying -GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. +GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. geniatech Geniatech, Inc. giantplus Giantplus Technology Co., Ltd. globalscale Globalscale Technologies, Inc. @@ -126,7 +126,6 @@ i2se I2SE GmbH ibm International Business Machines (IBM) idt Integrated Device Technologies, Inc. ifi Ingenieurburo Fur Ic-Technologie (I/F/I) -iom Iomega Corporation img Imagination Technologies Ltd. infineon Infineon Technologies inforce Inforce Computing @@ -135,6 +134,7 @@ innolux Innolux Corporation intel Intel Corporation intercontrol Inter Control Group invensense InvenSense Inc. +iom Iomega Corporation isee ISEE 2007 S.L. isil Intersil issi Integrated Silicon Solutions Inc. @@ -149,8 +149,8 @@ lantiq Lantiq Semiconductor lenovo Lenovo Group Ltd. lg LG Corporation linux Linux-specific binding -lsi LSI Corp. (LSI Logic) lltc Linear Technology Corporation +lsi LSI Corp. (LSI Logic) marvell Marvell Technology Group Ltd. maxim Maxim Integrated Products meas Measurement Specialties @@ -190,20 +190,20 @@ onnn ON Semiconductor Corp. ontat On Tat Industrial Company opencores OpenCores.org option Option NV +ORCL Oracle Corporation ortustech Ortus Technology Co., Ltd. ovti OmniVision Technologies -ORCL Oracle Corporation oxsemi Oxford Semiconductor, Ltd. panasonic Panasonic Corporation parade Parade Technologies Inc. pericom Pericom Technology Inc. phytec PHYTEC Messtechnik GmbH picochip Picochip Ltd +pixcir PIXCIR MICROELECTRONICS Co., Ltd plathome Plat'Home Co., Ltd. plda PLDA -pixcir PIXCIR MICROELECTRONICS Co., Ltd -pulsedlight PulsedLight, Inc powervr PowerVR (deprecated, use img) +pulsedlight PulsedLight, Inc qca Qualcomm Atheros, Inc. qcom Qualcomm Technologies, Inc qemu QEMU, a generic and open source machine emulator and virtualizer @@ -231,12 +231,12 @@ sgx SGX Sensortech sharp Sharp Corporation si-en Si-En Technology Ltd. sigma Sigma Designs, Inc. +sii Seiko Instruments, Inc. sil Silicon Image silabs Silicon Laboratories +silergy Silergy Corp. siliconmitus Silicon Mitus, Inc. simtek -sii Seiko Instruments, Inc. -silergy Silergy Corp. sirf SiRF Technology, Inc. sis Silicon Integrated Systems Corp. sitronix Sitronix Technology Corporation @@ -254,9 +254,9 @@ starry Starry Electronic Technology (ShenZhen) Co., LTD startek Startek ste ST-Ericsson stericsson ST-Ericsson +SUNW Sun Microsystems, Inc syna Synaptics Inc. synology Synology, Inc. -SUNW Sun Microsystems, Inc tbs TBS Technologies tcg Trusted Computing Group tcl Toby Churchill Ltd. @@ -268,14 +268,14 @@ tlm Trusted Logic Mobility toradex Toradex AG toshiba Toshiba Corporation toumaz Toumaz -tplink TP-LINK Technologies Co., Ltd. tpk TPK U.S.A. LLC +tplink TP-LINK Technologies Co., Ltd. tronfy Tronfy tronsmart Tronsmart truly Truly Semiconductors Limited tyan Tyan Computer Corporation -upisemi uPI Semiconductor Corp. uniwest United Western Technologies Corp (UniWest) +upisemi uPI Semiconductor Corp. urt United Radiant Technology Corporation usi Universal Scientific Industrial Co., Ltd. v3 V3 Semiconductor @@ -293,7 +293,7 @@ x-powers X-Powers xes Extreme Engineering Solutions (X-ES) xillybus Xillybus Ltd. xlnx Xilinx -zyxel ZyXEL Communications Corp. zarlink Zarlink Semiconductor zii Zodiac Inflight Innovations zte ZTE Corp. +zyxel ZyXEL Communications Corp. -- cgit v0.10.2 From 13aa2ce4ef633611b0bd90208fc585b7a899732b Mon Sep 17 00:00:00 2001 From: Rask Ingemann Lambertsen Date: Wed, 17 Aug 2016 23:32:22 +0200 Subject: devicetree: Add vendor prefix for Shenzhen Sunchip Technology Co., Ltd Shenzhen Sunchip Technology Co., Ltd produces TV boxes and TV dongles, some of which are sold under other brands. Website: Signed-off-by: Rask Ingemann Lambertsen Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 69b0576..f7fc187 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -254,6 +254,7 @@ starry Starry Electronic Technology (ShenZhen) Co., LTD startek Startek ste ST-Ericsson stericsson ST-Ericsson +sunchip Shenzhen Sunchip Technology Co., Ltd SUNW Sun Microsystems, Inc syna Synaptics Inc. synology Synology, Inc. -- cgit v0.10.2 From 4a9983d1253d21d4adb4c1f5616d14a03c17ff1f Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 23 Aug 2016 13:39:03 +0200 Subject: dt-bindings: vendor-prefixes: Add Sierra Wireless Add Sierra Wireless as swir vendor prefix. Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index f7fc187..c3ffee7 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -256,6 +256,7 @@ ste ST-Ericsson stericsson ST-Ericsson sunchip Shenzhen Sunchip Technology Co., Ltd SUNW Sun Microsystems, Inc +swir Sierra Wireless syna Synaptics Inc. synology Synology, Inc. tbs TBS Technologies -- cgit v0.10.2 From a7654dc33c318e9b4ce3af5072ead768b860f16b Mon Sep 17 00:00:00 2001 From: Vinay Simha BN Date: Fri, 26 Aug 2016 08:07:05 +0530 Subject: dt-bindings: Add Japan Display Inc vendor id Add vendor id for Japan Display Inc. Cc: Archit Taneja Cc: John Stultz Cc: Thierry Reding Cc: Sumit Semwal Signed-off-by: Vinay Simha BN Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index c3ffee7..4d95a9d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -138,6 +138,7 @@ iom Iomega Corporation isee ISEE 2007 S.L. isil Intersil issi Integrated Silicon Solutions Inc. +jdi Japan Display Inc. jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH keymile Keymile GmbH -- cgit v0.10.2 From c4dcd205ebabe730858fc0f33a6a9a09bcd53452 Mon Sep 17 00:00:00 2001 From: Guenther Wutz Date: Wed, 3 Aug 2016 16:11:54 +0200 Subject: Documentation: devicetree: spi: fix wrong spi-bus documentation This patch adds missing commas to the spi-bus documentation of the cs-gpio lines. The device tree compiler fails if chip select lines are not comma-separated. Fix the erroneous documentation by adding missing commas. Signed-off-by: Guenther Wutz Signed-off-by: Ralf Ramsauer Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index 1782286..4b1d6e7 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -31,7 +31,7 @@ with max(cs-gpios > hw cs). So if for example the controller has 2 CS lines, and the cs-gpios property looks like this: -cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>; +cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>; Then it should be configured so that num_chipselect = 4 with the following mapping: -- cgit v0.10.2 From 9cbbae2a62bce72c17aeb204efeec240f45c4f4f Mon Sep 17 00:00:00 2001 From: Bharat Kumar Gogada Date: Tue, 9 Aug 2016 19:30:09 +0530 Subject: PCI: Xilinx NWL PCIe: Updating device tree documentation with prefetchable memory space Updating device tree documentation with prefetchable memory sapce. Configuration space shifted to 64-bit address space. Signed-off-by: Bharat Kumar Gogada Acked-by: Rob Herring Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt index 337fc97..3259798 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt +++ b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt @@ -55,9 +55,10 @@ nwl_pcie: pcie@fd0e0000 { msi-parent = <&nwl_pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x0 0xe0000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x1000000>; reg-names = "breg", "pcireg", "cfg"; - ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>; + ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */ + 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ pcie_intc: legacy-interrupt-controller { interrupt-controller; -- cgit v0.10.2 From d305910bbfafc07bc136028f988a161a928a18fd Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 11 Aug 2016 19:26:25 +0200 Subject: dt: bindings: Add binding for ESP8089 wifi chips The ESP8089 chips can mostly be enumerated via their sdio interface, but they are clocked by an external crystal which may differ from one board to the other. This commit adds a binding for the sdio child node for these chips, allowing to specify the external crystal type (for now, this binding could be be extended with e.g. OOB irq support later). The Android driver for this chip uses a text file with key,value pairs which gets loaded as firmware to pass this info to the firmware. The "esp,crystal_26M_en" name is chosen to match the crystal_26M_en key-name in that text file. Note that at this point there only is an out of tree driver for this hardware, there is no clear timeline / path for merging this. Still I believe it would be good to specify the binding for this in tree now, so that any future migration to an in tree driver will not cause compatiblity issues. Cc: Icenowy Zheng Signed-off-by: Hans de Goede Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/net/wireless/esp,esp8089.txt b/Documentation/devicetree/bindings/net/wireless/esp,esp8089.txt new file mode 100644 index 0000000..19331bb --- /dev/null +++ b/Documentation/devicetree/bindings/net/wireless/esp,esp8089.txt @@ -0,0 +1,31 @@ +Espressif ESP8089 wireless SDIO devices + +This node provides properties for controlling the ESP8089 wireless device. +The node is expected to be specified as a child node to the SDIO controller +that connects the device to the system. + +Required properties: + + - compatible : Should be "esp,esp8089". + +Optional properties: + - esp,crystal-26M-en: Integer value for the crystal_26M_en firmware parameter + +Example: + +&mmc1 { + #address-cells = <1>; + #size-cells = <0>; + + vmmc-supply = <®_dldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + esp8089: sdio_wifi@1 { + compatible = "esp,esp8089"; + reg = <1>; + esp,crystal-26M-en = <2>; + }; +}; -- cgit v0.10.2 From 5839783247f416901ea4571882cb81f8354c9d2a Mon Sep 17 00:00:00 2001 From: Sebastiaan Schalbroeck Date: Mon, 22 Aug 2016 22:27:04 +0200 Subject: Documentation: devicetree: Fix max77693 spelling errors This patch corrects spelling errors in the max77693 devicetree doc, in particular example code containing typos. Signed-off-by: Sebastiaan Schalbroeck Reviewed-by: Chanwoo Choi Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/mfd/max77693.txt b/Documentation/devicetree/bindings/mfd/max77693.txt index d342584..6a1ae3a 100644 --- a/Documentation/devicetree/bindings/mfd/max77693.txt +++ b/Documentation/devicetree/bindings/mfd/max77693.txt @@ -17,28 +17,28 @@ Required properties: - interrupt-parent : The parent interrupt controller. Optional properties: -- regulators : The regulators of max77693 have to be instantiated under subnod +- regulators : The regulators of max77693 have to be instantiated under subnode named "regulators" using the following format. regulators { - regualtor-compatible = ESAFEOUT1/ESAFEOUT2/CHARGER - standard regulator constratints[*]. + regulator-compatible = ESAFEOUT1/ESAFEOUT2/CHARGER + standard regulator constraints[*]. }; [*] refer Documentation/devicetree/bindings/regulator/regulator.txt - haptic : The MAX77693 haptic device utilises a PWM controlled motor to provide users with tactile feedback. PWM period and duty-cycle are varied in - order to provide the approprite level of feedback. + order to provide the appropriate level of feedback. Required properties: - - compatible : Must be "maxim,max77693-hpatic" + - compatible : Must be "maxim,max77693-haptic" - haptic-supply : power supply for the haptic motor [*] refer Documentation/devicetree/bindings/regulator/regulator.txt - pwms : phandle to the physical PWM(Pulse Width Modulation) device. PWM properties should be named "pwms". And number of cell is different for each pwm device. - To get more informations, please refer to documentaion. + To get more information, please refer to documentation. [*] refer Documentation/devicetree/bindings/pwm/pwm.txt - charger : Node configuring the charger driver. -- cgit v0.10.2 From 610e12837425e204d1a3bd0182bcdaff1d660e60 Mon Sep 17 00:00:00 2001 From: Niklas Cassel Date: Fri, 26 Aug 2016 00:01:56 +0200 Subject: bindings: PCI: artpec: correct pci binding example - Increase config size. When using a PCIe switch, the previous config size only had room for one device. - Add bus range. Inherited optional property. - Map downstream I/O to PCI address 0. We can map it to any address, but let's be consistent with other drivers. Signed-off-by: Niklas Cassel Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt index 330a45b..5ecaea1 100644 --- a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt +++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt @@ -24,16 +24,17 @@ Example: compatible = "axis,artpec6-pcie", "snps,dw-pcie"; reg = <0xf8050000 0x2000 0xf8040000 0x1000 - 0xc0000000 0x1000>; + 0xc0000000 0x2000>; reg-names = "dbi", "phy", "config"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; /* downstream I/O */ - ranges = <0x81000000 0 0x00010000 0xc0010000 0 0x00010000 + ranges = <0x81000000 0 0 0xc0002000 0 0x00010000 /* non-prefetchable memory */ - 0x82000000 0 0xc0020000 0xc0020000 0 0x1ffe0000>; + 0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>; num-lanes = <2>; + bus-range = <0x00 0xff>; interrupts = ; interrupt-names = "msi"; #interrupt-cells = <1>; -- cgit v0.10.2 From d4b8e2c5b07e20f3ef0ca0a2bde390beb0f8fda5 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 1 Sep 2016 13:02:16 -0600 Subject: dt: net: enhance DWC EQoS binding to support Tegra186 The Synopsys DWC EQoS is a configurable IP block which supports multiple options for bus type, clocking and reset structure, and feature list. Extend the DT binding to define a "compatible value" for the configuration contained in NVIDIA's Tegra186 SoC, and define some new properties and list property entries required by that configuration. Signed-off-by: Stephen Warren Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt index 51f8d2e..d93f71c 100644 --- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt +++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt @@ -1,21 +1,111 @@ * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC) +This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service) +IP block. The IP supports multiple options for bus type, clocking and reset +structure, and feature list. Consequently, a number of properties and list +entries in properties are marked as optional, or only required in specific HW +configurations. Required properties: -- compatible: Should be "snps,dwc-qos-ethernet-4.10" +- compatible: One of: + - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10" + Represents the IP core when integrated into the Axis ARTPEC-6 SoC. + - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10" + Represents the IP core when integrated into the NVIDIA Tegra186 SoC. + - "snps,dwc-qos-ethernet-4.10" + This combination is deprecated. It should be treated as equivalent to + "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be + compatible with earlier revisions of this binding. - reg: Address and length of the register set for the device -- clocks: Phandles to the reference clock and the bus clock -- clock-names: Should be "phy_ref_clk" for the reference clock and "apb_pclk" - for the bus clock. +- clocks: Phandle and clock specifiers for each entry in clock-names, in the + same order. See ../clock/clock-bindings.txt. +- clock-names: May contain any/all of the following depending on the IP + configuration, in any order: + - "tx" + The EQOS transmit path clock. The HW signal name is clk_tx_i. + In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX + path. In other configurations, other clocks (such as tx_125, rmii) may + drive the PHY TX path. + - "rx" + The EQOS receive path clock. The HW signal name is clk_rx_i. + In some configurations (e.g. GMII/RGMII), this clock is derived from the + PHY's RX clock output. In other configurations, other clocks (such as + rx_125, rmii) may drive the EQOS RX path. + In cases where the PHY clock is directly fed into the EQOS receive path + without intervening logic, the DT need not represent this clock, since it + is assumed to be fully under the control of the PHY device/driver. In + cases where SoC integration adds additional logic to this path, such as a + SW-controlled clock gate, this clock should be represented in DT. + - "slave_bus" + The CPU/slave-bus (CSR) interface clock. This applies to any bus type; + APB, AHB, AXI, etc. The HW signal name is hclk_i (AHB) or clk_csr_i (other + buses). + - "master_bus" + The master bus interface clock. Only required in configurations that use a + separate clock for the master and slave bus interfaces. The HW signal name + is hclk_i (AHB) or aclk_i (AXI). + - "ptp_ref" + The PTP reference clock. The HW signal name is clk_ptp_ref_i. + - "phy_ref_clk" + This clock is deprecated and should not be used by new compatible values. + It is equivalent to "tx". + - "apb_pclk" + This clock is deprecated and should not be used by new compatible values. + It is equivalent to "slave_bus". + + Note: Support for additional IP configurations may require adding the + following clocks to this list in the future: clk_rx_125_i, clk_tx_125_i, + clk_pmarx_0_i, clk_pmarx1_i, clk_rmii_i, clk_revmii_rx_i, clk_revmii_tx_i. + Configurations exist where multiple similar clocks are used at once, e.g. all + of clk_rx_125_i, clk_pmarx_0_i, clk_pmarx1_i. For this reason it is best to + extend the binding with a separate clock-names entry for each of those RX + clocks, rather than repurposing the existing "rx" clock-names entry as a + generic/logical clock in a similar fashion to "master_bus" and "slave_bus". + This will allow easy support for configurations that support multiple PHY + interfaces using a mux, and hence need to have explicit control over + specific RX clocks. + + The following compatible values require the following set of clocks: + - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10": + - "slave_bus" + - "master_bus" + - "rx" + - "tx" + - "ptp_ref" + - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10": + - "slave_bus" + - "master_bus" + - "tx" + - "ptp_ref" + - "snps,dwc-qos-ethernet-4.10" (deprecated): + - "phy_ref_clk" + - "apb_clk" - interrupt-parent: Should be the phandle for the interrupt controller that services interrupts for this device - interrupts: Should contain the core's combined interrupt signal - phy-mode: See ethernet.txt file in the same directory +- resets: Phandle and reset specifiers for each entry in reset-names, in the + same order. See ../reset/reset.txt. +- reset-names: May contain any/all of the following depending on the IP + configuration, in any order: + - "eqos". The reset to the entire module. The HW signal name is hreset_n + (AHB) or aresetn_i (AXI). + + The following compatible values require the following set of resets: + (the reset properties may be omitted if empty) + - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10": + - "eqos". + - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10": + - None. + - "snps,dwc-qos-ethernet-4.10" (deprecated): + - None. Optional properties: - dma-coherent: Present if dma operations are coherent - mac-address: See ethernet.txt in the same directory - local-mac-address: See ethernet.txt in the same directory +- phy-reset-gpios: Phandle and specifier for any GPIO used to reset the PHY. + See ../gpio/gpio.txt. - snps,en-lpi: If present it enables use of the AXI low-power interface - snps,write-requests: Number of write requests that the AXI port can issue. It depends on the SoC configuration. @@ -52,6 +142,7 @@ ethernet2@40010000 { reg = <0x40010000 0x4000>; phy-handle = <&phy2>; phy-mode = "gmii"; + phy-reset-gpios = <&gpioctlr 43 GPIO_ACTIVE_LOW>; snps,en-tx-lpi-clockgating; snps,en-lpi; -- cgit v0.10.2 From 79ac5d31df7011e2b60dba4bd1e2f9a9f65e5e1e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 12 Sep 2016 14:01:28 +0100 Subject: of: Make of_find_property_value_of_size take a length range In preparation for adding variable-length array reads, change of_find_property_value_of_size so that it takes an optional maximum length. If the maximum is passed as 0, the behaviour is unchanged and it will return a property if it's >= the requested minimum length. If maximum is non-zero it will only return a property whose length is min <= l <= max. Signed-off-by: Richard Fitzgerald Signed-off-by: Rob Herring diff --git a/drivers/of/base.c b/drivers/of/base.c index 3ce6953..b853737 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1146,16 +1146,18 @@ EXPORT_SYMBOL_GPL(of_property_count_elems_of_size); * * @np: device node from which the property value is to be read. * @propname: name of the property to be searched. - * @len: requested length of property value + * @min: minimum allowed length of property value + * @max: maximum allowed length of property value (0 means unlimited) + * @len: if !=NULL, actual length is written to here * * Search for a property in a device node and valid the requested size. * Returns the property value on success, -EINVAL if the property does not * exist, -ENODATA if property does not have a value, and -EOVERFLOW if the - * property data isn't large enough. + * property data is too small or too large. * */ static void *of_find_property_value_of_size(const struct device_node *np, - const char *propname, u32 len) + const char *propname, u32 min, u32 max, size_t *len) { struct property *prop = of_find_property(np, propname, NULL); @@ -1163,9 +1165,14 @@ static void *of_find_property_value_of_size(const struct device_node *np, return ERR_PTR(-EINVAL); if (!prop->value) return ERR_PTR(-ENODATA); - if (len > prop->length) + if (prop->length < min) + return ERR_PTR(-EOVERFLOW); + if (max && prop->length > max) return ERR_PTR(-EOVERFLOW); + if (len) + *len = prop->length; + return prop->value; } @@ -1189,7 +1196,9 @@ int of_property_read_u32_index(const struct device_node *np, u32 index, u32 *out_value) { const u32 *val = of_find_property_value_of_size(np, propname, - ((index + 1) * sizeof(*out_value))); + ((index + 1) * sizeof(*out_value)), + 0, + NULL); if (IS_ERR(val)) return PTR_ERR(val); @@ -1221,7 +1230,9 @@ int of_property_read_u8_array(const struct device_node *np, const char *propname, u8 *out_values, size_t sz) { const u8 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values))); + (sz * sizeof(*out_values)), + 0, + NULL); if (IS_ERR(val)) return PTR_ERR(val); @@ -1254,7 +1265,9 @@ int of_property_read_u16_array(const struct device_node *np, const char *propname, u16 *out_values, size_t sz) { const __be16 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values))); + (sz * sizeof(*out_values)), + 0, + NULL); if (IS_ERR(val)) return PTR_ERR(val); @@ -1286,7 +1299,9 @@ int of_property_read_u32_array(const struct device_node *np, size_t sz) { const __be32 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values))); + (sz * sizeof(*out_values)), + 0, + NULL); if (IS_ERR(val)) return PTR_ERR(val); @@ -1314,7 +1329,9 @@ int of_property_read_u64(const struct device_node *np, const char *propname, u64 *out_value) { const __be32 *val = of_find_property_value_of_size(np, propname, - sizeof(*out_value)); + sizeof(*out_value), + 0, + NULL); if (IS_ERR(val)) return PTR_ERR(val); @@ -1345,7 +1362,9 @@ int of_property_read_u64_array(const struct device_node *np, size_t sz) { const __be32 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values))); + (sz * sizeof(*out_values)), + 0, + NULL); if (IS_ERR(val)) return PTR_ERR(val); -- cgit v0.10.2 From a67e9472da423ec47a3586920b526ebaedf25fc3 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 12 Sep 2016 14:01:29 +0100 Subject: of: Add array read functions with min/max size limits Add a new set of array reading functions that take a minimum and maximum size limit and will fail if the property size is not within the size limits. This makes it more convenient for drivers that use variable-size DT arrays which must be bounded at both ends - data must be at least N entries but must not overflow the array it is being copied into. It is also more efficient than making this functionality out of existing public functions and avoids duplication. The existing array functions have been left in the API, since there are a very large number of clients of those functions and their existing functionality is still useful. This avoids turning a small API improvement into a major kernel rework. The old functions have been turned into mininmal static inlines calling the new functions. The old functions had no upper limit on the actual size of the dts entry, to preserve this functionality rather than keeping two near-identical implementations, if the new function is called with max=0 there is no limit on the size of the dts entry but only the min number of elements are read. Signed-off-by: Richard Fitzgerald Signed-off-by: Rob Herring diff --git a/drivers/of/base.c b/drivers/of/base.c index b853737..a0bccb5 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1209,108 +1209,145 @@ int of_property_read_u32_index(const struct device_node *np, EXPORT_SYMBOL_GPL(of_property_read_u32_index); /** - * of_property_read_u8_array - Find and read an array of u8 from a property. + * of_property_read_variable_u8_array - Find and read an array of u8 from a + * property, with bounds on the minimum and maximum array size. * * @np: device node from which the property value is to be read. * @propname: name of the property to be searched. * @out_values: pointer to return value, modified only if return value is 0. - * @sz: number of array elements to read + * @sz_min: minimum number of array elements to read + * @sz_max: maximum number of array elements to read, if zero there is no + * upper limit on the number of elements in the dts entry but only + * sz_min will be read. * * Search for a property in a device node and read 8-bit value(s) from - * it. Returns 0 on success, -EINVAL if the property does not exist, - * -ENODATA if property does not have a value, and -EOVERFLOW if the - * property data isn't large enough. + * it. Returns number of elements read on success, -EINVAL if the property + * does not exist, -ENODATA if property does not have a value, and -EOVERFLOW + * if the property data is smaller than sz_min or longer than sz_max. * * dts entry of array should be like: * property = /bits/ 8 <0x50 0x60 0x70>; * * The out_values is modified only if a valid u8 value can be decoded. */ -int of_property_read_u8_array(const struct device_node *np, - const char *propname, u8 *out_values, size_t sz) +int of_property_read_variable_u8_array(const struct device_node *np, + const char *propname, u8 *out_values, + size_t sz_min, size_t sz_max) { + size_t sz, count; const u8 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values)), - 0, - NULL); + (sz_min * sizeof(*out_values)), + (sz_max * sizeof(*out_values)), + &sz); if (IS_ERR(val)) return PTR_ERR(val); - while (sz--) + if (!sz_max) + sz = sz_min; + else + sz /= sizeof(*out_values); + + count = sz; + while (count--) *out_values++ = *val++; - return 0; + + return sz; } -EXPORT_SYMBOL_GPL(of_property_read_u8_array); +EXPORT_SYMBOL_GPL(of_property_read_variable_u8_array); /** - * of_property_read_u16_array - Find and read an array of u16 from a property. + * of_property_read_variable_u16_array - Find and read an array of u16 from a + * property, with bounds on the minimum and maximum array size. * * @np: device node from which the property value is to be read. * @propname: name of the property to be searched. * @out_values: pointer to return value, modified only if return value is 0. - * @sz: number of array elements to read + * @sz_min: minimum number of array elements to read + * @sz_max: maximum number of array elements to read, if zero there is no + * upper limit on the number of elements in the dts entry but only + * sz_min will be read. * * Search for a property in a device node and read 16-bit value(s) from - * it. Returns 0 on success, -EINVAL if the property does not exist, - * -ENODATA if property does not have a value, and -EOVERFLOW if the - * property data isn't large enough. + * it. Returns number of elements read on success, -EINVAL if the property + * does not exist, -ENODATA if property does not have a value, and -EOVERFLOW + * if the property data is smaller than sz_min or longer than sz_max. * * dts entry of array should be like: * property = /bits/ 16 <0x5000 0x6000 0x7000>; * * The out_values is modified only if a valid u16 value can be decoded. */ -int of_property_read_u16_array(const struct device_node *np, - const char *propname, u16 *out_values, size_t sz) +int of_property_read_variable_u16_array(const struct device_node *np, + const char *propname, u16 *out_values, + size_t sz_min, size_t sz_max) { + size_t sz, count; const __be16 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values)), - 0, - NULL); + (sz_min * sizeof(*out_values)), + (sz_max * sizeof(*out_values)), + &sz); if (IS_ERR(val)) return PTR_ERR(val); - while (sz--) + if (!sz_max) + sz = sz_min; + else + sz /= sizeof(*out_values); + + count = sz; + while (count--) *out_values++ = be16_to_cpup(val++); - return 0; + + return sz; } -EXPORT_SYMBOL_GPL(of_property_read_u16_array); +EXPORT_SYMBOL_GPL(of_property_read_variable_u16_array); /** - * of_property_read_u32_array - Find and read an array of 32 bit integers - * from a property. + * of_property_read_variable_u32_array - Find and read an array of 32 bit + * integers from a property, with bounds on the minimum and maximum array size. * * @np: device node from which the property value is to be read. * @propname: name of the property to be searched. * @out_values: pointer to return value, modified only if return value is 0. - * @sz: number of array elements to read + * @sz_min: minimum number of array elements to read + * @sz_max: maximum number of array elements to read, if zero there is no + * upper limit on the number of elements in the dts entry but only + * sz_min will be read. * * Search for a property in a device node and read 32-bit value(s) from - * it. Returns 0 on success, -EINVAL if the property does not exist, - * -ENODATA if property does not have a value, and -EOVERFLOW if the - * property data isn't large enough. + * it. Returns number of elements read on success, -EINVAL if the property + * does not exist, -ENODATA if property does not have a value, and -EOVERFLOW + * if the property data is smaller than sz_min or longer than sz_max. * * The out_values is modified only if a valid u32 value can be decoded. */ -int of_property_read_u32_array(const struct device_node *np, +int of_property_read_variable_u32_array(const struct device_node *np, const char *propname, u32 *out_values, - size_t sz) + size_t sz_min, size_t sz_max) { + size_t sz, count; const __be32 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values)), - 0, - NULL); + (sz_min * sizeof(*out_values)), + (sz_max * sizeof(*out_values)), + &sz); if (IS_ERR(val)) return PTR_ERR(val); - while (sz--) + if (!sz_max) + sz = sz_min; + else + sz /= sizeof(*out_values); + + count = sz; + while (count--) *out_values++ = be32_to_cpup(val++); - return 0; + + return sz; } -EXPORT_SYMBOL_GPL(of_property_read_u32_array); +EXPORT_SYMBOL_GPL(of_property_read_variable_u32_array); /** * of_property_read_u64 - Find and read a 64 bit integer from a property @@ -1342,40 +1379,51 @@ int of_property_read_u64(const struct device_node *np, const char *propname, EXPORT_SYMBOL_GPL(of_property_read_u64); /** - * of_property_read_u64_array - Find and read an array of 64 bit integers - * from a property. + * of_property_read_variable_u64_array - Find and read an array of 64 bit + * integers from a property, with bounds on the minimum and maximum array size. * * @np: device node from which the property value is to be read. * @propname: name of the property to be searched. * @out_values: pointer to return value, modified only if return value is 0. - * @sz: number of array elements to read + * @sz_min: minimum number of array elements to read + * @sz_max: maximum number of array elements to read, if zero there is no + * upper limit on the number of elements in the dts entry but only + * sz_min will be read. * * Search for a property in a device node and read 64-bit value(s) from - * it. Returns 0 on success, -EINVAL if the property does not exist, - * -ENODATA if property does not have a value, and -EOVERFLOW if the - * property data isn't large enough. + * it. Returns number of elements read on success, -EINVAL if the property + * does not exist, -ENODATA if property does not have a value, and -EOVERFLOW + * if the property data is smaller than sz_min or longer than sz_max. * * The out_values is modified only if a valid u64 value can be decoded. */ -int of_property_read_u64_array(const struct device_node *np, +int of_property_read_variable_u64_array(const struct device_node *np, const char *propname, u64 *out_values, - size_t sz) + size_t sz_min, size_t sz_max) { + size_t sz, count; const __be32 *val = of_find_property_value_of_size(np, propname, - (sz * sizeof(*out_values)), - 0, - NULL); + (sz_min * sizeof(*out_values)), + (sz_max * sizeof(*out_values)), + &sz); if (IS_ERR(val)) return PTR_ERR(val); - while (sz--) { + if (!sz_max) + sz = sz_min; + else + sz /= sizeof(*out_values); + + count = sz; + while (count--) { *out_values++ = of_read_number(val, 2); val += 2; } - return 0; + + return sz; } -EXPORT_SYMBOL_GPL(of_property_read_u64_array); +EXPORT_SYMBOL_GPL(of_property_read_variable_u64_array); /** * of_property_read_string - Find and read a string from a property diff --git a/include/linux/of.h b/include/linux/of.h index 3d9ff8e..299aeb1 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -291,20 +291,24 @@ extern int of_property_count_elems_of_size(const struct device_node *np, extern int of_property_read_u32_index(const struct device_node *np, const char *propname, u32 index, u32 *out_value); -extern int of_property_read_u8_array(const struct device_node *np, - const char *propname, u8 *out_values, size_t sz); -extern int of_property_read_u16_array(const struct device_node *np, - const char *propname, u16 *out_values, size_t sz); -extern int of_property_read_u32_array(const struct device_node *np, - const char *propname, - u32 *out_values, - size_t sz); +extern int of_property_read_variable_u8_array(const struct device_node *np, + const char *propname, u8 *out_values, + size_t sz_min, size_t sz_max); +extern int of_property_read_variable_u16_array(const struct device_node *np, + const char *propname, u16 *out_values, + size_t sz_min, size_t sz_max); +extern int of_property_read_variable_u32_array(const struct device_node *np, + const char *propname, + u32 *out_values, + size_t sz_min, + size_t sz_max); extern int of_property_read_u64(const struct device_node *np, const char *propname, u64 *out_value); -extern int of_property_read_u64_array(const struct device_node *np, - const char *propname, - u64 *out_values, - size_t sz); +extern int of_property_read_variable_u64_array(const struct device_node *np, + const char *propname, + u64 *out_values, + size_t sz_min, + size_t sz_max); extern int of_property_read_string(const struct device_node *np, const char *propname, @@ -380,6 +384,122 @@ extern int of_detach_node(struct device_node *); #define of_match_ptr(_ptr) (_ptr) +/** + * of_property_read_u8_array - Find and read an array of u8 from a property. + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @out_values: pointer to return value, modified only if return value is 0. + * @sz: number of array elements to read + * + * Search for a property in a device node and read 8-bit value(s) from + * it. Returns 0 on success, -EINVAL if the property does not exist, + * -ENODATA if property does not have a value, and -EOVERFLOW if the + * property data isn't large enough. + * + * dts entry of array should be like: + * property = /bits/ 8 <0x50 0x60 0x70>; + * + * The out_values is modified only if a valid u8 value can be decoded. + */ +static inline int of_property_read_u8_array(const struct device_node *np, + const char *propname, + u8 *out_values, size_t sz) +{ + int ret = of_property_read_variable_u8_array(np, propname, out_values, + sz, 0); + if (ret >= 0) + return 0; + else + return ret; +} + +/** + * of_property_read_u16_array - Find and read an array of u16 from a property. + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @out_values: pointer to return value, modified only if return value is 0. + * @sz: number of array elements to read + * + * Search for a property in a device node and read 16-bit value(s) from + * it. Returns 0 on success, -EINVAL if the property does not exist, + * -ENODATA if property does not have a value, and -EOVERFLOW if the + * property data isn't large enough. + * + * dts entry of array should be like: + * property = /bits/ 16 <0x5000 0x6000 0x7000>; + * + * The out_values is modified only if a valid u16 value can be decoded. + */ +static inline int of_property_read_u16_array(const struct device_node *np, + const char *propname, + u16 *out_values, size_t sz) +{ + int ret = of_property_read_variable_u16_array(np, propname, out_values, + sz, 0); + if (ret >= 0) + return 0; + else + return ret; +} + +/** + * of_property_read_u32_array - Find and read an array of 32 bit integers + * from a property. + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @out_values: pointer to return value, modified only if return value is 0. + * @sz: number of array elements to read + * + * Search for a property in a device node and read 32-bit value(s) from + * it. Returns 0 on success, -EINVAL if the property does not exist, + * -ENODATA if property does not have a value, and -EOVERFLOW if the + * property data isn't large enough. + * + * The out_values is modified only if a valid u32 value can be decoded. + */ +static inline int of_property_read_u32_array(const struct device_node *np, + const char *propname, + u32 *out_values, size_t sz) +{ + int ret = of_property_read_variable_u32_array(np, propname, out_values, + sz, 0); + if (ret >= 0) + return 0; + else + return ret; +} + +/** + * of_property_read_u64_array - Find and read an array of 64 bit integers + * from a property. + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @out_values: pointer to return value, modified only if return value is 0. + * @sz: number of array elements to read + * + * Search for a property in a device node and read 64-bit value(s) from + * it. Returns 0 on success, -EINVAL if the property does not exist, + * -ENODATA if property does not have a value, and -EOVERFLOW if the + * property data isn't large enough. + * + * The out_values is modified only if a valid u64 value can be decoded. + */ +static inline int of_property_read_u64_array(const struct device_node *np, + const char *propname, + u64 *out_values, size_t sz) +{ + int ret = of_property_read_variable_u64_array(np, propname, out_values, + sz, 0); + if (ret >= 0) + return 0; + else + return ret; +} + /* * struct property *prop; * const __be32 *p; -- cgit v0.10.2 From f94277af03ead0d3bf24a190a44d2b4cd6016549 Mon Sep 17 00:00:00 2001 From: Robin Murphy Date: Wed, 14 Sep 2016 16:01:24 +0100 Subject: of/platform: Initialise dev->fwnode appropriately Whilst we're some of the way towards a universal firmware property interface, drivers which deal with both OF and ACPI probing end up having to do things like this: dev->of_node ? &dev->of_node->fwnode : dev->fwnode This seems unnecessary, when the OF code could instead simply fill in the device's fwnode when binding the of_node, and let the drivers use dev->fwnode either way. Let's give it a go and see what falls out. Signed-off-by: Robin Murphy Signed-off-by: Rob Herring diff --git a/drivers/of/platform.c b/drivers/of/platform.c index f39ccd5..f811d27 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -142,6 +142,7 @@ struct platform_device *of_device_alloc(struct device_node *np, } dev->dev.of_node = of_node_get(np); + dev->dev.fwnode = &np->fwnode; dev->dev.parent = parent ? : &platform_bus; if (bus_id) @@ -241,6 +242,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node, /* setup generic device info */ dev->dev.of_node = of_node_get(node); + dev->dev.fwnode = &node->fwnode; dev->dev.parent = parent ? : &platform_bus; dev->dev.platform_data = platform_data; if (bus_id) -- cgit v0.10.2 From 3a23f384f7d6b42ef7e4e323d7c094124d96d7ed Mon Sep 17 00:00:00 2001 From: Vinay Simha BN Date: Wed, 7 Sep 2016 15:50:10 +0530 Subject: dt-bindings: Add summit vendor id Add vendor id for Summit microelectronics for SMB347 charger. Cc: John Stultz Cc: Sumit Semwal Signed-off-by: Jonghwa Lee Cc: Chanwoo Choi Cc: Myungjoo Ham Signed-off-by: Vinay Simha BN Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 4d95a9d..ab38364 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -255,6 +255,7 @@ starry Starry Electronic Technology (ShenZhen) Co., LTD startek Startek ste ST-Ericsson stericsson ST-Ericsson +summit Summit microelectronics sunchip Shenzhen Sunchip Technology Co., Ltd SUNW Sun Microsystems, Inc swir Sierra Wireless -- cgit v0.10.2 From 2be8cb295eb44c73c7c110082a6b60ef7b4e4042 Mon Sep 17 00:00:00 2001 From: Randy Li Date: Thu, 8 Sep 2016 05:58:55 +0800 Subject: devicetree: bindings: Add vendor prefix for Topeet. Add TOPEET, a ARM devlopment board vendor in China mainland. Signed-off-by: Randy Li Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index ab38364..384642d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -269,6 +269,7 @@ technologic Technologic Systems thine THine Electronics, Inc. ti Texas Instruments tlm Trusted Logic Mobility +topeet Topeet toradex Toradex AG toshiba Toshiba Corporation toumaz Toumaz -- cgit v0.10.2 From 2a8d2fdca4a23c9e998904181439261e06918574 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 13 Sep 2016 12:30:22 +0200 Subject: devicetree: Add vendor-prefix for Silead Inc. Silead Inc.specializes in touchscreen technology and got recently introduced in a binding for the gsl1680 i2c touchscreen. Therefore add the needed vendor-prefix as well. Signed-off-by: Heiko Stuebner Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 384642d..391023b 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -235,6 +235,7 @@ sigma Sigma Designs, Inc. sii Seiko Instruments, Inc. sil Silicon Image silabs Silicon Laboratories +silead Silead Inc. silergy Silergy Corp. siliconmitus Silicon Mitus, Inc. simtek -- cgit v0.10.2 From eb67e53541cfe0624a614882af4207dcd7f7fb9e Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 16 Sep 2016 00:46:50 +0530 Subject: of: Add vendor prefix for Engicam s.r.l company Engicam providing design services of electronic systems with high content of technology, relying on a long experience in electronic design. For more info visit http://www.engicam.com/en/ Cc: Sascha Hauer Cc: Fabio Estevam Cc: Shawn Guo Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 391023b..d5d2e1e 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -85,6 +85,7 @@ elan Elan Microelectronic Corp. embest Shenzhen Embest Technology Co., Ltd. emmicro EM Microelectronic energymicro Silicon Laboratories (formerly Energy Micro AS) +engicam Engicam S.r.l. epcos EPCOS AG epfl Ecole Polytechnique Fédérale de Lausanne epson Seiko Epson Corp. -- cgit v0.10.2 From 8ddee393a566a4df0b2dbbf1baeaad3a61999b6b Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Fri, 30 Sep 2016 17:27:52 +0200 Subject: dt-bindings: add vendor prefix for Auvidea GmbH Auvidea (http://www.auvidea.eu/) produces embedded devices and baseboards with a focus on audio and video technology. Signed-off-by: Lucas Stach Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index d5d2e1e..451c6f1 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -36,6 +36,7 @@ aspeed ASPEED Technology Inc. atlas Atlas Scientific LLC atmel Atmel Corporation auo AU Optronics Corporation +auvidea Auvidea GmbH avago Avago Technologies avic Shanghai AVIC Optoelectronics Co., Ltd. axis Axis Communications AB -- cgit v0.10.2 From e94f0044c9d2aabcd9c78762e6692c2307eff013 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 28 Sep 2016 01:33:18 +0200 Subject: dt-bindings: Add Keith&Koep vendor prefix Add vendor prefix for Keith&Koep GmbH , http://keith-koep.com/en/ Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Shawn Guo [robh: fix alphabetizing] Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 451c6f1..851e2ca 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -143,6 +143,7 @@ issi Integrated Silicon Solutions Inc. jdi Japan Display Inc. jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH +keithkoep Keith & Koep GmbH keymile Keymile GmbH kinetic Kinetic Technologies kosagi Sutajio Ko-Usagi PTE Ltd. -- cgit v0.10.2 From 87e5fc99b0280b492724cc7f2d8d9ad37b980087 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 30 Sep 2016 00:25:29 +0300 Subject: DT: irqchip: renesas-irqc: document R8A7743/5 support Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt controllers. Document RZ/G1[ME] (also known as R8A774[35]) SoC bindings. Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt index ae5054c..e3f052d 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt @@ -1,10 +1,12 @@ -DT bindings for the R-Mobile/R-Car interrupt controller +DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller Required properties: - compatible: has to be "renesas,irqc-", "renesas,irqc" as fallback. Examples with soctypes are: - "renesas,irqc-r8a73a4" (R-Mobile APE6) + - "renesas,irqc-r8a7743" (RZ/G1M) + - "renesas,irqc-r8a7745" (RZ/G1E) - "renesas,irqc-r8a7790" (R-Car H2) - "renesas,irqc-r8a7791" (R-Car M2-W) - "renesas,irqc-r8a7792" (R-Car V2H) -- cgit v0.10.2