From 06e32c91dbce3c24ccbe84e3af2a35199662bca0 Mon Sep 17 00:00:00 2001 From: Gaku Inami Date: Tue, 3 Jun 2014 21:02:45 +0900 Subject: ARM: shmobile: add cpufreq-cpu0 driver for common SH-Mobile I add a new file(cpufreq.c) for the following reasons. - Registration of platform_device must be unified in SH-Mobile. - We can't create a node of cpufreq drivers into device tree. (Because cpufreq driver is virtual device.) Signed-off-by: Gaku Inami Acked-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 38d5fe8..1b966da 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -48,6 +48,7 @@ obj-$(CONFIG_ARCH_SH7372) += entry-intc.o # PM objects obj-$(CONFIG_SUSPEND) += suspend.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o +obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o diff --git a/arch/arm/mach-shmobile/cpufreq.c b/arch/arm/mach-shmobile/cpufreq.c new file mode 100644 index 0000000..e2c868f --- /dev/null +++ b/arch/arm/mach-shmobile/cpufreq.c @@ -0,0 +1,31 @@ +/* + * CPUFreq support code for SH-Mobile ARM + * + * Copyright (C) 2014 Gaku Inami + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include + +int __init shmobile_cpufreq_init(void) +{ + struct device_node *np; + + np = of_cpu_device_node_get(0); + if (np == NULL) { + pr_err("failed to find cpu0 node\n"); + return 0; + } + + if (of_get_property(np, "operating-points", NULL)) + platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0); + + of_node_put(np); + + return 0; +} diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index f7a360e..921a18e 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -45,12 +45,19 @@ int shmobile_cpuidle_init(void); static inline int shmobile_cpuidle_init(void) { return 0; } #endif +#ifdef CONFIG_CPU_FREQ +int shmobile_cpufreq_init(void); +#else +static inline int shmobile_cpufreq_init(void) { return 0; } +#endif + extern void __iomem *shmobile_scu_base; static inline void __init shmobile_init_late(void) { shmobile_suspend_init(); shmobile_cpuidle_init(); + shmobile_cpufreq_init(); } #endif /* __ARCH_MACH_COMMON_H */ -- cgit v0.10.2 From edc8fb1d6ebdfc4efa009073586d3567c3368475 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 21 May 2014 15:31:05 +0200 Subject: ARM: shmobile: Fix device node reference leakage in shmobile_init_delay The of_find_compatible_node() function returns a new reference to the found node. Instead of just adding of_node_put() calls, simplify the code by moving the CPU identification logic inside the loop over cpu nodes, in order to lower complexity from O(n) to O(1) by replacing of_find_compatible_node() calls with of_device_is_compatible(). Signed-off-by: Laurent Pinchart Acked-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c index 68bc0b8..942efdc 100644 --- a/arch/arm/mach-shmobile/timer.c +++ b/arch/arm/mach-shmobile/timer.c @@ -59,29 +59,37 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz, void __init shmobile_init_delay(void) { - struct device_node *np, *parent; - u32 max_freq, freq; - - max_freq = 0; - - parent = of_find_node_by_path("/cpus"); - if (parent) { - for_each_child_of_node(parent, np) { - if (!of_property_read_u32(np, "clock-frequency", &freq)) - max_freq = max(max_freq, freq); - } - of_node_put(parent); - } + struct device_node *np, *cpus; + bool is_a8_a9 = false; + bool is_a15 = false; + u32 max_freq = 0; + + cpus = of_find_node_by_path("/cpus"); + if (!cpus) + return; + + for_each_child_of_node(cpus, np) { + u32 freq; + + if (!of_property_read_u32(np, "clock-frequency", &freq)) + max_freq = max(max_freq, freq); - if (max_freq) { - if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8")) - shmobile_setup_delay_hz(max_freq, 1, 3); - else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) - shmobile_setup_delay_hz(max_freq, 1, 3); - else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15")) - if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) - shmobile_setup_delay_hz(max_freq, 2, 4); + if (of_device_is_compatible(np, "arm,cortex-a8") || + of_device_is_compatible(np, "arm,cortex-a9")) + is_a8_a9 = true; + else if (of_device_is_compatible(np, "arm,cortex-a15")) + is_a15 = true; } + + of_node_put(cpus); + + if (!max_freq) + return; + + if (is_a8_a9) + shmobile_setup_delay_hz(max_freq, 1, 3); + else if (is_a15 && !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) + shmobile_setup_delay_hz(max_freq, 2, 4); } static void __init shmobile_late_time_init(void) -- cgit v0.10.2 From 7b7dfdd2b9927c1861bb6d03ca35261f1739aceb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Antoine=20T=C3=A9nart?= Date: Wed, 4 Jun 2014 18:03:42 +0200 Subject: ARM: berlin: add SMP support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Adds SMP support for Berlin SoCs. Secondary CPUs are reset, then execute the instruction we put in the reset exception register, setting the pc at the address contained in the software reset address register, which is the physical address of the Berlin secondary startup. This implementation avoid using the pen lock mechanism. Signed-off-by: Antoine Ténart Reviewed-by: Andrew Lunn Signed-off-by: Sebastian Hesselbarth diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig index 101e0f3..ba5b6ce 100644 --- a/arch/arm/mach-berlin/Kconfig +++ b/arch/arm/mach-berlin/Kconfig @@ -15,7 +15,9 @@ config MACH_BERLIN_BG2 bool "Marvell Armada 1500 (BG2)" select CACHE_L2X0 select CPU_PJ4B + select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP + select HAVE_SMP select PINCTRL_BERLIN_BG2 config MACH_BERLIN_BG2CD @@ -27,6 +29,7 @@ config MACH_BERLIN_BG2CD config MACH_BERLIN_BG2Q bool "Marvell Armada 1500 Pro (BG2-Q)" select CACHE_L2X0 + select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select PINCTRL_BERLIN_BG2Q diff --git a/arch/arm/mach-berlin/Makefile b/arch/arm/mach-berlin/Makefile index ab69fe9..c0719ec 100644 --- a/arch/arm/mach-berlin/Makefile +++ b/arch/arm/mach-berlin/Makefile @@ -1 +1,2 @@ -obj-y += berlin.o +obj-y += berlin.o +obj-$(CONFIG_SMP) += headsmp.o platsmp.o diff --git a/arch/arm/mach-berlin/headsmp.S b/arch/arm/mach-berlin/headsmp.S new file mode 100644 index 0000000..4a4c56a --- /dev/null +++ b/arch/arm/mach-berlin/headsmp.S @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2014 Marvell Technology Group Ltd. + * + * Antoine Ténart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +ENTRY(berlin_secondary_startup) + ARM_BE8(setend be) + bl v7_invalidate_l1 + b secondary_startup +ENDPROC(berlin_secondary_startup) + +/* + * If the following instruction is set in the reset exception vector, CPUs + * will fetch the value of the software reset address vector when being + * reset. + */ +.global boot_inst +boot_inst: + ldr pc, [pc, #140] + + .align diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c new file mode 100644 index 0000000..702e798 --- /dev/null +++ b/arch/arm/mach-berlin/platsmp.c @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2014 Marvell Technology Group Ltd. + * + * Antoine Ténart + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include +#include + +#define CPU_RESET 0x00 + +#define RESET_VECT 0x00 +#define SW_RESET_ADDR 0x94 + +extern void berlin_secondary_startup(void); +extern u32 boot_inst; + +static void __iomem *cpu_ctrl; + +static inline void berlin_perform_reset_cpu(unsigned int cpu) +{ + u32 val; + + val = readl(cpu_ctrl + CPU_RESET); + val |= BIT(cpu_logical_map(cpu)); + writel(val, cpu_ctrl + CPU_RESET); +} + +static int berlin_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + if (!cpu_ctrl) + return -EFAULT; + + /* + * Reset the CPU, making it to execute the instruction in the reset + * exception vector. + */ + berlin_perform_reset_cpu(cpu); + + return 0; +} + +static void __init berlin_smp_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *np; + void __iomem *scu_base; + void __iomem *vectors_base; + + np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); + scu_base = of_iomap(np, 0); + of_node_put(np); + if (!scu_base) + return; + + np = of_find_compatible_node(NULL, NULL, "marvell,berlin-cpu-ctrl"); + cpu_ctrl = of_iomap(np, 0); + of_node_put(np); + if (!cpu_ctrl) + goto unmap_scu; + + vectors_base = ioremap(CONFIG_VECTORS_BASE, SZ_32K); + if (!vectors_base) + goto unmap_scu; + + scu_enable(scu_base); + flush_cache_all(); + + /* + * Write the first instruction the CPU will execute after being reset + * in the reset exception vector. + */ + writel(boot_inst, vectors_base + RESET_VECT); + + /* + * Write the secondary startup address into the SW reset address + * vector. This is used by boot_inst. + */ + writel(virt_to_phys(berlin_secondary_startup), vectors_base + SW_RESET_ADDR); + + iounmap(vectors_base); +unmap_scu: + iounmap(scu_base); +} + +static struct smp_operations berlin_smp_ops __initdata = { + .smp_prepare_cpus = berlin_smp_prepare_cpus, + .smp_boot_secondary = berlin_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops); -- cgit v0.10.2 From e6639117d624d5c8f531d22456a69e38dc23c501 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Thu, 12 Jun 2014 18:58:27 +0300 Subject: kernel: add calibration_delay_done() Add calibration_delay_done() call and dummy implementation. This allows architectures to stop accepting registrations for new timer based delay functions. Signed-off-by: Peter De Schrijver Acked-by: Russell King Signed-off-by: Stephen Warren diff --git a/init/calibrate.c b/init/calibrate.c index 520702d..ce635dc 100644 --- a/init/calibrate.c +++ b/init/calibrate.c @@ -262,6 +262,15 @@ unsigned long __attribute__((weak)) calibrate_delay_is_known(void) return 0; } +/* + * Indicate the cpu delay calibration is done. This can be used by + * architectures to stop accepting delay timer registrations after this point. + */ + +void __attribute__((weak)) calibration_delay_done(void) +{ +} + void calibrate_delay(void) { unsigned long lpj; @@ -301,4 +310,6 @@ void calibrate_delay(void) loops_per_jiffy = lpj; printed = true; + + calibration_delay_done(); } -- cgit v0.10.2 From 5930c1a1f7f8439883d0a2173c6ce51d577e36ec Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Thu, 12 Jun 2014 18:58:28 +0300 Subject: ARM: choose highest resolution delay timer In case there are several possible delay timers, choose the one with the highest resolution. This code relies on the fact secondary CPUs have not yet been brought online when register_current_timer_delay() is called. This is ensured by implementing calibration_delay_done(), Signed-off-by: Peter De Schrijver Acked-by: Russell King Signed-off-by: Stephen Warren diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c index 5306de3..312d43e 100644 --- a/arch/arm/lib/delay.c +++ b/arch/arm/lib/delay.c @@ -19,6 +19,7 @@ * Author: Will Deacon */ +#include #include #include #include @@ -36,6 +37,7 @@ struct arm_delay_ops arm_delay_ops = { static const struct delay_timer *delay_timer; static bool delay_calibrated; +static u64 delay_res; int read_current_timer(unsigned long *timer_val) { @@ -47,6 +49,11 @@ int read_current_timer(unsigned long *timer_val) } EXPORT_SYMBOL_GPL(read_current_timer); +static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) +{ + return (cyc * mult) >> shift; +} + static void __timer_delay(unsigned long cycles) { cycles_t start = get_cycles(); @@ -69,18 +76,24 @@ static void __timer_udelay(unsigned long usecs) void __init register_current_timer_delay(const struct delay_timer *timer) { - if (!delay_calibrated) { - pr_info("Switching to timer-based delay loop\n"); + u32 new_mult, new_shift; + u64 res; + + clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq, + NSEC_PER_SEC, 3600); + res = cyc_to_ns(1ULL, new_mult, new_shift); + + if (!delay_calibrated && (!delay_res || (res < delay_res))) { + pr_info("Switching to timer-based delay loop, resolution %lluns\n", res); delay_timer = timer; lpj_fine = timer->freq / HZ; + delay_res = res; /* cpufreq may scale loops_per_jiffy, so keep a private copy */ arm_delay_ops.ticks_per_jiffy = lpj_fine; arm_delay_ops.delay = __timer_delay; arm_delay_ops.const_udelay = __timer_const_udelay; arm_delay_ops.udelay = __timer_udelay; - - delay_calibrated = true; } else { pr_info("Ignoring duplicate/late registration of read_current_timer delay\n"); } @@ -91,3 +104,8 @@ unsigned long calibrate_delay_is_known(void) delay_calibrated = true; return lpj_fine; } + +void calibration_delay_done(void) +{ + delay_calibrated = true; +} -- cgit v0.10.2 From 0ff36b4f479ec8e0cd9b7a919ab877f2d553cd30 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Thu, 12 Jun 2014 18:58:29 +0300 Subject: clocksource: tegra: Use us counter as delay timer All Tegra SoCs have a freerunning microsecond counter which can be used as a delay timer. Signed-off-by: Peter De Schrijver Acked-by: Russell King Signed-off-by: Stephen Warren diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index d1869f0..d2616ef 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -53,6 +54,8 @@ static void __iomem *rtc_base; static struct timespec persistent_ts; static u64 persistent_ms, last_persistent_ms; +static struct delay_timer tegra_delay_timer; + #define timer_writel(value, reg) \ __raw_writel(value, timer_reg_base + (reg)) #define timer_readl(reg) \ @@ -139,6 +142,11 @@ static void tegra_read_persistent_clock(struct timespec *ts) *ts = *tsp; } +static unsigned long tegra_delay_timer_read_counter_long(void) +{ + return readl(timer_reg_base + TIMERUS_CNTR_1US); +} + static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = (struct clock_event_device *)dev_id; @@ -206,6 +214,11 @@ static void __init tegra20_init_timer(struct device_node *np) BUG(); } + tegra_delay_timer.read_current_timer = + tegra_delay_timer_read_counter_long; + tegra_delay_timer.freq = 1000000; + register_current_timer_delay(&tegra_delay_timer); + ret = setup_irq(tegra_timer_irq.irq, &tegra_timer_irq); if (ret) { pr_err("Failed to register timer IRQ: %d\n", ret); -- cgit v0.10.2 From 1e8515384bfa5efa5803a38c5ba7fecd6514c527 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:31:57 +0900 Subject: ARM: shmobile: r8a7779: Add clocks Declare all core and MSTP clocks currently used by r8a7779-based boards. Based on work by Laurent Pinchart for the r8a7790 and r8a7791 SoCs. Acked-by: Laurent Pinchart diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index b517c8e..5a62970 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -11,6 +11,7 @@ /include/ "skeleton.dtsi" +#include #include / { @@ -265,4 +266,147 @@ #size-cells = <0>; status = "disabled"; }; + + clocks { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* External root clock */ + extal_clk: extal_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overriden by the board. */ + clock-frequency = <0>; + clock-output-names = "extal"; + }; + + /* Special CPG clocks */ + cpg_clocks: cpg_clocks@0xe6150000 { + compatible = "renesas,r8a7779-cpg-clocks"; + reg = <0 0xffc80000 0 0x30>; + clocks = <&extal_clk>; + #clock-cells = <1>; + clock-output-names = "plla", "z", "zs", "s", + "s1", "p", "b", "out"; + }; + + /* Fixed factor clocks */ + i_clk: i_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + clock-output-names = "i"; + }; + s3_clk: s3_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clock-output-names = "s3"; + }; + s4_clk: s4_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <16>; + clock-mult = <1>; + clock-output-names = "s4"; + }; + g_clk: g_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7779_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <24>; + clock-mult = <1>; + clock-output-names = "g"; + }; + + /* Gate clocks */ + mstp0_clks: mstp0_clks { + compatible = "renesas,r8a7779-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xffc80030 0 4>; + clocks = <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7779_CLK_HSPI R8A7779_CLK_TMU2 + R8A7779_CLK_TMU1 R8A7779_CLK_TMU0 + R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0 + R8A7779_CLK_SCIF5 R8A7779_CLK_SCIF4 + R8A7779_CLK_SCIF3 R8A7779_CLK_SCIF2 + R8A7779_CLK_SCIF1 R8A7779_CLK_SCIF0 + R8A7779_CLK_I2C3 R8A7779_CLK_I2C2 + R8A7779_CLK_I2C1 R8A7779_CLK_I2C0 + >; + clock-output-names = + "hspi", "tmu2", "tmu1", "tmu0", "hscif1", + "hscif0", "scif5", "scif4", "scif3", "scif2", + "scif1", "scif0", "i2c3", "i2c2", "i2c1", + "i2c0"; + }; + mstp1_clks: mstp1_clks { + compatible = "renesas,r8a7779-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xffc80034 0 4>, <0 0xffc80044 0 4>; + clocks = <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_S>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7779_CLK_USB01 R8A7779_CLK_USB2 + R8A7779_CLK_DU R8A7779_CLK_VIN2 + R8A7779_CLK_VIN1 R8A7779_CLK_VIN0 + R8A7779_CLK_ETHER R8A7779_CLK_SATA + R8A7779_CLK_PCIE R8A7779_CLK_VIN3 + >; + clock-output-names = + "usb01", "usb2", + "du", "vin2", + "vin1", "vin0", + "ether", "sata", + "pcie", "vin3"; + }; + mstp3_clks: mstp3_clks { + compatible = "renesas,r8a7779-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xffc8003c 0 4>; + clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, + <&s4_clk>, <&s4_clk>; + #clock-cells = <1>; + renesas,clock-indices = < + R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2 + R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0 + R8A7779_CLK_MMC1 R8A7779_CLK_MMC0 + >; + clock-output-names = + "sdhi3", "sdhi2", "sdhi1", "sdhi0", + "mmc1", "mmc0"; + }; + }; }; -- cgit v0.10.2 From bedd672409d68c98e717ac79f58b0ba155879275 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:31:58 +0900 Subject: ARM: shmobile: Sync Marzen DTS with Marzen reference DTS Copy the device nodes from Marzen reference into the Marzen device tree file. This will allow us to use a single DTS file regardless of kernel configuration. In case of legacy C board code the device nodes may or may not be used, but in the multiplatform case all the DT device nodes will be used. Based on a similar change for the Lager board by Laurent Pinchart. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index a7af2c2..ddf9b9e 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -11,6 +11,8 @@ /dts-v1/; #include "r8a7779.dtsi" +#include +#include / { model = "marzen"; @@ -24,4 +26,96 @@ device_type = "memory"; reg = <0x60000000 0x40000000>; }; + + fixedregulator3v3: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + lan0@18000000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x18000000 0x100>; + pinctrl-0 = <&lan0_pins>; + pinctrl-names = "default"; + + phy-mode = "mii"; + interrupt-parent = <&irqpin0>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + smsc,irq-push-pull; + reg-io-width = <4>; + vddvario-supply = <&fixedregulator3v3>; + vdd33a-supply = <&fixedregulator3v3>; + }; + + leds { + compatible = "gpio-leds"; + led2 { + gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; + }; + led3 { + gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; + }; + led4 { + gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&irqpin0 { + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif2_pins &scif4_pins>; + pinctrl-names = "default"; + + lan0_pins: lan0 { + intc { + renesas,groups = "intc_irq1_b"; + renesas,function = "intc"; + }; + lbsc { + renesas,groups = "lbsc_ex_cs0"; + renesas,function = "lbsc"; + }; + }; + + scif2_pins: serial2 { + renesas,groups = "scif2_data_c"; + renesas,function = "scif2"; + }; + + scif4_pins: serial4 { + renesas,groups = "scif4_data"; + renesas,function = "scif4"; + }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; + renesas,function = "sdhi0"; + }; + + hspi0_pins: hspi0 { + renesas,groups = "hspi0"; + renesas,function = "hspi0"; + }; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&fixedregulator3v3>; + bus-width = <4>; + status = "okay"; +}; + +&hspi0 { + pinctrl-0 = <&hspi0_pins>; + pinctrl-names = "default"; + status = "okay"; }; -- cgit v0.10.2 From 954e42cf541b3cbb8dd07ba29f5974f91cb8c248 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:31:59 +0900 Subject: ARM: shmobile: marzen: Specify external clock frequency in DT The external crystal frequency is 31.25 on the Marzen board. Specify it in the device tree. Based on work for the Lager board by Laurent Pinchart. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index ddf9b9e..363f693 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -69,6 +69,10 @@ status = "okay"; }; +&extal_clk { + clock-frequency = <31250000>; +}; + &pfc { pinctrl-0 = <&scif2_pins &scif4_pins>; pinctrl-names = "default"; -- cgit v0.10.2 From 3325cbe8ab74731c88e70d172ffef74cbca13f18 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:00 +0900 Subject: ARM: shmobile: r8a7779: Reference clocks Reference clocks using a "clocks" property in all nodes corresponding to devices that require a clock. Based on work by Laurent Pinchart for the r8a7790 and r8a7791 SoC. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 5a62970..bdaaadc 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -158,6 +158,7 @@ compatible = "renesas,i2c-r8a7779"; reg = <0xffc70000 0x1000>; interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7779_CLK_I2C0>; status = "disabled"; }; @@ -167,6 +168,7 @@ compatible = "renesas,i2c-r8a7779"; reg = <0xffc71000 0x1000>; interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7779_CLK_I2C1>; status = "disabled"; }; @@ -176,6 +178,7 @@ compatible = "renesas,i2c-r8a7779"; reg = <0xffc72000 0x1000>; interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7779_CLK_I2C2>; status = "disabled"; }; @@ -185,6 +188,7 @@ compatible = "renesas,i2c-r8a7779"; reg = <0xffc73000 0x1000>; interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7779_CLK_I2C3>; status = "disabled"; }; @@ -202,12 +206,14 @@ compatible = "renesas,rcar-sata"; reg = <0xfc600000 0x2000>; interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp1_clks R8A7779_CLK_SATA>; }; sdhi0: sd@ffe4c000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4c000 0x100>; interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7779_CLK_SDHI0>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -217,6 +223,7 @@ compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4d000 0x100>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7779_CLK_SDHI1>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -226,6 +233,7 @@ compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4e000 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7779_CLK_SDHI2>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -235,6 +243,7 @@ compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4f000 0x100>; interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7779_CLK_SDHI3>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -246,6 +255,7 @@ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + clocks = <&mstp0_clks R8A7779_CLK_HSPI>; status = "disabled"; }; @@ -255,6 +265,7 @@ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + clocks = <&mstp0_clks R8A7779_CLK_HSPI>; status = "disabled"; }; @@ -264,6 +275,7 @@ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + clocks = <&mstp0_clks R8A7779_CLK_HSPI>; status = "disabled"; }; -- cgit v0.10.2 From 5f6108bb9643949bf5ec0bc9f5cbde588c542c7f Mon Sep 17 00:00:00 2001 From: keita kobayashi Date: Fri, 30 May 2014 14:18:48 +0900 Subject: ARM: shmobile: r8a7791 SYSC setup code Add r8a7791 SYSC power management support. Signed-off-by: Keita Kobayashi Acked-by: Magnus Damm [horms+renesas@verge.net.au: rebased] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 38d5fe8..9c0ad3e 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -53,6 +53,7 @@ obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o +obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o # Board objects ifdef CONFIG_ARCH_SHMOBILE_MULTI diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h index 664274c..86eae7b 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7791.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h @@ -5,6 +5,7 @@ void r8a7791_add_standard_devices(void); void r8a7791_add_dt_devices(void); void r8a7791_clock_init(void); void r8a7791_pinmux_init(void); +void r8a7791_pm_init(void); extern struct smp_operations r8a7791_smp_ops; #endif /* __ASM_R8A7791_H__ */ diff --git a/arch/arm/mach-shmobile/pm-r8a7791.c b/arch/arm/mach-shmobile/pm-r8a7791.c new file mode 100644 index 0000000..1519087 --- /dev/null +++ b/arch/arm/mach-shmobile/pm-r8a7791.c @@ -0,0 +1,47 @@ +/* + * r8a7791 Power management support + * + * Copyright (C) 2014 Renesas Electronics Corporation + * Copyright (C) 2011 Renesas Solutions Corp. + * Copyright (C) 2011 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include "pm-rcar.h" + +/* SYSC */ +#define SYSCIER 0x0c +#define SYSCIMR 0x10 + +#if defined(CONFIG_SMP) + +static void __init r8a7791_sysc_init(void) +{ + void __iomem *base = rcar_sysc_init(0xe6180000); + + /* enable all interrupt sources, but do not use interrupt handler */ + iowrite32(0x0131000e, base + SYSCIER); + iowrite32(0, base + SYSCIMR); +} + +#else /* CONFIG_SMP */ + +static inline void r8a7791_sysc_init(void) {} + +#endif /* CONFIG_SMP */ + +void __init r8a7791_pm_init(void) +{ + static int once; + + if (once++) + return; + + r8a7791_sysc_init(); +} diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 2648d68..1772086 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -50,6 +50,8 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, p + CA15RESCNT); iounmap(p); + + r8a7791_pm_init(); } static int r8a7791_smp_boot_secondary(unsigned int cpu, -- cgit v0.10.2 From d6d757c9a4e06e118fa5158fa74e03c514d862d2 Mon Sep 17 00:00:00 2001 From: keita kobayashi Date: Thu, 29 May 2014 16:24:27 +0900 Subject: ARM: shmobile: APMU: Add Core-Standby-state for Suspend to RAM This patch add Core-Standby-state for Suspend to RAM. Signed-off-by: Keita Kobayashi Acked-by: Magnus Damm [horms+renesas@verge.net.au: rebase] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index f7a360e..8f0cd57 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -35,8 +35,10 @@ extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv); #ifdef CONFIG_SUSPEND int shmobile_suspend_init(void); +void shmobile_smp_apmu_suspend_init(void); #else static inline int shmobile_suspend_init(void) { return 0; } +static inline void shmobile_smp_apmu_suspend_init(void) { return 0; } #endif #ifdef CONFIG_CPU_IDLE diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index fe648f5..590e35c 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -7,15 +7,19 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include #include #include #include #include #include #include +#include #include #include +#include #include +#include #include "common.h" static struct { @@ -141,7 +145,7 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) return apmu_wrap(cpu, apmu_power_on); } -#ifdef CONFIG_HOTPLUG_CPU +#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) /* nicked from arch/arm/mach-exynos/hotplug.c */ static inline void cpu_enter_lowpower_a15(void) { @@ -172,16 +176,40 @@ static inline void cpu_enter_lowpower_a15(void) dsb(); } -void shmobile_smp_apmu_cpu_die(unsigned int cpu) +void shmobile_smp_apmu_cpu_shutdown(unsigned int cpu) { - /* For this particular CPU deregister boot vector */ - shmobile_smp_hook(cpu, 0, 0); /* Select next sleep mode using the APMU */ apmu_wrap(cpu, apmu_power_off); /* Do ARM specific CPU shutdown */ cpu_enter_lowpower_a15(); +} + +static inline void cpu_leave_lowpower(void) +{ + unsigned int v; + + asm volatile("mrc p15, 0, %0, c1, c0, 0\n" + " orr %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + " mrc p15, 0, %0, c1, c0, 1\n" + " orr %0, %0, %2\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (CR_C), "Ir" (0x40) + : "cc"); +} +#endif + +#if defined(CONFIG_HOTPLUG_CPU) +void shmobile_smp_apmu_cpu_die(unsigned int cpu) +{ + /* For this particular CPU deregister boot vector */ + shmobile_smp_hook(cpu, 0, 0); + + /* Shutdown CPU core */ + shmobile_smp_apmu_cpu_shutdown(cpu); /* jump to shared mach-shmobile sleep / reset code */ shmobile_smp_sleep(); @@ -192,3 +220,27 @@ int shmobile_smp_apmu_cpu_kill(unsigned int cpu) return apmu_wrap(cpu, apmu_power_off_poll); } #endif + +#if defined(CONFIG_SUSPEND) +static int shmobile_smp_apmu_do_suspend(unsigned long cpu) +{ + shmobile_smp_hook(cpu, virt_to_phys(cpu_resume), 0); + shmobile_smp_apmu_cpu_shutdown(cpu); + cpu_do_idle(); /* WFI selects Core Standby */ + return 1; +} + +static int shmobile_smp_apmu_enter_suspend(suspend_state_t state) +{ + cpu_suspend(smp_processor_id(), shmobile_smp_apmu_do_suspend); + cpu_leave_lowpower(); + return 0; +} + +void shmobile_smp_apmu_suspend_init(void) +{ + shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend; +} +#else +void shmobile_smp_apmu_suspend_init(void) {} +#endif -- cgit v0.10.2 From ce508d1b13d1008db570ac58e775ce36bd9c5112 Mon Sep 17 00:00:00 2001 From: keita kobayashi Date: Thu, 29 May 2014 16:24:39 +0900 Subject: ARM: shmobile: r8a7790: Support Core-Standby for Suspend to RAM Add r8a7790 Core-Standby state for Suspend to RAM support. Signed-off-by: Keita Kobayashi Acked-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index a8ace58..7590e2b 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -69,6 +69,7 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) /* turn on power to SCU */ r8a7790_pm_init(); + shmobile_smp_apmu_suspend_init(); rcar_sysc_power_up(&r8a7790_ca15_scu); rcar_sysc_power_up(&r8a7790_ca7_scu); } -- cgit v0.10.2 From 7f6234013a835476f1503be2c9287f1fe3497457 Mon Sep 17 00:00:00 2001 From: keita kobayashi Date: Thu, 29 May 2014 16:24:52 +0900 Subject: ARM: shmobile: r8a7791: Support Core-Standby for Suspend to RAM Add r8a7791 Core-Standby state for Suspend to RAM support. Signed-off-by: Keita Kobayashi Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 1772086..c6543b6 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -52,6 +52,7 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) iounmap(p); r8a7791_pm_init(); + shmobile_smp_apmu_suspend_init(); } static int r8a7791_smp_boot_secondary(unsigned int cpu, -- cgit v0.10.2 From 6596e97e054647fecb016ecb7e1935aa2b7db954 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Thu, 5 Jun 2014 12:49:44 +0900 Subject: ARM: shmobile: Mark all SoCs in shmobile as CPUFreq, capable Mark all SoCs in shmobile as CPUFreq capable on multiplatform build only. Signed-off-by: Benoit Cousson [gaku.inami.xw@bp.renesas.com: Move the definition of cpufreq capable] Signed-off-by: Gaku Inami Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index dbd954e..c32fa7c 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -12,6 +12,8 @@ config ARCH_SHMOBILE_MULTI select NO_IOPORT_MAP select PINCTRL select ARCH_REQUIRE_GPIOLIB + select ARCH_HAS_CPUFREQ + select ARCH_HAS_OPP if ARCH_SHMOBILE_MULTI -- cgit v0.10.2 From 7d95b9ddfb933f94354fa2ff9b1bfccdd6c54653 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 15:13:47 +0900 Subject: ARM: shmobile: Use shmobile_init_late() on r8a7790 DT-only Tie in shmobile_init_late for the DT-only r8a7790 SoC Multiplatform support code. This will make sure that Suspend-to-RAM, CPUIdle and CPUFreq get initialized. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 4212c8d..516b4e4 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -326,6 +326,7 @@ DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") .smp = smp_ops(r8a7790_smp_ops), .init_early = r8a7790_init_early, .init_time = rcar_gen2_timer_init, + .init_late = shmobile_init_late, .dt_compat = r8a7790_boards_compat_dt, MACHINE_END #endif /* CONFIG_USE_OF */ -- cgit v0.10.2 From 3d65226bc925f4749c2b2ab0ea3f4d274e194688 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 15:15:23 +0900 Subject: ARM: shmobile: Use shmobile_init_late() on r8a7791 DT-only Tie in shmobile_init_late for the DT-only r8a7791 SoC Multiplatform support code. This will make sure that Suspend-to-RAM, CPUIdle and CPUFreq get initialized. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c index f554cda..9e16b1d 100644 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ b/arch/arm/mach-shmobile/setup-r8a7791.c @@ -217,6 +217,7 @@ DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") .smp = smp_ops(r8a7791_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, + .init_late = shmobile_init_late, .dt_compat = r8a7791_boards_compat_dt, MACHINE_END #endif /* CONFIG_USE_OF */ -- cgit v0.10.2 From f8e819352d12f1b7d109d846e9bf1c07e006469a Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 9 Jun 2014 21:38:45 +0900 Subject: ARM: shmobile: Add shared R-Car Gen2 CMA reservation code Add R-Car Gen2 CMA memory reservation code that can be shared between multiple SoCs and boards. At this point r8a7790 and r8a7791 are supported. The top 256MiB of the legacy 32-bit physical memory space is assigned to a separate CMA area that may be assigned to various devices later on. Signed-off-by: Magnus Damm [horms+renesas@verge.net.au: rebased] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h index 43f606e..ce53cb5 100644 --- a/arch/arm/mach-shmobile/rcar-gen2.h +++ b/arch/arm/mach-shmobile/rcar-gen2.h @@ -4,5 +4,6 @@ void rcar_gen2_timer_init(void); #define MD(nr) BIT(nr) u32 rcar_gen2_read_mode_pins(void); +void rcar_gen2_reserve(void); #endif /* __ASM_RCAR_GEN2_H__ */ diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 516b4e4..e190768 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -327,6 +327,7 @@ DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") .init_early = r8a7790_init_early, .init_time = rcar_gen2_timer_init, .init_late = shmobile_init_late, + .reserve = rcar_gen2_reserve, .dt_compat = r8a7790_boards_compat_dt, MACHINE_END #endif /* CONFIG_USE_OF */ diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c index 9e16b1d..7e970d0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ b/arch/arm/mach-shmobile/setup-r8a7791.c @@ -218,6 +218,7 @@ DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, .init_late = shmobile_init_late, + .reserve = rcar_gen2_reserve, .dt_compat = r8a7791_boards_compat_dt, MACHINE_END #endif /* CONFIG_USE_OF */ diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index fdc714e..544b9bf 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -20,8 +20,11 @@ #include #include +#include +#include #include #include +#include #include #include "common.h" #include "rcar-gen2.h" -- cgit v0.10.2 From 83850b04ae7744f51681533fb7afb645e66ce8fe Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 12 Jun 2014 10:42:22 +0200 Subject: ARM: shmobile: rcar-gen2: Update for of_get_flat_dt_prop() update Commit 9d0c4dfedd96ee54fc075b16d02f82499c8cc3a6 ("of/fdt: update of_get_flat_dt_prop in prep for libfdt") changed the function prototypes of of_get_flat_dt_prop(): - The return type was made const, - The last parameter was changed from "unsigned long *" to "int *". and dt_mem_next_cell(): - The second parameter was made const. This causes the following compiler warnings: arch/arm/mach-shmobile/setup-rcar-gen2.c: In function 'rcar_gen2_scan_mem': arch/arm/mach-shmobile/setup-rcar-gen2.c:125:15: warning: initialization discards 'const' qualifier from pointer target type [enabled by default] arch/arm/mach-shmobile/setup-rcar-gen2.c:142:2: warning: passing argument 3 of 'of_get_flat_dt_prop' from incompatible pointer type [enabled by default] include/linux/of_fdt.h:53:20: note: expected 'int *' but argument is of type 'long unsigned int *' arch/arm/mach-shmobile/setup-rcar-gen2.c:142:6: warning: assignment discards 'const' qualifier from pointer target type [enabled by default] arch/arm/mach-shmobile/setup-rcar-gen2.c:144:3: warning: passing argument 3 of 'of_get_flat_dt_prop' from incompatible pointer type [enabled by default] include/linux/of_fdt.h:53:20: note: expected 'int *' but argument is of type 'long unsigned int *' arch/arm/mach-shmobile/setup-rcar-gen2.c:144:7: warning: assignment discards 'const' qualifier from pointer target type [enabled by default] arch/arm/mach-shmobile/setup-rcar-gen2.c:152:3: warning: passing argument 2 of 'dt_mem_next_cell' from incompatible pointer type [enabled by default] include/linux/of_fdt.h:69:12: note: expected 'const __be32 **' but argument is of type '__be32 **' arch/arm/mach-shmobile/setup-rcar-gen2.c:153:3: warning: passing argument 2 of 'dt_mem_next_cell' from incompatible pointer type [enabled by default] include/linux/of_fdt.h:69:12: note: expected 'const __be32 **' but argument is of type '__be32 **' Update the variable types in rcar_gen2_scan_mem() to fix this. Signed-off-by: Geert Uytterhoeven Acked-by: Magnus Damm [horms+renesas@verge.net.au: rebased] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 544b9bf..b0626f8 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -113,3 +113,79 @@ void __init rcar_gen2_timer_init(void) #endif clocksource_of_init(); } + +struct memory_reserve_config { + u64 reserved; + u64 base, size; +}; + +static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, + int depth, void *data) +{ + const char *type = of_get_flat_dt_prop(node, "device_type", NULL); + const __be32 *reg, *endp; + int l; + struct memory_reserve_config *mrc = data; + u64 lpae_start = (u64)1 << 32; + + /* We are scanning "memory" nodes only */ + if (type == NULL) { + /* + * The longtrail doesn't have a device_type on the + * /memory node, so look for the node called /memory@0. + */ + if (depth != 1 || strcmp(uname, "memory@0") != 0) + return 0; + } else if (strcmp(type, "memory") != 0) + return 0; + + reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); + if (reg == NULL) + reg = of_get_flat_dt_prop(node, "reg", &l); + if (reg == NULL) + return 0; + + endp = reg + (l / sizeof(__be32)); + while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) { + u64 base, size; + + base = dt_mem_next_cell(dt_root_addr_cells, ®); + size = dt_mem_next_cell(dt_root_size_cells, ®); + + if (base >= lpae_start) + continue; + + if ((base + size) >= lpae_start) + size = lpae_start - base; + + if (size < mrc->reserved) + continue; + + if (base < mrc->base) + continue; + + /* keep the area at top near the 32-bit legacy limit */ + mrc->base = base + size - mrc->reserved; + mrc->size = mrc->reserved; + } + + return 0; +} + +struct cma *rcar_gen2_dma_contiguous; + +void __init rcar_gen2_reserve(void) +{ + struct memory_reserve_config mrc; + + /* reserve 256 MiB at the top of the physical legacy 32-bit space */ + memset(&mrc, 0, sizeof(mrc)); + mrc.reserved = SZ_256M; + + of_scan_flat_dt(rcar_gen2_scan_mem, &mrc); +#ifdef CONFIG_DMA_CMA + if (mrc.size) + dma_contiguous_reserve_area(mrc.size, mrc.base, 0, + &rcar_gen2_dma_contiguous); +#endif +} -- cgit v0.10.2 From b69f47c00f2eff19b532cf0142d81b993e587bf0 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 12 Jun 2014 10:42:23 +0200 Subject: ARM: shmobile: rcar-gen2: Use "1ULL" instead of "(u64)1" Casts are evil Signed-off-by: Geert Uytterhoeven Acked-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index b0626f8..51d5723 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -126,7 +126,7 @@ static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, const __be32 *reg, *endp; int l; struct memory_reserve_config *mrc = data; - u64 lpae_start = (u64)1 << 32; + u64 lpae_start = 1ULL << 32; /* We are scanning "memory" nodes only */ if (type == NULL) { -- cgit v0.10.2 From ea2a0d581a3e742c2fb2bc520c8c8887fe1dafa6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 12 Jun 2014 10:42:24 +0200 Subject: ARM: shmobile: rcar-gen2: Remove useless copied section for LongTrail Open Firmware in the CHRP LongTrail does not support plugging in ARM CPUs in its PPC 603e/604e-compatible CPU socket ;-) Signed-off-by: Geert Uytterhoeven Acked-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 51d5723..73fb2a6 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -129,14 +129,7 @@ static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, u64 lpae_start = 1ULL << 32; /* We are scanning "memory" nodes only */ - if (type == NULL) { - /* - * The longtrail doesn't have a device_type on the - * /memory node, so look for the node called /memory@0. - */ - if (depth != 1 || strcmp(uname, "memory@0") != 0) - return 0; - } else if (strcmp(type, "memory") != 0) + if (type == NULL || strcmp(type, "memory")) return 0; reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); -- cgit v0.10.2 From ecdaca48629bd99609fdc612685363330967dce2 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 16 Jun 2014 20:21:13 +0900 Subject: ARM: shmobile: rcar-gen2: correct return value of shmobile_smp_apmu_suspend_init The dummy shmobile_smp_apmu_suspend_init() function provided when CPU_IDLE is not set should not return a value as per the signature of the function. This problem appears to have been introduced by 867ba81f728f1daa ("ARM: shmobile: APMU: Add Core-Standby-state for Suspend to RAM"). Cc: Keita Kobayashi Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index 8f0cd57..1e81199 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -38,7 +38,7 @@ int shmobile_suspend_init(void); void shmobile_smp_apmu_suspend_init(void); #else static inline int shmobile_suspend_init(void) { return 0; } -static inline void shmobile_smp_apmu_suspend_init(void) { return 0; } +static inline void shmobile_smp_apmu_suspend_init(void) { } #endif #ifdef CONFIG_CPU_IDLE -- cgit v0.10.2 From 3e05f24aa95bb043f1103b41392b61ce83d2675e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:01 +0900 Subject: ARM: shmobile: r8a7779: Add helper to read mode pins Add and use helper to read mode pins. This will be re-used when moving marzen-reference to the common clock framework. Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index d81539a..5dd66a2 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "clock.h" #include "common.h" @@ -52,9 +53,6 @@ #define MSTPCR3 IOMEM(0xffc8003c) #define MSTPSR1 IOMEM(0xffc80044) -#define MODEMR 0xffcc0020 - - /* ioremap() through clock mapping mandatory to avoid * collision with ARM coherent DMA virtual memory range. */ @@ -207,14 +205,9 @@ static struct clk_lookup lookups[] = { void __init r8a7779_clock_init(void) { - void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); - u32 mode; + u32 mode = r8a7779_read_mode_pins(); int k, ret = 0; - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); - if (mode & MD(1)) { plla_clk.rate = 1500000000; diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index def10a2..5ef0bad 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h @@ -20,6 +20,7 @@ extern void r8a7779_add_early_devices(void); extern void r8a7779_add_standard_devices(void); extern void r8a7779_add_standard_devices_dt(void); extern void r8a7779_init_late(void); +extern u32 r8a7779_read_mode_pins(void); extern void r8a7779_clock_init(void); extern void r8a7779_pinmux_init(void); extern void r8a7779_pm_init(void); diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 86ec4b6..25e1d0b 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -762,6 +762,24 @@ void __init r8a7779_add_standard_devices_dt(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } +#define MODEMR 0xffcc0020 + +u32 __init r8a7779_read_mode_pins(void) +{ + static u32 mode; + static bool mode_valid; + + if (!mode_valid) { + void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); + BUG_ON(!modemr); + mode = ioread32(modemr); + iounmap(modemr); + mode_valid = true; + } + + return mode; +} + static const char *r8a7779_compat_dt[] __initdata = { "renesas,r8a7779", NULL, -- cgit v0.10.2 From f48039a3da40f0c193122c83ad582913f2daf29d Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:02 +0900 Subject: ARM: shmobile: r8a7779: Move r8a7779_earlytimer_init to clock-r8a7779.c r8a7779_earlytimer_init() calls r8a7779_clock_init() and r8a7779_clock_init() is defined in clock-r8a7779.c. If both CONFIG_COMMON_CLK and CONFIG_ARCH_R8A7779 are enabled, as will be the case when marzen-reference moves to use the common clock framework, then setup-r8a7779.c is compiled but clock-r8a7779.c is not. As r8a7779_earlytimer_init() is not used by marzen-reference simply move it to clock-r8a7779.c. [horms+renesas@verge.net.au: rebase] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 5dd66a2..e690927 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include "clock.h" #include "common.h" @@ -261,3 +262,13 @@ void __init r8a7779_clock_init(void) else panic("failed to setup r8a7779 clocks\n"); } + +/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ +void __init __weak r8a7779_register_twd(void) { } + +void __init r8a7779_earlytimer_init(void) +{ + r8a7779_clock_init(); + r8a7779_register_twd(); + shmobile_earlytimer_init(); +} diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 25e1d0b..23122f6 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -674,16 +674,6 @@ void __init r8a7779_add_standard_devices(void) r8a7779_register_hpb_dmae(); } -/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ -void __init __weak r8a7779_register_twd(void) { } - -void __init r8a7779_earlytimer_init(void) -{ - r8a7779_clock_init(); - r8a7779_register_twd(); - shmobile_earlytimer_init(); -} - void __init r8a7779_add_early_devices(void) { early_platform_add_devices(r8a7779_devices_dt, -- cgit v0.10.2 From f8fba0ce6628109bac9d33f65b637a87a2f3be24 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:03 +0900 Subject: ARM: shmobile: marzen-reference: Move clock and OF device initialisation into board code Move the clock initialisation and OF device population from SoC to board code. This is in keeping with the pattern used by Lager. And the clock portion is part of decoupling clock initialisation from SoC code in preparation for moving to the common clock framework. Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index 94bd572..46ed17a 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -19,6 +19,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include @@ -27,7 +28,9 @@ static void __init marzen_init(void) { + r8a7779_clock_init(); r8a7779_add_standard_devices_dt(); + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */ } diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 23122f6..15f533b 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -744,12 +744,8 @@ void __init r8a7779_init_delay(void) void __init r8a7779_add_standard_devices_dt(void) { - /* clocks are setup late during boot in the case of DT */ - r8a7779_clock_init(); - platform_add_devices(r8a7779_devices_dt, ARRAY_SIZE(r8a7779_devices_dt)); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } #define MODEMR 0xffcc0020 -- cgit v0.10.2 From 5016c81bf92eb01741fc71ce7fb8380183a6f66a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:05 +0900 Subject: ARM: shmobile: r8a7779: Initial multiplatform support Add Marzen and r8a7779 to CONFIG_SHMOBILE_MULTI. At this point CCF is not yet supported so you cannot run this code yet. For CCF support to happen several different components are needed, and this is one simple portion that moves us forward. Other patches need to build on top of this one. Marzen board support exists in 3 flavours: 1) SHMOBILE_MULTI, MACH_MARZEN - board-marzen-reference.c (CCF + DT) 2) SHMOBILE, MACH_MARZEN_REFERENCE - board-marzen-reference.c (DT) 3) SHMOBILE, MACH_MARZEN - board-marzen.c (legacy C code) When CCF is done then 2) will be removed. When 1) includes same features as 3) then 3) will be removed. Based on work for the Koelsch and r8a7791 by Magnus Damm. Cc: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5986ff63..f44df11 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -339,7 +339,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ r7s72100-genmai.dtb \ r8a7791-henninger.dtb \ r8a7791-koelsch.dtb \ - r8a7790-lager.dtb + r8a7790-lager.dtb \ + r8a7779-marzen-reference.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \ socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_sockit.dtb \ diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index dbd954e..d7f8285 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -25,6 +25,11 @@ config ARCH_R7S72100 bool "RZ/A1H (R7S72100)" select SYS_SUPPORTS_SH_MTU2 +config ARCH_R8A7779 + bool "R-Car H1 (R8A77790)" + select RENESAS_INTC_IRQPIN + select SYS_SUPPORTS_SH_TMU + config ARCH_R8A7790 bool "R-Car H2 (R8A77900)" select RENESAS_IRQC @@ -51,6 +56,11 @@ config MACH_LAGER depends on ARCH_R8A7790 select MICREL_PHY if SH_ETH +config MACH_MARZEN + bool "MARZEN board" + depends on ARCH_R8A7779 + select REGULATOR_FIXED_VOLTAGE if REGULATOR + comment "Renesas ARM SoCs System Configuration" endif diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 38d5fe8..2309906 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -59,6 +59,7 @@ ifdef CONFIG_ARCH_SHMOBILE_MULTI obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o +obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o else obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index 46ed17a..d90843b 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -19,6 +19,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include @@ -28,7 +29,11 @@ static void __init marzen_init(void) { +#ifdef CONFIG_COMMON_CLK + of_clk_init(NULL); +#else r8a7779_clock_init(); +#endif r8a7779_add_standard_devices_dt(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */ -- cgit v0.10.2 From a92fbd077bbfbe98e4dee84081d84c44ae99538b Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:06 +0900 Subject: ARM: shmobile: marzen-reference: Initialize CPG device On multiplatform kernels clocks are handled by the CCF CPG driver. It must be explicitly initialized by a call to r8a7779_clocks_init() with the value of the boot mode pins. Based on similar work for the Koelsch board by Laurent Pinchart. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index d90843b..f642819 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -19,7 +19,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include +#include +#include #include #include #include @@ -27,11 +28,17 @@ #include "common.h" #include "irqs.h" -static void __init marzen_init(void) +static void __init marzen_init_timer(void) { #ifdef CONFIG_COMMON_CLK - of_clk_init(NULL); -#else + r8a7779_clocks_init(r8a7779_read_mode_pins()); +#endif + clocksource_of_init(); +} + +static void __init marzen_init(void) +{ +#ifndef CONFIG_COMMON_CLK r8a7779_clock_init(); #endif r8a7779_add_standard_devices_dt(); @@ -48,6 +55,7 @@ DT_MACHINE_START(MARZEN, "marzen") .smp = smp_ops(r8a7779_smp_ops), .map_io = r8a7779_map_io, .init_early = r8a7779_init_delay, + .init_time = marzen_init_timer, .nr_irqs = NR_IRQS_LEGACY, .init_irq = r8a7779_init_irq_dt, .init_machine = marzen_init, -- cgit v0.10.2 From 2b2084e8d4ae9265a3240722cb8adce06c0f393f Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:07 +0900 Subject: ARM: shmobile: marzen-reference: Instantiate clkdevs for SCIF and TMU Now that the common clock framework is supported, the clock lookup entries in clock-r8a7779.c are not registered anymore. Devices must instead reference their clocks in the device tree. However, SCIF and CMT devices are still instantiated through platform code, and thus need a clock lookup entry. Retrieve the SCIF and CMT clock entries by name and register clkdevs for the corresponding devices. This will be removed when the SCIF and CMT devices will be instantiated from the device tree. Based on work for the Koelsch board by Laurent Pinchart. Cc: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index f642819..3017040 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -25,6 +25,7 @@ #include #include #include +#include "clock.h" #include "common.h" #include "irqs.h" @@ -36,9 +37,27 @@ static void __init marzen_init_timer(void) clocksource_of_init(); } +#ifdef CONFIG_COMMON_CLK +/* + * This is a really crude hack to provide clkdev support to platform + * devices until they get moved to DT. + */ +static const struct clk_name clk_names[] __initconst = { + { "scif0", NULL, "sh-sci.0" }, + { "scif1", NULL, "sh-sci.1" }, + { "scif2", NULL, "sh-sci.2" }, + { "scif3", NULL, "sh-sci.3" }, + { "scif4", NULL, "sh-sci.4" }, + { "scif5", NULL, "sh-sci.5" }, + { "tmu0", "fck", "sh-tmu.0" }, +}; +#endif + static void __init marzen_init(void) { -#ifndef CONFIG_COMMON_CLK +#ifdef CONFIG_COMMON_CLK + shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false); +#else r8a7779_clock_init(); #endif r8a7779_add_standard_devices_dt(); -- cgit v0.10.2 From 1ece7f7bb014485b13faf9504b238ff891a9088a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:09 +0900 Subject: ARM: shmobile: Remove non-multiplatform Marzen reference support Now that r8a7779 has CCF support remove the legacy Marzen reference Kconfig bits CONFIG_MACH_MARZEN_REFERENCE for the non-multiplatform case. Starting from this commit Marzen board support is always enabled via CONFIG_MACH_MARZEN, and CONFIG_ARCH_MULTIPLATFORM is used to select between board-marzen.c and board-marzen-reference.c The file board-marzen-reference.c can no longer be used together with the legacy sh-clk clock framework, instead CCF is used. Based on work for the Koelsch board by Laurent Pinchart. Cc: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f44df11..e666d13 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -327,7 +327,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \ r8a7778-bockw-reference.dtb \ r8a7740-armadillo800eva-reference.dtb \ r8a7779-marzen.dtb \ - r8a7779-marzen-reference.dtb \ r8a7791-koelsch.dtb \ r8a7790-lager.dtb \ sh73a0-kzm9g.dtb \ diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index d7f8285..8a054dd 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -245,19 +245,6 @@ config MACH_MARZEN select REGULATOR_FIXED_VOLTAGE if REGULATOR select USE_OF -config MACH_MARZEN_REFERENCE - bool "MARZEN board - Reference Device Tree Implementation" - depends on ARCH_R8A7779 - select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR - select USE_OF - ---help--- - Use reference implementation of Marzen board support - which makes use of device tree at the expense - of not supporting a number of devices. - - This is intended to aid developers - config MACH_LAGER bool "Lager board" depends on ARCH_R8A7790 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 2309906..0d6a04c 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -68,7 +68,6 @@ obj-$(CONFIG_MACH_BOCKW) += board-bockw.o obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o obj-$(CONFIG_MACH_GENMAI) += board-genmai.o obj-$(CONFIG_MACH_MARZEN) += board-marzen.o -obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o obj-$(CONFIG_MACH_LAGER) += board-lager.o obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot index 918fccf..ebf97d4 100644 --- a/arch/arm/mach-shmobile/Makefile.boot +++ b/arch/arm/mach-shmobile/Makefile.boot @@ -13,7 +13,6 @@ loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000 loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000 loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000 loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000 -loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000 __ZRELADDR := $(sort $(loadaddr-y)) zreladdr-y += $(__ZRELADDR) -- cgit v0.10.2 From 04d3e8a0b150f1931d48ed9168672a971fc4c761 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:10 +0900 Subject: ARM: shmobile: Let Marzen multiplatform boot with Marzen DTB Let the multiplatform Marzen support boot with the legacy DTS for Marzen as well as the Marzen reference DTS. Based on work for the Koelsch board by Laurent Pinchart. Cc: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e666d13..4ebc4ca 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -339,7 +339,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ r8a7791-henninger.dtb \ r8a7791-koelsch.dtb \ r8a7790-lager.dtb \ - r8a7779-marzen-reference.dtb + r8a7779-marzen.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \ socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_sockit.dtb \ diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index 3017040..46936ff 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -66,6 +66,7 @@ static void __init marzen_init(void) } static const char *marzen_boards_compat_dt[] __initdata = { + "renesas,marzen", "renesas,marzen-reference", NULL, }; -- cgit v0.10.2 From 47ad265dd443802ead3d7e1aa3ef60ff1a8da952 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:11 +0900 Subject: ARM: shmobile: Remove Marzen reference DTS Now that the DTS file r8a7779-marzen.dts can be used with board-marzen.c and board-marzen-reference.c, proceed with removing r8a7779-marzen-reference.dts. Based on work for the Koelsch board by Laurent Pinchart. Cc: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts deleted file mode 100644 index b27c637..0000000 --- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Reference Device Tree Source for the Marzen board - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Simon Horman - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; -#include "r8a7779.dtsi" -#include -#include - -/ { - model = "marzen"; - compatible = "renesas,marzen-reference", "renesas,r8a7779"; - - chosen { - bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on rw"; - }; - - memory { - device_type = "memory"; - reg = <0x60000000 0x40000000>; - }; - - fixedregulator3v3: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - lan0@18000000 { - compatible = "smsc,lan9220", "smsc,lan9115"; - reg = <0x18000000 0x100>; - pinctrl-0 = <&lan0_pins>; - pinctrl-names = "default"; - - phy-mode = "mii"; - interrupt-parent = <&irqpin0>; - interrupts = <1 IRQ_TYPE_EDGE_FALLING>; - smsc,irq-push-pull; - reg-io-width = <4>; - vddvario-supply = <&fixedregulator3v3>; - vdd33a-supply = <&fixedregulator3v3>; - }; - - leds { - compatible = "gpio-leds"; - led2 { - gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; - }; - led3 { - gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; - }; - led4 { - gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&irqpin0 { - status = "okay"; -}; - -&pfc { - pinctrl-0 = <&scif2_pins &scif4_pins>; - pinctrl-names = "default"; - - lan0_pins: lan0 { - intc { - renesas,groups = "intc_irq1_b"; - renesas,function = "intc"; - }; - lbsc { - renesas,groups = "lbsc_ex_cs0"; - renesas,function = "lbsc"; - }; - }; - - scif2_pins: serial2 { - renesas,groups = "scif2_data_c"; - renesas,function = "scif2"; - }; - - scif4_pins: serial4 { - renesas,groups = "scif4_data"; - renesas,function = "scif4"; - }; - - sdhi0_pins: sd0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; - renesas,function = "sdhi0"; - }; - - hspi0_pins: hspi0 { - renesas,groups = "hspi0"; - renesas,function = "hspi0"; - }; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&fixedregulator3v3>; - bus-width = <4>; - status = "okay"; -}; - -&hspi0 { - pinctrl-0 = <&hspi0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; -- cgit v0.10.2 From f0b78f8b63fe92242232b7a3e4aa951983ee1f45 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:32:12 +0900 Subject: ARM: shmobile: marzen-reference: Remove legacy clock support Marzen DT reference is now only built for multiplatform which means that CCF comes with the package. Remove unused legacy code ifdefs to clean up the code. Based on similar work for the Koelsch board by Magnus Damm. Cc: Magnus Damm Cc: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index 46936ff..1b63686 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -31,13 +31,10 @@ static void __init marzen_init_timer(void) { -#ifdef CONFIG_COMMON_CLK r8a7779_clocks_init(r8a7779_read_mode_pins()); -#endif clocksource_of_init(); } -#ifdef CONFIG_COMMON_CLK /* * This is a really crude hack to provide clkdev support to platform * devices until they get moved to DT. @@ -51,15 +48,10 @@ static const struct clk_name clk_names[] __initconst = { { "scif5", NULL, "sh-sci.5" }, { "tmu0", "fck", "sh-tmu.0" }, }; -#endif static void __init marzen_init(void) { -#ifdef CONFIG_COMMON_CLK shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false); -#else - r8a7779_clock_init(); -#endif r8a7779_add_standard_devices_dt(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */ -- cgit v0.10.2 From 6b060f93fe7dedbeb067feacbc8c4780c59f5df4 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 16 May 2014 13:42:58 +0900 Subject: ARM: shmobile: r8a7779: Add Maximum CPU Frequency to DTS Add 1GHz to the r8a7779 DTS to describe the maximum CPU frequency. Based on work by Magnus dam for the r8a7740 SoC. Cc: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index bdaaadc..038c16a 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -26,21 +26,25 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; + clock-frequency = <1000000000>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; + clock-frequency = <1000000000>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; + clock-frequency = <1000000000>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; + clock-frequency = <1000000000>; }; }; -- cgit v0.10.2 From 0157b62674aa3db1fc574bb65e6b0e30bb0683d7 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 16 May 2014 13:42:59 +0900 Subject: ARM: shmobile: r8a7779: Use DT CPU Frequency in common case Convert the common C-code-less r8a7779 DT board support to use shmobile_init_delay() to be able to migrate away from per-SoC delay setup functions. Based on work by Magnus dam for the r8a7740 SoC. Cc: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 15f533b..706832f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -773,7 +773,7 @@ static const char *r8a7779_compat_dt[] __initdata = { DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") .map_io = r8a7779_map_io, - .init_early = r8a7779_init_delay, + .init_early = shmobile_init_delay, .nr_irqs = NR_IRQS_LEGACY, .init_irq = r8a7779_init_irq_dt, .init_machine = r8a7779_add_standard_devices_dt, -- cgit v0.10.2 From 17ed9efd8afdd8c38f19ff72f08e71c1fd2376e3 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 16 May 2014 13:43:00 +0900 Subject: ARM: shmobile: marzen-reference: Use DT CPU Frequency Convert the Marzen DT reference board support to use shmobile_init_delay() to be able to migrate away from per-SoC delay setup functions. Based on work for the Armadillo800 EVA board by Magnus Damm. Cc: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index 1b63686..bb2df32 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -66,7 +66,7 @@ static const char *marzen_boards_compat_dt[] __initdata = { DT_MACHINE_START(MARZEN, "marzen") .smp = smp_ops(r8a7779_smp_ops), .map_io = r8a7779_map_io, - .init_early = r8a7779_init_delay, + .init_early = shmobile_init_delay, .init_time = marzen_init_timer, .nr_irqs = NR_IRQS_LEGACY, .init_irq = r8a7779_init_irq_dt, -- cgit v0.10.2 From daab540e3a2afeb8c087a67dfaee5aa50a29e844 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 16 May 2014 13:43:01 +0900 Subject: ARM: shmobile: r8a7779: Remove unused r8a7779_init_delay() Remove the now unused r8a7779_init_delay() function. Based on work for the r8a7740 SoC by Magnus Damm. Cc: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index 5ef0bad..5415c71 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h @@ -10,7 +10,6 @@ enum { HPBDMA_SLAVE_SDHI0_RX, }; -extern void r8a7779_init_delay(void); extern void r8a7779_init_irq_extpin(int irlm); extern void r8a7779_init_irq_extpin_dt(int irlm); extern void r8a7779_init_irq_dt(void); diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 706832f..f96a304 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -737,11 +737,6 @@ void __init r8a7779_init_irq_dt(void) __raw_writel(0x003fee3f, INT2SMSKCR4); } -void __init r8a7779_init_delay(void) -{ - shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */ -} - void __init r8a7779_add_standard_devices_dt(void) { platform_add_devices(r8a7779_devices_dt, -- cgit v0.10.2 From 2909b8746d6f5534aa7714d2df110b3633a59556 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 23 May 2014 09:46:20 +0200 Subject: ARM: shmobile: r8a7779 dtsi: Update unit-addresses for clocks - Correct the unit-address for the "cpg_clocks" node, - Add missing unit-addresses for the "mstp*_clks" nodes, - Rename "cpg_clocks" and "mstp*_clks" nodes to the more generic "clocks". Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 038c16a..27bf227 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -298,7 +298,7 @@ }; /* Special CPG clocks */ - cpg_clocks: cpg_clocks@0xe6150000 { + cpg_clocks: clocks@ffc80000 { compatible = "renesas,r8a7779-cpg-clocks"; reg = <0 0xffc80000 0 0x30>; clocks = <&extal_clk>; @@ -342,7 +342,7 @@ }; /* Gate clocks */ - mstp0_clks: mstp0_clks { + mstp0_clks: clocks@ffc80030 { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xffc80030 0 4>; @@ -379,7 +379,7 @@ "scif1", "scif0", "i2c3", "i2c2", "i2c1", "i2c0"; }; - mstp1_clks: mstp1_clks { + mstp1_clks: clocks@ffc80034 { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xffc80034 0 4>, <0 0xffc80044 0 4>; @@ -408,7 +408,7 @@ "ether", "sata", "pcie", "vin3"; }; - mstp3_clks: mstp3_clks { + mstp3_clks: clocks@ffc8003c { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xffc8003c 0 4>; -- cgit v0.10.2 From 5cc8afcbc47c5f33732fb1a4b37a35841e7494e8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 23 May 2014 09:46:19 +0200 Subject: ARM: shmobile: r8a7779 dtsi: Correct #address-cells/#size-cells for clocks Warning (ranges_format): /clocks has empty "ranges" property but its #address-cells (2) differs from / (1) Warning (ranges_format): /clocks has empty "ranges" property but its #size-cells (2) differs from / (1) As r8a7779 doesn't support LPAE, change #address-cells and #size-cells from "<2>" to "<1>", and update the affected "reg" properties to fix this. Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 27bf227..61d08f4 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -284,8 +284,8 @@ }; clocks { - #address-cells = <2>; - #size-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; ranges; /* External root clock */ @@ -300,7 +300,7 @@ /* Special CPG clocks */ cpg_clocks: clocks@ffc80000 { compatible = "renesas,r8a7779-cpg-clocks"; - reg = <0 0xffc80000 0 0x30>; + reg = <0xffc80000 0x30>; clocks = <&extal_clk>; #clock-cells = <1>; clock-output-names = "plla", "z", "zs", "s", @@ -345,7 +345,7 @@ mstp0_clks: clocks@ffc80030 { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xffc80030 0 4>; + reg = <0xffc80030 4>; clocks = <&cpg_clocks R8A7779_CLK_S>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, @@ -382,7 +382,7 @@ mstp1_clks: clocks@ffc80034 { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xffc80034 0 4>, <0 0xffc80044 0 4>; + reg = <0xffc80034 4>, <0xffc80044 4>; clocks = <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>, @@ -411,7 +411,7 @@ mstp3_clks: clocks@ffc8003c { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xffc8003c 0 4>; + reg = <0xffc8003c 4>; clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>; #clock-cells = <1>; -- cgit v0.10.2 From fd953b89f44e541bc584a65ba046d1b4cf77840f Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:39:30 +0900 Subject: ARM: shmobile: r8a7779: Add scif nodes to dtsi Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 61d08f4..94e2fc8 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -196,6 +196,66 @@ status = "disabled"; }; + scif0: serial@ffe40000 { + compatible = "renesas,scif-r8a7779", "renesas,scif"; + reg = <0xffe40000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg_clocks R8A7779_CLK_P>; + clock-names = "sci_ick"; + status = "disabled"; + }; + + scif1: serial@ffe41000 { + compatible = "renesas,scif-r8a7779", "renesas,scif"; + reg = <0xffe41000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg_clocks R8A7779_CLK_P>; + clock-names = "sci_ick"; + status = "disabled"; + }; + + scif2: serial@ffe42000 { + compatible = "renesas,scif-r8a7779", "renesas,scif"; + reg = <0xffe42000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg_clocks R8A7779_CLK_P>; + clock-names = "sci_ick"; + status = "disabled"; + }; + + scif3: serial@ffe43000 { + compatible = "renesas,scif-r8a7779", "renesas,scif"; + reg = <0xffe43000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg_clocks R8A7779_CLK_P>; + clock-names = "sci_ick"; + status = "disabled"; + }; + + scif4: serial@ffe44000 { + compatible = "renesas,scif-r8a7779", "renesas,scif"; + reg = <0xffe44000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg_clocks R8A7779_CLK_P>; + clock-names = "sci_ick"; + status = "disabled"; + }; + + scif5: serial@ffe45000 { + compatible = "renesas,scif-r8a7779", "renesas,scif"; + reg = <0xffe45000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg_clocks R8A7779_CLK_P>; + clock-names = "sci_ick"; + status = "disabled"; + }; + pfc: pfc@fffc0000 { compatible = "renesas,pfc-r8a7779"; reg = <0xfffc0000 0x23c>; -- cgit v0.10.2 From 33b9966db3024b3b739cf8031a28ad9ee5919f36 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:39:31 +0900 Subject: ARM: shmobile: marzen: Remove early_printk from command line As early printk support is not enabled in the kernel in the shmobile defconfig it does not make much sense to provide for it in the default command line. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index 363f693..3212908 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -19,7 +19,7 @@ compatible = "renesas,marzen", "renesas,r8a7779"; chosen { - bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"; + bootargs = "console=ttySC2,115200 ignore_loglevel root=/dev/nfs ip=on"; }; memory { -- cgit v0.10.2 From 6d4abd79c80742629477479b01077bb92eccdd53 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:39:32 +0900 Subject: ARM: shmobile: marzen: Initialise SCIF devices using DT Initialise SCIF devices using DT when booting marzen using multiplatform. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index 3212908..20b1768 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -18,6 +18,11 @@ model = "marzen"; compatible = "renesas,marzen", "renesas,r8a7779"; + aliases { + serial2 = &scif2; + serial4 = &scif4; + }; + chosen { bootargs = "console=ttySC2,115200 ignore_loglevel root=/dev/nfs ip=on"; }; @@ -74,9 +79,6 @@ }; &pfc { - pinctrl-0 = <&scif2_pins &scif4_pins>; - pinctrl-names = "default"; - lan0_pins: lan0 { intc { renesas,groups = "intc_irq1_b"; @@ -109,6 +111,20 @@ }; }; +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif4 { + pinctrl-0 = <&scif4_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index f96a304..2f59b99 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -640,16 +640,16 @@ static void __init r8a7779_register_hpb_dmae(void) } static struct platform_device *r8a7779_devices_dt[] __initdata = { + &tmu0_device, +}; + +static struct platform_device *r8a7779_standard_devices[] __initdata = { &scif0_device, &scif1_device, &scif2_device, &scif3_device, &scif4_device, &scif5_device, - &tmu0_device, -}; - -static struct platform_device *r8a7779_standard_devices[] __initdata = { &i2c0_device, &i2c1_device, &i2c2_device, -- cgit v0.10.2 From c1a0f9932b66b2298163c31f8ac3f2844476e1c2 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 15 May 2014 20:39:33 +0900 Subject: ARM: shmobile: marzen: Do not use workaround for scif devices Now that SCIF devices are initialised using DT it should not be necessary to use the work around to provide clocks any more. Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index bb2df32..0a000b7 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -40,12 +40,6 @@ static void __init marzen_init_timer(void) * devices until they get moved to DT. */ static const struct clk_name clk_names[] __initconst = { - { "scif0", NULL, "sh-sci.0" }, - { "scif1", NULL, "sh-sci.1" }, - { "scif2", NULL, "sh-sci.2" }, - { "scif3", NULL, "sh-sci.3" }, - { "scif4", NULL, "sh-sci.4" }, - { "scif5", NULL, "sh-sci.5" }, { "tmu0", "fck", "sh-tmu.0" }, }; -- cgit v0.10.2 From adb1d99384c7480886153a97d2ea22e9c0d2e053 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Mon, 26 May 2014 17:01:14 +0200 Subject: ARM: mvebu: mark armada_370_xp_pmsu_idle_prepare() as static The armada_370_xp_pmsu_idle_prepare() function is only used internally to pmsu.c, so there's no reason to not use the static qualifier. Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1401116474-31221-1-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 53a55c8..6e83d32 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -148,7 +148,7 @@ static void armada_370_xp_cpu_resume(void) } /* No locking is needed because we only access per-CPU registers */ -void armada_370_xp_pmsu_idle_prepare(bool deepidle) +static void armada_370_xp_pmsu_idle_prepare(bool deepidle) { unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); u32 reg; -- cgit v0.10.2 From 55fc83023212f940927b9a44e31ad93d7e67d27d Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Mon, 26 May 2014 21:29:48 +0200 Subject: ARM: Kirkwood: Add setup file for netxbig LEDs There is currently no DT binding for the CPLD which controls the LEDs on the Net 2Big and Net 5Big. So use a platform device. Signed-off-by: Andrew Lunn Link: https://lkml.kernel.org/r/1401132591-26305-2-git-send-email-andrew@lunn.ch Tested-by: Simon Guinot Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 6090b9e..e5ab3a7cb 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -97,6 +97,13 @@ config MACH_KIRKWOOD Say 'Y' here if you want your kernel to support boards based on the Marvell Kirkwood device tree. +config MACH_NETXBIG + bool "LaCie 2Big and 5Big Network v2" + depends on MACH_KIRKWOOD + help + Say 'Y' here if you want your kernel to support the + LaCie 2Big and 5Big Network v2 + endmenu endif diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 2ecb828..db29c1df 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -14,3 +14,4 @@ endif obj-$(CONFIG_MACH_DOVE) += dove.o obj-$(CONFIG_MACH_KIRKWOOD) += kirkwood.o kirkwood-pm.o +obj-$(CONFIG_MACH_NETXBIG) += netxbig.o diff --git a/arch/arm/mach-mvebu/board.h b/arch/arm/mach-mvebu/board.h index 9c7bb43..98e32cc 100644 --- a/arch/arm/mach-mvebu/board.h +++ b/arch/arm/mach-mvebu/board.h @@ -13,4 +13,9 @@ #ifndef __ARCH_MVEBU_BOARD_H #define __ARCH_MVEBU_BOARD_H +#ifdef CONFIG_MACH_NETXBIG +void netxbig_init(void); +#else +static inline void netxbig_init(void) {}; +#endif #endif diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c index 46f1059..6b53108 100644 --- a/arch/arm/mach-mvebu/kirkwood.c +++ b/arch/arm/mach-mvebu/kirkwood.c @@ -180,6 +180,9 @@ static void __init kirkwood_dt_init(void) kirkwood_pm_init(); kirkwood_dt_eth_fixup(); + if (of_machine_is_compatible("lacie,netxbig")) + netxbig_init(); + of_platform_populate(NULL, of_default_bus_match_table, auxdata, NULL); } diff --git a/arch/arm/mach-mvebu/netxbig.c b/arch/arm/mach-mvebu/netxbig.c new file mode 100644 index 0000000..94b11b6 --- /dev/null +++ b/arch/arm/mach-mvebu/netxbig.c @@ -0,0 +1,191 @@ +/* + * arch/arm/mach-mvbu/board-netxbig.c + * + * LaCie 2Big and 5Big Network v2 board setup + * + * Copyright (C) 2010 Simon Guinot + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include "common.h" + +/***************************************************************************** + * GPIO extension LEDs + ****************************************************************************/ + +/* + * The LEDs are controlled by a CPLD and can be configured through a GPIO + * extension bus: + * + * - address register : bit [0-2] -> GPIO [47-49] + * - data register : bit [0-2] -> GPIO [44-46] + * - enable register : GPIO 29 + */ + +static int netxbig_v2_gpio_ext_addr[] = { 47, 48, 49 }; +static int netxbig_v2_gpio_ext_data[] = { 44, 45, 46 }; + +static struct netxbig_gpio_ext netxbig_v2_gpio_ext = { + .addr = netxbig_v2_gpio_ext_addr, + .num_addr = ARRAY_SIZE(netxbig_v2_gpio_ext_addr), + .data = netxbig_v2_gpio_ext_data, + .num_data = ARRAY_SIZE(netxbig_v2_gpio_ext_data), + .enable = 29, +}; + +/* + * Address register selection: + * + * addr | register + * ---------------------------- + * 0 | front LED + * 1 | front LED brightness + * 2 | SATA LED brightness + * 3 | SATA0 LED + * 4 | SATA1 LED + * 5 | SATA2 LED + * 6 | SATA3 LED + * 7 | SATA4 LED + * + * Data register configuration: + * + * data | LED brightness + * ------------------------------------------------- + * 0 | min (off) + * - | - + * 7 | max + * + * data | front LED mode + * ------------------------------------------------- + * 0 | fix off + * 1 | fix blue on + * 2 | fix red on + * 3 | blink blue on=1 sec and blue off=1 sec + * 4 | blink red on=1 sec and red off=1 sec + * 5 | blink blue on=2.5 sec and red on=0.5 sec + * 6 | blink blue on=1 sec and red on=1 sec + * 7 | blink blue on=0.5 sec and blue off=2.5 sec + * + * data | SATA LED mode + * ------------------------------------------------- + * 0 | fix off + * 1 | SATA activity blink + * 2 | fix red on + * 3 | blink blue on=1 sec and blue off=1 sec + * 4 | blink red on=1 sec and red off=1 sec + * 5 | blink blue on=2.5 sec and red on=0.5 sec + * 6 | blink blue on=1 sec and red on=1 sec + * 7 | fix blue on + */ + +static int netxbig_v2_red_mled[NETXBIG_LED_MODE_NUM] = { + [NETXBIG_LED_OFF] = 0, + [NETXBIG_LED_ON] = 2, + [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, + [NETXBIG_LED_TIMER1] = 4, + [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, +}; + +static int netxbig_v2_blue_pwr_mled[NETXBIG_LED_MODE_NUM] = { + [NETXBIG_LED_OFF] = 0, + [NETXBIG_LED_ON] = 1, + [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, + [NETXBIG_LED_TIMER1] = 3, + [NETXBIG_LED_TIMER2] = 7, +}; + +static int netxbig_v2_blue_sata_mled[NETXBIG_LED_MODE_NUM] = { + [NETXBIG_LED_OFF] = 0, + [NETXBIG_LED_ON] = 7, + [NETXBIG_LED_SATA] = 1, + [NETXBIG_LED_TIMER1] = 3, + [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, +}; + +static struct netxbig_led_timer netxbig_v2_led_timer[] = { + [0] = { + .delay_on = 500, + .delay_off = 500, + .mode = NETXBIG_LED_TIMER1, + }, + [1] = { + .delay_on = 500, + .delay_off = 1000, + .mode = NETXBIG_LED_TIMER2, + }, +}; + +#define NETXBIG_LED(_name, maddr, mval, baddr) \ + { .name = _name, \ + .mode_addr = maddr, \ + .mode_val = mval, \ + .bright_addr = baddr } + +static struct netxbig_led net2big_v2_leds_ctrl[] = { + NETXBIG_LED("net2big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), + NETXBIG_LED("net2big-v2:red:power", 0, netxbig_v2_red_mled, 1), + NETXBIG_LED("net2big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net2big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), + NETXBIG_LED("net2big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net2big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), +}; + +static struct netxbig_led_platform_data net2big_v2_leds_data = { + .gpio_ext = &netxbig_v2_gpio_ext, + .timer = netxbig_v2_led_timer, + .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), + .leds = net2big_v2_leds_ctrl, + .num_leds = ARRAY_SIZE(net2big_v2_leds_ctrl), +}; + +static struct netxbig_led net5big_v2_leds_ctrl[] = { + NETXBIG_LED("net5big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), + NETXBIG_LED("net5big-v2:red:power", 0, netxbig_v2_red_mled, 1), + NETXBIG_LED("net5big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net5big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), + NETXBIG_LED("net5big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net5big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), + NETXBIG_LED("net5big-v2:blue:sata2", 5, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net5big-v2:red:sata2", 5, netxbig_v2_red_mled, 2), + NETXBIG_LED("net5big-v2:blue:sata3", 6, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net5big-v2:red:sata3", 6, netxbig_v2_red_mled, 2), + NETXBIG_LED("net5big-v2:blue:sata4", 7, netxbig_v2_blue_sata_mled, 2), + NETXBIG_LED("net5big-v2:red:sata4", 7, netxbig_v2_red_mled, 2), +}; + +static struct netxbig_led_platform_data net5big_v2_leds_data = { + .gpio_ext = &netxbig_v2_gpio_ext, + .timer = netxbig_v2_led_timer, + .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), + .leds = net5big_v2_leds_ctrl, + .num_leds = ARRAY_SIZE(net5big_v2_leds_ctrl), +}; + +static struct platform_device netxbig_v2_leds = { + .name = "leds-netxbig", + .id = -1, + .dev = { + .platform_data = &net2big_v2_leds_data, + }, +}; + +void __init netxbig_init(void) +{ + + if (of_machine_is_compatible("lacie,net5big_v2")) + netxbig_v2_leds.dev.platform_data = &net5big_v2_leds_data; + platform_device_register(&netxbig_v2_leds); +} -- cgit v0.10.2 From 3169455448ea6d021b1b761b4fd241810de8c335 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Fri, 30 May 2014 22:18:14 +0200 Subject: ARM: mvebu: remove stub implementation of CPU hotplug on Armada 375/38x In preparation to the addition of CPU hotplug support for Armada XP, and therefore moving the existing stub functions for hotplug support, this commit removes the reference from the SMP implementation of Armada 375/38x to the armada_xp_cpu_die() function. Proper CPU hotplug support for Armada 375 and 38x will be implemented at a later point. Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1401481098-23326-2-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c index 96c2c59..65f5321 100644 --- a/arch/arm/mach-mvebu/platsmp-a9.c +++ b/arch/arm/mach-mvebu/platsmp-a9.c @@ -91,9 +91,6 @@ static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu, static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = { .smp_boot_secondary = mvebu_cortex_a9_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_die = armada_xp_cpu_die, -#endif }; CPU_METHOD_OF_DECLARE(mvebu_armada_375_smp, "marvell,armada-375-smp", -- cgit v0.10.2 From bbb92284b6c821e9434223d437fbd10b8a24c294 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Fri, 30 May 2014 22:18:15 +0200 Subject: ARM: mvebu: slightly refactor/rename PMSU idle related functions The CPU hotplug code will need to call into PMSU functions to enter and exit from deep idle states. However, the deep idle state is currently entered by a function called do_armada_370_xp_cpu_suspend() whose name really suggests it's an internal function, but we need to export it to other files in mach-mvebu. Therefore, this commit: * Merges the code of do_armada_370_xp_cpu_suspend() into armada_370_xp_pmsu_idle_prepare(), into a single function called armada_370_xp_pmsu_idle_enter(), which prepares the PMSU for deep idle, and then enters the deep idle state. This code will be common to both cpuidle and CPU hotplug. * For symetry, it renames the armada_370_xp_pmsu_idle_restore() function to armada_370_xp_pmsu_idle_exit(). We also remove the 'noinline' qualifier for these functions, which apparently had no reason to be here. Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1401481098-23326-3-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 6e83d32..73e6629 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -148,13 +148,13 @@ static void armada_370_xp_cpu_resume(void) } /* No locking is needed because we only access per-CPU registers */ -static void armada_370_xp_pmsu_idle_prepare(bool deepidle) +static int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) { unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); u32 reg; if (pmsu_mp_base == NULL) - return; + return -EINVAL; /* * Adjust the PMSU configuration to wait for WFI signal, enable @@ -183,11 +183,6 @@ static void armada_370_xp_pmsu_idle_prepare(bool deepidle) reg = readl(pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu)); reg |= PMSU_CPU_POWER_DOWN_DIS_SNP_Q_SKIP; writel(reg, pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu)); -} - -static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle) -{ - armada_370_xp_pmsu_idle_prepare(deepidle); v7_exit_coherency_flush(all); @@ -220,11 +215,11 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle) static int armada_370_xp_cpu_suspend(unsigned long deepidle) { - return cpu_suspend(deepidle, do_armada_370_xp_cpu_suspend); + return cpu_suspend(deepidle, armada_370_xp_pmsu_idle_enter); } /* No locking is needed because we only access per-CPU registers */ -static noinline void armada_370_xp_pmsu_idle_restore(void) +static void armada_370_xp_pmsu_idle_exit(void) { unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); u32 reg; @@ -253,7 +248,7 @@ static int armada_370_xp_cpu_pm_notify(struct notifier_block *self, unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_370_xp_cpu_resume); } else if (action == CPU_PM_EXIT) { - armada_370_xp_pmsu_idle_restore(); + armada_370_xp_pmsu_idle_exit(); } return NOTIFY_OK; -- cgit v0.10.2 From 8ea875e72d2dd66eea393f22c6bf4707f92f4a50 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Fri, 30 May 2014 22:18:16 +0200 Subject: ARM: mvebu: export PMSU idle enter/exit functions The PMSU idle enter/exit functions will be needed for the CPU hotplug implementation on Armada XP, so this commit removes their static qualifier, and adds the appropriate prototypes in armada-370-xp.h. Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1401481098-23326-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h index c3465f5..52c1603a 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.h +++ b/arch/arm/mach-mvebu/armada-370-xp.h @@ -24,4 +24,7 @@ void armada_xp_secondary_startup(void); extern struct smp_operations armada_xp_smp_ops; #endif +int armada_370_xp_pmsu_idle_enter(unsigned long deepidle); +void armada_370_xp_pmsu_idle_exit(void); + #endif /* __MACH_ARMADA_370_XP_H */ diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 73e6629..27d98e7 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -148,7 +148,7 @@ static void armada_370_xp_cpu_resume(void) } /* No locking is needed because we only access per-CPU registers */ -static int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) +int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) { unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); u32 reg; @@ -219,7 +219,7 @@ static int armada_370_xp_cpu_suspend(unsigned long deepidle) } /* No locking is needed because we only access per-CPU registers */ -static void armada_370_xp_pmsu_idle_exit(void) +void armada_370_xp_pmsu_idle_exit(void) { unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); u32 reg; -- cgit v0.10.2 From 26337779465637b761624d9752f52d1ec88f71d9 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Fri, 30 May 2014 22:18:17 +0200 Subject: ARM: mvebu: implement CPU hotplug support for Armada XP This commit implements CPU hotplug support for the Marvell Armada XP platform. The CPU hotplug stub functions from hotplug.c are moved into platsmp.c, as it doesn't make much sense to have a separate file just for these two functions. In addition, this commit: * Implements the ->cpu_die() function of SMP operations by calling armada_370_xp_pmsu_idle_enter() to enter the deep idle state for CPUs going offline. * Implements a dummy ->cpu_kill() function, simply needed for the kernel to know we have CPU hotplug support. * The armada_xp_boot_secondary() function makes sure to wake up the CPU if waiting in deep idle state by sending an IPI. This is because armada_xp_boot_secondary() is now used in two different situations: for the initial boot of secondary CPUs (where CPU reset deassert is used to wake up CPUs) and for CPU hotplug (where an IPI is used to take CPU out of deep idle). * At boot time, we exit from the idle state in the ->smp_secondary_init() hook. This commit has been tested using CPU hotplug through sysfs (/sys/devices/system/cpu/cpuX/online) and using kexec. Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1401481098-23326-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index db29c1df..90bcd53 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -9,7 +9,6 @@ obj-y += system-controller.o mvebu-soc-id.o ifeq ($(CONFIG_MACH_MVEBU_V7),y) obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o -obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o endif obj-$(CONFIG_MACH_DOVE) += dove.o diff --git a/arch/arm/mach-mvebu/common.h b/arch/arm/mach-mvebu/common.h index b67fb7a..0d05eaa 100644 --- a/arch/arm/mach-mvebu/common.h +++ b/arch/arm/mach-mvebu/common.h @@ -22,6 +22,4 @@ int mvebu_cpu_reset_deassert(int cpu); void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr); void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr); -void armada_xp_cpu_die(unsigned int cpu); - #endif diff --git a/arch/arm/mach-mvebu/hotplug.c b/arch/arm/mach-mvebu/hotplug.c deleted file mode 100644 index d95e910..0000000 --- a/arch/arm/mach-mvebu/hotplug.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Symmetric Multi Processing (SMP) support for Armada XP - * - * Copyright (C) 2012 Marvell - * - * Lior Amsalem - * Gregory CLEMENT - * Thomas Petazzoni - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include -#include -#include -#include "common.h" - -/* - * platform-specific code to shutdown a CPU - * - * Called with IRQs disabled - */ -void __ref armada_xp_cpu_die(unsigned int cpu) -{ - cpu_do_idle(); - - /* We should never return from idle */ - panic("mvebu: cpu %d unexpectedly exit from shutdown\n", cpu); -} diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index 88b976b3..b6fa9f0 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -78,6 +78,17 @@ static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) hw_cpu = cpu_logical_map(cpu); mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); + + /* + * This is needed to wake up CPUs in the offline state after + * using CPU hotplug. + */ + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + /* + * This is needed to take secondary CPUs out of reset on the + * initial boot. + */ ret = mvebu_cpu_reset_deassert(hw_cpu); if (ret) { pr_warn("unable to boot CPU: %d\n", ret); @@ -87,6 +98,19 @@ static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) return 0; } +/* + * When a CPU is brought back online, either through CPU hotplug, or + * because of the boot of a kexec'ed kernel, the PMSU configuration + * for this CPU might be in the deep idle state, preventing this CPU + * from receiving interrupts. Here, we therefore take out the current + * CPU from this state, which was entered by armada_xp_cpu_die() + * below. + */ +static void armada_xp_secondary_init(unsigned int cpu) +{ + armada_370_xp_pmsu_idle_exit(); +} + static void __init armada_xp_smp_init_cpus(void) { unsigned int ncores = num_possible_cpus(); @@ -122,12 +146,36 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) panic("The address for the BootROM is incorrect"); } +#ifdef CONFIG_HOTPLUG_CPU +static void armada_xp_cpu_die(unsigned int cpu) +{ + /* + * CPU hotplug is implemented by putting offline CPUs into the + * deep idle sleep state. + */ + armada_370_xp_pmsu_idle_enter(true); +} + +/* + * We need a dummy function, so that platform_can_cpu_hotplug() knows + * we support CPU hotplug. However, the function does not need to do + * anything, because CPUs going offline can enter the deep idle state + * by themselves, without any help from a still alive CPU. + */ +static int armada_xp_cpu_kill(unsigned int cpu) +{ + return 1; +} +#endif + struct smp_operations armada_xp_smp_ops __initdata = { .smp_init_cpus = armada_xp_smp_init_cpus, .smp_prepare_cpus = armada_xp_smp_prepare_cpus, .smp_boot_secondary = armada_xp_boot_secondary, + .smp_secondary_init = armada_xp_secondary_init, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = armada_xp_cpu_die, + .cpu_kill = armada_xp_cpu_kill, #endif }; -- cgit v0.10.2 From a178050a0e4030fe1b7b4ca76c5d41278b48d792 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 10 Jun 2014 17:24:38 +0200 Subject: Documentation: arm: add URLs to public datasheets for the Marvell Armada 370 SoC Marvell has very recently released a public version of the "Functional specifications" and "Hardware specifications" datasheets for the Marvell Armada 370 SoC. This allows contributors and developers not under NDA with Marvell to get more details about this SoC than what the current kernel code shows, and hopefully allows to improve the support for this SoC in the mainline kernel, as well as in other projects. Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1402413878-20224-2-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README index 2cce540..1af3a5d 100644 --- a/Documentation/arm/Marvell/README +++ b/Documentation/arm/Marvell/README @@ -83,7 +83,9 @@ EBU Armada family 88F6710 88F6707 88F6W11 - Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf + Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf + Hardware Spec: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-datasheet.pdf + Functional Spec: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-FunctionalSpec-datasheet.pdf Armada 375 Flavors: 88F6720 -- cgit v0.10.2 From 9d6373485c0c3b38de666d8e0af95ee7c692ecbe Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Tue, 10 Jun 2014 15:34:43 -0300 Subject: ARM: mvebu: Don't apply the thermal quirk if the SoC revision is unknown Currently, the thermal quirk is skipped only if the SoC revision is known to be one that does not need them, but if the SoC revision cannot be obtained, the quirk is applied assuming it's needed. However, this quirk must be applied only we are sure the SoC needs it, for it breaks the thermal support if applied on a SoC that doesn't need it. The reason for this is that the quirk consists in changing the thermal devicetree compatible string and register offsets, to workaround a hardware bug in the early SoC revision. Such changes are wrong if the SoC is a new revision and doesn't need the workaround. Therefore, this commit changes the behavior, by requiring the SoC revision to be known in order to peform a quirk. Signed-off-by: Ezequiel Garcia Link: https://lkml.kernel.org/r/1402425283-24989-1-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c index 8bb742f..a04675e 100644 --- a/arch/arm/mach-mvebu/board-v7.c +++ b/arch/arm/mach-mvebu/board-v7.c @@ -118,8 +118,16 @@ static void __init thermal_quirk(void) { struct device_node *np; u32 dev, rev; + int res; - if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV) + /* + * The early SoC Z1 revision needs a quirk to be applied in order + * for the thermal controller to work properly. This quirk breaks + * the thermal support if applied on a SoC that doesn't need it, + * so we enforce the SoC revision to be known. + */ + res = mvebu_get_soc_id(&dev, &rev); + if (res < 0 || (res == 0 && rev > ARMADA_375_Z1_REV)) return; for_each_compatible_node(np, NULL, "marvell,armada375-thermal") { @@ -153,7 +161,8 @@ static void __init thermal_quirk(void) /* * The thermal controller needs some quirk too, so let's change - * the compatible string to reflect this. + * the compatible string to reflect this and allow the driver + * the take the necessary action. */ prop = kzalloc(sizeof(*prop), GFP_KERNEL); prop->name = kstrdup("compatible", GFP_KERNEL); -- cgit v0.10.2 From 14a5e926141f9c37bdaa0220169489e782220ee1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= Date: Thu, 19 Jun 2014 11:31:10 +0200 Subject: ARM: shmobile: rcar-gen2: update call to dma_contiguous_reserve_area MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 5ea3b1b2f8ad 'cma: add placement specifier for "cma=" kernel parameter' adds a new 'fixed' parameter to dma_contiguous_reserve_area(). Update rcar_gen2_reserve() accordingly. This fixes the following compilation error: arch/arm/mach-shmobile/setup-rcar-gen2.c: In function ‘rcar_gen2_reserve’: arch/arm/mach-shmobile/setup-rcar-gen2.c:182:10: error: too few arguments to function ‘dma_contiguous_reserve_area’ Signed-off-by: Vincent Stehlé Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 73fb2a6..42d5b43 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -179,6 +179,6 @@ void __init rcar_gen2_reserve(void) #ifdef CONFIG_DMA_CMA if (mrc.size) dma_contiguous_reserve_area(mrc.size, mrc.base, 0, - &rcar_gen2_dma_contiguous); + &rcar_gen2_dma_contiguous, true); #endif } -- cgit v0.10.2 From 3ed66ec5ced8b801cb851b2b8548301df94f8f54 Mon Sep 17 00:00:00 2001 From: Gaku Inami Date: Thu, 19 Jun 2014 20:06:08 +0900 Subject: ARM: shmobile: Remove ARCH_HAS_CPUFREQ config for shmobile The following commit has removed ARCH_HAS_CPUFREQ config: Commit: e49d9b375628e67c9a718f4befaa8e45e5fad21b Subject: ARM: Remove ARCH_HAS_CPUFREQ config option This patch removes the code that is using ARCH_HAS_CPUFREQ in mach-shmobile. Signed-off-by: Gaku Inami Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index c32fa7c..cbc90f1 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -12,7 +12,6 @@ config ARCH_SHMOBILE_MULTI select NO_IOPORT_MAP select PINCTRL select ARCH_REQUIRE_GPIOLIB - select ARCH_HAS_CPUFREQ select ARCH_HAS_OPP if ARCH_SHMOBILE_MULTI -- cgit v0.10.2 From ac84b79fbd97117de54531efad2c526896be7d19 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 20 Jun 2014 22:52:50 +0800 Subject: ARM: sunxi: Introduce Allwinner A23 support The Allwinner A23 is a dual-core Cortex-A7-based SoC. It re-uses most of the IPs found in previous SoCs, notably the A31. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 0fbd4f1..f776c5f 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -35,4 +35,9 @@ config MACH_SUN7I select HAVE_ARM_ARCH_TIMER select SUN5I_HSTIMER +config MACH_SUN8I + bool "Allwinner A23 (sun8i) SoCs support" + default ARCH_SUNXI + select ARM_GIC + endif diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c index 3f9587b..4d09469 100644 --- a/arch/arm/mach-sunxi/sunxi.c +++ b/arch/arm/mach-sunxi/sunxi.c @@ -53,3 +53,12 @@ static const char * const sun7i_board_dt_compat[] = { DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") .dt_compat = sun7i_board_dt_compat, MACHINE_END + +static const char * const sun8i_board_dt_compat[] = { + "allwinner,sun8i-a23", + NULL, +}; + +DT_MACHINE_START(SUN8I_DT, "Allwinner sun8i (A23) Family") + .dt_compat = sun8i_board_dt_compat, +MACHINE_END -- cgit v0.10.2 From c47185433ec38f38e94480bb9d731fcaa205e128 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 20 Jun 2014 22:52:51 +0800 Subject: ARM: sunxi: Add earlyprintk support using R_UART (sun6i/sun8i) sun6i/sun8i have a UART in the RTC block group, which can be used as an early console. This is most useful on sun8i as UART0 is muxed with MMC0, which is not available if we boot from MMC. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Signed-off-by: Maxime Ripard diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 8f90595..3548612 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -715,6 +715,14 @@ choice Say Y here if you want kernel low-level debugging support on Allwinner A1X based platforms on the UART1. + config DEBUG_SUNXI_R_UART + bool "Kernel low-level debugging messages via sunXi R_UART" + depends on MACH_SUN6I || MACH_SUN8I + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on Allwinner A31/A23 based platforms on the R_UART. + config TEGRA_DEBUG_UART_AUTO_ODMDATA bool "Kernel low-level debugging messages via Tegra UART via ODMDATA" depends on ARCH_TEGRA @@ -1043,6 +1051,7 @@ config DEBUG_UART_PHYS default 0x01c28400 if DEBUG_SUNXI_UART1 default 0x01d0c000 if DEBUG_DAVINCI_DA8XX_UART1 default 0x01d0d000 if DEBUG_DAVINCI_DA8XX_UART2 + default 0x01f02800 if DEBUG_SUNXI_R_UART default 0x02530c00 if DEBUG_KEYSTONE_UART0 default 0x02531000 if DEBUG_KEYSTONE_UART1 default 0x03010fe0 if ARCH_RPC @@ -1118,6 +1127,7 @@ config DEBUG_UART_VIRT default 0xf1600000 if ARCH_INTEGRATOR default 0xf1c28000 if DEBUG_SUNXI_UART0 default 0xf1c28400 if DEBUG_SUNXI_UART1 + default 0xf1f02800 if DEBUG_SUNXI_R_UART default 0xf2100000 if DEBUG_PXA_UART1 default 0xf4090000 if ARCH_LPC32XX default 0xf4200000 if ARCH_GEMINI -- cgit v0.10.2 From 0ba6c5d26a31789fc89ebadccd8d3604e0994a51 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sat, 1 Mar 2014 22:22:21 -0600 Subject: dts: versatile: add missing irq controller properties Add valid-mask and clear-mask properties to the versatile dts so the platform code doing the same thing can be removed. Signed-off-by: Rob Herring Acked-by: Arnd Bergmann diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index e01e5a0..5dc3be7 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -59,6 +59,8 @@ interrupt-controller; #interrupt-cells = <1>; reg = <0x10140000 0x1000>; + clear-mask = <0xffffffff>; + valid-mask = <0xffffffff>; }; sic: intc@10003000 { @@ -68,6 +70,8 @@ reg = <0x10003000 0x1000>; interrupt-parent = <&vic>; interrupts = <31>; /* Cascaded to vic */ + clear-mask = <0xffffffff>; + valid-mask = <0xffc203f8>; }; dma@10130000 { -- cgit v0.10.2 From 2920bc9abedf87451e9ba2695a4c418c567046b6 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 29 May 2014 16:39:43 -0500 Subject: irqchip: versatile-fpga: Add IRQCHIP_DECLARE support Add support for initialization using IRQCHIP_DECLARE. This also requires that the controller initialization set the handle_irq function pointer itself when it is a primary controller. Signed-off-by: Rob Herring Cc: Thomas Gleixner Cc: Jason Cooper Acked-by: Linus Walleij diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c index 3ae2bb8..8e0bb56 100644 --- a/drivers/irqchip/irq-versatile-fpga.c +++ b/drivers/irqchip/irq-versatile-fpga.c @@ -14,6 +14,8 @@ #include #include +#include "irqchip.h" + #define IRQ_STATUS 0x00 #define IRQ_RAW_STATUS 0x04 #define IRQ_ENABLE_SET 0x08 @@ -201,8 +203,10 @@ int __init fpga_irq_of_init(struct device_node *node, /* Some chips are cascaded from a parent IRQ */ parent_irq = irq_of_parse_and_map(node, 0); - if (!parent_irq) + if (!parent_irq) { + set_handle_irq(fpga_handle_irq); parent_irq = -1; + } fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node); @@ -211,4 +215,5 @@ int __init fpga_irq_of_init(struct device_node *node, return 0; } +IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init); #endif -- cgit v0.10.2 From 59318461c8f65f6f322e391f333dfb6ec2fe4446 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 3 Mar 2014 09:15:18 -0600 Subject: irqchip: versatile-fpga: add support for arm,versatile-sic The secondary controller on ARM Versatile AB and PB is similar to other ARM platforms, but has a pass-thru register to connect some interrupts directly to interrupt inputs on the primary interrupt controller. The PIC_ENABLES register needs to be configured for proper operation when the matching node is arm,versatile-sic. Add the the necessary IRQCHIP_DECLARE as well. Signed-off-by: Rob Herring Cc: Thomas Gleixner Cc: Jason Cooper Cc: Arnd Bergmann Acked-by: Linus Walleij diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c index 8e0bb56..ccf5854 100644 --- a/drivers/irqchip/irq-versatile-fpga.c +++ b/drivers/irqchip/irq-versatile-fpga.c @@ -28,6 +28,8 @@ #define FIQ_ENABLE_SET 0x28 #define FIQ_ENABLE_CLEAR 0x2C +#define PIC_ENABLES 0x20 /* set interrupt pass through bits */ + /** * struct fpga_irq_data - irq data container for the FPGA IRQ controller * @base: memory offset in virtual memory @@ -213,7 +215,16 @@ int __init fpga_irq_of_init(struct device_node *node, writel(clear_mask, base + IRQ_ENABLE_CLEAR); writel(clear_mask, base + FIQ_ENABLE_CLEAR); + /* + * On Versatile AB/PB, some secondary interrupts have a direct + * pass-thru to the primary controller for IRQs 20 and 22-31 which need + * to be enabled. See section 3.10 of the Versatile AB user guide. + */ + if (of_device_is_compatible(node, "arm,versatile-sic")) + writel(0xffd00000, base + PIC_ENABLES); + return 0; } IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init); +IRQCHIP_DECLARE(arm_fpga_sic, "arm,versatile-sic", fpga_irq_of_init); #endif -- cgit v0.10.2 From 44fa72d129916575befad806c9c6045b623beb26 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 29 May 2014 16:44:27 -0500 Subject: ARM: integrator: convert to use irqchip_init Now that versatile-fpga irqchip has IRQCHIP_DECLARE support, the interrupt related initialization can be removed. Signed-off-by: Rob Herring Cc: Russell King Acked-by: Linus Walleij diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index dd0cc67..645da16 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include #include #include #include @@ -439,15 +439,10 @@ static void __init ap_of_timer_init(void) integrator_clockevent_init(rate, base, irq); } -static const struct of_device_id fpga_irq_of_match[] __initconst = { - { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, - { /* Sentinel */ } -}; - static void __init ap_init_irq_of(void) { cm_init(); - of_irq_init(fpga_irq_of_match); + irqchip_init(); } /* For the Device Tree, add in the UART callbacks as AUXDATA */ @@ -570,7 +565,6 @@ DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)") .map_io = ap_map_io, .init_early = ap_init_early, .init_irq = ap_init_irq_of, - .handle_irq = fpga_handle_irq, .init_time = ap_of_timer_init, .init_machine = ap_init_of, .restart = integrator_restart, diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a938242..7ade590 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -235,15 +235,10 @@ static void __init intcp_init_early(void) sched_clock_register(intcp_read_sched_clock, 32, 24000000); } -static const struct of_device_id fpga_irq_of_match[] __initconst = { - { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, - { /* Sentinel */ } -}; - static void __init intcp_init_irq_of(void) { cm_init(); - of_irq_init(fpga_irq_of_match); + irqchip_init(); } /* @@ -340,7 +335,6 @@ DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)") .map_io = intcp_map_io, .init_early = intcp_init_early, .init_irq = intcp_init_irq_of, - .handle_irq = fpga_handle_irq, .init_machine = intcp_init_of, .restart = integrator_restart, .dt_compat = intcp_dt_board_compat, -- cgit v0.10.2 From 9fa44f47e8011c07c794f585988fca91bd588f97 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 28 Apr 2014 08:17:50 -0500 Subject: ARM: versatile: remove init_irq hook for DT boot Now that versatile's irqchips are initialized from DT, the init_irq hook can be removed. Signed-off-by: Rob Herring Acked-by: Arnd Bergmann Acked-by: Linus Walleij diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index 3621b00..9f9bc61 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c @@ -44,7 +44,6 @@ static const char *versatile_dt_match[] __initconst = { DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") .map_io = versatile_map_io, .init_early = versatile_init_early, - .init_irq = versatile_init_irq, .init_machine = versatile_dt_init, .dt_compat = versatile_dt_match, .restart = versatile_restart, -- cgit v0.10.2 From 04aa49f6b7fbf819ba3fc44850edd2be23d558a6 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 3 Mar 2014 02:28:38 -0600 Subject: dts: versatile: add pl180 compatible strings While not needed for probing, add the "arm,pl180" compatible string for completeness. Signed-off-by: Rob Herring Acked-by: Arnd Bergmann Acked-by: Linus Walleij diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index 5dc3be7..85c7b2b 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -187,7 +187,7 @@ interrupts = <24>; }; mmc@5000 { - compatible = "arm,primecell"; + compatible = "arm,pl180", "arm,primecell"; reg = < 0x5000 0x1000>; interrupts-extended = <&vic 22 &sic 2>; }; diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index 65f6577..a428541 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -39,7 +39,7 @@ interrupts = <5>; }; mmc@b000 { - compatible = "arm,primecell"; + compatible = "arm,pl180", "arm,primecell"; reg = <0xb000 0x1000>; interrupts-extended = <&vic 23 &sic 2>; }; -- cgit v0.10.2 From fe3eed11c969731795cb8a686162c6698ee86bdf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sat, 29 Mar 2014 13:32:25 -0500 Subject: dt/bindings: arm-boards: add binding for Versatile core module Add binding for the core module found on ARM versatile AB and PB boards. Signed-off-by: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Acked-by: Arnd Bergmann Acked-by: Linus Walleij diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards index 3509707..c554ed3 100644 --- a/Documentation/devicetree/bindings/arm/arm-boards +++ b/Documentation/devicetree/bindings/arm/arm-boards @@ -86,3 +86,9 @@ Interrupt controllers: compatible = "arm,versatile-sic"; interrupt-controller; #interrupt-cells = <1>; + +Required nodes: + +- core-module: the root node to the Versatile platforms must have + a core-module with regs and the compatible strings + "arm,core-module-versatile", "syscon" -- cgit v0.10.2 From f27e861f7bb79501cedf486af9347052f9bcfc70 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sat, 29 Mar 2014 13:36:18 -0500 Subject: dt/bindings: add compatible string for versatile osc clock Signed-off-by: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Acked-by: Arnd Bergmann Acked-by: Linus Walleij diff --git a/Documentation/devicetree/bindings/clock/arm-integrator.txt b/Documentation/devicetree/bindings/clock/arm-integrator.txt index 652914b..ecc6952 100644 --- a/Documentation/devicetree/bindings/clock/arm-integrator.txt +++ b/Documentation/devicetree/bindings/clock/arm-integrator.txt @@ -1,4 +1,4 @@ -Clock bindings for ARM Integrator Core Module clocks +Clock bindings for ARM Integrator and Versatile Core Module clocks Auxilary Oscillator Clock @@ -12,7 +12,7 @@ parent node. Required properties: -- compatible: must be "arm,integrator-cm-auxosc" +- compatible: must be "arm,integrator-cm-auxosc" or "arm,versatile-cm-auxosc" - #clock-cells: must be <0> Optional properties: -- cgit v0.10.2 From 1bde9906414b46b6922464e7c91dd815e5f217b3 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 29 May 2014 16:01:34 -0500 Subject: ARM: timer-sp: allow getting timer1 clock from DT to fallback to legacy clock The sp804 clocks may be specified in DT, but the kernel may still be using legacy clocks. This is handled if a single clock for sp804 is present, but not when 3 clocks are present. This prevents Versatile platforms from breaking when the DT has clocks added. Signed-off-by: Rob Herring Cc: Russell King diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index fd6bff0..1921132 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c @@ -233,13 +233,13 @@ static void __init sp804_of_init(struct device_node *np) if (IS_ERR(clk1)) clk1 = NULL; - /* Get the 2nd clock if the timer has 2 timer clocks */ + /* Get the 2nd clock if the timer has 3 timer clocks */ if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 3) { clk2 = of_clk_get(np, 1); if (IS_ERR(clk2)) { pr_err("sp804: %s clock not found: %d\n", np->name, (int)PTR_ERR(clk2)); - goto err; + clk2 = NULL; } } else clk2 = clk1; -- cgit v0.10.2 From 2e45278592de32a47aa12ab09c2fcc5535aa0271 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sat, 1 Mar 2014 22:22:53 -0600 Subject: dts: versatile: add clock tree The versatile dts is missing any clock data. Add the clocks. It is not clear from the documentation where pclk comes from, so for now it is a dummy clock which is sufficient for things to work. Signed-off-by: Rob Herring Acked-by: Arnd Bergmann Reviewed-by: Linus Walleij diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index 85c7b2b..36c771a 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -19,6 +19,41 @@ reg = <0x0 0x08000000>; }; + xtal24mhz: xtal24mhz@24M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + + core-module@10000000 { + compatible = "arm,core-module-versatile", "syscon"; + reg = <0x10000000 0x200>; + + /* OSC1 on AB, OSC4 on PB */ + osc1: cm_aux_osc@24M { + #clock-cells = <0>; + compatible = "arm,versatile-cm-auxosc"; + clocks = <&xtal24mhz>; + }; + + /* The timer clock is the 24 MHz oscillator divided to 1MHz */ + timclk: timclk@1M { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <24>; + clock-mult = <1>; + clocks = <&xtal24mhz>; + }; + + pclk: pclk@24M { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + clocks = <&xtal24mhz>; + }; + }; + flash@34000000 { compatible = "arm,versatile-flash"; reg = <0x34000000 0x4000000>; @@ -78,63 +113,85 @@ compatible = "arm,pl081", "arm,primecell"; reg = <0x10130000 0x1000>; interrupts = <17>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; uart0: uart@101f1000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f1000 0x1000>; interrupts = <12>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; uart1: uart@101f2000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f2000 0x1000>; interrupts = <13>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; uart2: uart@101f3000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f3000 0x1000>; interrupts = <14>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; smc@10100000 { compatible = "arm,primecell"; reg = <0x10100000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; mpmc@10110000 { compatible = "arm,primecell"; reg = <0x10110000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; display@10120000 { compatible = "arm,pl110", "arm,primecell"; reg = <0x10120000 0x1000>; interrupts = <16>; + clocks = <&osc1>, <&pclk>; + clock-names = "clcd", "apb_pclk"; }; sctl@101e0000 { compatible = "arm,primecell"; reg = <0x101e0000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; watchdog@101e1000 { compatible = "arm,primecell"; reg = <0x101e1000 0x1000>; interrupts = <0>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; timer@101e2000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e2000 0x1000>; interrupts = <4>; + clocks = <&timclk>, <&timclk>, <&pclk>; + clock-names = "timer0", "timer1", "apb_pclk"; }; timer@101e3000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e3000 0x1000>; interrupts = <5>; + clocks = <&timclk>, <&timclk>, <&pclk>; + clock-names = "timer0", "timer1", "apb_pclk"; }; gpio0: gpio@101e4000 { @@ -145,6 +202,8 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; gpio1: gpio@101e5000 { @@ -155,24 +214,32 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; rtc@101e8000 { compatible = "arm,pl030", "arm,primecell"; reg = <0x101e8000 0x1000>; interrupts = <10>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; sci@101f0000 { compatible = "arm,primecell"; reg = <0x101f0000 0x1000>; interrupts = <15>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; ssp@101f4000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x101f4000 0x1000>; interrupts = <11>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "SSPCLK", "apb_pclk"; }; fpga { @@ -185,23 +252,31 @@ compatible = "arm,primecell"; reg = <0x4000 0x1000>; interrupts = <24>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; mmc@5000 { compatible = "arm,pl180", "arm,primecell"; reg = < 0x5000 0x1000>; interrupts-extended = <&vic 22 &sic 2>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "mclk", "apb_pclk"; }; kmi@6000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x6000 0x1000>; interrupt-parent = <&sic>; interrupts = <3>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; kmi@7000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x7000 0x1000>; interrupt-parent = <&sic>; interrupts = <4>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; }; }; diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index a428541..d025048 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -13,6 +13,8 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; gpio3: gpio@101e7000 { @@ -23,6 +25,8 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; fpga { @@ -31,17 +35,23 @@ reg = <0x9000 0x1000>; interrupt-parent = <&sic>; interrupts = <6>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; sci@a000 { compatible = "arm,primecell"; reg = <0xa000 0x1000>; interrupt-parent = <&sic>; interrupts = <5>; + clocks = <&xtal24mhz>; + clock-names = "apb_pclk"; }; mmc@b000 { compatible = "arm,pl180", "arm,primecell"; reg = <0xb000 0x1000>; interrupts-extended = <&vic 23 &sic 2>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "mclk", "apb_pclk"; }; }; }; -- cgit v0.10.2 From a54c959d8be9d057b1a192e34a378b74dd81c5f6 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sat, 1 Mar 2014 22:05:44 -0600 Subject: clk: versatile: add versatile OSC support Versatile platforms share the same OSC programming model as Integrator platforms. Add the necessary parameters and init functions for Versatile. Renaming the file to clk-versatile.c as versatile is used as the family name for ARM, Ltd. boards. Signed-off-by: Rob Herring Acked-by: Mike Turquette Acked-by: Arnd Bergmann Reviewed-by: Linus Walleij diff --git a/drivers/clk/versatile/Makefile b/drivers/clk/versatile/Makefile index fd449f9..162e519 100644 --- a/drivers/clk/versatile/Makefile +++ b/drivers/clk/versatile/Makefile @@ -1,6 +1,5 @@ # Makefile for Versatile-specific clocks -obj-$(CONFIG_ICST) += clk-icst.o -obj-$(CONFIG_ARCH_INTEGRATOR) += clk-integrator.o +obj-$(CONFIG_ICST) += clk-icst.o clk-versatile.o obj-$(CONFIG_INTEGRATOR_IMPD1) += clk-impd1.o obj-$(CONFIG_ARCH_REALVIEW) += clk-realview.o obj-$(CONFIG_ARCH_VEXPRESS) += clk-vexpress.o diff --git a/drivers/clk/versatile/clk-integrator.c b/drivers/clk/versatile/clk-integrator.c deleted file mode 100644 index 734c4b8..0000000 --- a/drivers/clk/versatile/clk-integrator.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Clock driver for the ARM Integrator/AP and Integrator/CP boards - * Copyright (C) 2012 Linus Walleij - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include -#include - -#include "clk-icst.h" - -#define INTEGRATOR_HDR_LOCK_OFFSET 0x14 - -/* Base offset for the core module */ -static void __iomem *cm_base; - -static const struct icst_params cp_auxosc_params = { - .vco_max = ICST525_VCO_MAX_5V, - .vco_min = ICST525_VCO_MIN, - .vd_min = 8, - .vd_max = 263, - .rd_min = 3, - .rd_max = 65, - .s2div = icst525_s2div, - .idx2s = icst525_idx2s, -}; - -static const struct clk_icst_desc __initdata cm_auxosc_desc = { - .params = &cp_auxosc_params, - .vco_offset = 0x1c, - .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET, -}; - -static void __init of_integrator_cm_osc_setup(struct device_node *np) -{ - struct clk *clk = ERR_PTR(-EINVAL); - const char *clk_name = np->name; - const struct clk_icst_desc *desc = &cm_auxosc_desc; - const char *parent_name; - - if (!cm_base) { - /* Remap the core module base if not done yet */ - struct device_node *parent; - - parent = of_get_parent(np); - if (!np) { - pr_err("no parent on core module clock\n"); - return; - } - cm_base = of_iomap(parent, 0); - if (!cm_base) { - pr_err("could not remap core module base\n"); - return; - } - } - - parent_name = of_clk_get_parent_name(np, 0); - clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base); - if (!IS_ERR(clk)) - of_clk_add_provider(np, of_clk_src_simple_get, clk); -} -CLK_OF_DECLARE(integrator_cm_auxosc_clk, - "arm,integrator-cm-auxosc", of_integrator_cm_osc_setup); diff --git a/drivers/clk/versatile/clk-versatile.c b/drivers/clk/versatile/clk-versatile.c new file mode 100644 index 0000000..a76981e --- /dev/null +++ b/drivers/clk/versatile/clk-versatile.c @@ -0,0 +1,101 @@ +/* + * Clock driver for the ARM Integrator/AP, Integrator/CP, Versatile AB and + * Versatile PB boards. + * Copyright (C) 2012 Linus Walleij + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include + +#include "clk-icst.h" + +#define INTEGRATOR_HDR_LOCK_OFFSET 0x14 + +#define VERSATILE_SYS_OSCCLCD_OFFSET 0x1c +#define VERSATILE_SYS_LOCK_OFFSET 0x20 + +/* Base offset for the core module */ +static void __iomem *cm_base; + +static const struct icst_params cp_auxosc_params = { + .vco_max = ICST525_VCO_MAX_5V, + .vco_min = ICST525_VCO_MIN, + .vd_min = 8, + .vd_max = 263, + .rd_min = 3, + .rd_max = 65, + .s2div = icst525_s2div, + .idx2s = icst525_idx2s, +}; + +static const struct clk_icst_desc __initdata cm_auxosc_desc = { + .params = &cp_auxosc_params, + .vco_offset = 0x1c, + .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET, +}; + +static const struct icst_params versatile_auxosc_params = { + .vco_max = ICST307_VCO_MAX, + .vco_min = ICST307_VCO_MIN, + .vd_min = 4 + 8, + .vd_max = 511 + 8, + .rd_min = 1 + 2, + .rd_max = 127 + 2, + .s2div = icst307_s2div, + .idx2s = icst307_idx2s, +}; + +static const struct clk_icst_desc versatile_auxosc_desc __initconst = { + .params = &versatile_auxosc_params, + .vco_offset = VERSATILE_SYS_OSCCLCD_OFFSET, + .lock_offset = VERSATILE_SYS_LOCK_OFFSET, +}; +static void __init cm_osc_setup(struct device_node *np, + const struct clk_icst_desc *desc) +{ + struct clk *clk = ERR_PTR(-EINVAL); + const char *clk_name = np->name; + const char *parent_name; + + if (!cm_base) { + /* Remap the core module base if not done yet */ + struct device_node *parent; + + parent = of_get_parent(np); + if (!np) { + pr_err("no parent on core module clock\n"); + return; + } + cm_base = of_iomap(parent, 0); + if (!cm_base) { + pr_err("could not remap core module base\n"); + return; + } + } + + parent_name = of_clk_get_parent_name(np, 0); + clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base); + if (!IS_ERR(clk)) + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static void __init of_integrator_cm_osc_setup(struct device_node *np) +{ + cm_osc_setup(np, &cm_auxosc_desc); +} +CLK_OF_DECLARE(integrator_cm_auxosc_clk, + "arm,integrator-cm-auxosc", of_integrator_cm_osc_setup); + +static void __init of_versatile_cm_osc_setup(struct device_node *np) +{ + cm_osc_setup(np, &versatile_auxosc_desc); +} +CLK_OF_DECLARE(versatile_cm_auxosc_clk, + "arm,versatile-cm-auxosc", of_versatile_cm_osc_setup); -- cgit v0.10.2 From 1b55353c9214788b0d0797a5fd4585af1557a12c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 20 Jun 2014 18:53:05 +0200 Subject: ARM: shmobile: Move r8a7779.h Change location of r8a7779.h so it can be included as "r8a7779.h" instead of the old style Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c index 0a000b7..21b3e1c 100644 --- a/arch/arm/mach-shmobile/board-marzen-reference.c +++ b/arch/arm/mach-shmobile/board-marzen-reference.c @@ -22,12 +22,14 @@ #include #include #include -#include + #include #include + #include "clock.h" #include "common.h" #include "irqs.h" +#include "r8a7779.h" static void __init marzen_init_timer(void) { diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c index fe445ef..25a1037 100644 --- a/arch/arm/mach-shmobile/board-marzen.c +++ b/arch/arm/mach-shmobile/board-marzen.c @@ -41,13 +41,15 @@ #include #include #include + #include -#include #include #include #include + #include "common.h" #include "irqs.h" +#include "r8a7779.h" /* Fixed 3.3V regulator to be used by SDHI0 */ static struct regulator_consumer_supply fixed3v3_power_consumers[] = { diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index e690927..c51f9db 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -24,9 +24,10 @@ #include #include #include -#include + #include "clock.h" #include "common.h" +#include "r8a7779.h" /* * MD1 = 1 MD1 = 0 diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h deleted file mode 100644 index 5415c71..0000000 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef __ASM_R8A7779_H__ -#define __ASM_R8A7779_H__ - -#include - -/* HPB-DMA slave IDs */ -enum { - HPBDMA_SLAVE_DUMMY, - HPBDMA_SLAVE_SDHI0_TX, - HPBDMA_SLAVE_SDHI0_RX, -}; - -extern void r8a7779_init_irq_extpin(int irlm); -extern void r8a7779_init_irq_extpin_dt(int irlm); -extern void r8a7779_init_irq_dt(void); -extern void r8a7779_map_io(void); -extern void r8a7779_earlytimer_init(void); -extern void r8a7779_add_early_devices(void); -extern void r8a7779_add_standard_devices(void); -extern void r8a7779_add_standard_devices_dt(void); -extern void r8a7779_init_late(void); -extern u32 r8a7779_read_mode_pins(void); -extern void r8a7779_clock_init(void); -extern void r8a7779_pinmux_init(void); -extern void r8a7779_pm_init(void); -extern void r8a7779_register_twd(void); - -#ifdef CONFIG_PM -extern void __init r8a7779_init_pm_domains(void); -#else -static inline void r8a7779_init_pm_domains(void) {} -#endif /* CONFIG_PM */ - -extern struct smp_operations r8a7779_smp_ops; - -#endif /* __ASM_R8A7779_H__ */ diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c index f0f36cb..69f70b7 100644 --- a/arch/arm/mach-shmobile/pm-r8a7779.c +++ b/arch/arm/mach-shmobile/pm-r8a7779.c @@ -19,10 +19,12 @@ #include #include #include + #include -#include + #include "common.h" #include "pm-rcar.h" +#include "r8a7779.h" /* SYSC */ #define SYSCIER 0x0c diff --git a/arch/arm/mach-shmobile/r8a7779.h b/arch/arm/mach-shmobile/r8a7779.h new file mode 100644 index 0000000..5415c71 --- /dev/null +++ b/arch/arm/mach-shmobile/r8a7779.h @@ -0,0 +1,36 @@ +#ifndef __ASM_R8A7779_H__ +#define __ASM_R8A7779_H__ + +#include + +/* HPB-DMA slave IDs */ +enum { + HPBDMA_SLAVE_DUMMY, + HPBDMA_SLAVE_SDHI0_TX, + HPBDMA_SLAVE_SDHI0_RX, +}; + +extern void r8a7779_init_irq_extpin(int irlm); +extern void r8a7779_init_irq_extpin_dt(int irlm); +extern void r8a7779_init_irq_dt(void); +extern void r8a7779_map_io(void); +extern void r8a7779_earlytimer_init(void); +extern void r8a7779_add_early_devices(void); +extern void r8a7779_add_standard_devices(void); +extern void r8a7779_add_standard_devices_dt(void); +extern void r8a7779_init_late(void); +extern u32 r8a7779_read_mode_pins(void); +extern void r8a7779_clock_init(void); +extern void r8a7779_pinmux_init(void); +extern void r8a7779_pm_init(void); +extern void r8a7779_register_twd(void); + +#ifdef CONFIG_PM +extern void __init r8a7779_init_pm_domains(void); +#else +static inline void r8a7779_init_pm_domains(void) {} +#endif /* CONFIG_PM */ + +extern struct smp_operations r8a7779_smp_ops; + +#endif /* __ASM_R8A7779_H__ */ diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 2f59b99..8dbc407 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -40,14 +40,16 @@ #include #include #include -#include + #include #include #include #include #include + #include "common.h" #include "irqs.h" +#include "r8a7779.h" static struct map_desc r8a7779_io_desc[] __initdata = { /* 2M entity map for 0xf0000000 (MPCORE) */ diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index c230fc0..3100e35 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -23,13 +23,15 @@ #include #include #include -#include + #include #include #include #include + #include "common.h" #include "pm-rcar.h" +#include "r8a7779.h" #define AVECR IOMEM(0xfe700040) #define R8A7779_SCU_BASE 0xf0000000 -- cgit v0.10.2 From 5201b5a792e95e3ecebe74cd3553413a67da09db Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 20 Jun 2014 18:53:07 +0200 Subject: ARM: shmobile: Move r8a7791.h Change location of r8a7791.h so it can be included as "r8a7791.h" instead of the old style Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c index 1d3f67d..0b1fb23 100644 --- a/arch/arm/mach-shmobile/board-koelsch-reference.c +++ b/arch/arm/mach-shmobile/board-koelsch-reference.c @@ -23,11 +23,13 @@ #include #include #include -#include + #include + #include "clock.h" #include "common.h" #include "irqs.h" +#include "r8a7791.h" #include "rcar-gen2.h" /* DU */ diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c index 0d44e7e..e698b90 100644 --- a/arch/arm/mach-shmobile/board-koelsch.c +++ b/arch/arm/mach-shmobile/board-koelsch.c @@ -45,11 +45,13 @@ #include #include #include -#include + #include #include + #include "common.h" #include "irqs.h" +#include "r8a7791.h" #include "rcar-gen2.h" /* DU */ diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h deleted file mode 100644 index 86eae7b..0000000 --- a/arch/arm/mach-shmobile/include/mach/r8a7791.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_R8A7791_H__ -#define __ASM_R8A7791_H__ - -void r8a7791_add_standard_devices(void); -void r8a7791_add_dt_devices(void); -void r8a7791_clock_init(void); -void r8a7791_pinmux_init(void); -void r8a7791_pm_init(void); -extern struct smp_operations r8a7791_smp_ops; - -#endif /* __ASM_R8A7791_H__ */ diff --git a/arch/arm/mach-shmobile/pm-r8a7791.c b/arch/arm/mach-shmobile/pm-r8a7791.c index 1519087..b7e6513 100644 --- a/arch/arm/mach-shmobile/pm-r8a7791.c +++ b/arch/arm/mach-shmobile/pm-r8a7791.c @@ -10,10 +10,12 @@ * for more details. */ -#include #include -#include + +#include + #include "pm-rcar.h" +#include "r8a7791.h" /* SYSC */ #define SYSCIER 0x0c diff --git a/arch/arm/mach-shmobile/r8a7791.h b/arch/arm/mach-shmobile/r8a7791.h new file mode 100644 index 0000000..86eae7b --- /dev/null +++ b/arch/arm/mach-shmobile/r8a7791.h @@ -0,0 +1,11 @@ +#ifndef __ASM_R8A7791_H__ +#define __ASM_R8A7791_H__ + +void r8a7791_add_standard_devices(void); +void r8a7791_add_dt_devices(void); +void r8a7791_clock_init(void); +void r8a7791_pinmux_init(void); +void r8a7791_pm_init(void); +extern struct smp_operations r8a7791_smp_ops; + +#endif /* __ASM_R8A7791_H__ */ diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c index 7e970d0..8823324 100644 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ b/arch/arm/mach-shmobile/setup-r8a7791.c @@ -26,10 +26,12 @@ #include #include #include -#include + #include + #include "common.h" #include "irqs.h" +#include "r8a7791.h" #include "rcar-gen2.h" static const struct resource pfc_resources[] __initconst = { diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index c6543b6..2482555 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -17,9 +17,11 @@ #include #include #include + #include -#include + #include "common.h" +#include "r8a7791.h" #include "rcar-gen2.h" #define RST 0xe6160000 -- cgit v0.10.2 From 8b438bcb9009609a15e5480ab1947acff6fb9005 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:20:10 +0900 Subject: ARM: shmobile: Allow use of boot code for non-SMP case Allow build of platsmp.c and headsmp.S even though SMP is disabled in the kernel configuration. With this in place it is possible to share the reset vector setup code with power management code that needs to be built even though SMP is disabled. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 9c0ad3e..279d3f3 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -34,17 +34,17 @@ obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o endif +# CPU reset vector handling objects +cpu-y := platsmp.o headsmp.o + # SMP objects -smp-y := platsmp.o headsmp.o +smp-y := $(cpu-y) smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o platsmp-apmu.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o -# IRQ objects -obj-$(CONFIG_ARCH_SH7372) += entry-intc.o - # PM objects obj-$(CONFIG_SUSPEND) += suspend.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o @@ -55,6 +55,9 @@ obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o +# IRQ objects +obj-$(CONFIG_ARCH_SH7372) += entry-intc.o + # Board objects ifdef CONFIG_ARCH_SHMOBILE_MULTI obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index e5be5c8..faf8214 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S @@ -10,14 +10,17 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include #include +#include +#include #include +#ifdef CONFIG_SMP ENTRY(shmobile_invalidate_start) bl v7_invalidate_l1 b secondary_startup ENDPROC(shmobile_invalidate_start) +#endif /* * Reset vector for secondary CPUs. @@ -68,7 +71,7 @@ shmobile_smp_boot_find_mpidr: shmobile_smp_boot_next: add r1, r1, #1 - cmp r1, #CONFIG_NR_CPUS + cmp r1, #NR_CPUS blo shmobile_smp_boot_find_mpidr b shmobile_smp_sleep @@ -85,10 +88,10 @@ ENDPROC(shmobile_smp_sleep) .globl shmobile_smp_mpidr shmobile_smp_mpidr: -1: .space CONFIG_NR_CPUS * 4 +1: .space NR_CPUS * 4 .globl shmobile_smp_fn shmobile_smp_fn: -2: .space CONFIG_NR_CPUS * 4 +2: .space NR_CPUS * 4 .globl shmobile_smp_arg shmobile_smp_arg: -3: .space CONFIG_NR_CPUS * 4 +3: .space NR_CPUS * 4 -- cgit v0.10.2 From 784500be40a0eabcee1e48c70927aea9c9accb1e Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:20:18 +0900 Subject: ARM: shmobile: Adjust APMU code to build for non-SMP Adjust the APMU code to allow build when CONFIG_SMP=n. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 590e35c..ce07eb9 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -25,13 +26,13 @@ static struct { void __iomem *iomem; int bit; -} apmu_cpus[CONFIG_NR_CPUS]; +} apmu_cpus[NR_CPUS]; #define WUPCR_OFFS 0x10 #define PSTR_OFFS 0x40 #define CPUNCR_OFFS(n) (0x100 + (0x10 * (n))) -static int apmu_power_on(void __iomem *p, int bit) +static int __maybe_unused apmu_power_on(void __iomem *p, int bit) { /* request power on */ writel_relaxed(BIT(bit), p + WUPCR_OFFS); @@ -50,7 +51,7 @@ static int apmu_power_off(void __iomem *p, int bit) return 0; } -static int apmu_power_off_poll(void __iomem *p, int bit) +static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit) { int k; @@ -73,7 +74,7 @@ static int apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu)) static void apmu_init_cpu(struct resource *res, int cpu, int bit) { - if (apmu_cpus[cpu].iomem) + if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem) return; apmu_cpus[cpu].iomem = ioremap_nocache(res->start, resource_size(res)); @@ -137,6 +138,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus) apmu_parse_cfg(apmu_init_cpu); } +#ifdef CONFIG_SMP int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) { /* For this particular CPU register boot vector */ @@ -144,6 +146,7 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) return apmu_wrap(cpu, apmu_power_on); } +#endif #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) /* nicked from arch/arm/mach-exynos/hotplug.c */ -- cgit v0.10.2 From 0d77c9aa7a13a9fcfc93836188474f43394ea657 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:20:46 +0900 Subject: ARM: shmobile: Use __init for APMU suspend init function The function shmobile_smp_apmu_suspend_init() should be put into the init section to not trigger section mismatch warnings. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index ce07eb9..a05b16d 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -240,7 +240,7 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state) return 0; } -void shmobile_smp_apmu_suspend_init(void) +void __init shmobile_smp_apmu_suspend_init(void) { shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend; } -- cgit v0.10.2 From 07ce9dfaf477e0d16d40faea251898d5a38d8051 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:20:54 +0900 Subject: ARM: shmobile: Move r8a7790 reset code to pm-r8a7790.c Move r8a7790 specific reset vector setup code from the SMP glue code to PM code. This makes the code one step closer to allow PM operations such as Suspend-to-RAM in the case when SMP is disabled in the kernel config. Signed-off-by: Magnus Damm [horms+renesas@verge.net.au: updated for recent #include changes] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c index 0f1090d..4289b38 100644 --- a/arch/arm/mach-shmobile/pm-r8a7790.c +++ b/arch/arm/mach-shmobile/pm-r8a7790.c @@ -11,10 +11,22 @@ */ #include +#include #include #include +#include "common.h" #include "pm-rcar.h" +/* RST */ +#define RST 0xe6160000 +#define CA15BAR 0x0020 +#define CA7BAR 0x0030 +#define CA15RESCNT 0x0040 +#define CA7RESCNT 0x0044 + +/* On-chip RAM */ +#define MERAM 0xe8080000 + /* SYSC */ #define SYSCIER 0x0c #define SYSCIMR 0x10 @@ -38,8 +50,32 @@ static inline void r8a7790_sysc_init(void) {} void __init r8a7790_pm_init(void) { + void __iomem *p; + u32 bar; static int once; - if (!once++) - r8a7790_sysc_init(); + if (once++) + return; + + /* MERAM for jump stub, because BAR requires 256KB aligned address */ + p = ioremap_nocache(MERAM, shmobile_boot_size); + memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); + iounmap(p); + + /* setup reset vectors */ + p = ioremap_nocache(RST, 0x63); + bar = (MERAM >> 8) & 0xfffffc00; + writel_relaxed(bar, p + CA15BAR); + writel_relaxed(bar, p + CA7BAR); + writel_relaxed(bar | 0x10, p + CA15BAR); + writel_relaxed(bar | 0x10, p + CA7BAR); + + /* de-assert reset for all CPUs */ + writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, + p + CA15RESCNT); + writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000, + p + CA7RESCNT); + iounmap(p); + + r8a7790_sysc_init(); } diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index 7590e2b..81ba906 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -22,13 +22,6 @@ #include "common.h" #include "pm-rcar.h" -#define RST 0xe6160000 -#define CA15BAR 0x0020 -#define CA7BAR 0x0030 -#define CA15RESCNT 0x0040 -#define CA7RESCNT 0x0044 -#define MERAM 0xe8080000 - static struct rcar_sysc_ch r8a7790_ca15_scu = { .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */ .isr_bit = 12, /* CA15-SCU */ @@ -41,32 +34,9 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = { static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) { - void __iomem *p; - u32 bar; - /* let APMU code install data related to shmobile_boot_vector */ shmobile_smp_apmu_prepare_cpus(max_cpus); - /* MERAM for jump stub, because BAR requires 256KB aligned address */ - p = ioremap_nocache(MERAM, shmobile_boot_size); - memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); - iounmap(p); - - /* setup reset vectors */ - p = ioremap_nocache(RST, 0x63); - bar = (MERAM >> 8) & 0xfffffc00; - writel_relaxed(bar, p + CA15BAR); - writel_relaxed(bar, p + CA7BAR); - writel_relaxed(bar | 0x10, p + CA15BAR); - writel_relaxed(bar | 0x10, p + CA7BAR); - - /* enable clocks to all CPUs */ - writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, - p + CA15RESCNT); - writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000, - p + CA7RESCNT); - iounmap(p); - /* turn on power to SCU */ r8a7790_pm_init(); shmobile_smp_apmu_suspend_init(); -- cgit v0.10.2 From 06f2c5dcc24b026872bfc9b50b47c384638d2111 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:21:03 +0900 Subject: ARM: shmobile: Allow r8a7790 to build non-SMP APMU code Build the APMU for r8a7790 even though SMP is disabled in the kernel config. Also initialize Suspend-to-RAM from pm-r8a7790.c to in the future cover both UP and SMP use cases of the APMU. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 279d3f3..08f5952 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -36,12 +36,13 @@ endif # CPU reset vector handling objects cpu-y := platsmp.o headsmp.o +cpu-$(CONFIG_ARCH_R8A7790) += platsmp-apmu.o # SMP objects smp-y := $(cpu-y) smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o -smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o +smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o platsmp-apmu.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o @@ -52,7 +53,7 @@ obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o -obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o +obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o $(cpu-y) obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o # IRQ objects diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c index 4289b38..2f3c250 100644 --- a/arch/arm/mach-shmobile/pm-r8a7790.c +++ b/arch/arm/mach-shmobile/pm-r8a7790.c @@ -78,4 +78,5 @@ void __init r8a7790_pm_init(void) iounmap(p); r8a7790_sysc_init(); + shmobile_smp_apmu_suspend_init(); } diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index 81ba906..1e254f9 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -39,7 +39,6 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) /* turn on power to SCU */ r8a7790_pm_init(); - shmobile_smp_apmu_suspend_init(); rcar_sysc_power_up(&r8a7790_ca15_scu); rcar_sysc_power_up(&r8a7790_ca7_scu); } -- cgit v0.10.2 From 8e26118d44c4877fa52dc8117692f3cc9af3c769 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:21:11 +0900 Subject: ARM: shmobile: Move r8a7791 reset code to pm-r8a7791.c Move r8a7791 specific reset vector setup code from the SMP glue code to PM code. This makes the code one step closer to allow PM operations such as Suspend-to-RAM in the case when SMP is disabled in the kernel config. Signed-off-by: Magnus Damm [horms+renesas@verge.net.au: updated for recent header file changes] Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/pm-r8a7791.c b/arch/arm/mach-shmobile/pm-r8a7791.c index b7e6513..c44304c 100644 --- a/arch/arm/mach-shmobile/pm-r8a7791.c +++ b/arch/arm/mach-shmobile/pm-r8a7791.c @@ -11,12 +11,17 @@ */ #include - +#include #include - +#include "common.h" #include "pm-rcar.h" #include "r8a7791.h" +#define RST 0xe6160000 +#define CA15BAR 0x0020 +#define CA15RESCNT 0x0040 +#define RAM 0xe6300000 + /* SYSC */ #define SYSCIER 0x0c #define SYSCIMR 0x10 @@ -40,10 +45,28 @@ static inline void r8a7791_sysc_init(void) {} void __init r8a7791_pm_init(void) { + void __iomem *p; + u32 bar; static int once; if (once++) return; + /* RAM for jump stub, because BAR requires 256KB aligned address */ + p = ioremap_nocache(RAM, shmobile_boot_size); + memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); + iounmap(p); + + /* setup reset vectors */ + p = ioremap_nocache(RST, 0x63); + bar = (RAM >> 8) & 0xfffffc00; + writel_relaxed(bar, p + CA15BAR); + writel_relaxed(bar | 0x10, p + CA15BAR); + + /* enable clocks to all CPUs */ + writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, + p + CA15RESCNT); + iounmap(p); + r8a7791_sysc_init(); } diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 2482555..df086aa 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -24,35 +24,11 @@ #include "r8a7791.h" #include "rcar-gen2.h" -#define RST 0xe6160000 -#define CA15BAR 0x0020 -#define CA15RESCNT 0x0040 -#define RAM 0xe6300000 - static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) { - void __iomem *p; - u32 bar; - /* let APMU code install data related to shmobile_boot_vector */ shmobile_smp_apmu_prepare_cpus(max_cpus); - /* RAM for jump stub, because BAR requires 256KB aligned address */ - p = ioremap_nocache(RAM, shmobile_boot_size); - memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); - iounmap(p); - - /* setup reset vectors */ - p = ioremap_nocache(RST, 0x63); - bar = (RAM >> 8) & 0xfffffc00; - writel_relaxed(bar, p + CA15BAR); - writel_relaxed(bar | 0x10, p + CA15BAR); - - /* enable clocks to all CPUs */ - writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, - p + CA15RESCNT); - iounmap(p); - r8a7791_pm_init(); shmobile_smp_apmu_suspend_init(); } -- cgit v0.10.2 From bfe4cfa8ae21628267f2b879b4396ee17ea4fd3a Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 6 Jun 2014 16:21:19 +0900 Subject: ARM: shmobile: Allow r8a7791 to build non-SMP APMU code Build the APMU for r8a7791 even though SMP is disabled in the kernel config. Also initialize Suspend-to-RAM from pm-r8a7791.c to in the future cover both UP and SMP use cases of the APMU. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 08f5952..cc0224e 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -37,13 +37,14 @@ endif # CPU reset vector handling objects cpu-y := platsmp.o headsmp.o cpu-$(CONFIG_ARCH_R8A7790) += platsmp-apmu.o +cpu-$(CONFIG_ARCH_R8A7791) += platsmp-apmu.o # SMP objects smp-y := $(cpu-y) smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o -smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o platsmp-apmu.o +smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o # PM objects @@ -54,7 +55,7 @@ obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o $(cpu-y) -obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o +obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o $(cpu-y) # IRQ objects obj-$(CONFIG_ARCH_SH7372) += entry-intc.o diff --git a/arch/arm/mach-shmobile/pm-r8a7791.c b/arch/arm/mach-shmobile/pm-r8a7791.c index c44304c..25f107b 100644 --- a/arch/arm/mach-shmobile/pm-r8a7791.c +++ b/arch/arm/mach-shmobile/pm-r8a7791.c @@ -69,4 +69,5 @@ void __init r8a7791_pm_init(void) iounmap(p); r8a7791_sysc_init(); + shmobile_smp_apmu_suspend_init(); } diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index df086aa..f743386 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -30,7 +30,6 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) shmobile_smp_apmu_prepare_cpus(max_cpus); r8a7791_pm_init(); - shmobile_smp_apmu_suspend_init(); } static int r8a7791_smp_boot_secondary(unsigned int cpu, -- cgit v0.10.2 From 5e80d81acc420fa33b56078f73f38546ab99be6f Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Fri, 20 Jun 2014 16:35:52 +0200 Subject: ARM: mvebu: Use the a standard errno in mvebu_get_soc_id Instead of using -1 as error value, use a standard errno. Signed-off-by: Gregory CLEMENT Link: https://lkml.kernel.org/r/1403274953-21790-2-git-send-email-gregory.clement@free-electrons.com Acked-by: Thomas Petazzoni Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c index d0f35b4..12c66ca 100644 --- a/arch/arm/mach-mvebu/mvebu-soc-id.c +++ b/arch/arm/mach-mvebu/mvebu-soc-id.c @@ -51,7 +51,7 @@ int mvebu_get_soc_id(u32 *dev, u32 *rev) *rev = soc_rev; return 0; } else - return -1; + return -ENODEV; } static int __init mvebu_soc_id_init(void) -- cgit v0.10.2 From 9674d4a3cf4307dda468a0b48e5e43a2fdb56b68 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 23 Jun 2014 17:42:08 +0200 Subject: ARM: mvebu: Use system controller to get the soc id when possible On Armada 38x it is possible to get the SoC Id and the revision without using the PCI register. Accessing the PCI registers implies enabling its clock and, because of the initialization issue, not keeping them enable. So if possible it is better to avoid it. Armada 370 and Armada XP provides the SoC ID values from the system controller but not the revision. Armada 375 provides both but the SoC ID value looks buggy (0x6660 instead of 0x6720). Signed-off-by: Gregory CLEMENT Link: https://lkml.kernel.org/r/1403538128-27859-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/common.h b/arch/arm/mach-mvebu/common.h index 0d05eaa..a97778e 100644 --- a/arch/arm/mach-mvebu/common.h +++ b/arch/arm/mach-mvebu/common.h @@ -21,5 +21,6 @@ void mvebu_restart(enum reboot_mode mode, const char *cmd); int mvebu_cpu_reset_deassert(int cpu); void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr); void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr); +int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev); #endif diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c index 12c66ca..a99434b 100644 --- a/arch/arm/mach-mvebu/mvebu-soc-id.c +++ b/arch/arm/mach-mvebu/mvebu-soc-id.c @@ -25,6 +25,7 @@ #include #include #include +#include "common.h" #include "mvebu-soc-id.h" #define PCIE_DEV_ID_OFF 0x0 @@ -54,7 +55,7 @@ int mvebu_get_soc_id(u32 *dev, u32 *rev) return -ENODEV; } -static int __init mvebu_soc_id_init(void) +static int __init get_soc_id_by_pci(void) { struct device_node *np; int ret = 0; @@ -129,6 +130,22 @@ clk_err: return ret; } + +static int __init mvebu_soc_id_init(void) +{ + + /* + * First try to get the ID and the revision by the system + * register and use PCI registers only if it is not possible + */ + if (!mvebu_system_controller_get_soc_id(&soc_dev_id, &soc_rev)) { + is_id_valid = true; + pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev); + return 0; + } + + return get_soc_id_by_pci(); +} early_initcall(mvebu_soc_id_init); static int __init mvebu_soc_device(void) diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index 0c5524a..b2b4e3d 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c @@ -39,6 +39,9 @@ struct mvebu_system_controller { u32 system_soft_reset; u32 resume_boot_addr; + + u32 dev_id; + u32 rev_id; }; static struct mvebu_system_controller *mvebu_sc; @@ -47,6 +50,8 @@ static const struct mvebu_system_controller armada_370_xp_system_controller = { .system_soft_reset_offset = 0x64, .rstoutn_mask_reset_out_en = 0x1, .system_soft_reset = 0x1, + .dev_id = 0x38, + .rev_id = 0x3c, }; static const struct mvebu_system_controller armada_375_system_controller = { @@ -55,6 +60,8 @@ static const struct mvebu_system_controller armada_375_system_controller = { .rstoutn_mask_reset_out_en = 0x1, .system_soft_reset = 0x1, .resume_boot_addr = 0xd4, + .dev_id = 0x38, + .rev_id = 0x3c, }; static const struct mvebu_system_controller orion_system_controller = { @@ -101,6 +108,18 @@ void mvebu_restart(enum reboot_mode mode, const char *cmd) ; } +int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev) +{ + if (of_machine_is_compatible("marvell,armada380") && + system_controller_base) { + *dev = readl(system_controller_base + mvebu_sc->dev_id) >> 16; + *rev = (readl(system_controller_base + mvebu_sc->rev_id) >> 8) + & 0xF; + return 0; + } else + return -ENODEV; +} + #ifdef CONFIG_SMP void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr) { -- cgit v0.10.2 From 1440fbd271127c283790063f735afd75f832751d Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 24 Jun 2014 17:13:49 +0530 Subject: ARM: mvebu: Staticize armada_375_smp_cpu1_enable_wa 'armada_375_smp_cpu1_enable_wa' is local to this file. Signed-off-by: Sachin Kamat Link: https://lkml.kernel.org/r/1403610235-22654-2-git-send-email-sachin.kamat@samsung.com Signed-off-by: Sachin Kamat Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Sebastian Hesselbarth Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c index 65f5321..43aaf3f 100644 --- a/arch/arm/mach-mvebu/platsmp-a9.c +++ b/arch/arm/mach-mvebu/platsmp-a9.c @@ -33,7 +33,7 @@ extern unsigned char armada_375_smp_cpu1_enable_code_end; extern unsigned char armada_375_smp_cpu1_enable_code_start; -void armada_375_smp_cpu1_enable_wa(void) +static void armada_375_smp_cpu1_enable_wa(void) { void __iomem *sram_virt_base; -- cgit v0.10.2 From 6fc770f28d10809474ec3fafb162ba76ac435cd4 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 24 Jun 2014 17:13:50 +0530 Subject: ARM: mvebu: Staticize armada_370_xp_cpu_pm_init 'armada_370_xp_cpu_pm_init' is local to this file. Signed-off-by: Sachin Kamat Link: https://lkml.kernel.org/r/1403610235-22654-3-git-send-email-sachin.kamat@samsung.com Signed-off-by: Sachin Kamat Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Sebastian Hesselbarth Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 27d98e7..9c819d6 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -258,7 +258,7 @@ static struct notifier_block armada_370_xp_cpu_pm_notifier = { .notifier_call = armada_370_xp_cpu_pm_notify, }; -int __init armada_370_xp_cpu_pm_init(void) +static int __init armada_370_xp_cpu_pm_init(void) { struct device_node *np; -- cgit v0.10.2 From e65714740d65237c40878b63acad6bf921481974 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 24 Jun 2014 17:13:51 +0530 Subject: ARM: mvebu: Staticize mvebu_cpu_reset_init 'mvebu_cpu_reset_init' is local to this file. Signed-off-by: Sachin Kamat Link: https://lkml.kernel.org/r/1403610235-22654-4-git-send-email-sachin.kamat@samsung.com Signed-off-by: Sachin Kamat Acked-by: Thomas Petazzoni Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Sebastian Hesselbarth Signed-off-by: Jason Cooper diff --git a/arch/arm/mach-mvebu/cpu-reset.c b/arch/arm/mach-mvebu/cpu-reset.c index 4a8f9ee..60fb537 100644 --- a/arch/arm/mach-mvebu/cpu-reset.c +++ b/arch/arm/mach-mvebu/cpu-reset.c @@ -67,7 +67,7 @@ static int mvebu_cpu_reset_map(struct device_node *np, int res_idx) return 0; } -int __init mvebu_cpu_reset_init(void) +static int __init mvebu_cpu_reset_init(void) { struct device_node *np; int res_idx; -- cgit v0.10.2 From 509efaf3d1819cf2bed1be1396aa24e56c9db303 Mon Sep 17 00:00:00 2001 From: Sathya Prakash M R Date: Sat, 5 Jul 2014 17:44:57 -0600 Subject: ARM: AM43xx: hwmod: add DSS hwmod data Add DSS hwmod data for AM43xx. Signed-off-by: Sathya Prakash M R [tomi.valkeinen@ti.com: added missing dispc flags] Signed-off-by: Tomi Valkeinen Acked-by: Rajendra Nayak Acked-by: Tony Lindgren Tested-by: Felipe Balbi # on linux-next 5f295cdf5c5d [paul@pwsan.com: fixed build break on AM43xx-only config] Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8421f38..75c73f2 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -200,6 +200,7 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data +obj-y += omap_hwmod_common_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c index 5da7a42..c6c6384 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c @@ -37,46 +37,6 @@ struct omap_hwmod_class omap2_uart_class = { }; /* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -struct omap_hwmod_class omap2_dss_hwmod_class = { - .name = "dss", - .sysc = &omap2_dss_sysc, - .reset = omap_dss_reset, -}; - -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -struct omap_hwmod_class omap2_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap2_rfbi_sysc, -}; - -/* * 'venc' class * video encoder */ diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index 5c2cc80..fea01aa 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -19,6 +19,8 @@ #include "omap_hwmod.h" #include "omap_hwmod_33xx_43xx_common_data.h" #include "prcm43xx.h" +#include "omap_hwmod_common_data.h" + /* IP blocks */ static struct omap_hwmod am43xx_l4_hs_hwmod = { @@ -415,6 +417,72 @@ static struct omap_hwmod am43xx_qspi_hwmod = { }, }; +/* dss */ + +static struct omap_hwmod am43xx_dss_core_hwmod = { + .name = "dss_core", + .class = &omap2_dss_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "disp_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* dispc */ + +struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = { + .manager_count = 1, + .has_framedonetv_irq = 0 +}; + +static struct omap_hwmod_class_sysconfig am43xx_dispc_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SOFTRESET | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | + SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_MIDLEMODE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class am43xx_dispc_hwmod_class = { + .name = "dispc", + .sysc = &am43xx_dispc_sysc, +}; + +static struct omap_hwmod am43xx_dss_dispc_hwmod = { + .name = "dss_dispc", + .class = &am43xx_dispc_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "disp_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET, + }, + }, + .dev_attr = &am43xx_dss_dispc_dev_attr, +}; + +/* rfbi */ + +static struct omap_hwmod am43xx_dss_rfbi_hwmod = { + .name = "dss_rfbi", + .class = &omap2_rfbi_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "disp_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET, + }, + }, +}; + /* Interfaces */ static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = { .master = &am33xx_l3_main_hwmod, @@ -654,6 +722,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +static struct omap_hwmod_ocp_if am43xx_dss__l3_main = { + .master = &am43xx_dss_core_hwmod, + .slave = &am33xx_l3_main_hwmod, + .clk = "l3_gclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am43xx_dss_core_hwmod, + .clk = "l4ls_gclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am43xx_dss_dispc_hwmod, + .clk = "l4ls_gclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am43xx_dss_rfbi_hwmod, + .clk = "l4ls_gclk", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__synctimer, &am43xx_l4_ls__timer8, @@ -748,6 +844,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_ls__ocp2scp1, &am43xx_l3_s__usbotgss0, &am43xx_l3_s__usbotgss1, + &am43xx_dss__l3_main, + &am43xx_l4_ls__dss, + &am43xx_l4_ls__dss_dispc, + &am43xx_l4_ls__dss_rfbi, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_common_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_common_ipblock_data.c new file mode 100644 index 0000000..f21664d --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_common_ipblock_data.c @@ -0,0 +1,55 @@ +/* + * omap_hwmod_common_ipblock_data.c - common IP block data for OMAP2+ + * + * Copyright (C) 2011 Nokia Corporation + * Copyright (C) 2012 Texas Instruments, Inc. + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "omap_hwmod.h" +#include "omap_hwmod_common_data.h" + +/* + * 'dss' class + * display sub-system + */ + +static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | + SYSS_HAS_RESET_STATUS), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_dss_hwmod_class = { + .name = "dss", + .sysc = &omap2_dss_sysc, + .reset = omap_dss_reset, +}; + +/* + * 'rfbi' class + * remote frame buffer interface + */ + +static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +struct omap_hwmod_class omap2_rfbi_hwmod_class = { + .name = "rfbi", + .sysc = &omap2_rfbi_sysc, +}; + diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index 7785be9..ad7b3e9 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -142,5 +142,6 @@ #define AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET 0x05B8 #define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET 0x0268 #define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0 +#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20 #endif -- cgit v0.10.2 From d358c99838f3cf63ad7536124be4318cc84b11fa Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 3 Jul 2014 16:08:30 +0200 Subject: ARM: shmobile: fix shmobile_smp_apmu_suspend_init build failure for !SUSPEND Patch d6d757c9a4e ("ARM: shmobile: APMU: Add Core-Standby-state for Suspend to RAM") added both an inline wrapper for shmobile_smp_apmu_suspend_init and an empty function in arch/arm/mach-shmobile/platsmp-apmu.c. We get a build failure when both are present, so this patch removes the one in the .c file and keeps the inline version. Signed-off-by: Arnd Bergmann Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index a05b16d..2c06810 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -244,6 +244,4 @@ void __init shmobile_smp_apmu_suspend_init(void) { shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend; } -#else -void shmobile_smp_apmu_suspend_init(void) {} #endif -- cgit v0.10.2 From 4dfad0696da39f4c05ac5cadde9648a650830993 Mon Sep 17 00:00:00 2001 From: Wei Xu Date: Mon, 7 Jul 2014 10:41:53 +0800 Subject: MAINTAINERS:ARM:hisi: add Hisilicon SoC family Introduce a new mach-hisi that will support Hisilicon SoCs based on ARMv7 and I am taking maintainership for it. Signed-off-by: Wei Xu diff --git a/MAINTAINERS b/MAINTAINERS index 134483f..d4ac517 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -972,6 +972,14 @@ F: arch/arm/mach-pxa/hx4700.c F: arch/arm/mach-pxa/include/mach/hx4700.h F: sound/soc/pxa/hx4700.c +ARM/HISILICON SOC SUPPORT +M: Wei Xu +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +W: http://www.hisilicon.com +S: Supported +T: git git://github.com/hisilicon/linux-hisi.git +F: arch/arm/mach-hisi/ + ARM/HP JORNADA 7XX MACHINE SUPPORT M: Kristoffer Ericson W: www.jlime.com -- cgit v0.10.2 From 5ba1657ecdee507df4adcd05b533d09e9934fc11 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 3 Jul 2014 22:55:47 +0800 Subject: ARM: sunxi: select MFD_SUN6I_PRCM when sun8i arch support is enabled Select the MFD_SUN6I_PRCM option when sun8i arch is enabled in order to get the PRCM (Power/Reset/Clock Management) related drivers compiled. Also select ARCH_HAS_RESET_CONTROLLER and RESET_CONTROLLER to make sure the reset controller drivers are compiled. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index f776c5f..6434e3b 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -38,6 +38,9 @@ config MACH_SUN7I config MACH_SUN8I bool "Allwinner A23 (sun8i) SoCs support" default ARCH_SUNXI + select ARCH_HAS_RESET_CONTROLLER select ARM_GIC + select MFD_SUN6I_PRCM + select RESET_CONTROLLER endif -- cgit v0.10.2 From 08af64097d4c5cb17f9df4dadf80ed5f508db743 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 7 Jul 2014 08:47:37 +0200 Subject: ARM: shmobile: marzen: Consistently use tabs for indentation Unify white space usage by consistently using tabs for indentation. Signed-off-by: Simon Horman diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index 20b1768..5745555 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -112,17 +112,17 @@ }; &scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; - status = "okay"; + status = "okay"; }; &scif4 { - pinctrl-0 = <&scif4_pins>; - pinctrl-names = "default"; + pinctrl-0 = <&scif4_pins>; + pinctrl-names = "default"; - status = "okay"; + status = "okay"; }; &sdhi0 { -- cgit v0.10.2 From e423d12cbcb9576785e891617888f627f1f57bf4 Mon Sep 17 00:00:00 2001 From: Gaku Inami Date: Wed, 25 Jun 2014 16:58:40 +0900 Subject: ARM: shmobile: Remove opps table check for cpufreq This patch is based on feedback from Viresh Kumar. Since cpufreq-cpu0 driver has already check opp table, there is no need to same check in mach-shmobile. Signed-off-by: Gaku Inami Acked-by: Viresh Kumar Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/cpufreq.c b/arch/arm/mach-shmobile/cpufreq.c index e2c868f..8a24b2b 100644 --- a/arch/arm/mach-shmobile/cpufreq.c +++ b/arch/arm/mach-shmobile/cpufreq.c @@ -8,24 +8,10 @@ * for more details. */ -#include -#include #include int __init shmobile_cpufreq_init(void) { - struct device_node *np; - - np = of_cpu_device_node_get(0); - if (np == NULL) { - pr_err("failed to find cpu0 node\n"); - return 0; - } - - if (of_get_property(np, "operating-points", NULL)) - platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0); - - of_node_put(np); - + platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0); return 0; } -- cgit v0.10.2 From 7a0c99478dca80f862912be02bf8ec240a9098d1 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 7 Jul 2014 09:54:26 +0200 Subject: ARM: shmobile: r8a7778: add SCI clock support for DT This will be used when initialising SCI devices using DT until common clock framework support is added. Acked-by: Laurent Pinchart Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c index 13f8f3a..a6dd601 100644 --- a/arch/arm/mach-shmobile/clock-r8a7778.c +++ b/arch/arm/mach-shmobile/clock-r8a7778.c @@ -202,11 +202,17 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */ CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ + CLKDEV_DEV_ID("ffe40000.serial", &mstp_clks[MSTP026]), /* SCIF0 */ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ + CLKDEV_DEV_ID("ffe41000.serial", &mstp_clks[MSTP025]), /* SCIF1 */ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ + CLKDEV_DEV_ID("ffe42000.serial", &mstp_clks[MSTP024]), /* SCIF2 */ CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ + CLKDEV_DEV_ID("ffe43000.serial", &mstp_clks[MSTP023]), /* SCIF3 */ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ + CLKDEV_DEV_ID("ffe44000.serial", &mstp_clks[MSTP022]), /* SCIF4 */ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ + CLKDEV_DEV_ID("ffe45000.serial", &mstp_clks[MSTP021]), /* SCIF5 */ CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */ CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */ CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */ -- cgit v0.10.2 From 9947efaac0545fd833b0ff5147578aba79d297bc Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 7 Jul 2014 09:54:32 +0200 Subject: ARM: shmobile: r8a73a4: add SCI clock support for DT This will be used when initialising SCI devices using DT until common clock framework support is added. Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c index b5bc22c..1d2fe05 100644 --- a/arch/arm/mach-shmobile/clock-r8a73a4.c +++ b/arch/arm/mach-shmobile/clock-r8a73a4.c @@ -574,11 +574,17 @@ static struct clk_lookup lookups[] = { /* MSTP */ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), + CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), + CLKDEV_DEV_ID("e6c50000.serial", &mstp_clks[MSTP203]), CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), + CLKDEV_DEV_ID("e6c20000.serial", &mstp_clks[MSTP206]), CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]), + CLKDEV_DEV_ID("e6c30000.serial", &mstp_clks[MSTP207]), CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), + CLKDEV_DEV_ID("e6ce0000.serial", &mstp_clks[MSTP216]), CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]), + CLKDEV_DEV_ID("e6cf0000.serial", &mstp_clks[MSTP217]), CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), CLKDEV_DEV_ID("e6700020.dma-controller", &mstp_clks[MSTP218]), CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), -- cgit v0.10.2 From d1ec90f2875471df2c954f7cbd45b2389ff86aa2 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 7 Jul 2014 09:54:40 +0200 Subject: ARM: shmobile: r8a7740: correct SCI clock support for DT When initialising SCI devices their names will be .serial not .sci. This will be used when initialising SCI devices using DT until common clock framework support is added. Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 50931e3..68592b7 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -555,27 +555,27 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]), CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), - CLKDEV_DEV_ID("e6c80000.sci", &mstp_clks[MSTP200]), + CLKDEV_DEV_ID("e6c80000.serial", &mstp_clks[MSTP200]), CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), - CLKDEV_DEV_ID("e6c70000.sci", &mstp_clks[MSTP201]), + CLKDEV_DEV_ID("e6c70000.serial", &mstp_clks[MSTP201]), CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), - CLKDEV_DEV_ID("e6c60000.sci", &mstp_clks[MSTP202]), + CLKDEV_DEV_ID("e6c60000.serial", &mstp_clks[MSTP202]), CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), - CLKDEV_DEV_ID("e6c50000.sci", &mstp_clks[MSTP203]), + CLKDEV_DEV_ID("e6c50000.serial", &mstp_clks[MSTP203]), CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), - CLKDEV_DEV_ID("e6c40000.sci", &mstp_clks[MSTP204]), + CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), - CLKDEV_DEV_ID("e6c30000.sci", &mstp_clks[MSTP206]), + CLKDEV_DEV_ID("e6c30000.serial", &mstp_clks[MSTP206]), CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), - CLKDEV_DEV_ID("e6cb0000.sci", &mstp_clks[MSTP207]), + CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]), - CLKDEV_DEV_ID("e6cd0000.sci", &mstp_clks[MSTP222]), + CLKDEV_DEV_ID("e6cd0000.serial", &mstp_clks[MSTP222]), CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]), - CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]), + CLKDEV_DEV_ID("e6cc0000.serial", &mstp_clks[MSTP230]), CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]), -- cgit v0.10.2 From ff4ce48e1f163d945c037c1c90ce12950961d91d Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 7 Jul 2014 09:54:50 +0200 Subject: ARM: shmobile: sh73a0: add SCI clock support for DT This will be used when initialising SCI devices using DT until common clock framework support is added. Signed-off-by: Simon Horman diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 0d9cd1f..4990e03 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -638,16 +638,25 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ + CLKDEV_DEV_ID("e6cd0000.serial", &mstp_clks[MSTP219]), /* SCIFA7 */ CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */ CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* MP-DMAC */ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ + CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */ CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ + CLKDEV_DEV_ID("0xe6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ + CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ + CLKDEV_DEV_ID("e6c50000.serial", &mstp_clks[MSTP203]), /* SCIFA1 */ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ + CLKDEV_DEV_ID("e6c60000.serial", &mstp_clks[MSTP202]), /* SCIFA2 */ CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ + CLKDEV_DEV_ID("e6c70000.serial", &mstp_clks[MSTP201]), /* SCIFA3 */ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ + CLKDEV_DEV_ID("e6c80000.serial", &mstp_clks[MSTP200]), /* SCIFA4 */ CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ + CLKDEV_DEV_ID("e6cc0000.serial", &mstp_clks[MSTP331]), /* SCIFA6 */ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */ CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */ CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ -- cgit v0.10.2 From ba364fc752daeded072a5ef31e43b84cb1f9e5fd Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Thu, 10 Jul 2014 23:36:21 +0200 Subject: ARM: Kirkwood: Remove mach-kirkwood Now that all boards have been converted to DT and all the support code lives in mach-mvebu, we can remove mach-kirkwood. Signed-off-by: Andrew Lunn Link: https://lkml.kernel.org/r/1405028192-9623-2-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 87b63fd..b20251a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -536,22 +536,6 @@ config ARCH_DOVE help Support for the Marvell Dove SoC 88AP510 -config ARCH_KIRKWOOD - bool "Marvell Kirkwood" - select ARCH_HAS_CPUFREQ - select ARCH_REQUIRE_GPIOLIB - select CPU_FEROCEON - select GENERIC_CLOCKEVENTS - select MVEBU_MBUS - select PCI - select PCI_QUIRKS - select PINCTRL - select PINCTRL_KIRKWOOD - select PLAT_ORION_LEGACY - help - Support for the following Marvell Kirkwood series SoCs: - 88F6180, 88F6192 and 88F6281. - config ARCH_MV78XX0 bool "Marvell MV78xx0" select ARCH_REQUIRE_GPIOLIB @@ -966,8 +950,6 @@ source "arch/arm/mach-ixp4xx/Kconfig" source "arch/arm/mach-keystone/Kconfig" -source "arch/arm/mach-kirkwood/Kconfig" - source "arch/arm/mach-ks8695/Kconfig" source "arch/arm/mach-msm/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 8f90595..20f49e9 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1033,7 +1033,7 @@ config DEBUG_UART_8250 def_bool ARCH_DOVE || ARCH_EBSA110 || \ (FOOTBRIDGE && !DEBUG_DC21285_PORT) || \ ARCH_GEMINI || ARCH_IOP13XX || ARCH_IOP32X || \ - ARCH_IOP33X || ARCH_IXP4XX || ARCH_KIRKWOOD || \ + ARCH_IOP33X || ARCH_IXP4XX || \ ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || ARCH_RPC config DEBUG_UART_PHYS @@ -1089,7 +1089,7 @@ config DEBUG_UART_PHYS default 0xe0000000 if ARCH_SPEAR13XX default 0xf0000be0 if ARCH_EBSA110 default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE - default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ + default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ ARCH_ORION5X default 0xf7fc9000 if DEBUG_BERLIN_UART default 0xf8b00000 if DEBUG_HI3716_UART @@ -1154,7 +1154,6 @@ config DEBUG_UART_VIRT default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 - default 0xfed12000 if ARCH_KIRKWOOD default 0xfed60000 if DEBUG_RK29_UART0 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6721fab..433a6f1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -163,7 +163,6 @@ machine-$(CONFIG_ARCH_IOP32X) += iop32x machine-$(CONFIG_ARCH_IOP33X) += iop33x machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx machine-$(CONFIG_ARCH_KEYSTONE) += keystone -machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood machine-$(CONFIG_ARCH_KS8695) += ks8695 machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx machine-$(CONFIG_ARCH_MMP) += mmp diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5986ff63..025350c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -90,8 +90,7 @@ dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \ k2l-evm.dtb \ k2e-evm.dtb -kirkwood := \ - kirkwood-b3.dtb \ +dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-cloudbox.dtb \ kirkwood-db-88f6281.dtb \ kirkwood-db-88f6282.dtb \ @@ -150,8 +149,6 @@ kirkwood := \ kirkwood-ts219-6282.dtb \ kirkwood-ts419-6281.dtb \ kirkwood-ts419-6282.dtb -dtb-$(CONFIG_ARCH_KIRKWOOD) += $(kirkwood) -dtb-$(CONFIG_MACH_KIRKWOOD) += $(kirkwood) dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig deleted file mode 100644 index df4b263..0000000 --- a/arch/arm/mach-kirkwood/Kconfig +++ /dev/null @@ -1,111 +0,0 @@ -if ARCH_KIRKWOOD - -menu "Marvell Kirkwood Implementations" - -config KIRKWOOD_LEGACY - bool - -config MACH_D2NET_V2 - bool "LaCie d2 Network v2 NAS Board" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - LaCie d2 Network v2 NAS. - -config MACH_NET2BIG_V2 - bool "LaCie 2Big Network v2 NAS Board" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - LaCie 2Big Network v2 NAS. - -config MACH_NET5BIG_V2 - bool "LaCie 5Big Network v2 NAS Board" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - LaCie 5Big Network v2 NAS. - -config MACH_OPENRD - select KIRKWOOD_LEGACY - bool - -config MACH_OPENRD_BASE - bool "Marvell OpenRD Base Board" - select MACH_OPENRD - help - Say 'Y' here if you want your kernel to support the - Marvell OpenRD Base Board. - -config MACH_OPENRD_CLIENT - bool "Marvell OpenRD Client Board" - select MACH_OPENRD - help - Say 'Y' here if you want your kernel to support the - Marvell OpenRD Client Board. - -config MACH_OPENRD_ULTIMATE - bool "Marvell OpenRD Ultimate Board" - select MACH_OPENRD - help - Say 'Y' here if you want your kernel to support the - Marvell OpenRD Ultimate Board. - -config MACH_RD88F6192_NAS - bool "Marvell RD-88F6192-NAS Reference Board" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - Marvell RD-88F6192-NAS Reference Board. - -config MACH_RD88F6281 - bool "Marvell RD-88F6281 Reference Board" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - Marvell RD-88F6281 Reference Board. - -config MACH_T5325 - bool "HP t5325 Thin Client" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - HP t5325 Thin Client. - -config MACH_TS219 - bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and - TS-219P+ Turbo NAS devices. - -config MACH_TS41X - bool "QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo NAS" - select KIRKWOOD_LEGACY - help - Say 'Y' here if you want your kernel to support the - QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo - NAS devices. - -comment "Device tree entries" - -config ARCH_KIRKWOOD_DT - bool "Marvell Kirkwood Flattened Device Tree" - select KIRKWOOD_CLK - select OF_IRQ - select ORION_IRQCHIP - select ORION_TIMER - select POWER_SUPPLY - select POWER_RESET - select POWER_RESET_GPIO - select REGULATOR - select REGULATOR_FIXED_VOLTAGE - select USE_OF - help - Say 'Y' here if you want your kernel to support the - Marvell Kirkwood using flattened device tree. - -endmenu - -endif diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile deleted file mode 100644 index 3a72c5c..0000000 --- a/arch/arm/mach-kirkwood/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o common.o pcie.o -obj-$(CONFIG_PM) += pm.o - -obj-$(CONFIG_MACH_D2NET_V2) += d2net_v2-setup.o lacie_v2-common.o -obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o -obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o -obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o -obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o -obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o -obj-$(CONFIG_MACH_T5325) += t5325-setup.o -obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o -obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o - -obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot deleted file mode 100644 index 760a0ef..0000000 --- a/arch/arm/mach-kirkwood/Makefile.boot +++ /dev/null @@ -1,3 +0,0 @@ - zreladdr-y += 0x00008000 -params_phys-y := 0x00000100 -initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c deleted file mode 100644 index ff18ff2..0000000 --- a/arch/arm/mach-kirkwood/board-dt.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright 2012 (C), Jason Cooper - * - * arch/arm/mach-kirkwood/board-dt.c - * - * Flattened Device Tree board initialization - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "pm.h" - -static struct map_desc kirkwood_io_desc[] __initdata = { - { - .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE, - .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), - .length = KIRKWOOD_REGS_SIZE, - .type = MT_DEVICE, - }, -}; - -static void __init kirkwood_map_io(void) -{ - iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); -} - -static struct resource kirkwood_cpufreq_resources[] = { - [0] = { - .start = CPU_CONTROL_PHYS, - .end = CPU_CONTROL_PHYS + 3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device kirkwood_cpufreq_device = { - .name = "kirkwood-cpufreq", - .id = -1, - .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources), - .resource = kirkwood_cpufreq_resources, -}; - -static void __init kirkwood_cpufreq_init(void) -{ - platform_device_register(&kirkwood_cpufreq_device); -} - -static struct resource kirkwood_cpuidle_resource[] = { - { - .flags = IORESOURCE_MEM, - .start = DDR_OPERATION_BASE, - .end = DDR_OPERATION_BASE + 3, - }, -}; - -static struct platform_device kirkwood_cpuidle = { - .name = "kirkwood_cpuidle", - .id = -1, - .resource = kirkwood_cpuidle_resource, - .num_resources = 1, -}; - -static void __init kirkwood_cpuidle_init(void) -{ - platform_device_register(&kirkwood_cpuidle); -} - -/* Temporary here since mach-mvebu has a function we can use */ -static void kirkwood_restart(enum reboot_mode mode, const char *cmd) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - -#define MV643XX_ETH_MAC_ADDR_LOW 0x0414 -#define MV643XX_ETH_MAC_ADDR_HIGH 0x0418 - -static void __init kirkwood_dt_eth_fixup(void) -{ - struct device_node *np; - - /* - * The ethernet interfaces forget the MAC address assigned by u-boot - * if the clocks are turned off. Usually, u-boot on kirkwood boards - * has no DT support to properly set local-mac-address property. - * As a workaround, we get the MAC address from mv643xx_eth registers - * and update the port device node if no valid MAC address is set. - */ - for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") { - struct device_node *pnp = of_get_parent(np); - struct clk *clk; - struct property *pmac; - void __iomem *io; - u8 *macaddr; - u32 reg; - - if (!pnp) - continue; - - /* skip disabled nodes or nodes with valid MAC address*/ - if (!of_device_is_available(pnp) || of_get_mac_address(np)) - goto eth_fixup_skip; - - clk = of_clk_get(pnp, 0); - if (IS_ERR(clk)) - goto eth_fixup_skip; - - io = of_iomap(pnp, 0); - if (!io) - goto eth_fixup_no_map; - - /* ensure port clock is not gated to not hang CPU */ - clk_prepare_enable(clk); - - /* store MAC address register contents in local-mac-address */ - pr_err(FW_INFO "%s: local-mac-address is not set\n", - np->full_name); - - pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL); - if (!pmac) - goto eth_fixup_no_mem; - - pmac->value = pmac + 1; - pmac->length = 6; - pmac->name = kstrdup("local-mac-address", GFP_KERNEL); - if (!pmac->name) { - kfree(pmac); - goto eth_fixup_no_mem; - } - - macaddr = pmac->value; - reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH); - macaddr[0] = (reg >> 24) & 0xff; - macaddr[1] = (reg >> 16) & 0xff; - macaddr[2] = (reg >> 8) & 0xff; - macaddr[3] = reg & 0xff; - - reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW); - macaddr[4] = (reg >> 8) & 0xff; - macaddr[5] = reg & 0xff; - - of_update_property(np, pmac); - -eth_fixup_no_mem: - iounmap(io); - clk_disable_unprepare(clk); -eth_fixup_no_map: - clk_put(clk); -eth_fixup_skip: - of_node_put(pnp); - } -} - -/* - * Disable propagation of mbus errors to the CPU local bus, as this - * causes mbus errors (which can occur for example for PCI aborts) to - * throw CPU aborts, which we're not set up to deal with. - */ -static void __init kirkwood_disable_mbus_error_propagation(void) -{ - void __iomem *cpu_config; - - cpu_config = ioremap(CPU_CONFIG_PHYS, 4); - writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config); - iounmap(cpu_config); -} - -static void __init kirkwood_dt_init(void) -{ - kirkwood_disable_mbus_error_propagation(); - - BUG_ON(mvebu_mbus_dt_init(false)); - -#ifdef CONFIG_CACHE_FEROCEON_L2 - feroceon_of_init(); -#endif - kirkwood_cpufreq_init(); - kirkwood_cpuidle_init(); - - kirkwood_pm_init(); - kirkwood_dt_eth_fixup(); - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static const char * const kirkwood_dt_board_compat[] = { - "marvell,kirkwood", - NULL -}; - -DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)") - /* Maintainer: Jason Cooper */ - .map_io = kirkwood_map_io, - .init_machine = kirkwood_dt_init, - .restart = kirkwood_restart, - .dt_compat = kirkwood_dt_board_compat, -MACHINE_END diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c deleted file mode 100644 index 255f33a..0000000 --- a/arch/arm/mach-kirkwood/common.c +++ /dev/null @@ -1,746 +0,0 @@ -/* - * arch/arm/mach-kirkwood/common.c - * - * Core functions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "pm.h" - -/* These can go away once Kirkwood uses the mvebu-mbus DT binding */ -#define KIRKWOOD_MBUS_NAND_TARGET 0x01 -#define KIRKWOOD_MBUS_NAND_ATTR 0x2f -#define KIRKWOOD_MBUS_SRAM_TARGET 0x03 -#define KIRKWOOD_MBUS_SRAM_ATTR 0x01 - -/***************************************************************************** - * I/O Address Mapping - ****************************************************************************/ -static struct map_desc kirkwood_io_desc[] __initdata = { - { - .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE, - .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), - .length = KIRKWOOD_REGS_SIZE, - .type = MT_DEVICE, - }, -}; - -void __init kirkwood_map_io(void) -{ - iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); -} - -/***************************************************************************** - * CLK tree - ****************************************************************************/ - -static void enable_sata0(void) -{ - /* Enable PLL and IVREF */ - writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2); - /* Enable PHY */ - writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL); -} - -static void disable_sata0(void) -{ - /* Disable PLL and IVREF */ - writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2); - /* Disable PHY */ - writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); -} - -static void enable_sata1(void) -{ - /* Enable PLL and IVREF */ - writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2); - /* Enable PHY */ - writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL); -} - -static void disable_sata1(void) -{ - /* Disable PLL and IVREF */ - writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2); - /* Disable PHY */ - writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL); -} - -static void disable_pcie0(void) -{ - writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL); - while (1) - if (readl(PCIE_STATUS) & 0x1) - break; - writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL); -} - -static void disable_pcie1(void) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - - if (dev == MV88F6282_DEV_ID) { - writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL); - while (1) - if (readl(PCIE1_STATUS) & 0x1) - break; - writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL); - } -} - -/* An extended version of the gated clk. This calls fn_en()/fn_dis - * before enabling/disabling the clock. We use this to turn on/off - * PHYs etc. */ -struct clk_gate_fn { - struct clk_gate gate; - void (*fn_en)(void); - void (*fn_dis)(void); -}; - -#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) -#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) - -static int clk_gate_fn_enable(struct clk_hw *hw) -{ - struct clk_gate *gate = to_clk_gate(hw); - struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); - int ret; - - ret = clk_gate_ops.enable(hw); - if (!ret && gate_fn->fn_en) - gate_fn->fn_en(); - - return ret; -} - -static void clk_gate_fn_disable(struct clk_hw *hw) -{ - struct clk_gate *gate = to_clk_gate(hw); - struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); - - if (gate_fn->fn_dis) - gate_fn->fn_dis(); - - clk_gate_ops.disable(hw); -} - -static struct clk_ops clk_gate_fn_ops; - -static struct clk __init *clk_register_gate_fn(struct device *dev, - const char *name, - const char *parent_name, unsigned long flags, - void __iomem *reg, u8 bit_idx, - u8 clk_gate_flags, spinlock_t *lock, - void (*fn_en)(void), void (*fn_dis)(void)) -{ - struct clk_gate_fn *gate_fn; - struct clk *clk; - struct clk_init_data init; - - gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL); - if (!gate_fn) { - pr_err("%s: could not allocate gated clk\n", __func__); - return ERR_PTR(-ENOMEM); - } - - init.name = name; - init.ops = &clk_gate_fn_ops; - init.flags = flags; - init.parent_names = (parent_name ? &parent_name : NULL); - init.num_parents = (parent_name ? 1 : 0); - - /* struct clk_gate assignments */ - gate_fn->gate.reg = reg; - gate_fn->gate.bit_idx = bit_idx; - gate_fn->gate.flags = clk_gate_flags; - gate_fn->gate.lock = lock; - gate_fn->gate.hw.init = &init; - gate_fn->fn_en = fn_en; - gate_fn->fn_dis = fn_dis; - - /* ops is the gate ops, but with our enable/disable functions */ - if (clk_gate_fn_ops.enable != clk_gate_fn_enable || - clk_gate_fn_ops.disable != clk_gate_fn_disable) { - clk_gate_fn_ops = clk_gate_ops; - clk_gate_fn_ops.enable = clk_gate_fn_enable; - clk_gate_fn_ops.disable = clk_gate_fn_disable; - } - - clk = clk_register(dev, &gate_fn->gate.hw); - - if (IS_ERR(clk)) - kfree(gate_fn); - - return clk; -} - -static DEFINE_SPINLOCK(gating_lock); -static struct clk *tclk; - -static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) -{ - return clk_register_gate(NULL, name, "tclk", 0, CLOCK_GATING_CTRL, - bit_idx, 0, &gating_lock); -} - -static struct clk __init *kirkwood_register_gate_fn(const char *name, - u8 bit_idx, - void (*fn_en)(void), - void (*fn_dis)(void)) -{ - return clk_register_gate_fn(NULL, name, "tclk", 0, CLOCK_GATING_CTRL, - bit_idx, 0, &gating_lock, fn_en, fn_dis); -} - -static struct clk *ge0, *ge1; - -void __init kirkwood_clk_init(void) -{ - struct clk *runit, *sata0, *sata1, *usb0, *sdio; - struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio; - - tclk = clk_register_fixed_rate(NULL, "tclk", NULL, - CLK_IS_ROOT, kirkwood_tclk); - - runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); - ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); - ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); - sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, - enable_sata0, disable_sata0); - sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, - enable_sata1, disable_sata1); - usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); - sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); - crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); - xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); - xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); - pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, - NULL, disable_pcie0); - pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, - NULL, disable_pcie1); - audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); - kirkwood_register_gate("tdm", CGC_BIT_TDM); - kirkwood_register_gate("tsu", CGC_BIT_TSU); - - /* clkdev entries, mapping clks to devices */ - orion_clkdev_add(NULL, "orion_spi.0", runit); - orion_clkdev_add(NULL, "orion_spi.1", runit); - orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0); - orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1); - orion_clkdev_add(NULL, "orion_wdt", tclk); - orion_clkdev_add("0", "sata_mv.0", sata0); - orion_clkdev_add("1", "sata_mv.0", sata1); - orion_clkdev_add(NULL, "orion-ehci.0", usb0); - orion_clkdev_add(NULL, "orion_nand", runit); - orion_clkdev_add(NULL, "mvsdio", sdio); - orion_clkdev_add(NULL, "mv_crypto", crypto); - orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0); - orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1); - orion_clkdev_add("0", "pcie", pex0); - orion_clkdev_add("1", "pcie", pex1); - orion_clkdev_add(NULL, "mvebu-audio", audio); - orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit); - orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit); - - /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., - * so should never be gated. - */ - clk_prepare_enable(runit); -} - -/***************************************************************************** - * EHCI0 - ****************************************************************************/ -void __init kirkwood_ehci_init(void) -{ - orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA); -} - - -/***************************************************************************** - * GE00 - ****************************************************************************/ -void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) -{ - orion_ge00_init(eth_data, - GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, - IRQ_KIRKWOOD_GE00_ERR, 1600); - /* The interface forgets the MAC address assigned by u-boot if - the clock is turned off, so claim the clk now. */ - clk_prepare_enable(ge0); -} - - -/***************************************************************************** - * GE01 - ****************************************************************************/ -void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) -{ - orion_ge01_init(eth_data, - GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, - IRQ_KIRKWOOD_GE01_ERR, 1600); - clk_prepare_enable(ge1); -} - - -/***************************************************************************** - * Ethernet switch - ****************************************************************************/ -void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq) -{ - orion_ge00_switch_init(d, irq); -} - - -/***************************************************************************** - * NAND flash - ****************************************************************************/ -static struct resource kirkwood_nand_resource = { - .flags = IORESOURCE_MEM, - .start = KIRKWOOD_NAND_MEM_PHYS_BASE, - .end = KIRKWOOD_NAND_MEM_PHYS_BASE + - KIRKWOOD_NAND_MEM_SIZE - 1, -}; - -static struct orion_nand_data kirkwood_nand_data = { - .cle = 0, - .ale = 1, - .width = 8, -}; - -static struct platform_device kirkwood_nand_flash = { - .name = "orion_nand", - .id = -1, - .dev = { - .platform_data = &kirkwood_nand_data, - }, - .resource = &kirkwood_nand_resource, - .num_resources = 1, -}; - -void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, - int chip_delay) -{ - kirkwood_nand_data.parts = parts; - kirkwood_nand_data.nr_parts = nr_parts; - kirkwood_nand_data.chip_delay = chip_delay; - platform_device_register(&kirkwood_nand_flash); -} - -void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, - int (*dev_ready)(struct mtd_info *)) -{ - kirkwood_nand_data.parts = parts; - kirkwood_nand_data.nr_parts = nr_parts; - kirkwood_nand_data.dev_ready = dev_ready; - platform_device_register(&kirkwood_nand_flash); -} - -/***************************************************************************** - * SoC RTC - ****************************************************************************/ -static void __init kirkwood_rtc_init(void) -{ - orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC); -} - - -/***************************************************************************** - * SATA - ****************************************************************************/ -void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) -{ - orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); -} - - -/***************************************************************************** - * SD/SDIO/MMC - ****************************************************************************/ -static struct resource mvsdio_resources[] = { - [0] = { - .start = SDIO_PHYS_BASE, - .end = SDIO_PHYS_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_KIRKWOOD_SDIO, - .end = IRQ_KIRKWOOD_SDIO, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 mvsdio_dmamask = DMA_BIT_MASK(32); - -static struct platform_device kirkwood_sdio = { - .name = "mvsdio", - .id = -1, - .dev = { - .dma_mask = &mvsdio_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(mvsdio_resources), - .resource = mvsdio_resources, -}; - -void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */ - mvsdio_data->clock = 100000000; - else - mvsdio_data->clock = 200000000; - kirkwood_sdio.dev.platform_data = mvsdio_data; - platform_device_register(&kirkwood_sdio); -} - - -/***************************************************************************** - * SPI - ****************************************************************************/ -void __init kirkwood_spi_init(void) -{ - orion_spi_init(SPI_PHYS_BASE); -} - - -/***************************************************************************** - * I2C - ****************************************************************************/ -void __init kirkwood_i2c_init(void) -{ - orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8); -} - - -/***************************************************************************** - * UART0 - ****************************************************************************/ - -void __init kirkwood_uart0_init(void) -{ - orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, - IRQ_KIRKWOOD_UART_0, tclk); -} - - -/***************************************************************************** - * UART1 - ****************************************************************************/ -void __init kirkwood_uart1_init(void) -{ - orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, - IRQ_KIRKWOOD_UART_1, tclk); -} - -/***************************************************************************** - * Cryptographic Engines and Security Accelerator (CESA) - ****************************************************************************/ -void __init kirkwood_crypto_init(void) -{ - orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE, - KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO); -} - - -/***************************************************************************** - * XOR0 - ****************************************************************************/ -void __init kirkwood_xor0_init(void) -{ - orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, - IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); -} - - -/***************************************************************************** - * XOR1 - ****************************************************************************/ -void __init kirkwood_xor1_init(void) -{ - orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE, - IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11); -} - - -/***************************************************************************** - * Watchdog - ****************************************************************************/ -void __init kirkwood_wdt_init(void) -{ - orion_wdt_init(); -} - -/***************************************************************************** - * CPU idle - ****************************************************************************/ -static struct resource kirkwood_cpuidle_resource[] = { - { - .flags = IORESOURCE_MEM, - .start = DDR_OPERATION_BASE, - .end = DDR_OPERATION_BASE + 3, - }, -}; - -static struct platform_device kirkwood_cpuidle = { - .name = "kirkwood_cpuidle", - .id = -1, - .resource = kirkwood_cpuidle_resource, - .num_resources = 1, -}; - -void __init kirkwood_cpuidle_init(void) -{ - platform_device_register(&kirkwood_cpuidle); -} - -/***************************************************************************** - * Time handling - ****************************************************************************/ -void __init kirkwood_init_early(void) -{ - orion_time_set_base(TIMER_VIRT_BASE); -} - -int kirkwood_tclk; - -static int __init kirkwood_find_tclk(void) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - - if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) - if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) - return 200000000; - - return 166666667; -} - -void __init kirkwood_timer_init(void) -{ - kirkwood_tclk = kirkwood_find_tclk(); - - orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, - IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); -} - -/***************************************************************************** - * Audio - ****************************************************************************/ -static struct resource kirkwood_audio_resources[] = { - [0] = { - .start = AUDIO_PHYS_BASE, - .end = AUDIO_PHYS_BASE + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_KIRKWOOD_I2S, - .end = IRQ_KIRKWOOD_I2S, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct kirkwood_asoc_platform_data kirkwood_audio_data = { - .burst = 128, -}; - -static struct platform_device kirkwood_audio_device = { - .name = "mvebu-audio", - .id = -1, - .num_resources = ARRAY_SIZE(kirkwood_audio_resources), - .resource = kirkwood_audio_resources, - .dev = { - .platform_data = &kirkwood_audio_data, - }, -}; - -void __init kirkwood_audio_init(void) -{ - platform_device_register(&kirkwood_audio_device); -} - -/***************************************************************************** - * CPU Frequency - ****************************************************************************/ -static struct resource kirkwood_cpufreq_resources[] = { - [0] = { - .start = CPU_CONTROL_PHYS, - .end = CPU_CONTROL_PHYS + 3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device kirkwood_cpufreq_device = { - .name = "kirkwood-cpufreq", - .id = -1, - .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources), - .resource = kirkwood_cpufreq_resources, -}; - -void __init kirkwood_cpufreq_init(void) -{ - platform_device_register(&kirkwood_cpufreq_device); -} - -/***************************************************************************** - * General - ****************************************************************************/ -/* - * Identify device ID and revision. - */ -char * __init kirkwood_id(void) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - - if (dev == MV88F6281_DEV_ID) { - if (rev == MV88F6281_REV_Z0) - return "MV88F6281-Z0"; - else if (rev == MV88F6281_REV_A0) - return "MV88F6281-A0"; - else if (rev == MV88F6281_REV_A1) - return "MV88F6281-A1"; - else - return "MV88F6281-Rev-Unsupported"; - } else if (dev == MV88F6192_DEV_ID) { - if (rev == MV88F6192_REV_Z0) - return "MV88F6192-Z0"; - else if (rev == MV88F6192_REV_A0) - return "MV88F6192-A0"; - else if (rev == MV88F6192_REV_A1) - return "MV88F6192-A1"; - else - return "MV88F6192-Rev-Unsupported"; - } else if (dev == MV88F6180_DEV_ID) { - if (rev == MV88F6180_REV_A0) - return "MV88F6180-Rev-A0"; - else if (rev == MV88F6180_REV_A1) - return "MV88F6180-Rev-A1"; - else - return "MV88F6180-Rev-Unsupported"; - } else if (dev == MV88F6282_DEV_ID) { - if (rev == MV88F6282_REV_A0) - return "MV88F6282-Rev-A0"; - else if (rev == MV88F6282_REV_A1) - return "MV88F6282-Rev-A1"; - else - return "MV88F6282-Rev-Unsupported"; - } else { - return "Device-Unknown"; - } -} - -void __init kirkwood_setup_wins(void) -{ - mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_NAND_TARGET, - KIRKWOOD_MBUS_NAND_ATTR, - KIRKWOOD_NAND_MEM_PHYS_BASE, - KIRKWOOD_NAND_MEM_SIZE); - mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_SRAM_TARGET, - KIRKWOOD_MBUS_SRAM_ATTR, - KIRKWOOD_SRAM_PHYS_BASE, - KIRKWOOD_SRAM_SIZE); -} - -void __init kirkwood_l2_init(void) -{ -#ifdef CONFIG_CACHE_FEROCEON_L2 -#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH - writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); - feroceon_l2_init(1); -#else - writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); - feroceon_l2_init(0); -#endif -#endif -} - -void __init kirkwood_init(void) -{ - pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk); - - /* - * Disable propagation of mbus errors to the CPU local bus, - * as this causes mbus errors (which can occur for example - * for PCI aborts) to throw CPU aborts, which we're not set - * up to deal with. - */ - writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); - - BUG_ON(mvebu_mbus_init("marvell,kirkwood-mbus", - BRIDGE_WINS_BASE, BRIDGE_WINS_SZ, - DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ)); - - kirkwood_setup_wins(); - - kirkwood_l2_init(); - - /* Setup root of clk tree */ - kirkwood_clk_init(); - - /* internal devices that every board has */ - kirkwood_rtc_init(); - kirkwood_wdt_init(); - kirkwood_xor0_init(); - kirkwood_xor1_init(); - kirkwood_crypto_init(); - - kirkwood_pm_init(); - kirkwood_cpuidle_init(); -#ifdef CONFIG_KEXEC - kexec_reinit = kirkwood_enable_pcie; -#endif -} - -void kirkwood_restart(enum reboot_mode mode, const char *cmd) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h deleted file mode 100644 index 832a4e2..0000000 --- a/arch/arm/mach-kirkwood/common.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * arch/arm/mach-kirkwood/common.h - * - * Core functions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ARCH_KIRKWOOD_COMMON_H -#define __ARCH_KIRKWOOD_COMMON_H - -#include - -struct dsa_platform_data; -struct mv643xx_eth_platform_data; -struct mv_sata_platform_data; -struct mvsdio_platform_data; -struct mtd_partition; -struct mtd_info; -struct kirkwood_asoc_platform_data; - -#define KW_PCIE0 (1 << 0) -#define KW_PCIE1 (1 << 1) - -/* - * Basic Kirkwood init functions used early by machine-setup. - */ -void kirkwood_map_io(void); -void kirkwood_init(void); -void kirkwood_init_early(void); -void kirkwood_init_irq(void); - -void kirkwood_setup_wins(void); - -void kirkwood_enable_pcie(void); -void kirkwood_pcie_id(u32 *dev, u32 *rev); - -void kirkwood_ehci_init(void); -void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); -void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data); -void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq); -void kirkwood_pcie_init(unsigned int portmask); -void kirkwood_sata_init(struct mv_sata_platform_data *sata_data); -void kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data); -void kirkwood_spi_init(void); -void kirkwood_i2c_init(void); -void kirkwood_uart0_init(void); -void kirkwood_uart1_init(void); -void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); -void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, - int (*dev_ready)(struct mtd_info *)); -void kirkwood_audio_init(void); -void kirkwood_cpuidle_init(void); -void kirkwood_cpufreq_init(void); - -void kirkwood_restart(enum reboot_mode, const char *); -void kirkwood_clk_init(void); - -/* early init functions not converted to fdt yet */ -char *kirkwood_id(void); -void kirkwood_l2_init(void); -void kirkwood_wdt_init(void); -void kirkwood_xor0_init(void); -void kirkwood_xor1_init(void); -void kirkwood_crypto_init(void); - -extern int kirkwood_tclk; -extern void kirkwood_timer_init(void); - -#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) - -#endif diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c deleted file mode 100644 index 4534180..0000000 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ /dev/null @@ -1,231 +0,0 @@ -/* - * arch/arm/mach-kirkwood/d2net_v2-setup.c - * - * LaCie d2 Network Space v2 Board Setup - * - * Copyright (C) 2010 Simon Guinot - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" -#include "lacie_v2-common.h" - -/***************************************************************************** - * Ethernet - ****************************************************************************/ - -static struct mv643xx_eth_platform_data d2net_v2_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -/***************************************************************************** - * SATA - ****************************************************************************/ - -static struct mv_sata_platform_data d2net_v2_sata_data = { - .n_ports = 2, -}; - -/***************************************************************************** - * GPIO keys - ****************************************************************************/ - -#define D2NET_V2_GPIO_PUSH_BUTTON 34 -#define D2NET_V2_GPIO_POWER_SWITCH_ON 13 -#define D2NET_V2_GPIO_POWER_SWITCH_OFF 15 - -#define D2NET_V2_SWITCH_POWER_ON 0x1 -#define D2NET_V2_SWITCH_POWER_OFF 0x2 - -static struct gpio_keys_button d2net_v2_buttons[] = { - [0] = { - .type = EV_SW, - .code = D2NET_V2_SWITCH_POWER_ON, - .gpio = D2NET_V2_GPIO_POWER_SWITCH_ON, - .desc = "Back power switch (on|auto)", - .active_low = 0, - }, - [1] = { - .type = EV_SW, - .code = D2NET_V2_SWITCH_POWER_OFF, - .gpio = D2NET_V2_GPIO_POWER_SWITCH_OFF, - .desc = "Back power switch (auto|off)", - .active_low = 0, - }, - [2] = { - .code = KEY_POWER, - .gpio = D2NET_V2_GPIO_PUSH_BUTTON, - .desc = "Front Push Button", - .active_low = 1, - }, -}; - -static struct gpio_keys_platform_data d2net_v2_button_data = { - .buttons = d2net_v2_buttons, - .nbuttons = ARRAY_SIZE(d2net_v2_buttons), -}; - -static struct platform_device d2net_v2_gpio_buttons = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &d2net_v2_button_data, - }, -}; - -/***************************************************************************** - * GPIO LEDs - ****************************************************************************/ - -#define D2NET_V2_GPIO_RED_LED 12 - -static struct gpio_led d2net_v2_gpio_led_pins[] = { - { - .name = "d2net_v2:red:fail", - .gpio = D2NET_V2_GPIO_RED_LED, - }, -}; - -static struct gpio_led_platform_data d2net_v2_gpio_leds_data = { - .num_leds = ARRAY_SIZE(d2net_v2_gpio_led_pins), - .leds = d2net_v2_gpio_led_pins, -}; - -static struct platform_device d2net_v2_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &d2net_v2_gpio_leds_data, - }, -}; - -/***************************************************************************** - * Dual-GPIO CPLD LEDs - ****************************************************************************/ - -#define D2NET_V2_GPIO_BLUE_LED_SLOW 29 -#define D2NET_V2_GPIO_BLUE_LED_CMD 30 - -static struct ns2_led d2net_v2_led_pins[] = { - { - .name = "d2net_v2:blue:sata", - .cmd = D2NET_V2_GPIO_BLUE_LED_CMD, - .slow = D2NET_V2_GPIO_BLUE_LED_SLOW, - }, -}; - -static struct ns2_led_platform_data d2net_v2_leds_data = { - .num_leds = ARRAY_SIZE(d2net_v2_led_pins), - .leds = d2net_v2_led_pins, -}; - -static struct platform_device d2net_v2_leds = { - .name = "leds-ns2", - .id = -1, - .dev = { - .platform_data = &d2net_v2_leds_data, - }, -}; - -/***************************************************************************** - * General Setup - ****************************************************************************/ - -static unsigned int d2net_v2_mpp_config[] __initdata = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Request power-off */ - MPP8_TW0_SDA, - MPP9_TW0_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP12_GPO, /* Red led */ - MPP13_GPIO, /* Rear power switch (on|auto) */ - MPP14_GPIO, /* USB fuse */ - MPP15_GPIO, /* Rear power switch (auto|off) */ - MPP16_GPIO, /* SATA 0 power */ - MPP21_SATA0_ACTn, - MPP24_GPIO, /* USB mode select */ - MPP26_GPIO, /* USB device vbus */ - MPP28_GPIO, /* USB enable host vbus */ - MPP29_GPIO, /* Blue led (slow register) */ - MPP30_GPIO, /* Blue led (command register) */ - MPP34_GPIO, /* Power button (1 = Released, 0 = Pushed) */ - MPP35_GPIO, /* Inhibit power-off */ - 0 -}; - -#define D2NET_V2_GPIO_POWER_OFF 7 - -static void d2net_v2_power_off(void) -{ - gpio_set_value(D2NET_V2_GPIO_POWER_OFF, 1); -} - -static void __init d2net_v2_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(d2net_v2_mpp_config); - - lacie_v2_hdd_power_init(1); - - kirkwood_ehci_init(); - kirkwood_ge00_init(&d2net_v2_ge00_data); - kirkwood_sata_init(&d2net_v2_sata_data); - kirkwood_uart0_init(); - lacie_v2_register_flash(); - lacie_v2_register_i2c_devices(); - - platform_device_register(&d2net_v2_leds); - platform_device_register(&d2net_v2_gpio_leds); - platform_device_register(&d2net_v2_gpio_buttons); - - if (gpio_request(D2NET_V2_GPIO_POWER_OFF, "power-off") == 0 && - gpio_direction_output(D2NET_V2_GPIO_POWER_OFF, 0) == 0) - pm_power_off = d2net_v2_power_off; - else - pr_err("d2net_v2: failed to configure power-off GPIO\n"); -} - -MACHINE_START(D2NET_V2, "LaCie d2 Network v2") - .atag_offset = 0x100, - .init_machine = d2net_v2_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .init_time = kirkwood_timer_init, - .restart = kirkwood_restart, -MACHINE_END diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h deleted file mode 100644 index 1c37082..0000000 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/bridge-regs.h - * - * Mbus-L to Mbus Bridge Registers - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_BRIDGE_REGS_H -#define __ASM_ARCH_BRIDGE_REGS_H - -#include - -#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100) -#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100) -#define CPU_CONFIG_ERROR_PROP 0x00000004 - -#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) -#define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104) -#define CPU_RESET 0x00000002 - -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) -#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 - -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) -#define SOFT_RESET 0x00000001 - -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) - -#define BRIDGE_INT_TIMER1_CLR (~0x0004) - -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) -#define IRQ_CAUSE_LOW_OFF 0x0000 -#define IRQ_MASK_LOW_OFF 0x0004 -#define IRQ_CAUSE_HIGH_OFF 0x0010 -#define IRQ_MASK_HIGH_OFF 0x0014 - -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) -#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) - -#define L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128) -#define L2_WRITETHROUGH 0x00000010 - -#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c) -#define CGC_BIT_GE0 (0) -#define CGC_BIT_PEX0 (2) -#define CGC_BIT_USB0 (3) -#define CGC_BIT_SDIO (4) -#define CGC_BIT_TSU (5) -#define CGC_BIT_DUNIT (6) -#define CGC_BIT_RUNIT (7) -#define CGC_BIT_XOR0 (8) -#define CGC_BIT_AUDIO (9) -#define CGC_BIT_SATA0 (14) -#define CGC_BIT_SATA1 (15) -#define CGC_BIT_XOR1 (16) -#define CGC_BIT_CRYPTO (17) -#define CGC_BIT_PEX1 (18) -#define CGC_BIT_GE1 (19) -#define CGC_BIT_TDM (20) -#define CGC_GE0 (1 << 0) -#define CGC_PEX0 (1 << 2) -#define CGC_USB0 (1 << 3) -#define CGC_SDIO (1 << 4) -#define CGC_TSU (1 << 5) -#define CGC_DUNIT (1 << 6) -#define CGC_RUNIT (1 << 7) -#define CGC_XOR0 (1 << 8) -#define CGC_AUDIO (1 << 9) -#define CGC_POWERSAVE (1 << 11) -#define CGC_SATA0 (1 << 14) -#define CGC_SATA1 (1 << 15) -#define CGC_XOR1 (1 << 16) -#define CGC_CRYPTO (1 << 17) -#define CGC_PEX1 (1 << 18) -#define CGC_GE1 (1 << 19) -#define CGC_TDM (1 << 20) -#define CGC_RESERVED (0x6 << 21) - -#define MEMORY_PM_CTRL (BRIDGE_VIRT_BASE + 0x118) -#define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x118) - -#endif diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S deleted file mode 100644 index 82db29f..0000000 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ /dev/null @@ -1,34 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Kirkwood platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no low interrupts set, check high interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] - mov \irqnr, #63 - ands \irqstat, \irqstat, \tmp - - @ find first active interrupt source -1001: clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/mach-kirkwood/include/mach/hardware.h b/arch/arm/mach-kirkwood/include/mach/hardware.h deleted file mode 100644 index 742b74f..0000000 --- a/arch/arm/mach-kirkwood/include/mach/hardware.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/hardware.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "kirkwood.h" - -#endif diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h deleted file mode 100644 index 2bf8161..0000000 --- a/arch/arm/mach-kirkwood/include/mach/irqs.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/irqs.h - * - * IRQ definitions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -/* - * Low Interrupt Controller - */ -#define IRQ_KIRKWOOD_HIGH_SUM 0 -#define IRQ_KIRKWOOD_BRIDGE 1 -#define IRQ_KIRKWOOD_HOST2CPU 2 -#define IRQ_KIRKWOOD_CPU2HOST 3 -#define IRQ_KIRKWOOD_XOR_00 5 -#define IRQ_KIRKWOOD_XOR_01 6 -#define IRQ_KIRKWOOD_XOR_10 7 -#define IRQ_KIRKWOOD_XOR_11 8 -#define IRQ_KIRKWOOD_PCIE 9 -#define IRQ_KIRKWOOD_PCIE1 10 -#define IRQ_KIRKWOOD_GE00_SUM 11 -#define IRQ_KIRKWOOD_GE01_SUM 15 -#define IRQ_KIRKWOOD_USB 19 -#define IRQ_KIRKWOOD_SATA 21 -#define IRQ_KIRKWOOD_CRYPTO 22 -#define IRQ_KIRKWOOD_SPI 23 -#define IRQ_KIRKWOOD_I2S 24 -#define IRQ_KIRKWOOD_TS_0 26 -#define IRQ_KIRKWOOD_SDIO 28 -#define IRQ_KIRKWOOD_TWSI 29 -#define IRQ_KIRKWOOD_AVB 30 -#define IRQ_KIRKWOOD_TDMI 31 - -/* - * High Interrupt Controller - */ -#define IRQ_KIRKWOOD_UART_0 33 -#define IRQ_KIRKWOOD_UART_1 34 -#define IRQ_KIRKWOOD_GPIO_LOW_0_7 35 -#define IRQ_KIRKWOOD_GPIO_LOW_8_15 36 -#define IRQ_KIRKWOOD_GPIO_LOW_16_23 37 -#define IRQ_KIRKWOOD_GPIO_LOW_24_31 38 -#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 -#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 -#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 -#define IRQ_KIRKWOOD_GE00_ERR 46 -#define IRQ_KIRKWOOD_GE01_ERR 47 -#define IRQ_KIRKWOOD_RTC 53 - -/* - * KIRKWOOD General Purpose Pins - */ -#define IRQ_KIRKWOOD_GPIO_START 64 -#define NR_GPIO_IRQS 50 - -#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS) - - -#endif diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h deleted file mode 100644 index 92976ce..0000000 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/kirkwood.h - * - * Generic definitions for Marvell Kirkwood SoC flavors: - * 88F6180, 88F6192 and 88F6281. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_KIRKWOOD_H -#define __ASM_ARCH_KIRKWOOD_H - -/* - * Marvell Kirkwood address maps. - * - * phys - * e0000000 PCIe #0 Memory space - * e8000000 PCIe #1 Memory space - * f1000000 on-chip peripheral registers - * f2000000 PCIe #0 I/O space - * f3000000 PCIe #1 I/O space - * f4000000 NAND controller address window - * f5000000 Security Accelerator SRAM - * - * virt phys size - * fed00000 f1000000 1M on-chip peripheral registers - * fee00000 f2000000 1M PCIe #0 I/O space - * fef00000 f3000000 1M PCIe #1 I/O space - */ - -#define KIRKWOOD_SRAM_PHYS_BASE 0xf5000000 -#define KIRKWOOD_SRAM_SIZE SZ_2K - -#define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf4000000 -#define KIRKWOOD_NAND_MEM_SIZE SZ_1K - -#define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000 -#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000 -#define KIRKWOOD_PCIE1_IO_SIZE SZ_64K - -#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 -#define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000 -#define KIRKWOOD_PCIE_IO_SIZE SZ_64K - -#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000 -#define KIRKWOOD_REGS_VIRT_BASE IOMEM(0xfed00000) -#define KIRKWOOD_REGS_SIZE SZ_1M - -#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 -#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000 -#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M - -#define KIRKWOOD_PCIE1_MEM_PHYS_BASE 0xe8000000 -#define KIRKWOOD_PCIE1_MEM_BUS_BASE 0xe8000000 -#define KIRKWOOD_PCIE1_MEM_SIZE SZ_128M - -/* - * Register Map - */ -#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x00000) -#define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000) -#define DDR_WINDOW_CPU_BASE (DDR_PHYS_BASE + 0x1500) -#define DDR_WINDOW_CPU_SZ (0x20) -#define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418) - -#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x10000) -#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x10000) -#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030) -#define DEVICE_ID (DEV_BUS_VIRT_BASE + 0x0034) -#define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0100) -#define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0140) -#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0300) -#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0600) -#define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1000) -#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2000) -#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2000) -#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2100) -#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2100) - -#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x20000) -#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000) -#define BRIDGE_WINS_BASE (BRIDGE_PHYS_BASE) -#define BRIDGE_WINS_SZ (0x80) - -#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x30000) - -#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x40000) -#define PCIE_LINK_CTRL (PCIE_VIRT_BASE + 0x70) -#define PCIE_STATUS (PCIE_VIRT_BASE + 0x1a04) -#define PCIE1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x44000) -#define PCIE1_LINK_CTRL (PCIE1_VIRT_BASE + 0x70) -#define PCIE1_STATUS (PCIE1_VIRT_BASE + 0x1a04) - -#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x50000) - -#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60800) -#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60800) -#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60900) -#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60900) -#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60A00) -#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60A00) -#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60B00) -#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60B00) - -#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x70000) -#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x74000) - -#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x80000) -#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x80000) -#define SATA0_IF_CTRL (SATA_VIRT_BASE + 0x2050) -#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE + 0x2330) -#define SATA1_IF_CTRL (SATA_VIRT_BASE + 0x4050) -#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE + 0x4330) - -#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x90000) - -#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0xA0000) -#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0xA0000) - -/* - * Supported devices and revisions. - */ -#define MV88F6281_DEV_ID 0x6281 -#define MV88F6281_REV_Z0 0 -#define MV88F6281_REV_A0 2 -#define MV88F6281_REV_A1 3 - -#define MV88F6192_DEV_ID 0x6192 -#define MV88F6192_REV_Z0 0 -#define MV88F6192_REV_A0 2 -#define MV88F6192_REV_A1 3 - -#define MV88F6180_DEV_ID 0x6180 -#define MV88F6180_REV_A0 2 -#define MV88F6180_REV_A1 3 - -#define MV88F6282_DEV_ID 0x6282 -#define MV88F6282_REV_A0 0 -#define MV88F6282_REV_A1 1 -#endif diff --git a/arch/arm/mach-kirkwood/include/mach/uncompress.h b/arch/arm/mach-kirkwood/include/mach/uncompress.h deleted file mode 100644 index 5bca553..0000000 --- a/arch/arm/mach-kirkwood/include/mach/uncompress.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/uncompress.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c deleted file mode 100644 index 2c47a8a..0000000 --- a/arch/arm/mach-kirkwood/irq.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * arch/arm/mach-kirkwood/irq.c - * - * Kirkwood IRQ handling. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" - -static int __initdata gpio0_irqs[4] = { - IRQ_KIRKWOOD_GPIO_LOW_0_7, - IRQ_KIRKWOOD_GPIO_LOW_8_15, - IRQ_KIRKWOOD_GPIO_LOW_16_23, - IRQ_KIRKWOOD_GPIO_LOW_24_31, -}; - -static int __initdata gpio1_irqs[4] = { - IRQ_KIRKWOOD_GPIO_HIGH_0_7, - IRQ_KIRKWOOD_GPIO_HIGH_8_15, - IRQ_KIRKWOOD_GPIO_HIGH_16_23, - 0, -}; - -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* - * Compiling with both non-DT and DT support enabled, will - * break asm irq handler used by non-DT boards. Therefore, - * we provide a C-style irq handler even for non-DT boards, - * if MULTI_IRQ_HANDLER is set. - */ - -static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE; - -asmlinkage void -__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs) -{ - u32 stat; - - stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF); - stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF); - if (stat) { - unsigned int hwirq = __fls(stat); - handle_IRQ(hwirq, regs); - return; - } - stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF); - stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF); - if (stat) { - unsigned int hwirq = 32 + __fls(stat); - handle_IRQ(hwirq, regs); - return; - } -} -#endif - -void __init kirkwood_init_irq(void) -{ - orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); - orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); - -#ifdef CONFIG_MULTI_IRQ_HANDLER - set_handle_irq(kirkwood_legacy_handle_irq); -#endif - - /* - * Initialize gpiolib for GPIOs 0-49. - */ - orion_gpio_init(NULL, 0, 32, GPIO_LOW_VIRT_BASE, 0, - IRQ_KIRKWOOD_GPIO_START, gpio0_irqs); - orion_gpio_init(NULL, 32, 18, GPIO_HIGH_VIRT_BASE, 0, - IRQ_KIRKWOOD_GPIO_START + 32, gpio1_irqs); -} diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c deleted file mode 100644 index 8e3e433..0000000 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * arch/arm/mach-kirkwood/lacie_v2-common.c - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "lacie_v2-common.h" - -/***************************************************************************** - * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005) - ****************************************************************************/ - -static struct mtd_partition lacie_v2_flash_parts[] = { - { - .name = "u-boot", - .size = MTDPART_SIZ_FULL, - .offset = 0, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, -}; - -static const struct flash_platform_data lacie_v2_flash = { - .type = "mx25l4005a", - .name = "spi_flash", - .parts = lacie_v2_flash_parts, - .nr_parts = ARRAY_SIZE(lacie_v2_flash_parts), -}; - -static struct spi_board_info __initdata lacie_v2_spi_slave_info[] = { - { - .modalias = "m25p80", - .platform_data = &lacie_v2_flash, - .irq = -1, - .max_speed_hz = 20000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -void __init lacie_v2_register_flash(void) -{ - spi_register_board_info(lacie_v2_spi_slave_info, - ARRAY_SIZE(lacie_v2_spi_slave_info)); - kirkwood_spi_init(); -} - -/***************************************************************************** - * I2C devices - ****************************************************************************/ - -static struct at24_platform_data at24c04 = { - .byte_len = SZ_4K / 8, - .page_size = 16, -}; - -/* - * i2c addr | chip | description - * 0x50 | HT24LC04 | eeprom (512B) - */ - -static struct i2c_board_info __initdata lacie_v2_i2c_info[] = { - { - I2C_BOARD_INFO("24c04", 0x50), - .platform_data = &at24c04, - } -}; - -void __init lacie_v2_register_i2c_devices(void) -{ - kirkwood_i2c_init(); - i2c_register_board_info(0, lacie_v2_i2c_info, - ARRAY_SIZE(lacie_v2_i2c_info)); -} - -/***************************************************************************** - * Hard Disk power - ****************************************************************************/ - -static int __initdata lacie_v2_gpio_hdd_power[] = { 16, 17, 41, 42, 43 }; - -void __init lacie_v2_hdd_power_init(int hdd_num) -{ - int i; - int err; - - /* Power up all hard disks. */ - for (i = 0; i < hdd_num; i++) { - err = gpio_request(lacie_v2_gpio_hdd_power[i], NULL); - if (err == 0) { - err = gpio_direction_output( - lacie_v2_gpio_hdd_power[i], 1); - /* Free the HDD power GPIOs. This allow user-space to - * configure them via the gpiolib sysfs interface. */ - gpio_free(lacie_v2_gpio_hdd_power[i]); - } - if (err) - pr_err("Failed to power up HDD%d\n", i + 1); - } -} diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h deleted file mode 100644 index fc64f57..0000000 --- a/arch/arm/mach-kirkwood/lacie_v2-common.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * arch/arm/mach-kirkwood/lacie_v2-common.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ARCH_KIRKWOOD_LACIE_V2_COMMON_H -#define __ARCH_KIRKWOOD_LACIE_V2_COMMON_H - -void lacie_v2_register_flash(void); -void lacie_v2_register_i2c_devices(void); -void lacie_v2_hdd_power_init(int hdd_num); - -#endif diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c deleted file mode 100644 index e96fd71..0000000 --- a/arch/arm/mach-kirkwood/mpp.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * arch/arm/mach-kirkwood/mpp.c - * - * MPP functions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" - -static unsigned int __init kirkwood_variant(void) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - - if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) - return MPP_F6281_MASK; - if (dev == MV88F6282_DEV_ID) - return MPP_F6282_MASK; - if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) - return MPP_F6192_MASK; - if (dev == MV88F6180_DEV_ID) - return MPP_F6180_MASK; - - pr_err("MPP setup: unknown kirkwood variant (dev %#x rev %#x)\n", - dev, rev); - return 0; -} - -void __init kirkwood_mpp_conf(unsigned int *mpp_list) -{ - orion_mpp_conf(mpp_list, kirkwood_variant(), - MPP_MAX, DEV_BUS_VIRT_BASE); -} diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h deleted file mode 100644 index d5a0d1d..0000000 --- a/arch/arm/mach-kirkwood/mpp.h +++ /dev/null @@ -1,348 +0,0 @@ -/* - * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins - * - * Copyright 2009: Marvell Technology Group Ltd. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __KIRKWOOD_MPP_H -#define __KIRKWOOD_MPP_H - -#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281, _F6282) ( \ - /* MPP number */ ((_num) & 0xff) | \ - /* MPP select value */ (((_sel) & 0xf) << 8) | \ - /* may be input signal */ ((!!(_in)) << 12) | \ - /* may be output signal */ ((!!(_out)) << 13) | \ - /* available on F6180 */ ((!!(_F6180)) << 14) | \ - /* available on F6190 */ ((!!(_F6190)) << 15) | \ - /* available on F6192 */ ((!!(_F6192)) << 16) | \ - /* available on F6281 */ ((!!(_F6281)) << 17) | \ - /* available on F6282 */ ((!!(_F6282)) << 18)) - - /* num sel i o 6180 6190 6192 6281 6282 */ - -#define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0, 0 ) -#define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0, 0 ) -#define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0, 0 ) -#define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1, 0 ) -#define MPP_F6282_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_NF_IO2 MPP( 0, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP1_NF_IO3 MPP( 1, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP2_NF_IO4 MPP( 2, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP3_NF_IO5 MPP( 3, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP3_SPI_MISO MPP( 3, 0x2, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_NF_IO6 MPP( 4, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP4_UART0_RXD MPP( 4, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP4_LCD_VGA_HSYNC MPP( 4, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP4_PTP_CLK MPP( 4, 0xd, 0, 0, 1, 1, 1, 1, 0 ) - -#define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP5_NF_IO7 MPP( 5, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP5_LCD_VGA_VSYNC MPP( 5, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 0, 1, 1, 1, 1, 0 ) - -#define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP7_LCD_PWM MPP( 7, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_TW0_SDA MPP( 8, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP8_MII0_RXERR MPP( 8, 0x4, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP8_PTP_CLK MPP( 8, 0xc, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP8_MII0_COL MPP( 8, 0xd, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_TW0_SCK MPP( 9, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP9_UART0_CTS MPP( 9, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP9_UART1_CTS MPP( 9, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP9_MII0_CRS MPP( 9, 0xd, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP10_UART0_TXD MPP( 10, 0X3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 0, 1, 1, 1, 1, 0 ) - -#define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP11_SPI_MISO MPP( 11, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP11_UART0_RXD MPP( 11, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP11_PTP_CLK MPP( 11, 0xd, 0, 0, 1, 1, 1, 1, 0 ) -#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 0, 0, 1, 1, 1, 1 ) - -#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP12_GPIO MPP( 12, 0x0, 1, 1, 0, 0, 0, 1, 0 ) -#define MPP12_SD_CLK MPP( 12, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP12_TW1_SDA MPP( 12, 0xd, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_SD_CMD MPP( 13, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP13_LCDPWM MPP( 13, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_SD_D0 MPP( 14, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP14_UART1_RXD MPP( 14, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP14_AU_SPDIFI MPP( 14, 0xa, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP14_AU_I2SDI MPP( 14, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP14_MII0_COL MPP( 14, 0xd, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SD_D1 MPP( 15, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP15_SPI_CSn MPP( 15, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_SD_D2 MPP( 16, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP16_UART0_CTS MPP( 16, 0x2, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP16_UART1_RXD MPP( 16, 0x3, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP16_MII0_CRS MPP( 16, 0xd, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SD_D3 MPP( 17, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP17_TW1_SCK MPP( 17, 0xd, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP18_NF_IO0 MPP( 18, 0x1, 0, 0, 1, 1, 1, 1, 1 ) -#define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -#define MPP19_NF_IO1 MPP( 19, 0x1, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP20_TSMP0 MPP( 20, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP20_GE1_TXD0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP20_AU_SPDIFI MPP( 20, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP20_LCD_D0 MPP( 20, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP21_TSMP1 MPP( 21, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP21_GE1_TXD1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP21_LCD_D1 MPP( 21, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP22_TSMP2 MPP( 22, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP22_GE1_TXD2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP22_LCD_D2 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP23_TSMP3 MPP( 23, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP23_GE1_TXD3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP23_LCD_D3 MPP( 23, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP24_TSMP4 MPP( 24, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP24_GE1_RXD0 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP24_LCD_D4 MPP( 24, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP25_TSMP5 MPP( 25, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP25_GE1_RXD1 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP25_LCD_D5 MPP( 25, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP26_TSMP6 MPP( 26, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP26_GE1_RXD2 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP26_LCD_D6 MPP( 26, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP27_TSMP7 MPP( 27, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP27_GE1_RXD3 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP27_AU_I2SDI MPP( 27, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP27_LCD_D7 MPP( 27, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP28_TSMP8 MPP( 28, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP28_GE1_COL MPP( 28, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP28_AU_EXTCLK MPP( 28, 0x4, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP28_LCD_D8 MPP( 28, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP29_TSMP9 MPP( 29, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP29_GE1_TCLK MPP( 29, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP29_LCD_D9 MPP( 29, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP30_TSMP10 MPP( 30, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP30_TDM_PCLK MPP( 30, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP30_GE1_RXCTL MPP( 30, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP30_LCD_D10 MPP( 30, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP31_TSMP11 MPP( 31, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP31_TDM_FS MPP( 31, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP31_GE1_RXCLK MPP( 31, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP31_LCD_D11 MPP( 31, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP32_TSMP12 MPP( 32, 0x1, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP32_TDM_DRX MPP( 32, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP32_GE1_TCLKOUT MPP( 32, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP32_LCD_D12 MPP( 32, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP33_GPO MPP( 33, 0x0, 0, 1, 0, 1, 1, 1, 1 ) -#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP33_GE1_TXCTL MPP( 33, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP33_LCD_D13 MPP( 33, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1, 1 ) -#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP34_GE1_TXEN MPP( 34, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP34_LCD_D14 MPP( 34, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1, 1 ) -#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 0, 0, 0, 1, 1, 1 ) -#define MPP35_GE1_RXERR MPP( 35, 0x3, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 0, 0, 1, 1, 1, 1 ) -#define MPP35_LCD_D15 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP35_MII0_RXERR MPP( 35, 0xc, 0, 0, 1, 1, 1, 1, 1 ) - -#define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP36_TSMP0 MPP( 36, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP36_AU_SPDIFI MPP( 36, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP36_TW1_SDA MPP( 36, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP37_TSMP1 MPP( 37, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP37_TW1_SCK MPP( 37, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP38_TSMP2 MPP( 38, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP38_LCD_D18 MPP( 38, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP39_TSMP3 MPP( 39, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP39_LCD_D19 MPP( 39, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP40_TSMP4 MPP( 40, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP40_LCD_D20 MPP( 40, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP41_TSMP5 MPP( 41, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP41_LCD_D21 MPP( 41, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP42_TSMP6 MPP( 42, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP42_LCD_D22 MPP( 42, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP43_TSMP7 MPP( 43, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP43_AU_I2SDI MPP( 43, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP43_LCD_D23 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1, 1 ) -#define MPP44_TSMP8 MPP( 44, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP44_AU_EXTCLK MPP( 44, 0x4, 0, 0, 1, 0, 0, 1, 1 ) -#define MPP44_LCD_CLK MPP( 44, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP45_TSMP9 MPP( 45, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP45_TDM_PCLK MPP( 45, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP245_LCD_E MPP( 45, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP46_TSMP10 MPP( 46, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP46_TDM_FS MPP( 46, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP46_LCD_HSYNC MPP( 46, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP47_TSMP11 MPP( 47, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP47_TDM_DRX MPP( 47, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP47_LCD_VSYNC MPP( 47, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1, 1 ) -#define MPP48_TSMP12 MPP( 48, 0x1, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP48_LCD_D16 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1, 0 ) -#define MPP49_GPO MPP( 49, 0x0, 0, 1, 0, 0, 0, 0, 1 ) -#define MPP49_TSMP9 MPP( 49, 0x1, 0, 0, 0, 0, 0, 1, 0 ) -#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 0, 0, 0, 0, 1, 1 ) -#define MPP49_PTP_CLK MPP( 49, 0x5, 0, 0, 0, 0, 0, 1, 0 ) -#define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 0, 0, 0, 0, 0, 1 ) -#define MPP49_LCD_D17 MPP( 49, 0xb, 0, 0, 0, 0, 0, 0, 1 ) - -#define MPP_MAX 49 - -void kirkwood_mpp_conf(unsigned int *mpp_list); - -#endif diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c deleted file mode 100644 index 913d032..0000000 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ /dev/null @@ -1,422 +0,0 @@ -/* - * arch/arm/mach-kirkwood/netxbig_v2-setup.c - * - * LaCie 2Big and 5Big Network v2 board setup - * - * Copyright (C) 2010 Simon Guinot - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" -#include "lacie_v2-common.h" - -/***************************************************************************** - * Ethernet - ****************************************************************************/ - -static struct mv643xx_eth_platform_data netxbig_v2_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -static struct mv643xx_eth_platform_data netxbig_v2_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), -}; - -/***************************************************************************** - * SATA - ****************************************************************************/ - -static struct mv_sata_platform_data netxbig_v2_sata_data = { - .n_ports = 2, -}; - -/***************************************************************************** - * GPIO keys - ****************************************************************************/ - -#define NETXBIG_V2_GPIO_SWITCH_POWER_ON 13 -#define NETXBIG_V2_GPIO_SWITCH_POWER_OFF 15 -#define NETXBIG_V2_GPIO_FUNC_BUTTON 34 - -#define NETXBIG_V2_SWITCH_POWER_ON 0x1 -#define NETXBIG_V2_SWITCH_POWER_OFF 0x2 - -static struct gpio_keys_button netxbig_v2_buttons[] = { - [0] = { - .type = EV_SW, - .code = NETXBIG_V2_SWITCH_POWER_ON, - .gpio = NETXBIG_V2_GPIO_SWITCH_POWER_ON, - .desc = "Back power switch (on|auto)", - .active_low = 1, - }, - [1] = { - .type = EV_SW, - .code = NETXBIG_V2_SWITCH_POWER_OFF, - .gpio = NETXBIG_V2_GPIO_SWITCH_POWER_OFF, - .desc = "Back power switch (auto|off)", - .active_low = 1, - }, - [2] = { - .code = KEY_OPTION, - .gpio = NETXBIG_V2_GPIO_FUNC_BUTTON, - .desc = "Function button", - .active_low = 1, - }, -}; - -static struct gpio_keys_platform_data netxbig_v2_button_data = { - .buttons = netxbig_v2_buttons, - .nbuttons = ARRAY_SIZE(netxbig_v2_buttons), -}; - -static struct platform_device netxbig_v2_gpio_buttons = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &netxbig_v2_button_data, - }, -}; - -/***************************************************************************** - * GPIO extension LEDs - ****************************************************************************/ - -/* - * The LEDs are controlled by a CPLD and can be configured through a GPIO - * extension bus: - * - * - address register : bit [0-2] -> GPIO [47-49] - * - data register : bit [0-2] -> GPIO [44-46] - * - enable register : GPIO 29 - */ - -static int netxbig_v2_gpio_ext_addr[] = { 47, 48, 49 }; -static int netxbig_v2_gpio_ext_data[] = { 44, 45, 46 }; - -static struct netxbig_gpio_ext netxbig_v2_gpio_ext = { - .addr = netxbig_v2_gpio_ext_addr, - .num_addr = ARRAY_SIZE(netxbig_v2_gpio_ext_addr), - .data = netxbig_v2_gpio_ext_data, - .num_data = ARRAY_SIZE(netxbig_v2_gpio_ext_data), - .enable = 29, -}; - -/* - * Address register selection: - * - * addr | register - * ---------------------------- - * 0 | front LED - * 1 | front LED brightness - * 2 | SATA LED brightness - * 3 | SATA0 LED - * 4 | SATA1 LED - * 5 | SATA2 LED - * 6 | SATA3 LED - * 7 | SATA4 LED - * - * Data register configuration: - * - * data | LED brightness - * ------------------------------------------------- - * 0 | min (off) - * - | - - * 7 | max - * - * data | front LED mode - * ------------------------------------------------- - * 0 | fix off - * 1 | fix blue on - * 2 | fix red on - * 3 | blink blue on=1 sec and blue off=1 sec - * 4 | blink red on=1 sec and red off=1 sec - * 5 | blink blue on=2.5 sec and red on=0.5 sec - * 6 | blink blue on=1 sec and red on=1 sec - * 7 | blink blue on=0.5 sec and blue off=2.5 sec - * - * data | SATA LED mode - * ------------------------------------------------- - * 0 | fix off - * 1 | SATA activity blink - * 2 | fix red on - * 3 | blink blue on=1 sec and blue off=1 sec - * 4 | blink red on=1 sec and red off=1 sec - * 5 | blink blue on=2.5 sec and red on=0.5 sec - * 6 | blink blue on=1 sec and red on=1 sec - * 7 | fix blue on - */ - -static int netxbig_v2_red_mled[NETXBIG_LED_MODE_NUM] = { - [NETXBIG_LED_OFF] = 0, - [NETXBIG_LED_ON] = 2, - [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, - [NETXBIG_LED_TIMER1] = 4, - [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, -}; - -static int netxbig_v2_blue_pwr_mled[NETXBIG_LED_MODE_NUM] = { - [NETXBIG_LED_OFF] = 0, - [NETXBIG_LED_ON] = 1, - [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, - [NETXBIG_LED_TIMER1] = 3, - [NETXBIG_LED_TIMER2] = 7, -}; - -static int netxbig_v2_blue_sata_mled[NETXBIG_LED_MODE_NUM] = { - [NETXBIG_LED_OFF] = 0, - [NETXBIG_LED_ON] = 7, - [NETXBIG_LED_SATA] = 1, - [NETXBIG_LED_TIMER1] = 3, - [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, -}; - -static struct netxbig_led_timer netxbig_v2_led_timer[] = { - [0] = { - .delay_on = 500, - .delay_off = 500, - .mode = NETXBIG_LED_TIMER1, - }, - [1] = { - .delay_on = 500, - .delay_off = 1000, - .mode = NETXBIG_LED_TIMER2, - }, -}; - -#define NETXBIG_LED(_name, maddr, mval, baddr) \ - { .name = _name, \ - .mode_addr = maddr, \ - .mode_val = mval, \ - .bright_addr = baddr } - -static struct netxbig_led net2big_v2_leds_ctrl[] = { - NETXBIG_LED("net2big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), - NETXBIG_LED("net2big-v2:red:power", 0, netxbig_v2_red_mled, 1), - NETXBIG_LED("net2big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net2big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), - NETXBIG_LED("net2big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net2big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), -}; - -static struct netxbig_led_platform_data net2big_v2_leds_data = { - .gpio_ext = &netxbig_v2_gpio_ext, - .timer = netxbig_v2_led_timer, - .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), - .leds = net2big_v2_leds_ctrl, - .num_leds = ARRAY_SIZE(net2big_v2_leds_ctrl), -}; - -static struct netxbig_led net5big_v2_leds_ctrl[] = { - NETXBIG_LED("net5big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), - NETXBIG_LED("net5big-v2:red:power", 0, netxbig_v2_red_mled, 1), - NETXBIG_LED("net5big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net5big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), - NETXBIG_LED("net5big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net5big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), - NETXBIG_LED("net5big-v2:blue:sata2", 5, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net5big-v2:red:sata2", 5, netxbig_v2_red_mled, 2), - NETXBIG_LED("net5big-v2:blue:sata3", 6, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net5big-v2:red:sata3", 6, netxbig_v2_red_mled, 2), - NETXBIG_LED("net5big-v2:blue:sata4", 7, netxbig_v2_blue_sata_mled, 2), - NETXBIG_LED("net5big-v2:red:sata5", 7, netxbig_v2_red_mled, 2), -}; - -static struct netxbig_led_platform_data net5big_v2_leds_data = { - .gpio_ext = &netxbig_v2_gpio_ext, - .timer = netxbig_v2_led_timer, - .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), - .leds = net5big_v2_leds_ctrl, - .num_leds = ARRAY_SIZE(net5big_v2_leds_ctrl), -}; - -static struct platform_device netxbig_v2_leds = { - .name = "leds-netxbig", - .id = -1, - .dev = { - .platform_data = &net2big_v2_leds_data, - }, -}; - -/***************************************************************************** - * General Setup - ****************************************************************************/ - -static unsigned int net2big_v2_mpp_config[] __initdata = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Request power-off */ - MPP8_TW0_SDA, - MPP9_TW0_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP13_GPIO, /* Rear power switch (on|auto) */ - MPP14_GPIO, /* USB fuse alarm */ - MPP15_GPIO, /* Rear power switch (auto|off) */ - MPP16_GPIO, /* SATA HDD1 power */ - MPP17_GPIO, /* SATA HDD2 power */ - MPP20_SATA1_ACTn, - MPP21_SATA0_ACTn, - MPP24_GPIO, /* USB mode select */ - MPP26_GPIO, /* USB device vbus */ - MPP28_GPIO, /* USB enable host vbus */ - MPP29_GPIO, /* GPIO extension ALE */ - MPP34_GPIO, /* Rear Push button */ - MPP35_GPIO, /* Inhibit switch power-off */ - MPP36_GPIO, /* SATA HDD1 presence */ - MPP37_GPIO, /* SATA HDD2 presence */ - MPP40_GPIO, /* eSATA presence */ - MPP44_GPIO, /* GPIO extension (data 0) */ - MPP45_GPIO, /* GPIO extension (data 1) */ - MPP46_GPIO, /* GPIO extension (data 2) */ - MPP47_GPIO, /* GPIO extension (addr 0) */ - MPP48_GPIO, /* GPIO extension (addr 1) */ - MPP49_GPIO, /* GPIO extension (addr 2) */ - 0 -}; - -static unsigned int net5big_v2_mpp_config[] __initdata = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Request power-off */ - MPP8_TW0_SDA, - MPP9_TW0_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP13_GPIO, /* Rear power switch (on|auto) */ - MPP14_GPIO, /* USB fuse alarm */ - MPP15_GPIO, /* Rear power switch (auto|off) */ - MPP16_GPIO, /* SATA HDD1 power */ - MPP17_GPIO, /* SATA HDD2 power */ - MPP20_GE1_TXD0, - MPP21_GE1_TXD1, - MPP22_GE1_TXD2, - MPP23_GE1_TXD3, - MPP24_GE1_RXD0, - MPP25_GE1_RXD1, - MPP26_GE1_RXD2, - MPP27_GE1_RXD3, - MPP28_GPIO, /* USB enable host vbus */ - MPP29_GPIO, /* GPIO extension ALE */ - MPP30_GE1_RXCTL, - MPP31_GE1_RXCLK, - MPP32_GE1_TCLKOUT, - MPP33_GE1_TXCTL, - MPP34_GPIO, /* Rear Push button */ - MPP35_GPIO, /* Inhibit switch power-off */ - MPP36_GPIO, /* SATA HDD1 presence */ - MPP37_GPIO, /* SATA HDD2 presence */ - MPP38_GPIO, /* SATA HDD3 presence */ - MPP39_GPIO, /* SATA HDD4 presence */ - MPP40_GPIO, /* SATA HDD5 presence */ - MPP41_GPIO, /* SATA HDD3 power */ - MPP42_GPIO, /* SATA HDD4 power */ - MPP43_GPIO, /* SATA HDD5 power */ - MPP44_GPIO, /* GPIO extension (data 0) */ - MPP45_GPIO, /* GPIO extension (data 1) */ - MPP46_GPIO, /* GPIO extension (data 2) */ - MPP47_GPIO, /* GPIO extension (addr 0) */ - MPP48_GPIO, /* GPIO extension (addr 1) */ - MPP49_GPIO, /* GPIO extension (addr 2) */ - 0 -}; - -#define NETXBIG_V2_GPIO_POWER_OFF 7 - -static void netxbig_v2_power_off(void) -{ - gpio_set_value(NETXBIG_V2_GPIO_POWER_OFF, 1); -} - -static void __init netxbig_v2_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - if (machine_is_net2big_v2()) - kirkwood_mpp_conf(net2big_v2_mpp_config); - else - kirkwood_mpp_conf(net5big_v2_mpp_config); - - if (machine_is_net2big_v2()) - lacie_v2_hdd_power_init(2); - else - lacie_v2_hdd_power_init(5); - - kirkwood_ehci_init(); - kirkwood_ge00_init(&netxbig_v2_ge00_data); - if (machine_is_net5big_v2()) - kirkwood_ge01_init(&netxbig_v2_ge01_data); - kirkwood_sata_init(&netxbig_v2_sata_data); - kirkwood_uart0_init(); - lacie_v2_register_flash(); - lacie_v2_register_i2c_devices(); - - if (machine_is_net5big_v2()) - netxbig_v2_leds.dev.platform_data = &net5big_v2_leds_data; - platform_device_register(&netxbig_v2_leds); - platform_device_register(&netxbig_v2_gpio_buttons); - - if (gpio_request(NETXBIG_V2_GPIO_POWER_OFF, "power-off") == 0 && - gpio_direction_output(NETXBIG_V2_GPIO_POWER_OFF, 0) == 0) - pm_power_off = netxbig_v2_power_off; - else - pr_err("netxbig_v2: failed to configure power-off GPIO\n"); -} - -#ifdef CONFIG_MACH_NET2BIG_V2 -MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") - .atag_offset = 0x100, - .init_machine = netxbig_v2_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .init_time = kirkwood_timer_init, - .restart = kirkwood_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_NET5BIG_V2 -MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") - .atag_offset = 0x100, - .init_machine = netxbig_v2_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .init_time = kirkwood_timer_init, - .restart = kirkwood_restart, -MACHINE_END -#endif diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c deleted file mode 100644 index e5cf841..0000000 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * arch/arm/mach-kirkwood/openrd-setup.c - * - * Marvell OpenRD (Base|Client|Ultimate) Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" - -static struct mtd_partition openrd_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M, - .mask_flags = MTD_WRITEABLE - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct mv643xx_eth_platform_data openrd_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -static struct mv643xx_eth_platform_data openrd_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(24), -}; - -static struct mv_sata_platform_data openrd_sata_data = { - .n_ports = 2, -}; - -static struct mvsdio_platform_data openrd_mvsdio_data = { - .gpio_card_detect = 29, /* MPP29 used as SD card detect */ - .gpio_write_protect = -1, -}; - -static unsigned int openrd_mpp_config[] __initdata = { - MPP12_SD_CLK, - MPP13_SD_CMD, - MPP14_SD_D0, - MPP15_SD_D1, - MPP16_SD_D2, - MPP17_SD_D3, - MPP28_GPIO, - MPP29_GPIO, - MPP34_GPIO, - 0 -}; - -/* Configure MPP for UART1 */ -static unsigned int openrd_uart1_mpp_config[] __initdata = { - MPP13_UART1_TXD, - MPP14_UART1_RXD, - 0 -}; - -static struct i2c_board_info i2c_board_info[] __initdata = { - { - I2C_BOARD_INFO("cs42l51", 0x4a), - }, -}; - -static struct platform_device openrd_client_audio_device = { - .name = "openrd-client-audio", - .id = -1, -}; - -static int __initdata uart1; - -static int __init sd_uart_selection(char *str) -{ - uart1 = -EINVAL; - - /* Default is SD. Change if required, for UART */ - if (!str) - return 0; - - if (!strncmp(str, "232", 3)) { - uart1 = 232; - } else if (!strncmp(str, "485", 3)) { - /* OpenRD-Base doesn't have RS485. Treat is as an - * unknown argument & just have default setting - - * which is SD */ - if (machine_is_openrd_base()) { - uart1 = -ENODEV; - return 1; - } - - uart1 = 485; - } - return 1; -} -/* Parse boot_command_line string kw_openrd_init_uart1=232/485 */ -__setup("kw_openrd_init_uart1=", sd_uart_selection); - -static int __init uart1_mpp_config(void) -{ - kirkwood_mpp_conf(openrd_uart1_mpp_config); - - if (gpio_request(34, "SD_UART1_SEL")) { - pr_err("GPIO request 34 failed for SD/UART1 selection\n"); - return -EIO; - } - - if (gpio_request(28, "RS232_RS485_SEL")) { - pr_err("GPIO request 28 failed for RS232/RS485 selection\n"); - gpio_free(34); - return -EIO; - } - - /* Select UART1 - * Pin # 34: 0 => UART1, 1 => SD */ - gpio_direction_output(34, 0); - - /* Select RS232 OR RS485 - * Pin # 28: 0 => RS232, 1 => RS485 */ - if (uart1 == 232) - gpio_direction_output(28, 0); - else - gpio_direction_output(28, 1); - - gpio_free(34); - gpio_free(28); - - return 0; -} - -static void __init openrd_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(openrd_mpp_config); - - kirkwood_uart0_init(); - kirkwood_nand_init(openrd_nand_parts, ARRAY_SIZE(openrd_nand_parts), - 25); - - kirkwood_ehci_init(); - - if (machine_is_openrd_ultimate()) { - openrd_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); - openrd_ge01_data.phy_addr = MV643XX_ETH_PHY_ADDR(1); - } - - kirkwood_ge00_init(&openrd_ge00_data); - if (!machine_is_openrd_base()) - kirkwood_ge01_init(&openrd_ge01_data); - - kirkwood_sata_init(&openrd_sata_data); - - kirkwood_i2c_init(); - - if (machine_is_openrd_client() || machine_is_openrd_ultimate()) { - platform_device_register(&openrd_client_audio_device); - i2c_register_board_info(0, i2c_board_info, - ARRAY_SIZE(i2c_board_info)); - kirkwood_audio_init(); - } - - if (uart1 <= 0) { - if (uart1 < 0) - pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n", - uart1); - - /* Select SD - * Pin # 34: 0 => UART1, 1 => SD */ - if (gpio_request(34, "SD_UART1_SEL")) { - pr_err("GPIO request 34 failed for SD/UART1 selection\n"); - } else { - - gpio_direction_output(34, 1); - gpio_free(34); - kirkwood_sdio_init(&openrd_mvsdio_data); - } - } else { - if (!uart1_mpp_config()) - kirkwood_uart1_init(); - } -} - -static int __init openrd_pci_init(void) -{ - if (machine_is_openrd_base() || - machine_is_openrd_client() || - machine_is_openrd_ultimate()) - kirkwood_pcie_init(KW_PCIE0); - - return 0; -} -subsys_initcall(openrd_pci_init); - -#ifdef CONFIG_MACH_OPENRD_BASE -MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") - /* Maintainer: Dhaval Vasa */ - .atag_offset = 0x100, - .init_machine = openrd_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .init_time = kirkwood_timer_init, - .restart = kirkwood_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_OPENRD_CLIENT -MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") - /* Maintainer: Dhaval Vasa */ - .atag_offset = 0x100, - .init_machine = openrd_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .init_time = kirkwood_timer_init, - .restart = kirkwood_restart, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_OPENRD_ULTIMATE -MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") - /* Maintainer: Dhaval Vasa */ - .atag_offset = 0x100, - .init_machine = openrd_init, - .map_io = kirkwood_map_io, - .init_early = kirkwood_init_early, - .init_irq = kirkwood_init_irq, - .init_time = kirkwood_timer_init, - .restart = kirkwood_restart, -MACHINE_END -#endif diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c deleted file mode 100644 index 12d86f3..0000000 --- a/arch/arm/mach-kirkwood/pcie.c +++ /dev/null @@ -1,296 +0,0 @@ -/* - * arch/arm/mach-kirkwood/pcie.c - * - * PCIe functions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include