From 0e8972187971ac6c29a9e5899fa6c555c739237c Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Thu, 22 Oct 2015 16:44:42 +0300 Subject: spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for configuring the chip select polarities. Touch only chip select SW mode and state bits when enabling the software chip select control in order to not clear any other bits in the register. Signed-off-by: Jarkko Nikula Signed-off-by: Mark Brown diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index db9016b..4dc5660 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -249,7 +249,9 @@ static void lpss_ssp_setup(struct driver_data *drv_data) drv_data->lpss_base = drv_data->ioaddr + config->offset; /* Enable software chip select control */ - value = SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; + value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl); + value &= ~(SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH); + value |= SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); /* Enable multiblock DMA transfers */ -- cgit v0.10.2