From 16be17af2ae9fd1544b5d0c58b4facf198031cb8 Mon Sep 17 00:00:00 2001
From: Nick Hoath <nicholas.hoath@intel.com>
Date: Thu, 7 May 2015 14:15:37 +0100
Subject: drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e74feed..9b96ed7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -957,7 +957,7 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
 	/* WaDisablePartialResolveInVc:skl,bxt */
 	WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE);
 
-	/* WaCcsTlbPrefetchDisable:skl */
+	/* WaCcsTlbPrefetchDisable:skl,bxt */
 	WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
 			  GEN9_CCS_TLB_PREFETCH_ENABLE);
 
-- 
cgit v0.10.2