From 9e541466eed411cb5462fa9e6181c4d409e7e2ef Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:41 +0100 Subject: drm/i2c: tda998x: use HDMI constants This patch replaces hard coded values by hdmi constants. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index faa77f5..8571a66 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -526,12 +526,12 @@ tda998x_write_if(struct drm_encoder *encoder, uint8_t bit, uint16_t addr, static void tda998x_write_aif(struct drm_encoder *encoder, struct tda998x_encoder_params *p) { - uint8_t buf[PB(5) + 1]; + u8 buf[PB(HDMI_AUDIO_INFOFRAME_SIZE) + 1]; memset(buf, 0, sizeof(buf)); - buf[HB(0)] = 0x84; + buf[HB(0)] = HDMI_INFOFRAME_TYPE_AUDIO; buf[HB(1)] = 0x01; - buf[HB(2)] = 10; + buf[HB(2)] = HDMI_AUDIO_INFOFRAME_SIZE; buf[PB(1)] = p->audio_frame[1] & 0x07; /* CC */ buf[PB(2)] = p->audio_frame[2] & 0x1c; /* SF */ buf[PB(4)] = p->audio_frame[4]; @@ -544,12 +544,12 @@ tda998x_write_aif(struct drm_encoder *encoder, struct tda998x_encoder_params *p) static void tda998x_write_avi(struct drm_encoder *encoder, struct drm_display_mode *mode) { - uint8_t buf[PB(13) + 1]; + u8 buf[PB(HDMI_AVI_INFOFRAME_SIZE) + 1]; memset(buf, 0, sizeof(buf)); - buf[HB(0)] = 0x82; + buf[HB(0)] = HDMI_INFOFRAME_TYPE_AVI; buf[HB(1)] = 0x02; - buf[HB(2)] = 13; + buf[HB(2)] = HDMI_AVI_INFOFRAME_SIZE; buf[PB(1)] = HDMI_SCAN_MODE_UNDERSCAN; buf[PB(3)] = HDMI_QUANTIZATION_RANGE_FULL << 2; buf[PB(4)] = drm_match_cea_mode(mode); -- cgit v0.10.2 From bdf6345b3262d0ddbc6405fbc0fedd2941bec08e Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:40 +0100 Subject: drm/i2c: tda998x: add the active aspect in HDMI AVI frame The picture aspect setting was zero, which is reserved. A setting of Same As Picture makes more sense. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 8571a66..5be145c 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -551,6 +551,7 @@ tda998x_write_avi(struct drm_encoder *encoder, struct drm_display_mode *mode) buf[HB(1)] = 0x02; buf[HB(2)] = HDMI_AVI_INFOFRAME_SIZE; buf[PB(1)] = HDMI_SCAN_MODE_UNDERSCAN; + buf[PB(2)] = HDMI_ACTIVE_ASPECT_PICTURE; buf[PB(3)] = HDMI_QUANTIZATION_RANGE_FULL << 2; buf[PB(4)] = drm_match_cea_mode(mode); -- cgit v0.10.2 From f0b33b282c17337276504d6a700d0f558f1a6891 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:39 +0100 Subject: drm/i2c: tda998x: use ALSA IEC958 definitions and update audio frequency This patch sets the frequency as 'not indicated' instead of '48kHz' and uses the asound values in the channel status definition. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 5be145c..e5b764b 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -19,6 +19,7 @@ #include #include +#include #include #include @@ -649,10 +650,11 @@ tda998x_configure_audio(struct drm_encoder *encoder, reg_clear(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); /* Write the channel status */ - buf[0] = 0x04; + buf[0] = IEC958_AES0_CON_NOT_COPYRIGHT; buf[1] = 0x00; - buf[2] = 0x00; - buf[3] = 0xf1; + buf[2] = IEC958_AES3_CON_FS_NOTID; + buf[3] = IEC958_AES4_CON_ORIGFS_NOTID | + IEC958_AES4_CON_MAX_WORDLEN_24; reg_write_range(encoder, REG_CH_STAT_B(0), buf, 4); tda998x_audio_mute(encoder, true); -- cgit v0.10.2 From 2f7f730a4f0fd3376dda9266203f29ceccd0a67f Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:47 +0100 Subject: drm/i2c: tda998x: simplify the i2c read/write functions This patch simplifies the i2c read/write functions and permits them to be easily called in more contexts. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index e5b764b..7df73ba 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -31,6 +31,7 @@ struct tda998x_priv { struct i2c_client *cec; + struct i2c_client *hdmi; uint16_t rev; uint8_t current_page; int dpms; @@ -329,9 +330,9 @@ struct tda998x_priv { #define TDA19988 0x0301 static void -cec_write(struct drm_encoder *encoder, uint16_t addr, uint8_t val) +cec_write(struct tda998x_priv *priv, uint16_t addr, uint8_t val) { - struct i2c_client *client = to_tda998x_priv(encoder)->cec; + struct i2c_client *client = priv->cec; uint8_t buf[] = {addr, val}; int ret; @@ -341,9 +342,9 @@ cec_write(struct drm_encoder *encoder, uint16_t addr, uint8_t val) } static uint8_t -cec_read(struct drm_encoder *encoder, uint8_t addr) +cec_read(struct tda998x_priv *priv, uint8_t addr) { - struct i2c_client *client = to_tda998x_priv(encoder)->cec; + struct i2c_client *client = priv->cec; uint8_t val; int ret; @@ -363,12 +364,10 @@ fail: } static void -set_page(struct drm_encoder *encoder, uint16_t reg) +set_page(struct tda998x_priv *priv, uint16_t reg) { - struct tda998x_priv *priv = to_tda998x_priv(encoder); - if (REG2PAGE(reg) != priv->current_page) { - struct i2c_client *client = drm_i2c_encoder_get_client(encoder); + struct i2c_client *client = priv->hdmi; uint8_t buf[] = { REG_CURPAGE, REG2PAGE(reg) }; @@ -381,13 +380,13 @@ set_page(struct drm_encoder *encoder, uint16_t reg) } static int -reg_read_range(struct drm_encoder *encoder, uint16_t reg, char *buf, int cnt) +reg_read_range(struct tda998x_priv *priv, uint16_t reg, char *buf, int cnt) { - struct i2c_client *client = drm_i2c_encoder_get_client(encoder); + struct i2c_client *client = priv->hdmi; uint8_t addr = REG2ADDR(reg); int ret; - set_page(encoder, reg); + set_page(priv, reg); ret = i2c_master_send(client, &addr, sizeof(addr)); if (ret < 0) @@ -405,16 +404,16 @@ fail: } static void -reg_write_range(struct drm_encoder *encoder, uint16_t reg, uint8_t *p, int cnt) +reg_write_range(struct tda998x_priv *priv, uint16_t reg, uint8_t *p, int cnt) { - struct i2c_client *client = drm_i2c_encoder_get_client(encoder); + struct i2c_client *client = priv->hdmi; uint8_t buf[cnt+1]; int ret; buf[0] = REG2ADDR(reg); memcpy(&buf[1], p, cnt); - set_page(encoder, reg); + set_page(priv, reg); ret = i2c_master_send(client, buf, cnt + 1); if (ret < 0) @@ -422,21 +421,21 @@ reg_write_range(struct drm_encoder *encoder, uint16_t reg, uint8_t *p, int cnt) } static uint8_t -reg_read(struct drm_encoder *encoder, uint16_t reg) +reg_read(struct tda998x_priv *priv, uint16_t reg) { uint8_t val = 0; - reg_read_range(encoder, reg, &val, sizeof(val)); + reg_read_range(priv, reg, &val, sizeof(val)); return val; } static void -reg_write(struct drm_encoder *encoder, uint16_t reg, uint8_t val) +reg_write(struct tda998x_priv *priv, uint16_t reg, uint8_t val) { - struct i2c_client *client = drm_i2c_encoder_get_client(encoder); + struct i2c_client *client = priv->hdmi; uint8_t buf[] = {REG2ADDR(reg), val}; int ret; - set_page(encoder, reg); + set_page(priv, reg); ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); if (ret < 0) @@ -444,13 +443,13 @@ reg_write(struct drm_encoder *encoder, uint16_t reg, uint8_t val) } static void -reg_write16(struct drm_encoder *encoder, uint16_t reg, uint16_t val) +reg_write16(struct tda998x_priv *priv, uint16_t reg, uint16_t val) { - struct i2c_client *client = drm_i2c_encoder_get_client(encoder); + struct i2c_client *client = priv->hdmi; uint8_t buf[] = {REG2ADDR(reg), val >> 8, val}; int ret; - set_page(encoder, reg); + set_page(priv, reg); ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); if (ret < 0) @@ -458,47 +457,47 @@ reg_write16(struct drm_encoder *encoder, uint16_t reg, uint16_t val) } static void -reg_set(struct drm_encoder *encoder, uint16_t reg, uint8_t val) +reg_set(struct tda998x_priv *priv, uint16_t reg, uint8_t val) { - reg_write(encoder, reg, reg_read(encoder, reg) | val); + reg_write(priv, reg, reg_read(priv, reg) | val); } static void -reg_clear(struct drm_encoder *encoder, uint16_t reg, uint8_t val) +reg_clear(struct tda998x_priv *priv, uint16_t reg, uint8_t val) { - reg_write(encoder, reg, reg_read(encoder, reg) & ~val); + reg_write(priv, reg, reg_read(priv, reg) & ~val); } static void -tda998x_reset(struct drm_encoder *encoder) +tda998x_reset(struct tda998x_priv *priv) { /* reset audio and i2c master: */ - reg_set(encoder, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); + reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); msleep(50); - reg_clear(encoder, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); + reg_clear(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); msleep(50); /* reset transmitter: */ - reg_set(encoder, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); - reg_clear(encoder, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); + reg_set(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); + reg_clear(priv, REG_MAIN_CNTRL0, MAIN_CNTRL0_SR); /* PLL registers common configuration */ - reg_write(encoder, REG_PLL_SERIAL_1, 0x00); - reg_write(encoder, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(1)); - reg_write(encoder, REG_PLL_SERIAL_3, 0x00); - reg_write(encoder, REG_SERIALIZER, 0x00); - reg_write(encoder, REG_BUFFER_OUT, 0x00); - reg_write(encoder, REG_PLL_SCG1, 0x00); - reg_write(encoder, REG_AUDIO_DIV, AUDIO_DIV_SERCLK_8); - reg_write(encoder, REG_SEL_CLK, SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK); - reg_write(encoder, REG_PLL_SCGN1, 0xfa); - reg_write(encoder, REG_PLL_SCGN2, 0x00); - reg_write(encoder, REG_PLL_SCGR1, 0x5b); - reg_write(encoder, REG_PLL_SCGR2, 0x00); - reg_write(encoder, REG_PLL_SCG2, 0x10); + reg_write(priv, REG_PLL_SERIAL_1, 0x00); + reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(1)); + reg_write(priv, REG_PLL_SERIAL_3, 0x00); + reg_write(priv, REG_SERIALIZER, 0x00); + reg_write(priv, REG_BUFFER_OUT, 0x00); + reg_write(priv, REG_PLL_SCG1, 0x00); + reg_write(priv, REG_AUDIO_DIV, AUDIO_DIV_SERCLK_8); + reg_write(priv, REG_SEL_CLK, SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK); + reg_write(priv, REG_PLL_SCGN1, 0xfa); + reg_write(priv, REG_PLL_SCGN2, 0x00); + reg_write(priv, REG_PLL_SCGR1, 0x5b); + reg_write(priv, REG_PLL_SCGR2, 0x00); + reg_write(priv, REG_PLL_SCG2, 0x10); /* Write the default value MUX register */ - reg_write(encoder, REG_MUX_VP_VIP_OUT, 0x24); + reg_write(priv, REG_MUX_VP_VIP_OUT, 0x24); } static uint8_t tda998x_cksum(uint8_t *buf, size_t bytes) @@ -514,18 +513,18 @@ static uint8_t tda998x_cksum(uint8_t *buf, size_t bytes) #define PB(x) (HB(2) + 1 + (x)) static void -tda998x_write_if(struct drm_encoder *encoder, uint8_t bit, uint16_t addr, +tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr, uint8_t *buf, size_t size) { buf[PB(0)] = tda998x_cksum(buf, size); - reg_clear(encoder, REG_DIP_IF_FLAGS, bit); - reg_write_range(encoder, addr, buf, size); - reg_set(encoder, REG_DIP_IF_FLAGS, bit); + reg_clear(priv, REG_DIP_IF_FLAGS, bit); + reg_write_range(priv, addr, buf, size); + reg_set(priv, REG_DIP_IF_FLAGS, bit); } static void -tda998x_write_aif(struct drm_encoder *encoder, struct tda998x_encoder_params *p) +tda998x_write_aif(struct tda998x_priv *priv, struct tda998x_encoder_params *p) { u8 buf[PB(HDMI_AUDIO_INFOFRAME_SIZE) + 1]; @@ -538,12 +537,12 @@ tda998x_write_aif(struct drm_encoder *encoder, struct tda998x_encoder_params *p) buf[PB(4)] = p->audio_frame[4]; buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */ - tda998x_write_if(encoder, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf, + tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf, sizeof(buf)); } static void -tda998x_write_avi(struct drm_encoder *encoder, struct drm_display_mode *mode) +tda998x_write_avi(struct tda998x_priv *priv, struct drm_display_mode *mode) { u8 buf[PB(HDMI_AVI_INFOFRAME_SIZE) + 1]; @@ -556,36 +555,36 @@ tda998x_write_avi(struct drm_encoder *encoder, struct drm_display_mode *mode) buf[PB(3)] = HDMI_QUANTIZATION_RANGE_FULL << 2; buf[PB(4)] = drm_match_cea_mode(mode); - tda998x_write_if(encoder, DIP_IF_FLAGS_IF2, REG_IF2_HB0, buf, + tda998x_write_if(priv, DIP_IF_FLAGS_IF2, REG_IF2_HB0, buf, sizeof(buf)); } -static void tda998x_audio_mute(struct drm_encoder *encoder, bool on) +static void tda998x_audio_mute(struct tda998x_priv *priv, bool on) { if (on) { - reg_set(encoder, REG_SOFTRESET, SOFTRESET_AUDIO); - reg_clear(encoder, REG_SOFTRESET, SOFTRESET_AUDIO); - reg_set(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); + reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO); + reg_clear(priv, REG_SOFTRESET, SOFTRESET_AUDIO); + reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); } else { - reg_clear(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); + reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); } } static void -tda998x_configure_audio(struct drm_encoder *encoder, +tda998x_configure_audio(struct tda998x_priv *priv, struct drm_display_mode *mode, struct tda998x_encoder_params *p) { uint8_t buf[6], clksel_aip, clksel_fs, ca_i2s, cts_n, adiv; uint32_t n; /* Enable audio ports */ - reg_write(encoder, REG_ENA_AP, p->audio_cfg); - reg_write(encoder, REG_ENA_ACLK, p->audio_clk_cfg); + reg_write(priv, REG_ENA_AP, p->audio_cfg); + reg_write(priv, REG_ENA_ACLK, p->audio_clk_cfg); /* Set audio input source */ switch (p->audio_format) { case AFMT_SPDIF: - reg_write(encoder, REG_MUX_AP, 0x40); + reg_write(priv, REG_MUX_AP, 0x40); clksel_aip = AIP_CLKSEL_AIP(0); /* FS64SPDIF */ clksel_fs = AIP_CLKSEL_FS(2); @@ -594,7 +593,7 @@ tda998x_configure_audio(struct drm_encoder *encoder, break; case AFMT_I2S: - reg_write(encoder, REG_MUX_AP, 0x64); + reg_write(priv, REG_MUX_AP, 0x64); clksel_aip = AIP_CLKSEL_AIP(1); /* ACLK */ clksel_fs = AIP_CLKSEL_FS(0); @@ -607,12 +606,12 @@ tda998x_configure_audio(struct drm_encoder *encoder, return; } - reg_write(encoder, REG_AIP_CLKSEL, clksel_aip); - reg_clear(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT); + reg_write(priv, REG_AIP_CLKSEL, clksel_aip); + reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT); /* Enable automatic CTS generation */ - reg_clear(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_ACR_MAN); - reg_write(encoder, REG_CTS_N, cts_n); + reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_ACR_MAN); + reg_write(priv, REG_CTS_N, cts_n); /* * Audio input somehow depends on HDMI line rate which is @@ -625,7 +624,7 @@ tda998x_configure_audio(struct drm_encoder *encoder, adiv = AUDIO_DIV_SERCLK_16; else adiv = AUDIO_DIV_SERCLK_8; - reg_write(encoder, REG_AUDIO_DIV, adiv); + reg_write(priv, REG_AUDIO_DIV, adiv); /* * This is the approximate value of N, which happens to be @@ -640,14 +639,14 @@ tda998x_configure_audio(struct drm_encoder *encoder, buf[3] = n; buf[4] = n >> 8; buf[5] = n >> 16; - reg_write_range(encoder, REG_ACR_CTS_0, buf, 6); + reg_write_range(priv, REG_ACR_CTS_0, buf, 6); /* Set CTS clock reference */ - reg_write(encoder, REG_AIP_CLKSEL, clksel_aip | clksel_fs); + reg_write(priv, REG_AIP_CLKSEL, clksel_aip | clksel_fs); /* Reset CTS generator */ - reg_set(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); - reg_clear(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); + reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); + reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS); /* Write the channel status */ buf[0] = IEC958_AES0_CON_NOT_COPYRIGHT; @@ -655,14 +654,14 @@ tda998x_configure_audio(struct drm_encoder *encoder, buf[2] = IEC958_AES3_CON_FS_NOTID; buf[3] = IEC958_AES4_CON_ORIGFS_NOTID | IEC958_AES4_CON_MAX_WORDLEN_24; - reg_write_range(encoder, REG_CH_STAT_B(0), buf, 4); + reg_write_range(priv, REG_CH_STAT_B(0), buf, 4); - tda998x_audio_mute(encoder, true); + tda998x_audio_mute(priv, true); mdelay(20); - tda998x_audio_mute(encoder, false); + tda998x_audio_mute(priv, false); /* Write the audio information packet */ - tda998x_write_aif(encoder, p); + tda998x_write_aif(priv, p); } /* DRM encoder functions */ @@ -704,19 +703,19 @@ tda998x_encoder_dpms(struct drm_encoder *encoder, int mode) switch (mode) { case DRM_MODE_DPMS_ON: /* enable video ports, audio will be enabled later */ - reg_write(encoder, REG_ENA_VP_0, 0xff); - reg_write(encoder, REG_ENA_VP_1, 0xff); - reg_write(encoder, REG_ENA_VP_2, 0xff); + reg_write(priv, REG_ENA_VP_0, 0xff); + reg_write(priv, REG_ENA_VP_1, 0xff); + reg_write(priv, REG_ENA_VP_2, 0xff); /* set muxing after enabling ports: */ - reg_write(encoder, REG_VIP_CNTRL_0, priv->vip_cntrl_0); - reg_write(encoder, REG_VIP_CNTRL_1, priv->vip_cntrl_1); - reg_write(encoder, REG_VIP_CNTRL_2, priv->vip_cntrl_2); + reg_write(priv, REG_VIP_CNTRL_0, priv->vip_cntrl_0); + reg_write(priv, REG_VIP_CNTRL_1, priv->vip_cntrl_1); + reg_write(priv, REG_VIP_CNTRL_2, priv->vip_cntrl_2); break; case DRM_MODE_DPMS_OFF: /* disable video ports */ - reg_write(encoder, REG_ENA_VP_0, 0x00); - reg_write(encoder, REG_ENA_VP_1, 0x00); - reg_write(encoder, REG_ENA_VP_2, 0x00); + reg_write(priv, REG_ENA_VP_0, 0x00); + reg_write(priv, REG_ENA_VP_1, 0x00); + reg_write(priv, REG_ENA_VP_2, 0x00); break; } @@ -834,57 +833,57 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, } /* mute the audio FIFO: */ - reg_set(encoder, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); + reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); /* set HDMI HDCP mode off: */ - reg_set(encoder, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); - reg_clear(encoder, REG_TX33, TX33_HDMI); + reg_set(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); + reg_clear(priv, REG_TX33, TX33_HDMI); + reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(0)); - reg_write(encoder, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(0)); /* no pre-filter or interpolator: */ - reg_write(encoder, REG_HVF_CNTRL_0, HVF_CNTRL_0_PREFIL(0) | + reg_write(priv, REG_HVF_CNTRL_0, HVF_CNTRL_0_PREFIL(0) | HVF_CNTRL_0_INTPOL(0)); - reg_write(encoder, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0)); - reg_write(encoder, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) | + reg_write(priv, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0)); + reg_write(priv, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) | VIP_CNTRL_4_BLC(0)); - reg_clear(encoder, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR); + reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR); - reg_clear(encoder, REG_PLL_SERIAL_1, PLL_SERIAL_1_SRL_MAN_IZ); - reg_clear(encoder, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_DE); - reg_write(encoder, REG_SERIALIZER, 0); - reg_write(encoder, REG_HVF_CNTRL_1, HVF_CNTRL_1_VQR(0)); + reg_clear(priv, REG_PLL_SERIAL_1, PLL_SERIAL_1_SRL_MAN_IZ); + reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_DE); + reg_write(priv, REG_SERIALIZER, 0); + reg_write(priv, REG_HVF_CNTRL_1, HVF_CNTRL_1_VQR(0)); /* TODO enable pixel repeat for pixel rates less than 25Msamp/s */ rep = 0; - reg_write(encoder, REG_RPT_CNTRL, 0); - reg_write(encoder, REG_SEL_CLK, SEL_CLK_SEL_VRF_CLK(0) | + reg_write(priv, REG_RPT_CNTRL, 0); + reg_write(priv, REG_SEL_CLK, SEL_CLK_SEL_VRF_CLK(0) | SEL_CLK_SEL_CLK1 | SEL_CLK_ENA_SC_CLK); - reg_write(encoder, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(div) | + reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(div) | PLL_SERIAL_2_SRL_PR(rep)); /* set color matrix bypass flag: */ - reg_set(encoder, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP); + reg_set(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP); /* set BIAS tmds value: */ - reg_write(encoder, REG_ANA_GENERAL, 0x09); + reg_write(priv, REG_ANA_GENERAL, 0x09); - reg_clear(encoder, REG_TBG_CNTRL_0, TBG_CNTRL_0_SYNC_MTHD); + reg_clear(priv, REG_TBG_CNTRL_0, TBG_CNTRL_0_SYNC_MTHD); /* * Sync on rising HSYNC/VSYNC */ - reg_write(encoder, REG_VIP_CNTRL_3, 0); - reg_set(encoder, REG_VIP_CNTRL_3, VIP_CNTRL_3_SYNC_HS); + reg_write(priv, REG_VIP_CNTRL_3, 0); + reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_SYNC_HS); /* * TDA19988 requires high-active sync at input stage, * so invert low-active sync provided by master encoder here */ if (mode->flags & DRM_MODE_FLAG_NHSYNC) - reg_set(encoder, REG_VIP_CNTRL_3, VIP_CNTRL_3_H_TGL); + reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_H_TGL); if (mode->flags & DRM_MODE_FLAG_NVSYNC) - reg_set(encoder, REG_VIP_CNTRL_3, VIP_CNTRL_3_V_TGL); + reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_V_TGL); /* * Always generate sync polarity relative to input sync and @@ -895,49 +894,49 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, reg |= TBG_CNTRL_1_H_TGL; if (mode->flags & DRM_MODE_FLAG_NVSYNC) reg |= TBG_CNTRL_1_V_TGL; - reg_write(encoder, REG_TBG_CNTRL_1, reg); - - reg_write(encoder, REG_VIDFORMAT, 0x00); - reg_write16(encoder, REG_REFPIX_MSB, ref_pix); - reg_write16(encoder, REG_REFLINE_MSB, ref_line); - reg_write16(encoder, REG_NPIX_MSB, n_pix); - reg_write16(encoder, REG_NLINE_MSB, n_line); - reg_write16(encoder, REG_VS_LINE_STRT_1_MSB, vs1_line_s); - reg_write16(encoder, REG_VS_PIX_STRT_1_MSB, vs1_pix_s); - reg_write16(encoder, REG_VS_LINE_END_1_MSB, vs1_line_e); - reg_write16(encoder, REG_VS_PIX_END_1_MSB, vs1_pix_e); - reg_write16(encoder, REG_VS_LINE_STRT_2_MSB, vs2_line_s); - reg_write16(encoder, REG_VS_PIX_STRT_2_MSB, vs2_pix_s); - reg_write16(encoder, REG_VS_LINE_END_2_MSB, vs2_line_e); - reg_write16(encoder, REG_VS_PIX_END_2_MSB, vs2_pix_e); - reg_write16(encoder, REG_HS_PIX_START_MSB, hs_pix_s); - reg_write16(encoder, REG_HS_PIX_STOP_MSB, hs_pix_e); - reg_write16(encoder, REG_VWIN_START_1_MSB, vwin1_line_s); - reg_write16(encoder, REG_VWIN_END_1_MSB, vwin1_line_e); - reg_write16(encoder, REG_VWIN_START_2_MSB, vwin2_line_s); - reg_write16(encoder, REG_VWIN_END_2_MSB, vwin2_line_e); - reg_write16(encoder, REG_DE_START_MSB, de_pix_s); - reg_write16(encoder, REG_DE_STOP_MSB, de_pix_e); + reg_write(priv, REG_TBG_CNTRL_1, reg); + + reg_write(priv, REG_VIDFORMAT, 0x00); + reg_write16(priv, REG_REFPIX_MSB, ref_pix); + reg_write16(priv, REG_REFLINE_MSB, ref_line); + reg_write16(priv, REG_NPIX_MSB, n_pix); + reg_write16(priv, REG_NLINE_MSB, n_line); + reg_write16(priv, REG_VS_LINE_STRT_1_MSB, vs1_line_s); + reg_write16(priv, REG_VS_PIX_STRT_1_MSB, vs1_pix_s); + reg_write16(priv, REG_VS_LINE_END_1_MSB, vs1_line_e); + reg_write16(priv, REG_VS_PIX_END_1_MSB, vs1_pix_e); + reg_write16(priv, REG_VS_LINE_STRT_2_MSB, vs2_line_s); + reg_write16(priv, REG_VS_PIX_STRT_2_MSB, vs2_pix_s); + reg_write16(priv, REG_VS_LINE_END_2_MSB, vs2_line_e); + reg_write16(priv, REG_VS_PIX_END_2_MSB, vs2_pix_e); + reg_write16(priv, REG_HS_PIX_START_MSB, hs_pix_s); + reg_write16(priv, REG_HS_PIX_STOP_MSB, hs_pix_e); + reg_write16(priv, REG_VWIN_START_1_MSB, vwin1_line_s); + reg_write16(priv, REG_VWIN_END_1_MSB, vwin1_line_e); + reg_write16(priv, REG_VWIN_START_2_MSB, vwin2_line_s); + reg_write16(priv, REG_VWIN_END_2_MSB, vwin2_line_e); + reg_write16(priv, REG_DE_START_MSB, de_pix_s); + reg_write16(priv, REG_DE_STOP_MSB, de_pix_e); if (priv->rev == TDA19988) { /* let incoming pixels fill the active space (if any) */ - reg_write(encoder, REG_ENABLE_SPACE, 0x00); + reg_write(priv, REG_ENABLE_SPACE, 0x00); } /* must be last register set: */ - reg_clear(encoder, REG_TBG_CNTRL_0, TBG_CNTRL_0_SYNC_ONCE); + reg_clear(priv, REG_TBG_CNTRL_0, TBG_CNTRL_0_SYNC_ONCE); /* Only setup the info frames if the sink is HDMI */ if (priv->is_hdmi_sink) { /* We need to turn HDMI HDCP stuff on to get audio through */ - reg_clear(encoder, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); - reg_write(encoder, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1)); - reg_set(encoder, REG_TX33, TX33_HDMI); + reg_clear(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); + reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1)); + reg_set(priv, REG_TX33, TX33_HDMI); - tda998x_write_avi(encoder, adjusted_mode); + tda998x_write_avi(priv, adjusted_mode); if (priv->params.audio_cfg) - tda998x_configure_audio(encoder, adjusted_mode, + tda998x_configure_audio(priv, adjusted_mode, &priv->params); } } @@ -946,7 +945,9 @@ static enum drm_connector_status tda998x_encoder_detect(struct drm_encoder *encoder, struct drm_connector *connector) { - uint8_t val = cec_read(encoder, REG_CEC_RXSHPDLEV); + struct tda998x_priv *priv = to_tda998x_priv(encoder); + uint8_t val = cec_read(priv, REG_CEC_RXSHPDLEV); + return (val & CEC_RXSHPDLEV_HPD) ? connector_status_connected : connector_status_disconnected; } @@ -954,29 +955,30 @@ tda998x_encoder_detect(struct drm_encoder *encoder, static int read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) { + struct tda998x_priv *priv = to_tda998x_priv(encoder); uint8_t offset, segptr; int ret, i; /* enable EDID read irq: */ - reg_set(encoder, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); + reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); offset = (blk & 1) ? 128 : 0; segptr = blk / 2; - reg_write(encoder, REG_DDC_ADDR, 0xa0); - reg_write(encoder, REG_DDC_OFFS, offset); - reg_write(encoder, REG_DDC_SEGM_ADDR, 0x60); - reg_write(encoder, REG_DDC_SEGM, segptr); + reg_write(priv, REG_DDC_ADDR, 0xa0); + reg_write(priv, REG_DDC_OFFS, offset); + reg_write(priv, REG_DDC_SEGM_ADDR, 0x60); + reg_write(priv, REG_DDC_SEGM, segptr); /* enable reading EDID: */ - reg_write(encoder, REG_EDID_CTRL, 0x1); + reg_write(priv, REG_EDID_CTRL, 0x1); /* flag must be cleared by sw: */ - reg_write(encoder, REG_EDID_CTRL, 0x0); + reg_write(priv, REG_EDID_CTRL, 0x0); /* wait for block read to complete: */ for (i = 100; i > 0; i--) { - uint8_t val = reg_read(encoder, REG_INT_FLAGS_2); + uint8_t val = reg_read(priv, REG_INT_FLAGS_2); if (val & INT_FLAGS_2_EDID_BLK_RD) break; msleep(1); @@ -985,14 +987,14 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) if (i == 0) return -ETIMEDOUT; - ret = reg_read_range(encoder, REG_EDID_DATA_0, buf, EDID_LENGTH); + ret = reg_read_range(priv, REG_EDID_DATA_0, buf, EDID_LENGTH); if (ret != EDID_LENGTH) { dev_err(encoder->dev->dev, "failed to read edid block %d: %d", blk, ret); return ret; } - reg_clear(encoder, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); + reg_clear(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); return 0; } @@ -1009,7 +1011,7 @@ do_get_edid(struct drm_encoder *encoder) return NULL; if (priv->rev == TDA19988) - reg_clear(encoder, REG_TX4, TX4_PD_RAM); + reg_clear(priv, REG_TX4, TX4_PD_RAM); /* base block fetch */ if (read_edid_block(encoder, block, 0)) @@ -1049,13 +1051,13 @@ do_get_edid(struct drm_encoder *encoder) done: if (priv->rev == TDA19988) - reg_set(encoder, REG_TX4, TX4_PD_RAM); + reg_set(priv, REG_TX4, TX4_PD_RAM); return block; fail: if (priv->rev == TDA19988) - reg_set(encoder, REG_TX4, TX4_PD_RAM); + reg_set(priv, REG_TX4, TX4_PD_RAM); dev_warn(encoder->dev->dev, "failed to read EDID\n"); kfree(block); return NULL; @@ -1141,7 +1143,6 @@ tda998x_encoder_init(struct i2c_client *client, struct drm_device *dev, struct drm_encoder_slave *encoder_slave) { - struct drm_encoder *encoder = &encoder_slave->base; struct tda998x_priv *priv; priv = kzalloc(sizeof(*priv), GFP_KERNEL); @@ -1153,6 +1154,7 @@ tda998x_encoder_init(struct i2c_client *client, priv->vip_cntrl_2 = VIP_CNTRL_2_SWAP_E(4) | VIP_CNTRL_2_SWAP_F(5); priv->current_page = 0xff; + priv->hdmi = client; priv->cec = i2c_new_dummy(client->adapter, 0x34); if (!priv->cec) { kfree(priv); @@ -1164,14 +1166,14 @@ tda998x_encoder_init(struct i2c_client *client, encoder_slave->slave_funcs = &tda998x_encoder_funcs; /* wake up the device: */ - cec_write(encoder, REG_CEC_ENAMODS, + cec_write(priv, REG_CEC_ENAMODS, CEC_ENAMODS_EN_RXSENS | CEC_ENAMODS_EN_HDMI); - tda998x_reset(encoder); + tda998x_reset(priv); /* read version: */ - priv->rev = reg_read(encoder, REG_VERSION_LSB) | - reg_read(encoder, REG_VERSION_MSB) << 8; + priv->rev = reg_read(priv, REG_VERSION_LSB) | + reg_read(priv, REG_VERSION_MSB) << 8; /* mask off feature bits: */ priv->rev &= ~0x30; /* not-hdcp and not-scalar bit */ @@ -1187,16 +1189,16 @@ tda998x_encoder_init(struct i2c_client *client, } /* after reset, enable DDC: */ - reg_write(encoder, REG_DDC_DISABLE, 0x00); + reg_write(priv, REG_DDC_DISABLE, 0x00); /* set clock on DDC channel: */ - reg_write(encoder, REG_TX3, 39); + reg_write(priv, REG_TX3, 39); /* if necessary, disable multi-master: */ if (priv->rev == TDA19989) - reg_set(encoder, REG_I2C_MASTER, I2C_MASTER_DIS_MM); + reg_set(priv, REG_I2C_MASTER, I2C_MASTER_DIS_MM); - cec_write(encoder, REG_CEC_FRO_IM_CLK_CTRL, + cec_write(priv, REG_CEC_FRO_IM_CLK_CTRL, CEC_FRO_IM_CLK_CTRL_GHOST_DIS | CEC_FRO_IM_CLK_CTRL_IMCLK_SEL); return 0; -- cgit v0.10.2 From 7d2eadc9b9d4eacc6aa8cc0cb33e05b5a6d30256 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:45 +0100 Subject: drm/i2c: tda998x: check more I/O errors This patch adds more error checking inn I2C I/O functions. In case of I/O error, this permits to avoid writing in bad controller pages, a bad chipset detection or looping when getting the EDID. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 7df73ba..9bd336c 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -363,7 +363,7 @@ fail: return 0; } -static void +static int set_page(struct tda998x_priv *priv, uint16_t reg) { if (REG2PAGE(reg) != priv->current_page) { @@ -372,11 +372,14 @@ set_page(struct tda998x_priv *priv, uint16_t reg) REG_CURPAGE, REG2PAGE(reg) }; int ret = i2c_master_send(client, buf, sizeof(buf)); - if (ret < 0) + if (ret < 0) { dev_err(&client->dev, "Error %d writing to REG_CURPAGE\n", ret); + return ret; + } priv->current_page = REG2PAGE(reg); } + return 0; } static int @@ -386,7 +389,9 @@ reg_read_range(struct tda998x_priv *priv, uint16_t reg, char *buf, int cnt) uint8_t addr = REG2ADDR(reg); int ret; - set_page(priv, reg); + ret = set_page(priv, reg); + if (ret < 0) + return ret; ret = i2c_master_send(client, &addr, sizeof(addr)); if (ret < 0) @@ -413,18 +418,24 @@ reg_write_range(struct tda998x_priv *priv, uint16_t reg, uint8_t *p, int cnt) buf[0] = REG2ADDR(reg); memcpy(&buf[1], p, cnt); - set_page(priv, reg); + ret = set_page(priv, reg); + if (ret < 0) + return; ret = i2c_master_send(client, buf, cnt + 1); if (ret < 0) dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg); } -static uint8_t +static int reg_read(struct tda998x_priv *priv, uint16_t reg) { uint8_t val = 0; - reg_read_range(priv, reg, &val, sizeof(val)); + int ret; + + ret = reg_read_range(priv, reg, &val, sizeof(val)); + if (ret < 0) + return ret; return val; } @@ -435,7 +446,9 @@ reg_write(struct tda998x_priv *priv, uint16_t reg, uint8_t val) uint8_t buf[] = {REG2ADDR(reg), val}; int ret; - set_page(priv, reg); + ret = set_page(priv, reg); + if (ret < 0) + return; ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); if (ret < 0) @@ -449,7 +462,9 @@ reg_write16(struct tda998x_priv *priv, uint16_t reg, uint16_t val) uint8_t buf[] = {REG2ADDR(reg), val >> 8, val}; int ret; - set_page(priv, reg); + ret = set_page(priv, reg); + if (ret < 0) + return; ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); if (ret < 0) @@ -459,13 +474,21 @@ reg_write16(struct tda998x_priv *priv, uint16_t reg, uint16_t val) static void reg_set(struct tda998x_priv *priv, uint16_t reg, uint8_t val) { - reg_write(priv, reg, reg_read(priv, reg) | val); + int old_val; + + old_val = reg_read(priv, reg); + if (old_val >= 0) + reg_write(priv, reg, old_val | val); } static void reg_clear(struct tda998x_priv *priv, uint16_t reg, uint8_t val) { - reg_write(priv, reg, reg_read(priv, reg) & ~val); + int old_val; + + old_val = reg_read(priv, reg); + if (old_val >= 0) + reg_write(priv, reg, old_val & ~val); } static void @@ -978,8 +1001,10 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) /* wait for block read to complete: */ for (i = 100; i > 0; i--) { - uint8_t val = reg_read(priv, REG_INT_FLAGS_2); - if (val & INT_FLAGS_2_EDID_BLK_RD) + ret = reg_read(priv, REG_INT_FLAGS_2); + if (ret < 0) + return ret; + if (ret & INT_FLAGS_2_EDID_BLK_RD) break; msleep(1); } @@ -1144,6 +1169,7 @@ tda998x_encoder_init(struct i2c_client *client, struct drm_encoder_slave *encoder_slave) { struct tda998x_priv *priv; + int ret; priv = kzalloc(sizeof(*priv), GFP_KERNEL); if (!priv) @@ -1172,8 +1198,11 @@ tda998x_encoder_init(struct i2c_client *client, tda998x_reset(priv); /* read version: */ - priv->rev = reg_read(priv, REG_VERSION_LSB) | - reg_read(priv, REG_VERSION_MSB) << 8; + ret = reg_read(priv, REG_VERSION_LSB) | + (reg_read(priv, REG_VERSION_MSB) << 8); + if (ret < 0) + goto fail; + priv->rev = ret; /* mask off feature bits: */ priv->rev &= ~0x30; /* not-hdcp and not-scalar bit */ -- cgit v0.10.2 From fb7544d7732f780df989fabf31c5852be953daad Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 2 Feb 2014 16:18:24 +0000 Subject: drm/i2c: tda998x: clean up error chip version checking This is a nicer way, and results in proper return codes should the read of the MSB version register fail. Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 9bd336c..19f4182 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -1169,7 +1169,7 @@ tda998x_encoder_init(struct i2c_client *client, struct drm_encoder_slave *encoder_slave) { struct tda998x_priv *priv; - int ret; + int rev_lo, rev_hi, ret; priv = kzalloc(sizeof(*priv), GFP_KERNEL); if (!priv) @@ -1198,11 +1198,14 @@ tda998x_encoder_init(struct i2c_client *client, tda998x_reset(priv); /* read version: */ - ret = reg_read(priv, REG_VERSION_LSB) | - (reg_read(priv, REG_VERSION_MSB) << 8); - if (ret < 0) + rev_lo = reg_read(priv, REG_VERSION_LSB); + rev_hi = reg_read(priv, REG_VERSION_MSB); + if (rev_lo < 0 || rev_hi < 0) { + ret = rev_lo < 0 ? rev_lo : rev_hi; goto fail; - priv->rev = ret; + } + + priv->rev = rev_lo | rev_hi << 8; /* mask off feature bits: */ priv->rev &= ~0x30; /* not-hdcp and not-scalar bit */ -- cgit v0.10.2 From 704d63f59900968b9b5ae92549c49db0686b87e3 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:46 +0100 Subject: drm/i2c: tda998x: code cleanup This patch: - replaces ARRAY_SIZE() by sizeof() when a number of bytes is needed, - adds a linefeed in an error message and - removes an useless variable setting. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 19f4182..c5c9de5 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -336,7 +336,7 @@ cec_write(struct tda998x_priv *priv, uint16_t addr, uint8_t val) uint8_t buf[] = {addr, val}; int ret; - ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); + ret = i2c_master_send(client, buf, sizeof(buf)); if (ret < 0) dev_err(&client->dev, "Error %d writing to cec:0x%x\n", ret, addr); } @@ -373,7 +373,8 @@ set_page(struct tda998x_priv *priv, uint16_t reg) }; int ret = i2c_master_send(client, buf, sizeof(buf)); if (ret < 0) { - dev_err(&client->dev, "Error %d writing to REG_CURPAGE\n", ret); + dev_err(&client->dev, "setpage %04x err %d\n", + reg, ret); return ret; } @@ -450,7 +451,7 @@ reg_write(struct tda998x_priv *priv, uint16_t reg, uint8_t val) if (ret < 0) return; - ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); + ret = i2c_master_send(client, buf, sizeof(buf)); if (ret < 0) dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg); } @@ -466,7 +467,7 @@ reg_write16(struct tda998x_priv *priv, uint16_t reg, uint16_t val) if (ret < 0) return; - ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); + ret = i2c_master_send(client, buf, sizeof(buf)); if (ret < 0) dev_err(&client->dev, "Error %d writing to 0x%x\n", ret, reg); } @@ -1014,7 +1015,7 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) ret = reg_read_range(priv, REG_EDID_DATA_0, buf, EDID_LENGTH); if (ret != EDID_LENGTH) { - dev_err(encoder->dev->dev, "failed to read edid block %d: %d", + dev_err(encoder->dev->dev, "failed to read edid block %d: %d\n", blk, ret); return ret; } @@ -1028,7 +1029,7 @@ static uint8_t * do_get_edid(struct drm_encoder *encoder) { struct tda998x_priv *priv = to_tda998x_priv(encoder); - int j = 0, valid_extensions = 0; + int j, valid_extensions = 0; uint8_t *block, *new; bool print_bad_edid = drm_debug & DRM_UT_KMS; -- cgit v0.10.2 From b728fab7026b9db5a9bb60c7638765cfa4ee50c1 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:46 +0100 Subject: drm/i2c: tda998x: change probe message origin On probe, a message giving the TDA chip version seems to come from the DRM driver: armada-drm armada-510-drm: found TDA19988 This patch changes the originator of the message to the TDA driver: tda998x 0-0070: found TDA19988 Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index c5c9de5..c3eebd7 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -1212,12 +1212,21 @@ tda998x_encoder_init(struct i2c_client *client, priv->rev &= ~0x30; /* not-hdcp and not-scalar bit */ switch (priv->rev) { - case TDA9989N2: dev_info(dev->dev, "found TDA9989 n2"); break; - case TDA19989: dev_info(dev->dev, "found TDA19989"); break; - case TDA19989N2: dev_info(dev->dev, "found TDA19989 n2"); break; - case TDA19988: dev_info(dev->dev, "found TDA19988"); break; + case TDA9989N2: + dev_info(&client->dev, "found TDA9989 n2"); + break; + case TDA19989: + dev_info(&client->dev, "found TDA19989"); + break; + case TDA19989N2: + dev_info(&client->dev, "found TDA19989 n2"); + break; + case TDA19988: + dev_info(&client->dev, "found TDA19988"); + break; default: - DBG("found unsupported device: %04x", priv->rev); + dev_err(&client->dev, "found unsupported device: %04x\n", + priv->rev); goto fail; } -- cgit v0.10.2 From 73d5e253ac641bf95f5836c064128be78f43cd0b Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:44 +0100 Subject: drm/i2c: tda998x: don't freeze the system at audio startup time This patch prevents the system to be freezed at audio startup time, replacing mdelay by msleep. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index c3eebd7..80b94b5 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -681,7 +681,7 @@ tda998x_configure_audio(struct tda998x_priv *priv, reg_write_range(priv, REG_CH_STAT_B(0), buf, 4); tda998x_audio_mute(priv, true); - mdelay(20); + msleep(20); tda998x_audio_mute(priv, false); /* Write the audio information packet */ -- cgit v0.10.2 From 81b53a166f5cdf4e5bec47fc8884c994de82dc6b Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:42 +0100 Subject: drm/i2c: tda998x: don't read write-only registers This patch takes care of the write-only registers of the tda998x. The registers SOFTRESET, TBG_CNTRL_0 and TBG_CNTRL_1 have all bits cleared after reset, so, they may be fully re-written. The register MAT_CONTRL is set to MAT_CONTRL_MAT_BP | MAT_CONTRL_MAT_SC(1) after reset, so, it may be fully set again to this value. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 80b94b5..d31e1c17 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -496,9 +496,9 @@ static void tda998x_reset(struct tda998x_priv *priv) { /* reset audio and i2c master: */ - reg_set(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); + reg_write(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); msleep(50); - reg_clear(priv, REG_SOFTRESET, SOFTRESET_AUDIO | SOFTRESET_I2C_MASTER); + reg_write(priv, REG_SOFTRESET, 0); msleep(50); /* reset transmitter: */ @@ -860,7 +860,7 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); /* set HDMI HDCP mode off: */ - reg_set(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); + reg_write(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); reg_clear(priv, REG_TX33, TX33_HDMI); reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(0)); @@ -887,38 +887,28 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, PLL_SERIAL_2_SRL_PR(rep)); /* set color matrix bypass flag: */ - reg_set(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP); + reg_write(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP | + MAT_CONTRL_MAT_SC(1)); /* set BIAS tmds value: */ reg_write(priv, REG_ANA_GENERAL, 0x09); - reg_clear(priv, REG_TBG_CNTRL_0, TBG_CNTRL_0_SYNC_MTHD); + reg_write(priv, REG_TBG_CNTRL_0, 0); /* * Sync on rising HSYNC/VSYNC */ - reg_write(priv, REG_VIP_CNTRL_3, 0); - reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_SYNC_HS); + reg = VIP_CNTRL_3_SYNC_HS; /* * TDA19988 requires high-active sync at input stage, * so invert low-active sync provided by master encoder here */ if (mode->flags & DRM_MODE_FLAG_NHSYNC) - reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_H_TGL); + reg |= VIP_CNTRL_3_H_TGL; if (mode->flags & DRM_MODE_FLAG_NVSYNC) - reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_V_TGL); - - /* - * Always generate sync polarity relative to input sync and - * revert input stage toggled sync at output stage - */ - reg = TBG_CNTRL_1_TGL_EN; - if (mode->flags & DRM_MODE_FLAG_NHSYNC) - reg |= TBG_CNTRL_1_H_TGL; - if (mode->flags & DRM_MODE_FLAG_NVSYNC) - reg |= TBG_CNTRL_1_V_TGL; - reg_write(priv, REG_TBG_CNTRL_1, reg); + reg |= VIP_CNTRL_3_V_TGL; + reg_write(priv, REG_VIP_CNTRL_3, reg); reg_write(priv, REG_VIDFORMAT, 0x00); reg_write16(priv, REG_REFPIX_MSB, ref_pix); @@ -947,13 +937,25 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, reg_write(priv, REG_ENABLE_SPACE, 0x00); } + /* + * Always generate sync polarity relative to input sync and + * revert input stage toggled sync at output stage + */ + reg = TBG_CNTRL_1_DWIN_DIS | TBG_CNTRL_1_TGL_EN; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + reg |= TBG_CNTRL_1_H_TGL; + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + reg |= TBG_CNTRL_1_V_TGL; + reg_write(priv, REG_TBG_CNTRL_1, reg); + /* must be last register set: */ - reg_clear(priv, REG_TBG_CNTRL_0, TBG_CNTRL_0_SYNC_ONCE); + reg_write(priv, REG_TBG_CNTRL_0, 0); /* Only setup the info frames if the sink is HDMI */ if (priv->is_hdmi_sink) { /* We need to turn HDMI HDCP stuff on to get audio through */ - reg_clear(priv, REG_TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS); + reg &= ~TBG_CNTRL_1_DWIN_DIS; + reg_write(priv, REG_TBG_CNTRL_1, reg); reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1)); reg_set(priv, REG_TX33, TX33_HDMI); -- cgit v0.10.2 From 0d44ea190387e21a7e6f6d7c9dd44df2e85d007a Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:41 +0100 Subject: drm/i2c: tda998x: add DT support This patch adds DT support to the tda998x. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index d31e1c17..1ea4d43 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -1172,6 +1172,8 @@ tda998x_encoder_init(struct i2c_client *client, struct drm_encoder_slave *encoder_slave) { struct tda998x_priv *priv; + struct device_node *np = client->dev.of_node; + u32 video; int rev_lo, rev_hi, ret; priv = kzalloc(sizeof(*priv), GFP_KERNEL); @@ -1245,6 +1247,17 @@ tda998x_encoder_init(struct i2c_client *client, cec_write(priv, REG_CEC_FRO_IM_CLK_CTRL, CEC_FRO_IM_CLK_CTRL_GHOST_DIS | CEC_FRO_IM_CLK_CTRL_IMCLK_SEL); + if (!np) + return 0; /* non-DT */ + + /* get the optional video properties */ + ret = of_property_read_u32(np, "video-ports", &video); + if (ret == 0) { + priv->vip_cntrl_0 = video >> 16; + priv->vip_cntrl_1 = video >> 8; + priv->vip_cntrl_2 = video; + } + return 0; fail: @@ -1259,6 +1272,14 @@ fail: return -ENXIO; } +#ifdef CONFIG_OF +static const struct of_device_id tda998x_dt_ids[] = { + { .compatible = "nxp,tda998x", }, + { } +}; +MODULE_DEVICE_TABLE(of, tda998x_dt_ids); +#endif + static struct i2c_device_id tda998x_ids[] = { { "tda998x", 0 }, { } @@ -1271,6 +1292,7 @@ static struct drm_i2c_encoder_driver tda998x_driver = { .remove = tda998x_remove, .driver = { .name = "tda998x", + .of_match_table = of_match_ptr(tda998x_dt_ids), }, .id_table = tda998x_ids, }, -- cgit v0.10.2 From 7c82e064ea7b64b986104260c300b370feef403a Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:37 +0100 Subject: drm/i2c: tda998x: add DT documentation Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt new file mode 100644 index 0000000..d7df01c --- /dev/null +++ b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt @@ -0,0 +1,27 @@ +Device-Tree bindings for the NXP TDA998x HDMI transmitter + +Required properties; + - compatible: must be "nxp,tda998x" + +Optional properties: + - interrupts: interrupt number and trigger type + default: polling + + - pinctrl-0: pin control group to be used for + screen plug/unplug interrupt. + + - pinctrl-names: must contain a "default" entry. + + - video-ports: 24 bits value which defines how the video controller + output is wired to the TDA998x input - default: <0x230145> + +Example: + + tda998x: hdmi-encoder { + compatible = "nxp,tda998x"; + reg = <0x70>; + interrupt-parent = <&gpio0>; + interrupts = <27 2>; /* falling edge */ + pinctrl-0 = <&pmx_camera>; + pinctrl-names = "default"; + }; -- cgit v0.10.2 From e47826274e8871bc6b35f82d35aea53db0f4ae31 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:38 +0100 Subject: drm/i2c: tda998x: always enable EDID read IRQ There is no need to enable/disable EDID read IRQ at each EDID block read. This patch enables the IRQ at init time. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 1ea4d43..fddac4c 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -985,9 +985,6 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) uint8_t offset, segptr; int ret, i; - /* enable EDID read irq: */ - reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); - offset = (blk & 1) ? 128 : 0; segptr = blk / 2; @@ -1022,8 +1019,6 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) return ret; } - reg_clear(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); - return 0; } @@ -1247,6 +1242,9 @@ tda998x_encoder_init(struct i2c_client *client, cec_write(priv, REG_CEC_FRO_IM_CLK_CTRL, CEC_FRO_IM_CLK_CTRL_GHOST_DIS | CEC_FRO_IM_CLK_CTRL_IMCLK_SEL); + /* enable EDID read irq: */ + reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); + if (!np) return 0; /* non-DT */ -- cgit v0.10.2 From 12473b7d8e6074c7d4c2816afa6027354ce9a502 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:38 +0100 Subject: drm/i2c: tda998x: use irq for connection status and EDID read This patch adds the optional treatment of the tda998x IRQ. The interrupt function is used to know the display connection status without polling and to speedup reading the EDID. The IRQ number and trigger type are defined in the i2c client either by platform data or in the DT. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index fddac4c..c988224 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -19,6 +19,7 @@ #include #include +#include #include #include @@ -40,6 +41,10 @@ struct tda998x_priv { u8 vip_cntrl_1; u8 vip_cntrl_2; struct tda998x_encoder_params params; + + wait_queue_head_t wq_edid; + volatile int wq_edid_wait; + struct drm_encoder *encoder; }; #define to_tda998x_priv(x) ((struct tda998x_priv *)to_encoder_slave(x)->slave_priv) @@ -306,11 +311,16 @@ struct tda998x_priv { /* CEC registers: (not paged) */ +#define REG_CEC_INTSTATUS 0xee /* read */ +# define CEC_INTSTATUS_CEC (1 << 0) +# define CEC_INTSTATUS_HDMI (1 << 1) #define REG_CEC_FRO_IM_CLK_CTRL 0xfb /* read/write */ # define CEC_FRO_IM_CLK_CTRL_GHOST_DIS (1 << 7) # define CEC_FRO_IM_CLK_CTRL_ENA_OTP (1 << 6) # define CEC_FRO_IM_CLK_CTRL_IMCLK_SEL (1 << 1) # define CEC_FRO_IM_CLK_CTRL_FRO_DIV (1 << 0) +#define REG_CEC_RXSHPDINTENA 0xfc /* read/write */ +#define REG_CEC_RXSHPDINT 0xfd /* read */ #define REG_CEC_RXSHPDLEV 0xfe /* read */ # define CEC_RXSHPDLEV_RXSENS (1 << 0) # define CEC_RXSHPDLEV_HPD (1 << 1) @@ -524,6 +534,35 @@ tda998x_reset(struct tda998x_priv *priv) reg_write(priv, REG_MUX_VP_VIP_OUT, 0x24); } +/* + * only 2 interrupts may occur: screen plug/unplug and EDID read + */ +static irqreturn_t tda998x_irq_thread(int irq, void *data) +{ + struct tda998x_priv *priv = data; + u8 sta, cec, lvl, flag0, flag1, flag2; + + if (!priv) + return IRQ_HANDLED; + sta = cec_read(priv, REG_CEC_INTSTATUS); + cec = cec_read(priv, REG_CEC_RXSHPDINT); + lvl = cec_read(priv, REG_CEC_RXSHPDLEV); + flag0 = reg_read(priv, REG_INT_FLAGS_0); + flag1 = reg_read(priv, REG_INT_FLAGS_1); + flag2 = reg_read(priv, REG_INT_FLAGS_2); + DRM_DEBUG_DRIVER( + "tda irq sta %02x cec %02x lvl %02x f0 %02x f1 %02x f2 %02x\n", + sta, cec, lvl, flag0, flag1, flag2); + if ((flag2 & INT_FLAGS_2_EDID_BLK_RD) && priv->wq_edid_wait) { + priv->wq_edid_wait = 0; + wake_up(&priv->wq_edid); + } else if (cec != 0) { /* HPD change */ + if (priv->encoder && priv->encoder->dev) + drm_helper_hpd_irq_event(priv->encoder->dev); + } + return IRQ_HANDLED; +} + static uint8_t tda998x_cksum(uint8_t *buf, size_t bytes) { uint8_t sum = 0; @@ -994,23 +1033,36 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) reg_write(priv, REG_DDC_SEGM, segptr); /* enable reading EDID: */ + priv->wq_edid_wait = 1; reg_write(priv, REG_EDID_CTRL, 0x1); /* flag must be cleared by sw: */ reg_write(priv, REG_EDID_CTRL, 0x0); /* wait for block read to complete: */ - for (i = 100; i > 0; i--) { - ret = reg_read(priv, REG_INT_FLAGS_2); - if (ret < 0) - return ret; - if (ret & INT_FLAGS_2_EDID_BLK_RD) - break; - msleep(1); + if (priv->hdmi->irq) { + i = wait_event_timeout(priv->wq_edid, + !priv->wq_edid_wait, + msecs_to_jiffies(100)); + if (i < 0) { + dev_err(encoder->dev->dev, "read edid wait err %d\n", i); + return i; + } + } else { + for (i = 10; i > 0; i--) { + msleep(10); + ret = reg_read(priv, REG_INT_FLAGS_2); + if (ret < 0) + return ret; + if (ret & INT_FLAGS_2_EDID_BLK_RD) + break; + } } - if (i == 0) + if (i == 0) { + dev_err(encoder->dev->dev, "read edid timeout\n"); return -ETIMEDOUT; + } ret = reg_read_range(priv, REG_EDID_DATA_0, buf, EDID_LENGTH); if (ret != EDID_LENGTH) { @@ -1108,7 +1160,13 @@ static int tda998x_encoder_create_resources(struct drm_encoder *encoder, struct drm_connector *connector) { - DBG(""); + struct tda998x_priv *priv = to_tda998x_priv(encoder); + + if (priv->hdmi->irq) + connector->polled = DRM_CONNECTOR_POLL_HPD; + else + connector->polled = DRM_CONNECTOR_POLL_CONNECT | + DRM_CONNECTOR_POLL_DISCONNECT; return 0; } @@ -1127,6 +1185,13 @@ tda998x_encoder_destroy(struct drm_encoder *encoder) { struct tda998x_priv *priv = to_tda998x_priv(encoder); drm_i2c_encoder_destroy(encoder); + + /* disable all IRQs and free the IRQ handler */ + cec_write(priv, REG_CEC_RXSHPDINTENA, 0); + reg_clear(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); + if (priv->hdmi->irq) + free_irq(priv->hdmi->irq, priv); + if (priv->cec) i2c_unregister_device(priv->cec); kfree(priv); @@ -1186,6 +1251,8 @@ tda998x_encoder_init(struct i2c_client *client, kfree(priv); return -ENODEV; } + + priv->encoder = &encoder_slave->base; priv->dpms = DRM_MODE_DPMS_OFF; encoder_slave->slave_priv = priv; @@ -1242,6 +1309,35 @@ tda998x_encoder_init(struct i2c_client *client, cec_write(priv, REG_CEC_FRO_IM_CLK_CTRL, CEC_FRO_IM_CLK_CTRL_GHOST_DIS | CEC_FRO_IM_CLK_CTRL_IMCLK_SEL); + /* initialize the optional IRQ */ + if (client->irq) { + int irqf_trigger; + + /* init read EDID waitqueue */ + init_waitqueue_head(&priv->wq_edid); + + /* clear pending interrupts */ + reg_read(priv, REG_INT_FLAGS_0); + reg_read(priv, REG_INT_FLAGS_1); + reg_read(priv, REG_INT_FLAGS_2); + + irqf_trigger = + irqd_get_trigger_type(irq_get_irq_data(client->irq)); + ret = request_threaded_irq(client->irq, NULL, + tda998x_irq_thread, + irqf_trigger | IRQF_ONESHOT, + "tda998x", priv); + if (ret) { + dev_err(&client->dev, + "failed to request IRQ#%u: %d\n", + client->irq, ret); + goto fail; + } + + /* enable HPD irq */ + cec_write(priv, REG_CEC_RXSHPDINTENA, CEC_RXSHPDLEV_HPD); + } + /* enable EDID read irq: */ reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD); -- cgit v0.10.2 From 10df1a95d6457ead03ed804c9abece79023f3f77 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:40 +0100 Subject: drm/i2c: tda998x: make the audio code more readable This patch adds a definition of the values of the MUX_AP register and simplifies the macro's defining the fields of the AIP_CLKSEL register. This makes the format specific audio init sequence more readable. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index c988224..99d210b 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -127,6 +127,8 @@ struct tda998x_priv { # define VIP_CNTRL_5_CKCASE (1 << 0) # define VIP_CNTRL_5_SP_CNT(x) (((x) & 3) << 1) #define REG_MUX_AP REG(0x00, 0x26) /* read/write */ +# define MUX_AP_SELECT_I2S 0x64 +# define MUX_AP_SELECT_SPDIF 0x40 #define REG_MUX_VP_VIP_OUT REG(0x00, 0x27) /* read/write */ #define REG_MAT_CONTRL REG(0x00, 0x80) /* write */ # define MAT_CONTRL_MAT_SC(x) (((x) & 3) << 0) @@ -204,10 +206,11 @@ struct tda998x_priv { #define REG_I2S_FORMAT REG(0x00, 0xfc) /* read/write */ # define I2S_FORMAT(x) (((x) & 3) << 0) #define REG_AIP_CLKSEL REG(0x00, 0xfd) /* write */ -# define AIP_CLKSEL_FS(x) (((x) & 3) << 0) -# define AIP_CLKSEL_CLK_POL(x) (((x) & 1) << 2) -# define AIP_CLKSEL_AIP(x) (((x) & 7) << 3) - +# define AIP_CLKSEL_AIP_SPDIF (0 << 3) +# define AIP_CLKSEL_AIP_I2S (1 << 3) +# define AIP_CLKSEL_FS_ACLK (0 << 0) +# define AIP_CLKSEL_FS_MCLK (1 << 0) +# define AIP_CLKSEL_FS_FS64SPDIF (2 << 0) /* Page 02h: PLL settings */ #define REG_PLL_SERIAL_1 REG(0x02, 0x00) /* read/write */ @@ -647,19 +650,17 @@ tda998x_configure_audio(struct tda998x_priv *priv, /* Set audio input source */ switch (p->audio_format) { case AFMT_SPDIF: - reg_write(priv, REG_MUX_AP, 0x40); - clksel_aip = AIP_CLKSEL_AIP(0); - /* FS64SPDIF */ - clksel_fs = AIP_CLKSEL_FS(2); + reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_SPDIF); + clksel_aip = AIP_CLKSEL_AIP_SPDIF; + clksel_fs = AIP_CLKSEL_FS_FS64SPDIF; cts_n = CTS_N_M(3) | CTS_N_K(3); ca_i2s = 0; break; case AFMT_I2S: - reg_write(priv, REG_MUX_AP, 0x64); - clksel_aip = AIP_CLKSEL_AIP(1); - /* ACLK */ - clksel_fs = AIP_CLKSEL_FS(0); + reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_I2S); + clksel_aip = AIP_CLKSEL_AIP_I2S; + clksel_fs = AIP_CLKSEL_FS_ACLK; cts_n = CTS_N_M(3) | CTS_N_K(3); ca_i2s = CA_I2S_CA_I2S(0); break; -- cgit v0.10.2 From 85c988bb26a3da46c04284bc43f93d732986547b Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:40 +0100 Subject: drm/i2c: tda998x: remove the unused variable ca_i2s ca_i2s is only ever written to, but never read, so let's get rid of it. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 99d210b..4352294 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -640,7 +640,7 @@ static void tda998x_configure_audio(struct tda998x_priv *priv, struct drm_display_mode *mode, struct tda998x_encoder_params *p) { - uint8_t buf[6], clksel_aip, clksel_fs, ca_i2s, cts_n, adiv; + uint8_t buf[6], clksel_aip, clksel_fs, cts_n, adiv; uint32_t n; /* Enable audio ports */ @@ -654,7 +654,6 @@ tda998x_configure_audio(struct tda998x_priv *priv, clksel_aip = AIP_CLKSEL_AIP_SPDIF; clksel_fs = AIP_CLKSEL_FS_FS64SPDIF; cts_n = CTS_N_M(3) | CTS_N_K(3); - ca_i2s = 0; break; case AFMT_I2S: @@ -662,7 +661,6 @@ tda998x_configure_audio(struct tda998x_priv *priv, clksel_aip = AIP_CLKSEL_AIP_I2S; clksel_fs = AIP_CLKSEL_FS_ACLK; cts_n = CTS_N_M(3) | CTS_N_K(3); - ca_i2s = CA_I2S_CA_I2S(0); break; default: -- cgit v0.10.2 From a8b517e5312124e2dd7b6d6d9afac458aaecfbf3 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:39 +0100 Subject: drm/i2c: tda998x: code optimization This patch reduces the number of I2C exchanges by setting many bits in one write and removing a useless write. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 4352294..666ee24 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -669,10 +669,8 @@ tda998x_configure_audio(struct tda998x_priv *priv, } reg_write(priv, REG_AIP_CLKSEL, clksel_aip); - reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT); - - /* Enable automatic CTS generation */ - reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_ACR_MAN); + reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT | + AIP_CNTRL_0_ACR_MAN); /* auto CTS */ reg_write(priv, REG_CTS_N, cts_n); /* @@ -908,10 +906,10 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, reg_write(priv, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0)); reg_write(priv, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) | VIP_CNTRL_4_BLC(0)); - reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR); reg_clear(priv, REG_PLL_SERIAL_1, PLL_SERIAL_1_SRL_MAN_IZ); - reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_DE); + reg_clear(priv, REG_PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR | + PLL_SERIAL_3_SRL_DE); reg_write(priv, REG_SERIALIZER, 0); reg_write(priv, REG_HVF_CNTRL_1, HVF_CNTRL_1_VQR(0)); @@ -931,8 +929,6 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, /* set BIAS tmds value: */ reg_write(priv, REG_ANA_GENERAL, 0x09); - reg_write(priv, REG_TBG_CNTRL_0, 0); - /* * Sync on rising HSYNC/VSYNC */ -- cgit v0.10.2 From 2470feccbf030652380c2d73304576137b0fb12e Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 25 Jan 2014 18:14:36 +0100 Subject: drm/i2c: tda998x: adjust the audio clock divider for S/PDIF According to some tests on the Cubox (Marvell Armada 510 + TDA19988), the S/PDIF input asks for a greater audio clock divider. Tested-by: Russell King Acked-by: Russell King Signed-off-by: Jean-Francois Moine Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 666ee24..d0f3a4c 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -680,10 +680,14 @@ tda998x_configure_audio(struct tda998x_priv *priv, * There is no detailed info in the datasheet, so we just * assume 100MHz requires larger divider. */ + adiv = AUDIO_DIV_SERCLK_8; if (mode->clock > 100000) - adiv = AUDIO_DIV_SERCLK_16; - else - adiv = AUDIO_DIV_SERCLK_8; + adiv++; /* AUDIO_DIV_SERCLK_16 */ + + /* S/PDIF asks for a larger divider */ + if (p->audio_format == AFMT_SPDIF) + adiv++; /* AUDIO_DIV_SERCLK_16 or _32 */ + reg_write(priv, REG_AUDIO_DIV, adiv); /* -- cgit v0.10.2 From 5e7fe2fef4347d7a09bb15588d8bbe3cb83b6ed4 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 7 Feb 2014 19:13:23 +0000 Subject: drm/i2c: tda998x: always use the same device for all kernel messages Rather than using a mixture of the parent DRM device and the component device for messages from the driver, consistently use the component device for all messages. Signed-off-by: Russell King diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index d0f3a4c..48af5ca 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -1044,7 +1044,7 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) !priv->wq_edid_wait, msecs_to_jiffies(100)); if (i < 0) { - dev_err(encoder->dev->dev, "read edid wait err %d\n", i); + dev_err(&priv->hdmi->dev, "read edid wait err %d\n", i); return i; } } else { @@ -1059,14 +1059,14 @@ read_edid_block(struct drm_encoder *encoder, uint8_t *buf, int blk) } if (i == 0) { - dev_err(encoder->dev->dev, "read edid timeout\n"); + dev_err(&priv->hdmi->dev, "read edid timeout\n"); return -ETIMEDOUT; } ret = reg_read_range(priv, REG_EDID_DATA_0, buf, EDID_LENGTH); if (ret != EDID_LENGTH) { - dev_err(encoder->dev->dev, "failed to read edid block %d: %d\n", - blk, ret); + dev_err(&priv->hdmi->dev, "failed to read edid block %d: %d\n", + blk, ret); return ret; } @@ -1132,7 +1132,7 @@ done: fail: if (priv->rev == TDA19988) reg_set(priv, REG_TX4, TX4_PD_RAM); - dev_warn(encoder->dev->dev, "failed to read EDID\n"); + dev_warn(&priv->hdmi->dev, "failed to read EDID\n"); kfree(block); return NULL; } -- cgit v0.10.2