From a625e305edd8e3ac08888a9b52981205b68cdb0e Mon Sep 17 00:00:00 2001 From: Peter Huewe Date: Tue, 25 Jan 2011 22:34:24 +0100 Subject: video/via: drop deprecated (and unused) i2c_adapter.id This patch removes an assignment to the deprecated i2c_adapter.id field. Since the field isn't used anywhere else in the driver it is save to remove it. Signed-off-by: Peter Huewe Acked-by: Jean Delvare Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/via_i2c.c b/drivers/video/via/via_i2c.c index 3844b55..a172a31 100644 --- a/drivers/video/via/via_i2c.c +++ b/drivers/video/via/via_i2c.c @@ -209,7 +209,6 @@ static int create_i2c_bus(struct i2c_adapter *adapter, sprintf(adapter->name, "viafb i2c io_port idx 0x%02x", adap_cfg->ioport_index); adapter->owner = THIS_MODULE; - adapter->id = 0x01FFFF; adapter->class = I2C_CLASS_DDC; adapter->algo_data = algo; if (pdev) -- cgit v0.10.2 From b65d6040e3a7cd75d9287f7ddfd115e85fde4b44 Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Thu, 3 Mar 2011 09:59:01 -0800 Subject: video via: fix iomem access This driver is not respecting the iomem memory space restrictions and does direct access. This works on x86 but is non-portable and should not be done. Converted memcpy() of 2 to readw. Last post increment of romptr was unnecessary since pointer never used after that. Found by sparse, compile tested only. Signed-off-by: Stephen Hemminger Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 3425c39..723fa04 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -1064,34 +1064,33 @@ static struct display_timing lcd_centering_timging(struct display_timing bool viafb_lcd_get_mobile_state(bool *mobile) { - unsigned char *romptr, *tableptr; + unsigned char __iomem *romptr, *tableptr, *biosptr; u8 core_base; - unsigned char *biosptr; /* Rom address */ - u32 romaddr = 0x000C0000; - u16 start_pattern = 0; + const u32 romaddr = 0x000C0000; + u16 start_pattern; biosptr = ioremap(romaddr, 0x10000); + start_pattern = readw(biosptr); - memcpy(&start_pattern, biosptr, 2); /* Compare pattern */ if (start_pattern == 0xAA55) { /* Get the start of Table */ /* 0x1B means BIOS offset position */ romptr = biosptr + 0x1B; - tableptr = biosptr + *((u16 *) romptr); + tableptr = biosptr + readw(romptr); /* Get the start of biosver structure */ /* 18 means BIOS version position. */ romptr = tableptr + 18; - romptr = biosptr + *((u16 *) romptr); + romptr = biosptr + readw(romptr); /* The offset should be 44, but the actual image is less three char. */ /* pRom += 44; */ romptr += 41; - core_base = *romptr++; + core_base = readb(romptr); if (core_base & 0x8) *mobile = false; -- cgit v0.10.2 From 23e5abd5555b86fd56af6383e7a832b0cf2a2d95 Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Thu, 3 Mar 2011 10:00:08 -0800 Subject: video via: make local variables static Many local variables should be declared static. Found by sparse, compile tested only. Signed-off-by: Stephen Hemminger Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 36d73f9..9ecf4862 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -751,7 +751,7 @@ void viafb_unlock_crt(void) viafb_write_reg_mask(CR47, VIACR, 0, BIT0); } -void write_dac_reg(u8 index, u8 r, u8 g, u8 b) +static void write_dac_reg(u8 index, u8 r, u8 g, u8 b) { outb(index, LUT_INDEX_WRITE); outb(r, LUT_DATA); diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 723fa04..2ca3bb8 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -26,10 +26,12 @@ /* CLE266 Software Power Sequence */ /* {Mask}, {Data}, {Delay} */ -int PowerSequenceOn[3][3] = { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, - {0x19, 0x1FE, 0x01} }; -int PowerSequenceOff[3][3] = { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, - {0xD2, 0x19, 0x01} }; +static const int PowerSequenceOn[3][3] = { + {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} +}; +static const int PowerSequenceOff[3][3] = { + {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} +}; static struct _lcd_scaling_factor lcd_scaling_factor = { /* LCD Horizontal Scaling Factor Register */ diff --git a/drivers/video/via/via_i2c.c b/drivers/video/via/via_i2c.c index a172a31..78f1405 100644 --- a/drivers/video/via/via_i2c.c +++ b/drivers/video/via/via_i2c.c @@ -32,7 +32,7 @@ */ #define VIAFB_NUM_I2C 5 static struct via_i2c_stuff via_i2c_par[VIAFB_NUM_I2C]; -struct viafb_dev *i2c_vdev; /* Passed in from core */ +static struct viafb_dev *i2c_vdev; /* Passed in from core */ static void via_i2c_setscl(void *data, int state) { diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c index 4e66349e..f555b89 100644 --- a/drivers/video/via/viafbdev.c +++ b/drivers/video/via/viafbdev.c @@ -43,11 +43,11 @@ static int viafb_second_size; static int viafb_accel = 1; /* Added for specifying active devices.*/ -char *viafb_active_dev; +static char *viafb_active_dev; /*Added for specify lcd output port*/ -char *viafb_lcd_port = ""; -char *viafb_dvi_port = ""; +static char *viafb_lcd_port = ""; +static char *viafb_dvi_port = ""; static void retrieve_device_setting(struct viafb_ioctl_setting *setting_info); diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index 2dbad3c..4b06dd7 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -443,7 +443,7 @@ struct VPITTable VPIT = { /********************/ /* 480x640 */ -struct crt_mode_table CRTM480x640[] = { +static struct crt_mode_table CRTM480x640[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_25_175M, M480X640_R60_HSP, M480X640_R60_VSP, @@ -451,7 +451,7 @@ struct crt_mode_table CRTM480x640[] = { }; /* 640x480*/ -struct crt_mode_table CRTM640x480[] = { +static struct crt_mode_table CRTM640x480[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_25_175M, M640X480_R60_HSP, M640X480_R60_VSP, @@ -469,7 +469,7 @@ struct crt_mode_table CRTM640x480[] = { }; /*720x480 (GTF)*/ -struct crt_mode_table CRTM720x480[] = { +static struct crt_mode_table CRTM720x480[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_26_880M, M720X480_R60_HSP, M720X480_R60_VSP, @@ -478,7 +478,7 @@ struct crt_mode_table CRTM720x480[] = { }; /*720x576 (GTF)*/ -struct crt_mode_table CRTM720x576[] = { +static struct crt_mode_table CRTM720x576[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_32_668M, M720X576_R60_HSP, M720X576_R60_VSP, @@ -486,7 +486,7 @@ struct crt_mode_table CRTM720x576[] = { }; /* 800x480 (CVT) */ -struct crt_mode_table CRTM800x480[] = { +static struct crt_mode_table CRTM800x480[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_29_581M, M800X480_R60_HSP, M800X480_R60_VSP, @@ -494,7 +494,7 @@ struct crt_mode_table CRTM800x480[] = { }; /* 800x600*/ -struct crt_mode_table CRTM800x600[] = { +static struct crt_mode_table CRTM800x600[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_40_000M, M800X600_R60_HSP, M800X600_R60_VSP, @@ -512,7 +512,7 @@ struct crt_mode_table CRTM800x600[] = { }; /* 848x480 (CVT) */ -struct crt_mode_table CRTM848x480[] = { +static struct crt_mode_table CRTM848x480[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_31_500M, M848X480_R60_HSP, M848X480_R60_VSP, @@ -520,7 +520,7 @@ struct crt_mode_table CRTM848x480[] = { }; /*856x480 (GTF) convert to 852x480*/ -struct crt_mode_table CRTM852x480[] = { +static struct crt_mode_table CRTM852x480[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_31_728M, M852X480_R60_HSP, M852X480_R60_VSP, @@ -528,7 +528,7 @@ struct crt_mode_table CRTM852x480[] = { }; /*1024x512 (GTF)*/ -struct crt_mode_table CRTM1024x512[] = { +static struct crt_mode_table CRTM1024x512[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_41_291M, M1024X512_R60_HSP, M1024X512_R60_VSP, @@ -537,7 +537,7 @@ struct crt_mode_table CRTM1024x512[] = { }; /* 1024x600*/ -struct crt_mode_table CRTM1024x600[] = { +static struct crt_mode_table CRTM1024x600[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_48_875M, M1024X600_R60_HSP, M1024X600_R60_VSP, @@ -545,7 +545,7 @@ struct crt_mode_table CRTM1024x600[] = { }; /* 1024x768*/ -struct crt_mode_table CRTM1024x768[] = { +static struct crt_mode_table CRTM1024x768[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_65_000M, M1024X768_R60_HSP, M1024X768_R60_VSP, @@ -559,7 +559,7 @@ struct crt_mode_table CRTM1024x768[] = { }; /* 1152x864*/ -struct crt_mode_table CRTM1152x864[] = { +static struct crt_mode_table CRTM1152x864[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_75, CLK_108_000M, M1152X864_R75_HSP, M1152X864_R75_VSP, @@ -568,7 +568,7 @@ struct crt_mode_table CRTM1152x864[] = { }; /* 1280x720 (HDMI 720P)*/ -struct crt_mode_table CRTM1280x720[] = { +static struct crt_mode_table CRTM1280x720[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_74_481M, M1280X720_R60_HSP, M1280X720_R60_VSP, @@ -578,7 +578,7 @@ struct crt_mode_table CRTM1280x720[] = { }; /*1280x768 (GTF)*/ -struct crt_mode_table CRTM1280x768[] = { +static struct crt_mode_table CRTM1280x768[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_80_136M, M1280X768_R60_HSP, M1280X768_R60_VSP, @@ -588,7 +588,7 @@ struct crt_mode_table CRTM1280x768[] = { }; /* 1280x800 (CVT) */ -struct crt_mode_table CRTM1280x800[] = { +static struct crt_mode_table CRTM1280x800[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_83_375M, M1280X800_R60_HSP, M1280X800_R60_VSP, @@ -596,7 +596,7 @@ struct crt_mode_table CRTM1280x800[] = { }; /*1280x960*/ -struct crt_mode_table CRTM1280x960[] = { +static struct crt_mode_table CRTM1280x960[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_108_000M, M1280X960_R60_HSP, M1280X960_R60_VSP, @@ -604,7 +604,7 @@ struct crt_mode_table CRTM1280x960[] = { }; /* 1280x1024*/ -struct crt_mode_table CRTM1280x1024[] = { +static struct crt_mode_table CRTM1280x1024[] = { /*r_rate,vclk,,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_108_000M, M1280X1024_R60_HSP, M1280X1024_R60_VSP, @@ -618,7 +618,7 @@ struct crt_mode_table CRTM1280x1024[] = { }; /* 1368x768 (GTF) */ -struct crt_mode_table CRTM1368x768[] = { +static struct crt_mode_table CRTM1368x768[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, @@ -626,7 +626,7 @@ struct crt_mode_table CRTM1368x768[] = { }; /*1440x1050 (GTF)*/ -struct crt_mode_table CRTM1440x1050[] = { +static struct crt_mode_table CRTM1440x1050[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_125_104M, M1440X1050_R60_HSP, M1440X1050_R60_VSP, @@ -634,7 +634,7 @@ struct crt_mode_table CRTM1440x1050[] = { }; /* 1600x1200*/ -struct crt_mode_table CRTM1600x1200[] = { +static struct crt_mode_table CRTM1600x1200[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_162_000M, M1600X1200_R60_HSP, M1600X1200_R60_VSP, @@ -646,7 +646,7 @@ struct crt_mode_table CRTM1600x1200[] = { }; /* 1680x1050 (CVT) */ -struct crt_mode_table CRTM1680x1050[] = { +static struct crt_mode_table CRTM1680x1050[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_146_760M, M1680x1050_R60_HSP, M1680x1050_R60_VSP, @@ -657,7 +657,7 @@ struct crt_mode_table CRTM1680x1050[] = { }; /* 1680x1050 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1680x1050_RB[] = { +static struct crt_mode_table CRTM1680x1050_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_119_000M, M1680x1050_RB_R60_HSP, @@ -666,7 +666,7 @@ struct crt_mode_table CRTM1680x1050_RB[] = { }; /* 1920x1080 (CVT)*/ -struct crt_mode_table CRTM1920x1080[] = { +static struct crt_mode_table CRTM1920x1080[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_172_798M, M1920X1080_R60_HSP, M1920X1080_R60_VSP, @@ -674,7 +674,7 @@ struct crt_mode_table CRTM1920x1080[] = { }; /* 1920x1080 (CVT with Reduce Blanking) */ -struct crt_mode_table CRTM1920x1080_RB[] = { +static struct crt_mode_table CRTM1920x1080_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_138_400M, M1920X1080_RB_R60_HSP, @@ -683,7 +683,7 @@ struct crt_mode_table CRTM1920x1080_RB[] = { }; /* 1920x1440*/ -struct crt_mode_table CRTM1920x1440[] = { +static struct crt_mode_table CRTM1920x1440[] = { /*r_rate,vclk,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_234_000M, M1920X1440_R60_HSP, M1920X1440_R60_VSP, @@ -694,7 +694,7 @@ struct crt_mode_table CRTM1920x1440[] = { }; /* 1400x1050 (CVT) */ -struct crt_mode_table CRTM1400x1050[] = { +static struct crt_mode_table CRTM1400x1050[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_121_750M, M1400X1050_R60_HSP, M1400X1050_R60_VSP, @@ -705,7 +705,7 @@ struct crt_mode_table CRTM1400x1050[] = { }; /* 1400x1050 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1400x1050_RB[] = { +static struct crt_mode_table CRTM1400x1050_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_101_000M, M1400X1050_RB_R60_HSP, @@ -714,7 +714,7 @@ struct crt_mode_table CRTM1400x1050_RB[] = { }; /* 960x600 (CVT) */ -struct crt_mode_table CRTM960x600[] = { +static struct crt_mode_table CRTM960x600[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_45_250M, M960X600_R60_HSP, M960X600_R60_VSP, @@ -722,7 +722,7 @@ struct crt_mode_table CRTM960x600[] = { }; /* 1000x600 (GTF) */ -struct crt_mode_table CRTM1000x600[] = { +static struct crt_mode_table CRTM1000x600[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_48_000M, M1000X600_R60_HSP, M1000X600_R60_VSP, @@ -730,7 +730,7 @@ struct crt_mode_table CRTM1000x600[] = { }; /* 1024x576 (GTF) */ -struct crt_mode_table CRTM1024x576[] = { +static struct crt_mode_table CRTM1024x576[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_46_996M, M1024X576_R60_HSP, M1024X576_R60_VSP, @@ -738,7 +738,7 @@ struct crt_mode_table CRTM1024x576[] = { }; /* 1088x612 (CVT) */ -struct crt_mode_table CRTM1088x612[] = { +static struct crt_mode_table CRTM1088x612[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_52_977M, M1088X612_R60_HSP, M1088X612_R60_VSP, @@ -746,7 +746,7 @@ struct crt_mode_table CRTM1088x612[] = { }; /* 1152x720 (CVT) */ -struct crt_mode_table CRTM1152x720[] = { +static struct crt_mode_table CRTM1152x720[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_66_750M, M1152X720_R60_HSP, M1152X720_R60_VSP, @@ -754,7 +754,7 @@ struct crt_mode_table CRTM1152x720[] = { }; /* 1200x720 (GTF) */ -struct crt_mode_table CRTM1200x720[] = { +static struct crt_mode_table CRTM1200x720[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_70_159M, M1200X720_R60_HSP, M1200X720_R60_VSP, @@ -762,7 +762,7 @@ struct crt_mode_table CRTM1200x720[] = { }; /* 1200x900 (DCON) */ -struct crt_mode_table DCON1200x900[] = { +static struct crt_mode_table DCON1200x900[] = { /* r_rate, vclk, hsp, vsp */ {REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP, /* The correct htotal is 1240, but this doesn't raster on VX855. */ @@ -772,7 +772,7 @@ struct crt_mode_table DCON1200x900[] = { }; /* 1280x600 (GTF) */ -struct crt_mode_table CRTM1280x600[] = { +static struct crt_mode_table CRTM1280x600[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_61_500M, M1280x600_R60_HSP, M1280x600_R60_VSP, @@ -780,7 +780,7 @@ struct crt_mode_table CRTM1280x600[] = { }; /* 1360x768 (CVT) */ -struct crt_mode_table CRTM1360x768[] = { +static struct crt_mode_table CRTM1360x768[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_84_750M, M1360X768_R60_HSP, M1360X768_R60_VSP, @@ -788,7 +788,7 @@ struct crt_mode_table CRTM1360x768[] = { }; /* 1360x768 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1360x768_RB[] = { +static struct crt_mode_table CRTM1360x768_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_72_000M, M1360X768_RB_R60_HSP, @@ -797,7 +797,7 @@ struct crt_mode_table CRTM1360x768_RB[] = { }; /* 1366x768 (GTF) */ -struct crt_mode_table CRTM1366x768[] = { +static struct crt_mode_table CRTM1366x768[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, @@ -807,7 +807,7 @@ struct crt_mode_table CRTM1366x768[] = { }; /* 1440x900 (CVT) */ -struct crt_mode_table CRTM1440x900[] = { +static struct crt_mode_table CRTM1440x900[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_106_500M, M1440X900_R60_HSP, M1440X900_R60_VSP, @@ -817,7 +817,7 @@ struct crt_mode_table CRTM1440x900[] = { }; /* 1440x900 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1440x900_RB[] = { +static struct crt_mode_table CRTM1440x900_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_88_750M, M1440X900_RB_R60_HSP, @@ -826,7 +826,7 @@ struct crt_mode_table CRTM1440x900_RB[] = { }; /* 1600x900 (CVT) */ -struct crt_mode_table CRTM1600x900[] = { +static struct crt_mode_table CRTM1600x900[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_118_840M, M1600X900_R60_HSP, M1600X900_R60_VSP, @@ -834,7 +834,7 @@ struct crt_mode_table CRTM1600x900[] = { }; /* 1600x900 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1600x900_RB[] = { +static struct crt_mode_table CRTM1600x900_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_97_750M, M1600X900_RB_R60_HSP, @@ -843,7 +843,7 @@ struct crt_mode_table CRTM1600x900_RB[] = { }; /* 1600x1024 (GTF) */ -struct crt_mode_table CRTM1600x1024[] = { +static struct crt_mode_table CRTM1600x1024[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_136_700M, M1600X1024_R60_HSP, M1600X1024_R60_VSP, @@ -851,7 +851,7 @@ struct crt_mode_table CRTM1600x1024[] = { }; /* 1792x1344 (DMT) */ -struct crt_mode_table CRTM1792x1344[] = { +static struct crt_mode_table CRTM1792x1344[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_204_000M, M1792x1344_R60_HSP, M1792x1344_R60_VSP, @@ -859,7 +859,7 @@ struct crt_mode_table CRTM1792x1344[] = { }; /* 1856x1392 (DMT) */ -struct crt_mode_table CRTM1856x1392[] = { +static struct crt_mode_table CRTM1856x1392[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_218_500M, M1856x1392_R60_HSP, M1856x1392_R60_VSP, @@ -867,7 +867,7 @@ struct crt_mode_table CRTM1856x1392[] = { }; /* 1920x1200 (CVT) */ -struct crt_mode_table CRTM1920x1200[] = { +static struct crt_mode_table CRTM1920x1200[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_193_295M, M1920X1200_R60_HSP, M1920X1200_R60_VSP, @@ -875,7 +875,7 @@ struct crt_mode_table CRTM1920x1200[] = { }; /* 1920x1200 (CVT with Reduce Blanking) */ -struct crt_mode_table CRTM1920x1200_RB[] = { +static struct crt_mode_table CRTM1920x1200_RB[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_153_920M, M1920X1200_RB_R60_HSP, @@ -884,14 +884,14 @@ struct crt_mode_table CRTM1920x1200_RB[] = { }; /* 2048x1536 (CVT) */ -struct crt_mode_table CRTM2048x1536[] = { +static struct crt_mode_table CRTM2048x1536[] = { /* r_rate, vclk, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {REFRESH_60, CLK_267_250M, M2048x1536_R60_HSP, M2048x1536_R60_VSP, {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} } }; -struct VideoModeTable viafb_modes[] = { +static struct VideoModeTable viafb_modes[] = { /* Display : 480x640 (GTF) */ {CRTM480x640, ARRAY_SIZE(CRTM480x640)}, @@ -1016,7 +1016,7 @@ struct VideoModeTable viafb_modes[] = { {CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)} }; -struct VideoModeTable viafb_rb_modes[] = { +static struct VideoModeTable viafb_rb_modes[] = { /* Display : 1360x768 (CVT Reduce Blanking) */ {CRTM1360x768_RB, ARRAY_SIZE(CRTM1360x768_RB)}, -- cgit v0.10.2 From dbf85f2326dbb070256ff153853b00f70c27717a Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Sat, 11 Dec 2010 04:01:13 +0000 Subject: viafb: kill lcd_panel_id This patch removes all internal uses of another mostly artificial value. It does duplicate the information of the maximum resolution and it is not flexible as only a few resolutions exist. Hence it is better to remove it and clean the mess up. No runtime change expected. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h index 48f1342..a2f6200 100644 --- a/drivers/video/via/chip.h +++ b/drivers/video/via/chip.h @@ -163,7 +163,6 @@ struct lvds_setting_information { int v_active; int bpp; int refresh_rate; - int lcd_panel_id; int lcd_panel_hres; int lcd_panel_vres; int display_method; @@ -188,7 +187,6 @@ struct GFX_DPA_SETTING { }; struct VT1636_DPA_SETTING { - int PanelSizeID; u8 CLK_SEL_ST1; u8 CLK_SEL_ST2; }; diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 2ca3bb8..d75e3f8 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -97,8 +97,6 @@ void __devinit viafb_init_lcd_size(void) DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n"); fp_id_to_vindex(viafb_lcd_panel_id); - viaparinfo->lvds_setting_info2->lcd_panel_id = - viaparinfo->lvds_setting_info->lcd_panel_id; viaparinfo->lvds_setting_info2->lcd_panel_hres = viaparinfo->lvds_setting_info->lcd_panel_hres; viaparinfo->lvds_setting_info2->lcd_panel_vres = @@ -205,176 +203,132 @@ static void __devinit fp_id_to_vindex(int panel_id) case 0x0: viaparinfo->lvds_setting_info->lcd_panel_hres = 640; viaparinfo->lvds_setting_info->lcd_panel_vres = 480; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID0_640X480; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x1: viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_vres = 600; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID1_800X600; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x2: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x3: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x4: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 1024; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID4_1280X1024; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x5: viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; viaparinfo->lvds_setting_info->lcd_panel_vres = 1050; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID5_1400X1050; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x6: viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; viaparinfo->lvds_setting_info->lcd_panel_vres = 1200; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID6_1600X1200; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x8: viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_vres = 480; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDA_800X480; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x9: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0xA: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xB: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xC: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xD: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 1024; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID4_1280X1024; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xE: viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; viaparinfo->lvds_setting_info->lcd_panel_vres = 1050; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID5_1400X1050; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xF: viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; viaparinfo->lvds_setting_info->lcd_panel_vres = 1200; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID6_1600X1200; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x10: viaparinfo->lvds_setting_info->lcd_panel_hres = 1366; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID7_1366X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x11: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 600; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID8_1024X600; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x12: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x13: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 800; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID9_1280X800; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x14: viaparinfo->lvds_setting_info->lcd_panel_hres = 1360; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDB_1360X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x15: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x16: viaparinfo->lvds_setting_info->lcd_panel_hres = 480; viaparinfo->lvds_setting_info->lcd_panel_vres = 640; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDC_480X640; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; @@ -382,16 +336,12 @@ static void __devinit fp_id_to_vindex(int panel_id) /* OLPC XO-1.5 panel */ viaparinfo->lvds_setting_info->lcd_panel_hres = 1200; viaparinfo->lvds_setting_info->lcd_panel_vres = 900; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDD_1200X900; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; default: viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_vres = 600; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID1_800X600; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; } diff --git a/drivers/video/via/tblDPASetting.c b/drivers/video/via/tblDPASetting.c index 0c4c8cc..73bb554 100644 --- a/drivers/video/via/tblDPASetting.c +++ b/drivers/video/via/tblDPASetting.c @@ -20,17 +20,6 @@ */ #include "global.h" -/* For VT3324: */ -struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[] = { - /* Panel ID, CLK_SEL_ST1[09], CLK_SEL_ST2[08] */ - {LCD_PANEL_ID0_640X480, 0x00, 0x00}, /* For 640x480 */ - {LCD_PANEL_ID1_800X600, 0x00, 0x00}, /* For 800x600 */ - {LCD_PANEL_ID2_1024X768, 0x00, 0x00}, /* For 1024x768 */ - {LCD_PANEL_ID3_1280X768, 0x00, 0x00}, /* For 1280x768 */ - {LCD_PANEL_ID4_1280X1024, 0x00, 0x00}, /* For 1280x1024 */ - {LCD_PANEL_ID5_1400X1050, 0x00, 0x00}, /* For 1400x1050 */ - {LCD_PANEL_ID6_1600X1200, 0x0B, 0x03} /* For 1600x1200 */ -}; struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[] = { /* ClkRange, DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, @@ -57,18 +46,6 @@ struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[] = { 0x00}, }; -/* For VT3327: */ -struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[] = { - /* Panel ID, CLK_SEL_ST1[09], CLK_SEL_ST2[08] */ - {LCD_PANEL_ID0_640X480, 0x00, 0x00}, /* For 640x480 */ - {LCD_PANEL_ID1_800X600, 0x00, 0x00}, /* For 800x600 */ - {LCD_PANEL_ID2_1024X768, 0x00, 0x00}, /* For 1024x768 */ - {LCD_PANEL_ID3_1280X768, 0x00, 0x00}, /* For 1280x768 */ - {LCD_PANEL_ID4_1280X1024, 0x00, 0x00}, /* For 1280x1024 */ - {LCD_PANEL_ID5_1400X1050, 0x00, 0x00}, /* For 1400x1050 */ - {LCD_PANEL_ID6_1600X1200, 0x00, 0x00} /* For 1600x1200 */ -}; - struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[] = { /* ClkRange,DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, DVP1Driving, DFPHigh, DFPLow */ diff --git a/drivers/video/via/tblDPASetting.h b/drivers/video/via/tblDPASetting.h index b065a83..6db6151 100644 --- a/drivers/video/via/tblDPASetting.h +++ b/drivers/video/via/tblDPASetting.h @@ -38,9 +38,7 @@ enum DPA_RANGE { DPA_CLK_RANGE_150M }; -extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[7]; extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[6]; -extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[7]; extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[]; extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3364[6]; diff --git a/drivers/video/via/vt1636.c b/drivers/video/via/vt1636.c index 60e4192..ee2903b 100644 --- a/drivers/video/via/vt1636.c +++ b/drivers/video/via/vt1636.c @@ -167,22 +167,6 @@ static int get_clk_range_index(u32 Clk) return DPA_CLK_RANGE_150M; } -static int get_lvds_dpa_setting_index(int panel_size_id, - struct VT1636_DPA_SETTING *p_vt1636_dpasetting_tbl, - int tbl_size) -{ - int i; - - for (i = 0; i < tbl_size; i++) { - if (panel_size_id == p_vt1636_dpasetting_tbl->PanelSizeID) - return i; - - p_vt1636_dpasetting_tbl++; - } - - return 0; -} - static void set_dpa_vt1636(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, struct VT1636_DPA_SETTING *p_vt1636_dpa_setting) @@ -206,7 +190,9 @@ void viafb_vt1636_patch_skew_on_vt3324( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { - int index, size; + struct VT1636_DPA_SETTING dpa = {0x00, 0x00}, dpa_16x12 = {0x0B, 0x03}, + *pdpa; + int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n"); @@ -216,19 +202,21 @@ void viafb_vt1636_patch_skew_on_vt3324( &GFX_DPA_SETTING_TBL_VT3324[index]); /* LVDS Transmitter DPA settings: */ - size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3324); - index = - get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id, - VT1636_DPA_SETTING_TBL_VT3324, size); - set_dpa_vt1636(plvds_setting_info, plvds_chip_info, - &VT1636_DPA_SETTING_TBL_VT3324[index]); + if (plvds_setting_info->lcd_panel_hres == 1600 && + plvds_setting_info->lcd_panel_vres == 1200) + pdpa = &dpa_16x12; + else + pdpa = &dpa; + + set_dpa_vt1636(plvds_setting_info, plvds_chip_info, pdpa); } void viafb_vt1636_patch_skew_on_vt3327( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { - int index, size; + struct VT1636_DPA_SETTING dpa = {0x00, 0x00}; + int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n"); @@ -238,12 +226,7 @@ void viafb_vt1636_patch_skew_on_vt3327( &GFX_DPA_SETTING_TBL_VT3327[index]); /* LVDS Transmitter DPA settings: */ - size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3327); - index = - get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id, - VT1636_DPA_SETTING_TBL_VT3327, size); - set_dpa_vt1636(plvds_setting_info, plvds_chip_info, - &VT1636_DPA_SETTING_TBL_VT3327[index]); + set_dpa_vt1636(plvds_setting_info, plvds_chip_info, &dpa); } void viafb_vt1636_patch_skew_on_vt3364( -- cgit v0.10.2 From c8350be26237e2b850b9611dbe55304ad6ebc6c7 Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Sat, 11 Dec 2010 05:11:00 +0000 Subject: viafb: remove unused data_mode and device_type This patch is a little cleanup for the chip_info structures. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h index a2f6200..3e8aacd 100644 --- a/drivers/video/via/chip.h +++ b/drivers/video/via/chip.h @@ -110,16 +110,13 @@ struct tmds_chip_information { int tmds_chip_name; int tmds_chip_slave_addr; - int data_mode; int output_interface; int i2c_port; - int device_type; }; struct lvds_chip_information { int lvds_chip_name; int lvds_chip_slave_addr; - int data_mode; int output_interface; int i2c_port; }; -- cgit v0.10.2 From d90108765b64e39e88e59f51d05ac652f0e53fea Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Sun, 19 Dec 2010 02:31:55 +0000 Subject: viafb: strip some structures This patch removes some write-only variables from the device management structures. Just a small cleanup. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h index 3e8aacd..781f3aa 100644 --- a/drivers/video/via/chip.h +++ b/drivers/video/via/chip.h @@ -139,9 +139,6 @@ struct chip_information { struct crt_setting_information { int iga_path; - int h_active; - int v_active; - int bpp; int refresh_rate; }; @@ -159,7 +156,6 @@ struct lvds_setting_information { int h_active; int v_active; int bpp; - int refresh_rate; int lcd_panel_hres; int lcd_panel_vres; int display_method; diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 9ecf4862..b0b0278 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -2117,9 +2117,6 @@ void viafb_update_device_setting(int hres, int vres, int bpp, int vmode_refresh, int flag) { if (flag == 0) { - viaparinfo->crt_setting_info->h_active = hres; - viaparinfo->crt_setting_info->v_active = vres; - viaparinfo->crt_setting_info->bpp = bpp; viaparinfo->crt_setting_info->refresh_rate = vmode_refresh; @@ -2129,13 +2126,9 @@ void viafb_update_device_setting(int hres, int vres, viaparinfo->lvds_setting_info->h_active = hres; viaparinfo->lvds_setting_info->v_active = vres; viaparinfo->lvds_setting_info->bpp = bpp; - viaparinfo->lvds_setting_info->refresh_rate = - vmode_refresh; viaparinfo->lvds_setting_info2->h_active = hres; viaparinfo->lvds_setting_info2->v_active = vres; viaparinfo->lvds_setting_info2->bpp = bpp; - viaparinfo->lvds_setting_info2->refresh_rate = - vmode_refresh; } else { if (viaparinfo->tmds_setting_info->iga_path == IGA2) { @@ -2147,15 +2140,11 @@ void viafb_update_device_setting(int hres, int vres, viaparinfo->lvds_setting_info->h_active = hres; viaparinfo->lvds_setting_info->v_active = vres; viaparinfo->lvds_setting_info->bpp = bpp; - viaparinfo->lvds_setting_info->refresh_rate = - vmode_refresh; } if (IGA2 == viaparinfo->lvds_setting_info2->iga_path) { viaparinfo->lvds_setting_info2->h_active = hres; viaparinfo->lvds_setting_info2->v_active = vres; viaparinfo->lvds_setting_info2->bpp = bpp; - viaparinfo->lvds_setting_info2->refresh_rate = - vmode_refresh; } } } -- cgit v0.10.2 From bf5ea02d9058a97a0bc2da9ca04ae4b34989407a Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Wed, 5 Jan 2011 10:36:05 +0000 Subject: viafb: factor lcd scaling parameters out These parameters are the same for all currently known VIA IGPs so it does not make any sense to store them with IGP specific data. This saves a few bytes and helps a bit in dicovering the real differences. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index b0b0278..6cb3b56 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -360,6 +360,24 @@ static struct pll_map pll_value[] = { {208, 5, 2} } }; +/* according to VIA Technologies these values are based on experiment */ +static struct io_reg scaling_parameters[] = { + {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ + {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ + {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ + {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ + {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ + {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ + {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ + {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ + {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ + {VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ + {VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ + {VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ + {VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ + {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ +}; + static struct fifo_depth_select display_fifo_depth_reg = { /* IGA1 FIFO Depth_Select */ {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } }, @@ -2419,6 +2437,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, break; } + viafb_write_regx(scaling_parameters, ARRAY_SIZE(scaling_parameters)); device_off(); via_set_state(devices, VIA_STATE_OFF); diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index 4b06dd7..8127489 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -108,20 +108,6 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR6A, 0xFF, 0x40}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -172,20 +158,6 @@ struct io_reg CN700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR78, 0xFF, 0x00}, /* LCD scaling Factor */ {VIACR, CR79, 0xFF, 0x00}, /* LCD scaling Factor */ {VIACR, CR9F, 0x03, 0x00}, /* LCD scaling Factor */ -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -229,20 +201,6 @@ struct io_reg KM400_ModeXregs[] = { {VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */ {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */ {VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */ - {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ - {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ - {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ - {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ - {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ - {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ - {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ - {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ - {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ - {VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ - {VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ - {VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ - {VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ - {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -283,20 +241,6 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR6A, 0xFF, 0x40}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -342,20 +286,6 @@ struct io_reg VX855_ModeXregs[] = { {VIACR, CR6A, 0xFD, 0x60}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -390,21 +320,6 @@ struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00}, {VIAGR, GR20, 0xFF, 0x00}, {VIAGR, GR21, 0xFF, 0x00}, {VIAGR, GR22, 0xFF, 0x00}, - /* LCD Parameters */ -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Parameter 14 */ }; -- cgit v0.10.2 From f5b1c4b3b6d407ec5a9d93ca12738c4c7911000c Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Wed, 9 Mar 2011 22:13:32 +0000 Subject: viafb: remove duplicated clock information This patch removes the direct lookup table for resolution+refresh and pixclock by calculating this information from the mode table. Removes a lot of dupllication and error potential by just doing a little more calculations on each mode change. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 9ecf4862..8c1393e 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -2608,35 +2608,43 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, int viafb_get_pixclock(int hres, int vres, int vmode_refresh) { int i; + struct crt_mode_table *best; + struct VideoModeTable *vmode = viafb_get_mode(hres, vres); - for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { - if ((hres == res_map_refresh_tbl[i].hres) - && (vres == res_map_refresh_tbl[i].vres) - && (vmode_refresh == res_map_refresh_tbl[i].vmode_refresh)) - return res_map_refresh_tbl[i].pixclock; + if (!vmode) + return RES_640X480_60HZ_PIXCLOCK; + + best = &vmode->crtc[0]; + for (i = 1; i < vmode->mode_array; i++) { + if (abs(vmode->crtc[i].refresh_rate - vmode_refresh) + < abs(best->refresh_rate - vmode_refresh)) + best = &vmode->crtc[i]; } - return RES_640X480_60HZ_PIXCLOCK; + return 1000000000 / (best->crtc.hor_total * best->crtc.ver_total) + * 1000 / best->refresh_rate; } int viafb_get_refresh(int hres, int vres, u32 long_refresh) { -#define REFRESH_TOLERANCE 3 - int i, nearest = -1, diff = REFRESH_TOLERANCE; - for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { - if ((hres == res_map_refresh_tbl[i].hres) - && (vres == res_map_refresh_tbl[i].vres) - && (diff > (abs(long_refresh - - res_map_refresh_tbl[i].vmode_refresh)))) { - diff = abs(long_refresh - res_map_refresh_tbl[i]. - vmode_refresh); - nearest = i; - } + int i; + struct crt_mode_table *best; + struct VideoModeTable *vmode = viafb_get_mode(hres, vres); + + if (!vmode) + return 60; + + best = &vmode->crtc[0]; + for (i = 1; i < vmode->mode_array; i++) { + if (abs(vmode->crtc[i].refresh_rate - long_refresh) + < abs(best->refresh_rate - long_refresh)) + best = &vmode->crtc[i]; } -#undef REFRESH_TOLERANCE - if (nearest > 0) - return res_map_refresh_tbl[nearest].vmode_refresh; - return 60; + + if (abs(best->refresh_rate - long_refresh) > 3) + return 60; + + return best->refresh_rate; } static void device_off(void) diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h index 2cbe103..b04c047 100644 --- a/drivers/video/via/share.h +++ b/drivers/video/via/share.h @@ -722,76 +722,7 @@ /* Definition Video Mode Pixel Clock (picoseconds) */ -#define RES_480X640_60HZ_PIXCLOCK 39722 #define RES_640X480_60HZ_PIXCLOCK 39722 -#define RES_640X480_75HZ_PIXCLOCK 31747 -#define RES_640X480_85HZ_PIXCLOCK 27777 -#define RES_640X480_100HZ_PIXCLOCK 23168 -#define RES_640X480_120HZ_PIXCLOCK 19081 -#define RES_720X480_60HZ_PIXCLOCK 37020 -#define RES_720X576_60HZ_PIXCLOCK 30611 -#define RES_800X600_60HZ_PIXCLOCK 25000 -#define RES_800X600_75HZ_PIXCLOCK 20203 -#define RES_800X600_85HZ_PIXCLOCK 17777 -#define RES_800X600_100HZ_PIXCLOCK 14667 -#define RES_800X600_120HZ_PIXCLOCK 11912 -#define RES_800X480_60HZ_PIXCLOCK 33805 -#define RES_848X480_60HZ_PIXCLOCK 31756 -#define RES_856X480_60HZ_PIXCLOCK 31518 -#define RES_1024X512_60HZ_PIXCLOCK 24218 -#define RES_1024X600_60HZ_PIXCLOCK 20460 -#define RES_1024X768_60HZ_PIXCLOCK 15385 -#define RES_1024X768_75HZ_PIXCLOCK 12699 -#define RES_1024X768_85HZ_PIXCLOCK 10582 -#define RES_1024X768_100HZ_PIXCLOCK 8825 -#define RES_1152X864_75HZ_PIXCLOCK 9259 -#define RES_1280X768_60HZ_PIXCLOCK 12480 -#define RES_1280X800_60HZ_PIXCLOCK 11994 -#define RES_1280X960_60HZ_PIXCLOCK 9259 -#define RES_1280X1024_60HZ_PIXCLOCK 9260 -#define RES_1280X1024_75HZ_PIXCLOCK 7408 -#define RES_1280X768_85HZ_PIXCLOCK 6349 -#define RES_1440X1050_60HZ_PIXCLOCK 7993 -#define RES_1600X1200_60HZ_PIXCLOCK 6172 -#define RES_1600X1200_75HZ_PIXCLOCK 4938 -#define RES_1280X720_60HZ_PIXCLOCK 13426 -#define RES_1200X900_60HZ_PIXCLOCK 17459 -#define RES_1920X1080_60HZ_PIXCLOCK 5787 -#define RES_1400X1050_60HZ_PIXCLOCK 8214 -#define RES_1400X1050_75HZ_PIXCLOCK 6410 -#define RES_1368X768_60HZ_PIXCLOCK 11647 -#define RES_960X600_60HZ_PIXCLOCK 22099 -#define RES_1000X600_60HZ_PIXCLOCK 20834 -#define RES_1024X576_60HZ_PIXCLOCK 21278 -#define RES_1088X612_60HZ_PIXCLOCK 18877 -#define RES_1152X720_60HZ_PIXCLOCK 14981 -#define RES_1200X720_60HZ_PIXCLOCK 14253 -#define RES_1280X600_60HZ_PIXCLOCK 16260 -#define RES_1280X720_50HZ_PIXCLOCK 16538 -#define RES_1280X768_50HZ_PIXCLOCK 15342 -#define RES_1366X768_50HZ_PIXCLOCK 14301 -#define RES_1366X768_60HZ_PIXCLOCK 11646 -#define RES_1360X768_60HZ_PIXCLOCK 11799 -#define RES_1440X900_60HZ_PIXCLOCK 9390 -#define RES_1440X900_75HZ_PIXCLOCK 7315 -#define RES_1600X900_60HZ_PIXCLOCK 8415 -#define RES_1600X1024_60HZ_PIXCLOCK 7315 -#define RES_1680X1050_60HZ_PIXCLOCK 6814 -#define RES_1680X1050_75HZ_PIXCLOCK 5348 -#define RES_1792X1344_60HZ_PIXCLOCK 4902 -#define RES_1856X1392_60HZ_PIXCLOCK 4577 -#define RES_1920X1200_60HZ_PIXCLOCK 5173 -#define RES_1920X1440_60HZ_PIXCLOCK 4274 -#define RES_1920X1440_75HZ_PIXCLOCK 3367 -#define RES_2048X1536_60HZ_PIXCLOCK 3742 - -#define RES_1360X768_RB_60HZ_PIXCLOCK 13889 -#define RES_1400X1050_RB_60HZ_PIXCLOCK 9901 -#define RES_1440X900_RB_60HZ_PIXCLOCK 11268 -#define RES_1600X900_RB_60HZ_PIXCLOCK 10230 -#define RES_1680X1050_RB_60HZ_PIXCLOCK 8403 -#define RES_1920X1080_RB_60HZ_PIXCLOCK 7225 -#define RES_1920X1200_RB_60HZ_PIXCLOCK 6497 /* LCD display method */ diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index 4b06dd7..ea0bc7a 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -21,72 +21,6 @@ #include #include "global.h" -struct res_map_refresh res_map_refresh_tbl[] = { -/*hres, vres, vclock, vmode_refresh*/ - {480, 640, RES_480X640_60HZ_PIXCLOCK, 60}, - {640, 480, RES_640X480_60HZ_PIXCLOCK, 60}, - {640, 480, RES_640X480_75HZ_PIXCLOCK, 75}, - {640, 480, RES_640X480_85HZ_PIXCLOCK, 85}, - {640, 480, RES_640X480_100HZ_PIXCLOCK, 100}, - {640, 480, RES_640X480_120HZ_PIXCLOCK, 120}, - {720, 480, RES_720X480_60HZ_PIXCLOCK, 60}, - {720, 576, RES_720X576_60HZ_PIXCLOCK, 60}, - {800, 480, RES_800X480_60HZ_PIXCLOCK, 60}, - {800, 600, RES_800X600_60HZ_PIXCLOCK, 60}, - {800, 600, RES_800X600_75HZ_PIXCLOCK, 75}, - {800, 600, RES_800X600_85HZ_PIXCLOCK, 85}, - {800, 600, RES_800X600_100HZ_PIXCLOCK, 100}, - {800, 600, RES_800X600_120HZ_PIXCLOCK, 120}, - {848, 480, RES_848X480_60HZ_PIXCLOCK, 60}, - {856, 480, RES_856X480_60HZ_PIXCLOCK, 60}, - {1024, 512, RES_1024X512_60HZ_PIXCLOCK, 60}, - {1024, 600, RES_1024X600_60HZ_PIXCLOCK, 60}, - {1024, 768, RES_1024X768_60HZ_PIXCLOCK, 60}, - {1024, 768, RES_1024X768_75HZ_PIXCLOCK, 75}, - {1024, 768, RES_1024X768_85HZ_PIXCLOCK, 85}, - {1024, 768, RES_1024X768_100HZ_PIXCLOCK, 100}, -/* {1152,864, RES_1152X864_70HZ_PIXCLOCK, 70},*/ - {1152, 864, RES_1152X864_75HZ_PIXCLOCK, 75}, - {1280, 768, RES_1280X768_60HZ_PIXCLOCK, 60}, - {1280, 800, RES_1280X800_60HZ_PIXCLOCK, 60}, - {1280, 960, RES_1280X960_60HZ_PIXCLOCK, 60}, - {1280, 1024, RES_1280X1024_60HZ_PIXCLOCK, 60}, - {1280, 1024, RES_1280X1024_75HZ_PIXCLOCK, 75}, - {1280, 1024, RES_1280X768_85HZ_PIXCLOCK, 85}, - {1440, 1050, RES_1440X1050_60HZ_PIXCLOCK, 60}, - {1600, 1200, RES_1600X1200_60HZ_PIXCLOCK, 60}, - {1600, 1200, RES_1600X1200_75HZ_PIXCLOCK, 75}, - {1280, 720, RES_1280X720_60HZ_PIXCLOCK, 60}, - {1920, 1080, RES_1920X1080_60HZ_PIXCLOCK, 60}, - {1400, 1050, RES_1400X1050_60HZ_PIXCLOCK, 60}, - {1400, 1050, RES_1400X1050_75HZ_PIXCLOCK, 75}, - {1368, 768, RES_1368X768_60HZ_PIXCLOCK, 60}, - {960, 600, RES_960X600_60HZ_PIXCLOCK, 60}, - {1000, 600, RES_1000X600_60HZ_PIXCLOCK, 60}, - {1024, 576, RES_1024X576_60HZ_PIXCLOCK, 60}, - {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60}, - {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60}, - {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60}, - {1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60}, - {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60}, - {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50}, - {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50}, - {1360, 768, RES_1360X768_60HZ_PIXCLOCK, 60}, - {1366, 768, RES_1366X768_50HZ_PIXCLOCK, 50}, - {1366, 768, RES_1366X768_60HZ_PIXCLOCK, 60}, - {1440, 900, RES_1440X900_60HZ_PIXCLOCK, 60}, - {1440, 900, RES_1440X900_75HZ_PIXCLOCK, 75}, - {1600, 900, RES_1600X900_60HZ_PIXCLOCK, 60}, - {1600, 1024, RES_1600X1024_60HZ_PIXCLOCK, 60}, - {1680, 1050, RES_1680X1050_60HZ_PIXCLOCK, 60}, - {1680, 1050, RES_1680X1050_75HZ_PIXCLOCK, 75}, - {1792, 1344, RES_1792X1344_60HZ_PIXCLOCK, 60}, - {1856, 1392, RES_1856X1392_60HZ_PIXCLOCK, 60}, - {1920, 1200, RES_1920X1200_60HZ_PIXCLOCK, 60}, - {1920, 1440, RES_1920X1440_60HZ_PIXCLOCK, 60}, - {1920, 1440, RES_1920X1440_75HZ_PIXCLOCK, 75}, - {2048, 1536, RES_2048X1536_60HZ_PIXCLOCK, 60} -}; struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIASR, SR15, 0x02, 0x02}, @@ -1057,7 +991,6 @@ struct VideoModeTable CEA_HDMI_Modes[] = { {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} }; -int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl); int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes); int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs); int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs); diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h index 5b1ced8..8a67ea1 100644 --- a/drivers/video/via/viamode.h +++ b/drivers/video/via/viamode.h @@ -41,14 +41,6 @@ struct patch_table { struct io_reg *io_reg_table; }; -struct res_map_refresh { - int hres; - int vres; - int pixclock; - int vmode_refresh; -}; - -extern int NUM_TOTAL_RES_MAP_REFRESH; extern int NUM_TOTAL_CEA_MODES; extern int NUM_TOTAL_CN400_ModeXregs; extern int NUM_TOTAL_CN700_ModeXregs; @@ -66,7 +58,6 @@ extern struct crt_mode_table CEAM1280x720[]; extern struct crt_mode_table CEAM1920x1080[]; extern struct VideoModeTable CEA_HDMI_Modes[]; -extern struct res_map_refresh res_map_refresh_tbl[]; extern struct io_reg CN400_ModeXregs[]; extern struct io_reg CN700_ModeXregs[]; extern struct io_reg KM400_ModeXregs[]; -- cgit v0.10.2 From 97597a39778eefb628eb7734a18f32c7880ad0e0 Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Thu, 10 Mar 2011 22:39:22 +0000 Subject: viafb: always return the best possible clock Before this patch only clocks that perfectly match were used and if none existed this was not handled properly. This patch changes this to always use the closest clock supported. This should behave like before for clocks that have a perfect match but be much saner for clocks which are slightly off. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 8c1393e..a7a5614 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -1677,40 +1677,36 @@ static u32 vx855_encode_pll(struct pll_config pll) u32 viafb_get_clk_value(int clk) { u32 value = 0; - int i = 0; + int i, best = 0; - while (i < NUM_TOTAL_PLL_TABLE && clk != pll_value[i].clk) - i++; - - if (i == NUM_TOTAL_PLL_TABLE) { - printk(KERN_WARNING "viafb_get_clk_value: PLL lookup failed!"); - } else { - switch (viaparinfo->chip_info->gfx_chip_name) { - case UNICHROME_CLE266: - case UNICHROME_K400: - value = cle266_encode_pll(pll_value[i].cle266_pll); - break; - - case UNICHROME_K800: - case UNICHROME_PM800: - case UNICHROME_CN700: - value = k800_encode_pll(pll_value[i].k800_pll); - break; - - case UNICHROME_CX700: - case UNICHROME_CN750: - case UNICHROME_K8M890: - case UNICHROME_P4M890: - case UNICHROME_P4M900: - case UNICHROME_VX800: - value = k800_encode_pll(pll_value[i].cx700_pll); - break; + for (i = 1; i < ARRAY_SIZE(pll_value); i++) { + if (abs(pll_value[i].clk - clk) + < abs(pll_value[best].clk - clk)) + best = i; + } - case UNICHROME_VX855: - case UNICHROME_VX900: - value = vx855_encode_pll(pll_value[i].vx855_pll); - break; - } + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + value = cle266_encode_pll(pll_value[best].cle266_pll); + break; + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + value = k800_encode_pll(pll_value[best].k800_pll); + break; + case UNICHROME_CX700: + case UNICHROME_CN750: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + case UNICHROME_VX800: + value = k800_encode_pll(pll_value[best].cx700_pll); + break; + case UNICHROME_VX855: + case UNICHROME_VX900: + value = vx855_encode_pll(pll_value[best].vx855_pll); + break; } return value; diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h index 668d534..7295263 100644 --- a/drivers/video/via/hw.h +++ b/drivers/video/via/hw.h @@ -893,8 +893,6 @@ struct iga2_crtc_timing { /* VT3410 chipset*/ #define VX900_FUNCTION3 0x3410 -#define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) - struct IODATA { u8 Index; u8 Mask; -- cgit v0.10.2 From fd3cc69848b7e1873e5f12bbcdd572b20277ecf3 Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Fri, 11 Mar 2011 00:04:01 +0000 Subject: viafb: remove duplicated clock storage The clocks can be easily recalculated by the timing and refresh value. This brings us one step closer to removing VIAs modetable and use generic ones and being easier extensible. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c index 84e21b3..41ca198 100644 --- a/drivers/video/via/dvi.c +++ b/drivers/video/via/dvi.c @@ -195,7 +195,9 @@ void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp, struct crt_mode_table *pDviTiming; unsigned long desirePixelClock, maxPixelClock; pDviTiming = mode->crtc; - desirePixelClock = pDviTiming->clk / 1000000; + desirePixelClock = pDviTiming->refresh_rate + * pDviTiming->crtc.hor_total * pDviTiming->crtc.ver_total + / 1000000; maxPixelClock = (unsigned long)viaparinfo-> tmds_setting_info->max_pixel_clock; diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index a7a5614..071e3a9 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -2030,7 +2030,7 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, int i; int index = 0; int h_addr, v_addr; - u32 pll_D_N; + u32 pll_D_N, clock; for (i = 0; i < video_mode->mode_array; i++) { index = i; @@ -2083,7 +2083,9 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) viafb_load_FIFO_reg(set_iga, h_addr, v_addr); - pll_D_N = viafb_get_clk_value(crt_table[index].clk); + clock = crt_reg.hor_total * crt_reg.ver_total + * crt_table[index].refresh_rate; + pll_D_N = viafb_get_clk_value(clock); DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N); viafb_set_vclock(pll_D_N, set_iga); diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 2ca3bb8..fc76b27 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -612,7 +612,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, int set_vres = plvds_setting_info->v_active; int panel_hres = plvds_setting_info->lcd_panel_hres; int panel_vres = plvds_setting_info->lcd_panel_vres; - u32 pll_D_N; + u32 pll_D_N, clock; struct display_timing mode_crt_reg, panel_crt_reg; struct crt_mode_table *panel_crt_table = NULL; struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres, @@ -627,7 +627,9 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); - plvds_setting_info->vclk = panel_crt_table->clk; + clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total + * panel_crt_table->refresh_rate; + plvds_setting_info->vclk = clock; if (set_iga == IGA1) { /* IGA1 doesn't have LCD scaling, so set it as centering. */ viafb_load_crtc_timing(lcd_centering_timging @@ -662,7 +664,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, fill_lcd_format(); - pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk); + pll_D_N = viafb_get_clk_value(clock); DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N); viafb_set_vclock(pll_D_N, set_iga); lcd_patch_skew(plvds_setting_info, plvds_chip_info); diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h index b04c047..4b7831f 100644 --- a/drivers/video/via/share.h +++ b/drivers/video/via/share.h @@ -627,77 +627,6 @@ #define M2048x1536_R60_HSP NEGATIVE #define M2048x1536_R60_VSP POSITIVE -/* define PLL index: */ -#define CLK_25_175M 25175000 -#define CLK_26_880M 26880000 -#define CLK_29_581M 29581000 -#define CLK_31_500M 31500000 -#define CLK_31_728M 31728000 -#define CLK_32_668M 32688000 -#define CLK_36_000M 36000000 -#define CLK_40_000M 40000000 -#define CLK_41_291M 41291000 -#define CLK_43_163M 43163000 -#define CLK_45_250M 45250000 /* 45.46MHz */ -#define CLK_46_000M 46000000 -#define CLK_46_996M 46996000 -#define CLK_48_000M 48000000 -#define CLK_48_875M 48875000 -#define CLK_49_500M 49500000 -#define CLK_52_406M 52406000 -#define CLK_52_977M 52977000 -#define CLK_56_250M 56250000 -#define CLK_57_275M 57275000 -#define CLK_60_466M 60466000 -#define CLK_61_500M 61500000 -#define CLK_65_000M 65000000 -#define CLK_65_178M 65178000 -#define CLK_66_750M 66750000 /* 67.116MHz */ -#define CLK_68_179M 68179000 -#define CLK_69_924M 69924000 -#define CLK_70_159M 70159000 -#define CLK_72_000M 72000000 -#define CLK_74_270M 74270000 -#define CLK_78_750M 78750000 -#define CLK_80_136M 80136000 -#define CLK_83_375M 83375000 -#define CLK_83_950M 83950000 -#define CLK_84_750M 84750000 /* 84.537Mhz */ -#define CLK_85_860M 85860000 -#define CLK_88_750M 88750000 -#define CLK_94_500M 94500000 -#define CLK_97_750M 97750000 -#define CLK_101_000M 101000000 -#define CLK_106_500M 106500000 -#define CLK_108_000M 108000000 -#define CLK_113_309M 113309000 -#define CLK_118_840M 118840000 -#define CLK_119_000M 119000000 -#define CLK_121_750M 121750000 /* 121.704MHz */ -#define CLK_125_104M 125104000 -#define CLK_135_000M 135000000 -#define CLK_136_700M 136700000 -#define CLK_138_400M 138400000 -#define CLK_146_760M 146760000 -#define CLK_148_500M 148500000 - -#define CLK_153_920M 153920000 -#define CLK_156_000M 156000000 -#define CLK_157_500M 157500000 -#define CLK_162_000M 162000000 -#define CLK_187_000M 187000000 -#define CLK_193_295M 193295000 -#define CLK_202_500M 202500000 -#define CLK_204_000M 204000000 -#define CLK_218_500M 218500000 -#define CLK_234_000M 234000000 -#define CLK_267_250M 267250000 -#define CLK_297_500M 297500000 -#define CLK_74_481M 74481000 -#define CLK_172_798M 172798000 -#define CLK_122_614M 122614000 - - /* Definition CRTC Timing Index */ #define H_TOTAL_INDEX 0 #define H_ADDR_INDEX 1 @@ -753,7 +682,6 @@ struct display_timing { struct crt_mode_table { int refresh_rate; - unsigned long clk; int h_sync_polarity; int v_sync_polarity; struct display_timing crtc; diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index ea0bc7a..1f24ee9 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -378,327 +378,320 @@ struct VPITTable VPIT = { /* 480x640 */ static struct crt_mode_table CRTM480x640[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_25_175M, M480X640_R60_HSP, M480X640_R60_VSP, + {REFRESH_60, M480X640_R60_HSP, M480X640_R60_VSP, {624, 480, 480, 144, 504, 48, 663, 640, 640, 23, 641, 3} } /* GTF*/ }; /* 640x480*/ static struct crt_mode_table CRTM640x480[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_25_175M, M640X480_R60_HSP, M640X480_R60_VSP, + {REFRESH_60, M640X480_R60_HSP, M640X480_R60_VSP, {800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} }, - {REFRESH_75, CLK_31_500M, M640X480_R75_HSP, M640X480_R75_VSP, + {REFRESH_75, M640X480_R75_HSP, M640X480_R75_VSP, {840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} }, - {REFRESH_85, CLK_36_000M, M640X480_R85_HSP, M640X480_R85_VSP, + {REFRESH_85, M640X480_R85_HSP, M640X480_R85_VSP, {832, 640, 640, 192, 696, 56, 509, 480, 480, 29, 481, 3} }, - {REFRESH_100, CLK_43_163M, M640X480_R100_HSP, M640X480_R100_VSP, + {REFRESH_100, M640X480_R100_HSP, M640X480_R100_VSP, {848, 640, 640, 208, 680, 64, 509, 480, 480, 29, 481, 3} }, /*GTF*/ - {REFRESH_120, CLK_52_406M, M640X480_R120_HSP, - M640X480_R120_VSP, - {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481, - 3} } /*GTF*/ + {REFRESH_120, M640X480_R120_HSP, M640X480_R120_VSP, + {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481, 3} } /*GTF*/ }; /*720x480 (GTF)*/ static struct crt_mode_table CRTM720x480[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_26_880M, M720X480_R60_HSP, M720X480_R60_VSP, + {REFRESH_60, M720X480_R60_HSP, M720X480_R60_VSP, {896, 720, 720, 176, 736, 72, 497, 480, 480, 17, 481, 3} } }; /*720x576 (GTF)*/ static struct crt_mode_table CRTM720x576[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_32_668M, M720X576_R60_HSP, M720X576_R60_VSP, + {REFRESH_60, M720X576_R60_HSP, M720X576_R60_VSP, {912, 720, 720, 192, 744, 72, 597, 576, 576, 21, 577, 3} } }; /* 800x480 (CVT) */ static struct crt_mode_table CRTM800x480[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_29_581M, M800X480_R60_HSP, M800X480_R60_VSP, + {REFRESH_60, M800X480_R60_HSP, M800X480_R60_VSP, {992, 800, 800, 192, 824, 72, 500, 480, 480, 20, 483, 7} } }; /* 800x600*/ static struct crt_mode_table CRTM800x600[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_40_000M, M800X600_R60_HSP, M800X600_R60_VSP, + {REFRESH_60, M800X600_R60_HSP, M800X600_R60_VSP, {1056, 800, 800, 256, 840, 128, 628, 600, 600, 28, 601, 4} }, - {REFRESH_75, CLK_49_500M, M800X600_R75_HSP, M800X600_R75_VSP, + {REFRESH_75, M800X600_R75_HSP, M800X600_R75_VSP, {1056, 800, 800, 256, 816, 80, 625, 600, 600, 25, 601, 3} }, - {REFRESH_85, CLK_56_250M, M800X600_R85_HSP, M800X600_R85_VSP, + {REFRESH_85, M800X600_R85_HSP, M800X600_R85_VSP, {1048, 800, 800, 248, 832, 64, 631, 600, 600, 31, 601, 3} }, - {REFRESH_100, CLK_68_179M, M800X600_R100_HSP, M800X600_R100_VSP, + {REFRESH_100, M800X600_R100_HSP, M800X600_R100_VSP, {1072, 800, 800, 272, 848, 88, 636, 600, 600, 36, 601, 3} }, - {REFRESH_120, CLK_83_950M, M800X600_R120_HSP, - M800X600_R120_VSP, - {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601, - 3} } + {REFRESH_120, M800X600_R120_HSP, M800X600_R120_VSP, + {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601, 3} } }; /* 848x480 (CVT) */ static struct crt_mode_table CRTM848x480[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_31_500M, M848X480_R60_HSP, M848X480_R60_VSP, + {REFRESH_60, M848X480_R60_HSP, M848X480_R60_VSP, {1056, 848, 848, 208, 872, 80, 500, 480, 480, 20, 483, 5} } }; /*856x480 (GTF) convert to 852x480*/ static struct crt_mode_table CRTM852x480[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_31_728M, M852X480_R60_HSP, M852X480_R60_VSP, + {REFRESH_60, M852X480_R60_HSP, M852X480_R60_VSP, {1064, 856, 856, 208, 872, 88, 497, 480, 480, 17, 481, 3} } }; /*1024x512 (GTF)*/ static struct crt_mode_table CRTM1024x512[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_41_291M, M1024X512_R60_HSP, M1024X512_R60_VSP, + {REFRESH_60, M1024X512_R60_HSP, M1024X512_R60_VSP, {1296, 1024, 1024, 272, 1056, 104, 531, 512, 512, 19, 513, 3} } }; /* 1024x600*/ static struct crt_mode_table CRTM1024x600[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_48_875M, M1024X600_R60_HSP, M1024X600_R60_VSP, + {REFRESH_60, M1024X600_R60_HSP, M1024X600_R60_VSP, {1312, 1024, 1024, 288, 1064, 104, 622, 600, 600, 22, 601, 3} }, }; /* 1024x768*/ static struct crt_mode_table CRTM1024x768[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_65_000M, M1024X768_R60_HSP, M1024X768_R60_VSP, + {REFRESH_60, M1024X768_R60_HSP, M1024X768_R60_VSP, {1344, 1024, 1024, 320, 1048, 136, 806, 768, 768, 38, 771, 6} }, - {REFRESH_75, CLK_78_750M, M1024X768_R75_HSP, M1024X768_R75_VSP, + {REFRESH_75, M1024X768_R75_HSP, M1024X768_R75_VSP, {1312, 1024, 1024, 288, 1040, 96, 800, 768, 768, 32, 769, 3} }, - {REFRESH_85, CLK_94_500M, M1024X768_R85_HSP, M1024X768_R85_VSP, + {REFRESH_85, M1024X768_R85_HSP, M1024X768_R85_VSP, {1376, 1024, 1024, 352, 1072, 96, 808, 768, 768, 40, 769, 3} }, - {REFRESH_100, CLK_113_309M, M1024X768_R100_HSP, M1024X768_R100_VSP, + {REFRESH_100, M1024X768_R100_HSP, M1024X768_R100_VSP, {1392, 1024, 1024, 368, 1096, 112, 814, 768, 768, 46, 769, 3} } }; /* 1152x864*/ static struct crt_mode_table CRTM1152x864[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_75, CLK_108_000M, M1152X864_R75_HSP, M1152X864_R75_VSP, + {REFRESH_75, M1152X864_R75_HSP, M1152X864_R75_VSP, {1600, 1152, 1152, 448, 1216, 128, 900, 864, 864, 36, 865, 3} } }; /* 1280x720 (HDMI 720P)*/ static struct crt_mode_table CRTM1280x720[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_74_481M, M1280X720_R60_HSP, M1280X720_R60_VSP, + {REFRESH_60, M1280X720_R60_HSP, M1280X720_R60_VSP, {1648, 1280, 1280, 368, 1392, 40, 750, 720, 720, 30, 725, 5} }, - {REFRESH_50, CLK_60_466M, M1280X720_R50_HSP, M1280X720_R50_VSP, + {REFRESH_50, M1280X720_R50_HSP, M1280X720_R50_VSP, {1632, 1280, 1280, 352, 1328, 128, 741, 720, 720, 21, 721, 3} } }; /*1280x768 (GTF)*/ static struct crt_mode_table CRTM1280x768[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_80_136M, M1280X768_R60_HSP, M1280X768_R60_VSP, + {REFRESH_60, M1280X768_R60_HSP, M1280X768_R60_VSP, {1680, 1280, 1280, 400, 1344, 136, 795, 768, 768, 27, 769, 3} }, - {REFRESH_50, CLK_65_178M, M1280X768_R50_HSP, M1280X768_R50_VSP, + {REFRESH_50, M1280X768_R50_HSP, M1280X768_R50_VSP, {1648, 1280, 1280, 368, 1336, 128, 791, 768, 768, 23, 769, 3} } }; /* 1280x800 (CVT) */ static struct crt_mode_table CRTM1280x800[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_83_375M, M1280X800_R60_HSP, M1280X800_R60_VSP, + {REFRESH_60, M1280X800_R60_HSP, M1280X800_R60_VSP, {1680, 1280, 1280, 400, 1352, 128, 831, 800, 800, 31, 803, 6} } }; /*1280x960*/ static struct crt_mode_table CRTM1280x960[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_108_000M, M1280X960_R60_HSP, M1280X960_R60_VSP, + {REFRESH_60, M1280X960_R60_HSP, M1280X960_R60_VSP, {1800, 1280, 1280, 520, 1376, 112, 1000, 960, 960, 40, 961, 3} } }; /* 1280x1024*/ static struct crt_mode_table CRTM1280x1024[] = { - /*r_rate,vclk,,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_108_000M, M1280X1024_R60_HSP, M1280X1024_R60_VSP, + {REFRESH_60, M1280X1024_R60_HSP, M1280X1024_R60_VSP, {1688, 1280, 1280, 408, 1328, 112, 1066, 1024, 1024, 42, 1025, 3} }, - {REFRESH_75, CLK_135_000M, M1280X1024_R75_HSP, M1280X1024_R75_VSP, + {REFRESH_75, M1280X1024_R75_HSP, M1280X1024_R75_VSP, {1688, 1280, 1280, 408, 1296, 144, 1066, 1024, 1024, 42, 1025, 3} }, - {REFRESH_85, CLK_157_500M, M1280X1024_R85_HSP, M1280X1024_R85_VSP, + {REFRESH_85, M1280X1024_R85_HSP, M1280X1024_R85_VSP, {1728, 1280, 1280, 448, 1344, 160, 1072, 1024, 1024, 48, 1025, 3} } }; /* 1368x768 (GTF) */ static struct crt_mode_table CRTM1368x768[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, + {REFRESH_60, M1368X768_R60_HSP, M1368X768_R60_VSP, {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} } }; /*1440x1050 (GTF)*/ static struct crt_mode_table CRTM1440x1050[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_125_104M, M1440X1050_R60_HSP, M1440X1050_R60_VSP, + {REFRESH_60, M1440X1050_R60_HSP, M1440X1050_R60_VSP, {1936, 1440, 1440, 496, 1536, 152, 1077, 1040, 1040, 37, 1041, 3} } }; /* 1600x1200*/ static struct crt_mode_table CRTM1600x1200[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_162_000M, M1600X1200_R60_HSP, M1600X1200_R60_VSP, + {REFRESH_60, M1600X1200_R60_HSP, M1600X1200_R60_VSP, {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} }, - {REFRESH_75, CLK_202_500M, M1600X1200_R75_HSP, M1600X1200_R75_VSP, + {REFRESH_75, M1600X1200_R75_HSP, M1600X1200_R75_VSP, {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} } }; /* 1680x1050 (CVT) */ static struct crt_mode_table CRTM1680x1050[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_146_760M, M1680x1050_R60_HSP, M1680x1050_R60_VSP, + {REFRESH_60, M1680x1050_R60_HSP, M1680x1050_R60_VSP, {2240, 1680, 1680, 560, 1784, 176, 1089, 1050, 1050, 39, 1053, 6} }, - {REFRESH_75, CLK_187_000M, M1680x1050_R75_HSP, M1680x1050_R75_VSP, + {REFRESH_75, M1680x1050_R75_HSP, M1680x1050_R75_VSP, {2272, 1680, 1680, 592, 1800, 176, 1099, 1050, 1050, 49, 1053, 6} } }; /* 1680x1050 (CVT Reduce Blanking) */ static struct crt_mode_table CRTM1680x1050_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_119_000M, M1680x1050_RB_R60_HSP, - M1680x1050_RB_R60_VSP, + {REFRESH_60, M1680x1050_RB_R60_HSP, M1680x1050_RB_R60_VSP, {1840, 1680, 1680, 160, 1728, 32, 1080, 1050, 1050, 30, 1053, 6} } }; /* 1920x1080 (CVT)*/ static struct crt_mode_table CRTM1920x1080[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_172_798M, M1920X1080_R60_HSP, M1920X1080_R60_VSP, + {REFRESH_60, M1920X1080_R60_HSP, M1920X1080_R60_VSP, {2576, 1920, 1920, 656, 2048, 200, 1120, 1080, 1080, 40, 1083, 5} } }; /* 1920x1080 (CVT with Reduce Blanking) */ static struct crt_mode_table CRTM1920x1080_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_138_400M, M1920X1080_RB_R60_HSP, - M1920X1080_RB_R60_VSP, + {REFRESH_60, M1920X1080_RB_R60_HSP, M1920X1080_RB_R60_VSP, {2080, 1920, 1920, 160, 1968, 32, 1111, 1080, 1080, 31, 1083, 5} } }; /* 1920x1440*/ static struct crt_mode_table CRTM1920x1440[] = { - /*r_rate,vclk,hsp,vsp */ + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_234_000M, M1920X1440_R60_HSP, M1920X1440_R60_VSP, + {REFRESH_60, M1920X1440_R60_HSP, M1920X1440_R60_VSP, {2600, 1920, 1920, 680, 2048, 208, 1500, 1440, 1440, 60, 1441, 3} }, - {REFRESH_75, CLK_297_500M, M1920X1440_R75_HSP, M1920X1440_R75_VSP, + {REFRESH_75, M1920X1440_R75_HSP, M1920X1440_R75_VSP, {2640, 1920, 1920, 720, 2064, 224, 1500, 1440, 1440, 60, 1441, 3} } }; /* 1400x1050 (CVT) */ static struct crt_mode_table CRTM1400x1050[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_121_750M, M1400X1050_R60_HSP, M1400X1050_R60_VSP, + {REFRESH_60, M1400X1050_R60_HSP, M1400X1050_R60_VSP, {1864, 1400, 1400, 464, 1488, 144, 1089, 1050, 1050, 39, 1053, 4} }, - {REFRESH_75, CLK_156_000M, M1400X1050_R75_HSP, M1400X1050_R75_VSP, + {REFRESH_75, M1400X1050_R75_HSP, M1400X1050_R75_VSP, {1896, 1400, 1400, 496, 1504, 144, 1099, 1050, 1050, 49, 1053, 4} } }; /* 1400x1050 (CVT Reduce Blanking) */ static struct crt_mode_table CRTM1400x1050_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_101_000M, M1400X1050_RB_R60_HSP, - M1400X1050_RB_R60_VSP, + {REFRESH_60, M1400X1050_RB_R60_HSP, M1400X1050_RB_R60_VSP, {1560, 1400, 1400, 160, 1448, 32, 1080, 1050, 1050, 30, 1053, 4} } }; /* 960x600 (CVT) */ static struct crt_mode_table CRTM960x600[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_45_250M, M960X600_R60_HSP, M960X600_R60_VSP, + {REFRESH_60, M960X600_R60_HSP, M960X600_R60_VSP, {1216, 960, 960, 256, 992, 96, 624, 600, 600, 24, 603, 6} } }; /* 1000x600 (GTF) */ static struct crt_mode_table CRTM1000x600[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_48_000M, M1000X600_R60_HSP, M1000X600_R60_VSP, + {REFRESH_60, M1000X600_R60_HSP, M1000X600_R60_VSP, {1288, 1000, 1000, 288, 1040, 104, 622, 600, 600, 22, 601, 3} } }; /* 1024x576 (GTF) */ static struct crt_mode_table CRTM1024x576[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_46_996M, M1024X576_R60_HSP, M1024X576_R60_VSP, + {REFRESH_60, M1024X576_R60_HSP, M1024X576_R60_VSP, {1312, 1024, 1024, 288, 1064, 104, 597, 576, 576, 21, 577, 3} } }; /* 1088x612 (CVT) */ static struct crt_mode_table CRTM1088x612[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_52_977M, M1088X612_R60_HSP, M1088X612_R60_VSP, + {REFRESH_60, M1088X612_R60_HSP, M1088X612_R60_VSP, {1392, 1088, 1088, 304, 1136, 104, 636, 612, 612, 24, 615, 5} } }; /* 1152x720 (CVT) */ static struct crt_mode_table CRTM1152x720[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_66_750M, M1152X720_R60_HSP, M1152X720_R60_VSP, + {REFRESH_60, M1152X720_R60_HSP, M1152X720_R60_VSP, {1488, 1152, 1152, 336, 1208, 112, 748, 720, 720, 28, 723, 6} } }; /* 1200x720 (GTF) */ static struct crt_mode_table CRTM1200x720[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_70_159M, M1200X720_R60_HSP, M1200X720_R60_VSP, + {REFRESH_60, M1200X720_R60_HSP, M1200X720_R60_VSP, {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} } }; /* 1200x900 (DCON) */ static struct crt_mode_table DCON1200x900[] = { - /* r_rate, vclk, hsp, vsp */ - {REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP, + /* r_rate, hsp, vsp */ + {REFRESH_60, M1200X900_R60_HSP, M1200X900_R60_VSP, /* The correct htotal is 1240, but this doesn't raster on VX855. */ /* Via suggested changing to a multiple of 16, hence 1264. */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ @@ -707,121 +700,117 @@ static struct crt_mode_table DCON1200x900[] = { /* 1280x600 (GTF) */ static struct crt_mode_table CRTM1280x600[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_61_500M, M1280x600_R60_HSP, M1280x600_R60_VSP, + {REFRESH_60, M1280x600_R60_HSP, M1280x600_R60_VSP, {1648, 1280, 1280, 368, 1336, 128, 622, 600, 600, 22, 601, 3} } }; /* 1360x768 (CVT) */ static struct crt_mode_table CRTM1360x768[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_84_750M, M1360X768_R60_HSP, M1360X768_R60_VSP, + {REFRESH_60, M1360X768_R60_HSP, M1360X768_R60_VSP, {1776, 1360, 1360, 416, 1432, 136, 798, 768, 768, 30, 771, 5} } }; /* 1360x768 (CVT Reduce Blanking) */ static struct crt_mode_table CRTM1360x768_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_72_000M, M1360X768_RB_R60_HSP, - M1360X768_RB_R60_VSP, + {REFRESH_60, M1360X768_RB_R60_HSP, M1360X768_RB_R60_VSP, {1520, 1360, 1360, 160, 1408, 32, 790, 768, 768, 22, 771, 5} } }; /* 1366x768 (GTF) */ static struct crt_mode_table CRTM1366x768[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, + {REFRESH_60, M1368X768_R60_HSP, M1368X768_R60_VSP, {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} }, - {REFRESH_50, CLK_69_924M, M1368X768_R50_HSP, M1368X768_R50_VSP, + {REFRESH_50, M1368X768_R50_HSP, M1368X768_R50_VSP, {1768, 1368, 1368, 400, 1424, 144, 791, 768, 768, 23, 769, 3} } }; /* 1440x900 (CVT) */ static struct crt_mode_table CRTM1440x900[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_106_500M, M1440X900_R60_HSP, M1440X900_R60_VSP, + {REFRESH_60, M1440X900_R60_HSP, M1440X900_R60_VSP, {1904, 1440, 1440, 464, 1520, 152, 934, 900, 900, 34, 903, 6} }, - {REFRESH_75, CLK_136_700M, M1440X900_R75_HSP, M1440X900_R75_VSP, + {REFRESH_75, M1440X900_R75_HSP, M1440X900_R75_VSP, {1936, 1440, 1440, 496, 1536, 152, 942, 900, 900, 42, 903, 6} } }; /* 1440x900 (CVT Reduce Blanking) */ static struct crt_mode_table CRTM1440x900_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_88_750M, M1440X900_RB_R60_HSP, - M1440X900_RB_R60_VSP, + {REFRESH_60, M1440X900_RB_R60_HSP, M1440X900_RB_R60_VSP, {1600, 1440, 1440, 160, 1488, 32, 926, 900, 900, 26, 903, 6} } }; /* 1600x900 (CVT) */ static struct crt_mode_table CRTM1600x900[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_118_840M, M1600X900_R60_HSP, M1600X900_R60_VSP, + {REFRESH_60, M1600X900_R60_HSP, M1600X900_R60_VSP, {2112, 1600, 1600, 512, 1688, 168, 934, 900, 900, 34, 903, 5} } }; /* 1600x900 (CVT Reduce Blanking) */ static struct crt_mode_table CRTM1600x900_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_97_750M, M1600X900_RB_R60_HSP, - M1600X900_RB_R60_VSP, + {REFRESH_60, M1600X900_RB_R60_HSP, M1600X900_RB_R60_VSP, {1760, 1600, 1600, 160, 1648, 32, 926, 900, 900, 26, 903, 5} } }; /* 1600x1024 (GTF) */ static struct crt_mode_table CRTM1600x1024[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_136_700M, M1600X1024_R60_HSP, M1600X1024_R60_VSP, + {REFRESH_60, M1600X1024_R60_HSP, M1600X1024_R60_VSP, {2144, 1600, 1600, 544, 1704, 168, 1060, 1024, 1024, 36, 1025, 3} } }; /* 1792x1344 (DMT) */ static struct crt_mode_table CRTM1792x1344[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_204_000M, M1792x1344_R60_HSP, M1792x1344_R60_VSP, + {REFRESH_60, M1792x1344_R60_HSP, M1792x1344_R60_VSP, {2448, 1792, 1792, 656, 1920, 200, 1394, 1344, 1344, 50, 1345, 3} } }; /* 1856x1392 (DMT) */ static struct crt_mode_table CRTM1856x1392[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_218_500M, M1856x1392_R60_HSP, M1856x1392_R60_VSP, + {REFRESH_60, M1856x1392_R60_HSP, M1856x1392_R60_VSP, {2528, 1856, 1856, 672, 1952, 224, 1439, 1392, 1392, 47, 1393, 3} } }; /* 1920x1200 (CVT) */ static struct crt_mode_table CRTM1920x1200[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_193_295M, M1920X1200_R60_HSP, M1920X1200_R60_VSP, + {REFRESH_60, M1920X1200_R60_HSP, M1920X1200_R60_VSP, {2592, 1920, 1920, 672, 2056, 200, 1245, 1200, 1200, 45, 1203, 6} } }; /* 1920x1200 (CVT with Reduce Blanking) */ static struct crt_mode_table CRTM1920x1200_RB[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_153_920M, M1920X1200_RB_R60_HSP, - M1920X1200_RB_R60_VSP, + {REFRESH_60, M1920X1200_RB_R60_HSP, M1920X1200_RB_R60_VSP, {2080, 1920, 1920, 160, 1968, 32, 1235, 1200, 1200, 35, 1203, 6} } }; /* 2048x1536 (CVT) */ static struct crt_mode_table CRTM2048x1536[] = { - /* r_rate, vclk, hsp, vsp */ + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_267_250M, M2048x1536_R60_HSP, M2048x1536_R60_VSP, + {REFRESH_60, M2048x1536_R60_HSP, M2048x1536_R60_VSP, {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} } }; @@ -974,14 +963,12 @@ static struct VideoModeTable viafb_rb_modes[] = { }; struct crt_mode_table CEAM1280x720[] = { - {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP, - M1280X720_CEA_R60_VSP, + {REFRESH_60, M1280X720_CEA_R60_HSP, M1280X720_CEA_R60_VSP, /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {1650, 1280, 1280, 370, 1390, 40, 750, 720, 720, 30, 725, 5} } }; struct crt_mode_table CEAM1920x1080[] = { - {REFRESH_60, CLK_148_500M, M1920X1080_CEA_R60_HSP, - M1920X1080_CEA_R60_VSP, + {REFRESH_60, M1920X1080_CEA_R60_HSP, M1920X1080_CEA_R60_VSP, /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {2200, 1920, 1920, 300, 2008, 44, 1125, 1080, 1080, 45, 1084, 5} } }; -- cgit v0.10.2 From e4fcaeff4fcb56779f22f2f11e50ed2a69e650a3 Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Sat, 12 Mar 2011 01:36:38 +0000 Subject: viafb: split pll configs up This patch splits the pll configs up on pll versions. This allows easy adding of other known good pll values. Additionally it made it possible to remove invalid configurations resulting in better behaviour for such cases. The resulting clocks are no longer stored resulting in some computing overhead on each mode change. Signed-off-by: Florian Tobias Schandinat diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 071e3a9..b418acf 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -22,342 +22,272 @@ #include #include "global.h" -static struct pll_map pll_value[] = { - {25175000, - {99, 7, 3}, - {85, 3, 4}, /* ignoring bit difference: 0x00008000 */ - {141, 5, 4}, - {141, 5, 4} }, - {29581000, - {33, 4, 2}, - {66, 2, 4}, /* ignoring bit difference: 0x00808000 */ - {166, 5, 4}, /* ignoring bit difference: 0x00008000 */ - {165, 5, 4} }, - {26880000, - {15, 4, 1}, - {30, 2, 3}, /* ignoring bit difference: 0x00808000 */ - {150, 5, 4}, - {150, 5, 4} }, - {31500000, - {53, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {141, 4, 4}, /* ignoring bit difference: 0x00008000 */ - {176, 5, 4}, - {176, 5, 4} }, - {31728000, - {31, 7, 1}, - {177, 5, 4}, /* ignoring bit difference: 0x00008000 */ - {177, 5, 4}, - {142, 4, 4} }, - {32688000, - {73, 4, 3}, - {146, 4, 4}, /* ignoring bit difference: 0x00008000 */ - {183, 5, 4}, - {146, 4, 4} }, - {36000000, - {101, 5, 3}, /* ignoring bit difference: 0x00008000 */ - {161, 4, 4}, /* ignoring bit difference: 0x00008000 */ - {202, 5, 4}, - {161, 4, 4} }, - {40000000, - {89, 4, 3}, - {89, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {112, 5, 3}, - {112, 5, 3} }, - {41291000, - {23, 4, 1}, - {69, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {115, 5, 3}, - {115, 5, 3} }, - {43163000, - {121, 5, 3}, - {121, 5, 3}, /* ignoring bit difference: 0x00008000 */ - {121, 5, 3}, - {121, 5, 3} }, - {45250000, - {127, 5, 3}, - {127, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {127, 5, 3}, - {127, 5, 3} }, - {46000000, - {90, 7, 2}, - {103, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {129, 5, 3}, - {103, 4, 3} }, - {46996000, - {105, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {131, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {131, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {105, 4, 3} }, - {48000000, - {67, 20, 0}, - {134, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {134, 5, 3}, - {134, 5, 3} }, - {48875000, - {99, 29, 0}, - {82, 3, 3}, /* ignoring bit difference: 0x00808000 */ - {82, 3, 3}, /* ignoring bit difference: 0x00808000 */ - {137, 5, 3} }, - {49500000, - {83, 6, 2}, - {83, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {138, 5, 3}, - {83, 3, 3} }, - {52406000, - {117, 4, 3}, - {117, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {117, 4, 3}, - {88, 3, 3} }, - {52977000, - {37, 5, 1}, - {148, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {148, 5, 3}, - {148, 5, 3} }, - {56250000, - {55, 7, 1}, /* ignoring bit difference: 0x00008000 */ - {126, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {157, 5, 3}, - {157, 5, 3} }, - {57275000, - {0, 0, 0}, - {2, 2, 0}, - {2, 2, 0}, - {157, 5, 3} }, /* ignoring bit difference: 0x00808000 */ - {60466000, - {76, 9, 1}, - {169, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {169, 5, 3}, /* FIXED: old = {72, 2, 3} */ - {169, 5, 3} }, - {61500000, - {86, 20, 0}, - {172, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {172, 5, 3}, - {172, 5, 3} }, - {65000000, - {109, 6, 2}, /* ignoring bit difference: 0x00008000 */ - {109, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {109, 3, 3}, - {109, 3, 3} }, - {65178000, - {91, 5, 2}, - {182, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {109, 3, 3}, - {182, 5, 3} }, - {66750000, - {75, 4, 2}, - {150, 4, 3}, /* ignoring bit difference: 0x00808000 */ - {150, 4, 3}, - {112, 3, 3} }, - {68179000, - {19, 4, 0}, - {114, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {190, 5, 3}, - {191, 5, 3} }, - {69924000, - {83, 17, 0}, - {195, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {195, 5, 3}, - {195, 5, 3} }, - {70159000, - {98, 20, 0}, - {196, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {196, 5, 3}, - {195, 5, 3} }, - {72000000, - {121, 24, 0}, - {161, 4, 3}, /* ignoring bit difference: 0x00808000 */ - {161, 4, 3}, - {161, 4, 3} }, - {78750000, - {33, 3, 1}, - {66, 3, 2}, /* ignoring bit difference: 0x00008000 */ - {110, 5, 2}, - {110, 5, 2} }, - {80136000, - {28, 5, 0}, - {68, 3, 2}, /* ignoring bit difference: 0x00008000 */ - {112, 5, 2}, - {112, 5, 2} }, - {83375000, - {93, 2, 3}, - {93, 4, 2}, /* ignoring bit difference: 0x00800000 */ - {93, 4, 2}, /* ignoring bit difference: 0x00800000 */ - {117, 5, 2} }, - {83950000, - {41, 7, 0}, - {117, 5, 2}, /* ignoring bit difference: 0x00008000 */ - {117, 5, 2}, - {117, 5, 2} }, - {84750000, - {118, 5, 2}, - {118, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {118, 5, 2}, - {118, 5, 2} }, - {85860000, - {84, 7, 1}, - {120, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {120, 5, 2}, - {118, 5, 2} }, - {88750000, - {31, 5, 0}, - {124, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {174, 7, 2}, /* ignoring bit difference: 0x00808000 */ - {124, 5, 2} }, - {94500000, - {33, 5, 0}, - {132, 5, 2}, /* ignoring bit difference: 0x00008000 */ - {132, 5, 2}, - {132, 5, 2} }, - {97750000, - {82, 6, 1}, - {137, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {137, 5, 2}, - {137, 5, 2} }, - {101000000, - {127, 9, 1}, - {141, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {141, 5, 2}, - {141, 5, 2} }, - {106500000, - {119, 4, 2}, - {119, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {119, 4, 2}, - {149, 5, 2} }, - {108000000, - {121, 4, 2}, - {121, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {151, 5, 2}, - {151, 5, 2} }, - {113309000, - {95, 12, 0}, - {95, 3, 2}, /* ignoring bit difference: 0x00808000 */ - {95, 3, 2}, - {159, 5, 2} }, - {118840000, - {83, 5, 1}, - {166, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {166, 5, 2}, - {166, 5, 2} }, - {119000000, - {108, 13, 0}, - {133, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {133, 4, 2}, - {167, 5, 2} }, - {121750000, - {85, 5, 1}, - {170, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {68, 2, 2}, - {0, 0, 0} }, - {125104000, - {53, 6, 0}, /* ignoring bit difference: 0x00008000 */ - {106, 3, 2}, /* ignoring bit difference: 0x00008000 */ - {175, 5, 2}, - {0, 0, 0} }, - {135000000, - {94, 5, 1}, - {28, 3, 0}, /* ignoring bit difference: 0x00804000 */ - {151, 4, 2}, - {189, 5, 2} }, - {136700000, - {115, 12, 0}, - {191, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {191, 5, 2}, - {191, 5, 2} }, - {138400000, - {87, 9, 0}, - {116, 3, 2}, /* ignoring bit difference: 0x00808000 */ - {116, 3, 2}, - {194, 5, 2} }, - {146760000, - {103, 5, 1}, - {206, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {206, 5, 2}, - {206, 5, 2} }, - {153920000, - {86, 8, 0}, - {86, 4, 1}, /* ignoring bit difference: 0x00808000 */ - {86, 4, 1}, - {86, 4, 1} }, /* FIXED: old = {84, 2, 1} */ - {156000000, - {109, 5, 1}, - {109, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {109, 5, 1}, - {108, 5, 1} }, - {157500000, - {55, 5, 0}, /* ignoring bit difference: 0x00008000 */ - {22, 2, 0}, /* ignoring bit difference: 0x00802000 */ - {110, 5, 1}, - {110, 5, 1} }, - {162000000, - {113, 5, 1}, - {113, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {113, 5, 1}, - {113, 5, 1} }, - {187000000, - {118, 9, 0}, - {131, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {131, 5, 1}, - {131, 5, 1} }, - {193295000, - {108, 8, 0}, - {81, 3, 1}, /* ignoring bit difference: 0x00808000 */ - {135, 5, 1}, - {135, 5, 1} }, - {202500000, - {99, 7, 0}, - {85, 3, 1}, /* ignoring bit difference: 0x00808000 */ - {142, 5, 1}, - {142, 5, 1} }, - {204000000, - {100, 7, 0}, - {143, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {143, 5, 1}, - {143, 5, 1} }, - {218500000, - {92, 6, 0}, - {153, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {153, 5, 1}, - {153, 5, 1} }, - {234000000, - {98, 6, 0}, - {98, 3, 1}, /* ignoring bit difference: 0x00008000 */ - {98, 3, 1}, - {164, 5, 1} }, - {267250000, - {112, 6, 0}, - {112, 3, 1}, /* ignoring bit difference: 0x00808000 */ - {187, 5, 1}, - {187, 5, 1} }, - {297500000, - {102, 5, 0}, /* ignoring bit difference: 0x00008000 */ - {166, 4, 1}, /* ignoring bit difference: 0x00008000 */ - {208, 5, 1}, - {208, 5, 1} }, - {74481000, - {26, 5, 0}, - {125, 3, 3}, /* ignoring bit difference: 0x00808000 */ - {208, 5, 3}, - {209, 5, 3} }, - {172798000, - {121, 5, 1}, - {121, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {121, 5, 1}, - {121, 5, 1} }, - {122614000, - {60, 7, 0}, - {137, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {137, 4, 2}, - {172, 5, 2} }, - {74270000, - {83, 8, 1}, - {208, 5, 3}, - {208, 5, 3}, - {0, 0, 0} }, - {148500000, - {83, 8, 0}, - {208, 5, 2}, - {166, 4, 2}, - {208, 5, 2} } +static struct pll_config cle266_pll_config[] = { + {19, 4, 0}, + {26, 5, 0}, + {28, 5, 0}, + {31, 5, 0}, + {33, 5, 0}, + {55, 5, 0}, + {102, 5, 0}, + {53, 6, 0}, + {92, 6, 0}, + {98, 6, 0}, + {112, 6, 0}, + {41, 7, 0}, + {60, 7, 0}, + {99, 7, 0}, + {100, 7, 0}, + {83, 8, 0}, + {86, 8, 0}, + {108, 8, 0}, + {87, 9, 0}, + {118, 9, 0}, + {95, 12, 0}, + {115, 12, 0}, + {108, 13, 0}, + {83, 17, 0}, + {67, 20, 0}, + {86, 20, 0}, + {98, 20, 0}, + {121, 24, 0}, + {99, 29, 0}, + {33, 3, 1}, + {15, 4, 1}, + {23, 4, 1}, + {37, 5, 1}, + {83, 5, 1}, + {85, 5, 1}, + {94, 5, 1}, + {103, 5, 1}, + {109, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {82, 6, 1}, + {31, 7, 1}, + {55, 7, 1}, + {84, 7, 1}, + {83, 8, 1}, + {76, 9, 1}, + {127, 9, 1}, + {33, 4, 2}, + {75, 4, 2}, + {119, 4, 2}, + {121, 4, 2}, + {91, 5, 2}, + {118, 5, 2}, + {83, 6, 2}, + {109, 6, 2}, + {90, 7, 2}, + {93, 2, 3}, + {53, 3, 3}, + {73, 4, 3}, + {89, 4, 3}, + {105, 4, 3}, + {117, 4, 3}, + {101, 5, 3}, + {121, 5, 3}, + {127, 5, 3}, + {99, 7, 3} +}; + +static struct pll_config k800_pll_config[] = { + {22, 2, 0}, + {28, 3, 0}, + {81, 3, 1}, + {85, 3, 1}, + {98, 3, 1}, + {112, 3, 1}, + {86, 4, 1}, + {166, 4, 1}, + {109, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {131, 5, 1}, + {143, 5, 1}, + {153, 5, 1}, + {66, 3, 2}, + {68, 3, 2}, + {95, 3, 2}, + {106, 3, 2}, + {116, 3, 2}, + {93, 4, 2}, + {119, 4, 2}, + {121, 4, 2}, + {133, 4, 2}, + {137, 4, 2}, + {117, 5, 2}, + {118, 5, 2}, + {120, 5, 2}, + {124, 5, 2}, + {132, 5, 2}, + {137, 5, 2}, + {141, 5, 2}, + {166, 5, 2}, + {170, 5, 2}, + {191, 5, 2}, + {206, 5, 2}, + {208, 5, 2}, + {30, 2, 3}, + {69, 3, 3}, + {82, 3, 3}, + {83, 3, 3}, + {109, 3, 3}, + {114, 3, 3}, + {125, 3, 3}, + {89, 4, 3}, + {103, 4, 3}, + {117, 4, 3}, + {126, 4, 3}, + {150, 4, 3}, + {161, 4, 3}, + {121, 5, 3}, + {127, 5, 3}, + {131, 5, 3}, + {134, 5, 3}, + {148, 5, 3}, + {169, 5, 3}, + {172, 5, 3}, + {182, 5, 3}, + {195, 5, 3}, + {196, 5, 3}, + {208, 5, 3}, + {66, 2, 4}, + {85, 3, 4}, + {141, 4, 4}, + {146, 4, 4}, + {161, 4, 4}, + {177, 5, 4} +}; + +static struct pll_config cx700_pll_config[] = { + {98, 3, 1}, + {86, 4, 1}, + {109, 5, 1}, + {110, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {131, 5, 1}, + {135, 5, 1}, + {142, 5, 1}, + {143, 5, 1}, + {153, 5, 1}, + {187, 5, 1}, + {208, 5, 1}, + {68, 2, 2}, + {95, 3, 2}, + {116, 3, 2}, + {93, 4, 2}, + {119, 4, 2}, + {133, 4, 2}, + {137, 4, 2}, + {151, 4, 2}, + {166, 4, 2}, + {110, 5, 2}, + {112, 5, 2}, + {117, 5, 2}, + {118, 5, 2}, + {120, 5, 2}, + {132, 5, 2}, + {137, 5, 2}, + {141, 5, 2}, + {151, 5, 2}, + {166, 5, 2}, + {175, 5, 2}, + {191, 5, 2}, + {206, 5, 2}, + {174, 7, 2}, + {82, 3, 3}, + {109, 3, 3}, + {117, 4, 3}, + {150, 4, 3}, + {161, 4, 3}, + {112, 5, 3}, + {115, 5, 3}, + {121, 5, 3}, + {127, 5, 3}, + {129, 5, 3}, + {131, 5, 3}, + {134, 5, 3}, + {138, 5, 3}, + {148, 5, 3}, + {157, 5, 3}, + {169, 5, 3}, + {172, 5, 3}, + {190, 5, 3}, + {195, 5, 3}, + {196, 5, 3}, + {208, 5, 3}, + {141, 5, 4}, + {150, 5, 4}, + {166, 5, 4}, + {176, 5, 4}, + {177, 5, 4}, + {183, 5, 4}, + {202, 5, 4} +}; + +static struct pll_config vx855_pll_config[] = { + {86, 4, 1}, + {108, 5, 1}, + {110, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {131, 5, 1}, + {135, 5, 1}, + {142, 5, 1}, + {143, 5, 1}, + {153, 5, 1}, + {164, 5, 1}, + {187, 5, 1}, + {208, 5, 1}, + {110, 5, 2}, + {112, 5, 2}, + {117, 5, 2}, + {118, 5, 2}, + {124, 5, 2}, + {132, 5, 2}, + {137, 5, 2}, + {141, 5, 2}, + {149, 5, 2}, + {151, 5, 2}, + {159, 5, 2}, + {166, 5, 2}, + {167, 5, 2}, + {172, 5, 2}, + {189, 5, 2}, + {191, 5, 2}, + {194, 5, 2}, + {206, 5, 2}, + {208, 5, 2}, + {83, 3, 3}, + {88, 3, 3}, + {109, 3, 3}, + {112, 3, 3}, + {103, 4, 3}, + {105, 4, 3}, + {161, 4, 3}, + {112, 5, 3}, + {115, 5, 3}, + {121, 5, 3}, + {127, 5, 3}, + {134, 5, 3}, + {137, 5, 3}, + {148, 5, 3}, + {157, 5, 3}, + {169, 5, 3}, + {172, 5, 3}, + {182, 5, 3}, + {191, 5, 3}, + {195, 5, 3}, + {209, 5, 3}, + {142, 4, 4}, + {146, 4, 4}, + {161, 4, 4}, + {141, 5, 4}, + {150, 5, 4}, + {165, 5, 4}, + {176, 5, 4} }; static struct fifo_depth_select display_fifo_depth_reg = { @@ -1674,26 +1604,48 @@ static u32 vx855_encode_pll(struct pll_config pll) | pll.multiplier; } -u32 viafb_get_clk_value(int clk) +static inline u32 get_pll_internal_frequency(u32 ref_freq, + struct pll_config pll) { - u32 value = 0; - int i, best = 0; + return ref_freq / pll.divisor * pll.multiplier; +} - for (i = 1; i < ARRAY_SIZE(pll_value); i++) { - if (abs(pll_value[i].clk - clk) - < abs(pll_value[best].clk - clk)) - best = i; +static inline u32 get_pll_output_frequency(u32 ref_freq, struct pll_config pll) +{ + return get_pll_internal_frequency(ref_freq, pll)>>pll.rshift; +} + +static struct pll_config get_pll_config(struct pll_config *config, int size, + int clk) +{ + struct pll_config best = config[0]; + const u32 f0 = 14318180; /* X1 frequency */ + int i; + + for (i = 1; i < size; i++) { + if (abs(get_pll_output_frequency(f0, config[i]) - clk) + < abs(get_pll_output_frequency(f0, best) - clk)) + best = config[i]; } + return best; +} + +u32 viafb_get_clk_value(int clk) +{ + u32 value = 0; + switch (viaparinfo->chip_info->gfx_chip_name) { case UNICHROME_CLE266: case UNICHROME_K400: - value = cle266_encode_pll(pll_value[best].cle266_pll); + value = cle266_encode_pll(get_pll_config(cle266_pll_config, + ARRAY_SIZE(cle266_pll_config), clk)); break; case UNICHROME_K800: case UNICHROME_PM800: case UNICHROME_CN700: - value = k800_encode_pll(pll_value[best].k800_pll); + value = k800_encode_pll(get_pll_config(k800_pll_config, + ARRAY_SIZE(k800_pll_config), clk)); break; case UNICHROME_CX700: case UNICHROME_CN750: @@ -1701,11 +1653,13 @@ u32 viafb_get_clk_value(int clk) case UNICHROME_P4M890: case UNICHROME_P4M900: case UNICHROME_VX800: - value = k800_encode_pll(pll_value[best].cx700_pll); + value = k800_encode_pll(get_pll_config(cx700_pll_config, + ARRAY_SIZE(cx700_pll_config), clk)); break; case UNICHROME_VX855: case UNICHROME_VX900: - value = vx855_encode_pll(pll_value[best].vx855_pll); + value = vx855_encode_pll(get_pll_config(vx855_pll_config, + ARRAY_SIZE(vx855_pll_config), clk)); break; } -- cgit v0.10.2