From 5d4cae5fe2ea1a0974962e2c49dca5c9c4b14cc0 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 10 Jun 2007 12:22:20 +0100 Subject: [ARM] VFP: fix section mismatch error Fix a real section mismatch issue; the test code is thrown away after initialisation, but if we do not detect the VFP hardware, it is left hooked into the exception handler. Any VFP instructions which are subsequently executed risk calling the discarded exception handler. Introduce a new "null" handler which returns to the "unrecognised fault" return address. Signed-off-by: Russell King diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index ca2a5ad..806ce26 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -29,6 +29,10 @@ do_vfp: add r10, r10, #TI_VFPSTATE @ r10 = workspace ldr pc, [r4] @ call VFP entry point +ENTRY(vfp_null_entry) + mov pc, lr +ENDPROC(vfp_null_entry) + .LCvfp: .word vfp_vector diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index f1e5951..1106b5f 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -26,8 +26,9 @@ */ void vfp_testing_entry(void); void vfp_support_entry(void); +void vfp_null_entry(void); -void (*vfp_vector)(void) = vfp_testing_entry; +void (*vfp_vector)(void) = vfp_null_entry; union vfp_state *last_VFP_context[NR_CPUS]; /* @@ -321,8 +322,10 @@ static int __init vfp_init(void) * The handler is already setup to just log calls, so * we just need to read the VFPSID register. */ + vfp_vector = vfp_testing_entry; vfpsid = fmrx(FPSID); barrier(); + vfp_vector = vfp_null_entry; printk(KERN_INFO "VFP support v0.3: "); if (VFP_arch) { diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h index dbe4b4e..5a25632 100644 --- a/include/asm-arm/linkage.h +++ b/include/asm-arm/linkage.h @@ -4,4 +4,8 @@ #define __ALIGN .align 0 #define __ALIGN_STR ".align 0" +#define ENDPROC(name) \ + .type name, %function; \ + END(name) + #endif -- cgit v0.10.2 From c362aecdb51ecb364d427a9b947fd2dfbd4cb86a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 09:51:51 +0100 Subject: [ARM] 4442/1: OSIRIS: Fix CPLD register definitions Fix the CPLD register definitions to correctly mirror the documentation Signed-off-by: Ben Dooks Signed-off-by: Russell King diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 4d6c7a5..4525bb0 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -65,6 +65,11 @@ static struct map_desc osiris_iodesc[] __initdata = { /* CPLD control registers */ { + .virtual = (u32)OSIRIS_VA_CTRL0, + .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { .virtual = (u32)OSIRIS_VA_CTRL1, .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), .length = SZ_16K, @@ -74,6 +79,11 @@ static struct map_desc osiris_iodesc[] __initdata = { .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), .length = SZ_16K, .type = MT_DEVICE, + }, { + .virtual = (u32)OSIRIS_VA_IDREG, + .pfn = __phys_to_pfn(OSIRIS_PA_IDREG), + .length = SZ_16K, + .type = MT_DEVICE, }, }; @@ -195,13 +205,13 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot) pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n", slot, set, set->nr_map); - tmp = __raw_readb(OSIRIS_VA_CTRL1); - tmp &= ~OSIRIS_CTRL1_NANDSEL; + tmp = __raw_readb(OSIRIS_VA_CTRL0); + tmp &= ~OSIRIS_CTRL0_NANDSEL; tmp |= slot; - pr_debug("osiris_nand: ctrl1 now %02x\n", tmp); + pr_debug("osiris_nand: ctrl0 now %02x\n", tmp); - __raw_writeb(tmp, OSIRIS_VA_CTRL1); + __raw_writeb(tmp, OSIRIS_VA_CTRL0); } static struct s3c2410_platform_nand osiris_nand_info = { diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index 3b64984..a3253e9 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -14,12 +14,14 @@ #ifndef __ASM_ARCH_OSIRISCPLD_H #define __ASM_ARCH_OSIRISCPLD_H -/* CTRL1 - NAND WP control */ +/* CTRL0 - NAND WP control */ -#define OSIRIS_CTRL1_NANDSEL (0x3) -#define OSIRIS_CTRL1_BOOT_INT (1<<3) -#define OSIRIS_CTRL1_PCMCIA (1<<4) -#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_ID_REVMASK (0x7) #endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h index a14164d..b5c74d2 100644 --- a/include/asm-arm/arch-s3c2410/osiris-map.h +++ b/include/asm-arm/arch-s3c2410/osiris-map.h @@ -24,16 +24,19 @@ /* we put the CPLD registers next, to get them out of the way */ -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) +#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) +#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) -#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) +#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) #endif /* __ASM_ARCH_OSIRISMAP_H */ -- cgit v0.10.2 From 55ba86bc6c33ce8b690fdf20ab485ef94cccd423 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 09:53:00 +0100 Subject: [ARM] 4443/1: OSIRIS: Add watchdog device to machine devices Add the watchdog timer to the list of devices the Osiris registers at startup. Signed-off-by: Ben Dooks Signed-off-by: Russell King diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 4525bb0..64da36a 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -249,6 +249,7 @@ static struct platform_device osiris_pcmcia = { static struct platform_device *osiris_devices[] __initdata = { &s3c_device_i2c, + &s3c_device_wdt, &s3c_device_nand, &osiris_pcmcia, }; -- cgit v0.10.2 From 5698bd28c67775c722dc1f4ab82e0041c1c740ea Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 10:36:09 +0100 Subject: [ARM] 4444/2: OSIRIS: CPLD suspend fix Ensure the CPLD 8bit settings are preserved over a suspend/resume cycle as the CPU sends a hard-reset at resume time. Signed-off-by: Ben Dooks Signed-off-by: Russell King diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 64da36a..1581160 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -245,6 +246,40 @@ static struct platform_device osiris_pcmcia = { .resource = osiris_pcmcia_resource, }; +/* Osiris power management device */ + +#ifdef CONFIG_PM +static unsigned char pm_osiris_ctrl0; + +static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state) +{ + pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0); + return 0; +} + +static int osiris_pm_resume(struct sys_device *sd) +{ + if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8) + __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1); + + return 0; +} + +#else +#define osiris_pm_suspend NULL +#define osiris_pm_resume NULL +#endif + +static struct sysdev_class osiris_pm_sysclass = { + set_kset_name("mach-osiris"), + .suspend = osiris_pm_suspend, + .resume = osiris_pm_resume, +}; + +static struct sys_device osiris_pm_sysdev = { + .cls = &osiris_pm_sysclass, +}; + /* Standard Osiris devices */ static struct platform_device *osiris_devices[] __initdata = { @@ -299,6 +334,9 @@ static void __init osiris_map_io(void) static void __init osiris_init(void) { + sysdev_class_register(&osiris_pm_sysclass); + sysdev_register(&osiris_pm_sysdev); + platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices)); }; @@ -310,5 +348,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS") .map_io = osiris_map_io, .init_machine = osiris_init, .init_irq = s3c24xx_init_irq, + .init_machine = osiris_init, .timer = &s3c24xx_timer, MACHINE_END diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index a3253e9..229ab23 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h * - * Copyright (c) 2005 Simtec Electronics + * Copyright 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks * @@ -19,9 +19,12 @@ #define OSIRIS_CTRL0_NANDSEL (0x3) #define OSIRIS_CTRL0_BOOT_INT (1<<3) #define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) #define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) #define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) +#define OSIRIS_CTRL1_FIX8 (1<<0) + #define OSIRIS_ID_REVMASK (0x7) #endif /* __ASM_ARCH_OSIRISCPLD_H */ -- cgit v0.10.2 From 6c1640d52b9b7355cd777c4f08bc930ac96d905b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 10:01:04 +0100 Subject: [ARM] 4445/1: ANUBIS: Fix CPLD registers Update the ANUBIS register definitions inline with the specs and ensure they are registered correctly. Signed-off-by: Ben Dooks Signed-off-by: Russell King diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index b5d387e..bff7ddd 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -76,8 +76,8 @@ static struct map_desc anubis_iodesc[] __initdata = { .length = SZ_4K, .type = MT_DEVICE, }, { - .virtual = (u32)ANUBIS_VA_CTRL2, - .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), + .virtual = (u32)ANUBIS_VA_IDREG, + .pfn = __phys_to_pfn(ANUBIS_PA_IDREG), .length = SZ_4K, .type = MT_DEVICE, }, diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index dcebf6d..168b93f 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -18,4 +18,8 @@ #define ANUBIS_CTRL1_NANDSEL (0x3) +/* IDREG - revision */ + +#define ANUBIS_IDREG_REVMASK (0x7) + #endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index ab076de..830d114 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -27,14 +27,8 @@ #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ -#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */ -#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ -#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) +#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ +#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) -- cgit v0.10.2