diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-08-30 21:18:18 (GMT) |
---|---|---|
committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-09-04 21:00:48 (GMT) |
commit | 56a9270521baaa00e12639a978302a67f61ef060 (patch) | |
tree | 2dcd364191afc051262f23ca58f0919e731b9de7 /board | |
parent | f75e89e9b5714db2b0e80074071dfbdd6f59488a (diff) | |
download | u-boot-56a9270521baaa00e12639a978302a67f61ef060.tar.xz |
Fix ULI RTC support on MPC8544 DS
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.
The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mpc8544ds/init.S | 2 | ||||
-rw-r--r-- | board/freescale/mpc8544ds/mpc8544ds.c | 6 |
2 files changed, 7 insertions, 1 deletions
diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S index 900c368..68ccba7 100644 --- a/board/freescale/mpc8544ds/init.S +++ b/board/freescale/mpc8544ds/init.S @@ -237,6 +237,6 @@ law_entry: /* contains both PCIE3 MEM & IO space */ .long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_2M) + .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_4M) 4: entry_end diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 4c3b27f..76d9091 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -26,6 +26,7 @@ #include <asm/processor.h> #include <asm/immap_85xx.h> #include <asm/immap_fsl_pci.h> +#include <asm/io.h> #include <spd.h> #include <miiphy.h> @@ -222,6 +223,11 @@ pci_init_board(void) printf (" PCIE3 on bus %02x - %02x\n", hose->first_busno,hose->last_busno); + /* + * Activate ULI1575 legacy chip by performing a fake + * memory access. Needed to make ULI RTC work. + */ + in_be32(CFG_PCIE3_MEM_BASE); } else { printf (" PCIE3: disabled\n"); } |