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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2017-02-01 19:40:46 (GMT)
committerMichal Simek <michal.simek@xilinx.com>2017-06-20 14:42:06 (GMT)
commite0752bc18422ec0dc93a770e96b1c2f44ee64ed7 (patch)
treef2055a347dfe526be583029f5e4a9a15b65aa05c /drivers/fpga/zynqmppl.c
parentd84bd9284ea05412928e5b95d4aaebfce18fef7c (diff)
downloadu-boot-e0752bc18422ec0dc93a770e96b1c2f44ee64ed7.tar.xz
arm64: zynqmp: Define routines for mmio write and read
Define routines of mmio write and read functionalities for zynqmp platform. Also do not call SMC from SPL because SPL is running before ATF in EL3 that's why SMCs can't be called because there is nothing to call. zynqmp_mmio*() are doing direct read/write accesses and this patch does the same. PMUFW is up and running at this time and there is a way to talk to pmufw via IPI but there is no reason to implement IPI stuff in SPL if we need just simple read for getting clock driver to work. Also make invoke_smc as global so that it can be reused in multile places where ever possible. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/fpga/zynqmppl.c')
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