From 4ff697fb90efc14448e9d6039342542ece774278 Mon Sep 17 00:00:00 2001 From: vojo Date: Wed, 27 Dec 2017 12:58:10 +0100 Subject: grapeboard BCD initial support and clean-up diff --git a/arch/arm/dts/grapeboard.dtsi b/arch/arm/dts/grapeboard.dtsi index 7e61cbc..bb53f24 100644 --- a/arch/arm/dts/grapeboard.dtsi +++ b/arch/arm/dts/grapeboard.dtsi @@ -14,6 +14,7 @@ model = "LS1012A Grape Board"; aliases { spi0 = &qspi; + spi1 = &dspi0; }; }; @@ -30,10 +31,39 @@ }; }; +&dspi0 { + bus-num = <0>; + status = "okay"; +}; + &i2c0 { status = "okay"; }; +&i2c1 { + status = "disabled"; +}; + &duart0 { status = "okay"; }; + +&duart1 { + status = "disabled"; +}; + +&esdhc0 { + status = "okay"; +}; + +&esdhc1 { + status = "disabled"; +}; + +&usb0 { + status = "disabled"; +}; + +&usb1 { + status = "okay"; +}; \ No newline at end of file diff --git a/board/scalys/grapeboard/Kconfig b/board/scalys/grapeboard/Kconfig index ef07ad6..4eb17aa 100644 --- a/board/scalys/grapeboard/Kconfig +++ b/board/scalys/grapeboard/Kconfig @@ -46,7 +46,7 @@ endchoice config PBL_IMAGE bool default y - prompt "Concat PBL and U-boot" + prompt "Append PBL with U-boot in a single binary" config U_BOOT_PAD_TO string @@ -54,10 +54,8 @@ config U_BOOT_PAD_TO config PBL_BINARY_SRC string depends on PBL_IMAGE - prompt "Modify RCW binary source" + prompt "Select PBL (RCW+PBI) binary source" endmenu - - endif diff --git a/board/scalys/grapeboard/Makefile b/board/scalys/grapeboard/Makefile index ad75e40..3380a93 100644 --- a/board/scalys/grapeboard/Makefile +++ b/board/scalys/grapeboard/Makefile @@ -1,5 +1,6 @@ # -# Copyright 2016 Freescale Semiconductor, Inc. +# Copyright 2017 Scalys B.V. +# opensource@scalys.com # # SPDX-License-Identifier: GPL-2.0+ # @@ -7,6 +8,7 @@ obj-y += grapeboard.o obj-y += eth.o obj-y += usb_grapeboard.o +obj-y += board_configuration_data.o obj-$(CONFIG_LAYERSCAPE_NS_ACCESS) += ns_access.o diff --git a/board/scalys/grapeboard/board_configuration_data.c b/board/scalys/grapeboard/board_configuration_data.c new file mode 100644 index 0000000..bd6a04e --- /dev/null +++ b/board/scalys/grapeboard/board_configuration_data.c @@ -0,0 +1,445 @@ +/* + * Copyright 2017 Scalys B.V. + * opensource@scalys.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include <../../../include/generated/autoconf.h> +#include "board_configuration_data.h" +#include "gpio_grapeboard.h" + +DECLARE_GLOBAL_DATA_PTR; + +int add_mac_addressess_to_env(const void* blob) +{ + const char *propname; + const void *value; + int prop_offset, len; + int count = 0; + char mac_string[19], eth_string[10]; + uint8_t mac_address[6]; + + if (fdt_check_header(blob) != 0) { + printf( "Board Configuration Data FDT corrupt\n"); + return -1; + } + + int nodeoff = fdt_path_offset(blob, "/network"); + + if (nodeoff < 0) { + printf("Network node not found\n"); + return -1; + } + for (prop_offset = fdt_first_property_offset(blob, nodeoff); + prop_offset > 0; + prop_offset = fdt_next_property_offset(blob, prop_offset)) { + value = fdt_getprop_by_offset(blob, prop_offset, + &propname, &len); + if (!value) { + return -EINVAL; + } + + memcpy(mac_address, value, 6); + + /* ret = fdtdec_get_byte_array( blob, prop_offset, propname, mac_address, 6 ); */ + + if (count) { + snprintf(eth_string, sizeof(eth_string), "eth%iaddr", count); + } + else { + snprintf(eth_string, sizeof(eth_string), "ethaddr"); + } + + snprintf(mac_string, sizeof(mac_string), + "%02x:%02x:%02x:%02x:%02x:%02x", + mac_address[0], mac_address[1], mac_address[2], + mac_address[3], mac_address[4], mac_address[5] + ); + + printf("%s : [ %s ]\n", propname, mac_string ); + + setenv( eth_string, mac_string); + + count++; + + } + printf("Done reading BCD\n"); + + return 0; +} + +const void* get_boardinfo_rescue_flash(void) +{ + struct ccsr_gpio *pgpio = (void *)(CONFIG_SYS_GPIO2); + struct spi_flash *flash; + + uint32_t bcd_data_lenght; + uint8_t *bcd_data = NULL; + uint32_t calculated_crc, received_crc; + int dtb_length; + int ret = 0; + + unsigned int bus = 0; + unsigned int cs = 0; + unsigned int speed = 10000000; + unsigned int mode = SPI_MODE_0; + +#ifdef CONFIG_DM_SPI_FLASH + struct udevice *new, *bus_dev; + /* In DM mode defaults will be taken from DT */ + speed = 0, mode = 0; +#else + struct spi_flash *new; +#endif + + /* Change chip select to rescue QSPI NOR flash */ + setbits_be32(&pgpio->gpdir, QSPI_MUX_N_MASK); + setbits_be32(&pgpio->gpdat, QSPI_MUX_N_MASK); + +#ifdef CONFIG_DM_SPI_FLASH + /* Remove the old device, otherwise probe will just be a nop */ + ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); + if (!ret) { + device_remove(new, DM_REMOVE_NORMAL); + } + flash = NULL; + ret = spi_flash_probe_bus_cs(bus, cs, speed, mode, &new); + if (ret) { + printf("Failed to initialize SPI flash at %u:%u (error %d)\n", + bus, cs, ret); + return NULL; + } + + flash = dev_get_uclass_priv(new); +#else + if (flash) + spi_flash_free(flash); + + new = spi_flash_probe(bus, cs, speed, mode); + flash = new; + + if (!new) { + printf("Failed to initialize SPI flash at %u:%u\n", bus, cs); + return NULL; + } + + flash = new; +#endif + + /* Read the last 4 bytes to determine the length of the DTB data */ + ret = spi_flash_read(flash, (BCD_FLASH_SIZE-4), 4, (uint8_t*) &bcd_data_lenght); + if (ret != 0) { + printf("Error reading bcd length\n"); + errno = -ENODEV; + goto err_no_free; + } + + /* Convert length from big endianess to architecture endianess */ + bcd_data_lenght = ntohl(bcd_data_lenght); + printf("bcd_data_lenght = %i\n", bcd_data_lenght ); + + if (bcd_data_lenght > BCD_FLASH_SIZE ) { + printf("BCD data length error %02x %02x %02x %02x\n", + ( (uint8_t*) &bcd_data_lenght)[0], + ( (uint8_t*) &bcd_data_lenght)[1], + ( (uint8_t*) &bcd_data_lenght)[2], + ( (uint8_t*) &bcd_data_lenght)[3] ); + errno = -EMSGSIZE; + goto err_no_free; + } + + /* Allocate, and verify memory for the BCD data */ + bcd_data = (uint8_t*) malloc(bcd_data_lenght); + if (bcd_data == NULL) { + printf("Error locating memory for BCD data\n"); + goto err_no_free; + } + printf("Allocated memory for BCD data\n"); + + /* Read the DTB BCD data to memory */ + ret = spi_flash_read(flash, (BCD_FLASH_SIZE-bcd_data_lenght), bcd_data_lenght, (uint8_t*) &bcd_data); + printf("Read data from I2C bus\n"); + + if (ret != 0) { + printf("Error reading complete BCD data from EEPROM\n"); + errno = -ENOMEM; + goto err_free; + } + dtb_length = bcd_data_lenght - BCD_LENGTH_SIZE - BCD_HASH_SIZE; + + /* Calculate CRC on read DTB data */ + calculated_crc = crc32( 0, bcd_data, dtb_length); + + /* Received CRC is packed after the DTB data */ + received_crc = *((uint32_t*) &bcd_data[dtb_length]); + + /* Convert CRC from big endianess to architecture endianess */ + received_crc = ntohl(received_crc); + + if (calculated_crc != received_crc) { + printf("Checksum error. expected %08x, got %08x\n", + calculated_crc, received_crc); + errno = -EBADMSG; + goto err_free; + } + + /* Everything checked out, return the BCD data. + * The caller is expected to free this data */ + return bcd_data; + +err_free: + /* free the allocated buffer */ + free(bcd_data); + +err_no_free: + /* Revert chip select for standard QSPI flash */ + clrbits_be32(&pgpio->gpdat, QSPI_MUX_N_MASK); + + return NULL; +} + +#ifndef CONFIG_SPL_BUILD + +#ifndef CONFIG_CMD_FDT_MAX_DUMP +#define CONFIG_CMD_FDT_MAX_DUMP 64 +#endif + +/* + * Heuristic to guess if this is a string or concatenated strings. + */ + +static int is_printable_string(const void *data, int len) +{ + const char *s = data; + + /* zero length is not */ + if (len == 0) + return 0; + + /* must terminate with zero or '\n' */ + if (s[len - 1] != '\0' && s[len - 1] != '\n') + return 0; + + /* printable or a null byte (concatenated strings) */ + while (((*s == '\0') || isprint(*s) || isspace(*s)) && (len > 0)) { + /* + * If we see a null, there are three possibilities: + * 1) If len == 1, it is the end of the string, printable + * 2) Next character also a null, not printable. + * 3) Next character not a null, continue to check. + */ + if (s[0] == '\0') { + if (len == 1) + return 1; + if (s[1] == '\0') + return 0; + } + s++; + len--; + } + + /* Not the null termination, or not done yet: not printable */ + if (*s != '\0' || (len != 0)) + return 0; + + return 1; +} + +/* + * Print the property in the best format, a heuristic guess. Print as + * a string, concatenated strings, a byte, word, double word, or (if all + * else fails) it is printed as a stream of bytes. + */ +static void print_data(const void *data, int len) +{ + int j; + + /* no data, don't print */ + if (len == 0) + return; + + /* + * It is a string, but it may have multiple strings (embedded '\0's). + */ + if (is_printable_string(data, len)) { + puts("\""); + j = 0; + while (j < len) { + if (j > 0) + puts("\", \""); + puts(data); + j += strlen(data) + 1; + data += strlen(data) + 1; + } + puts("\""); + return; + } + + if ((len %4) == 0) { + if (len > CONFIG_CMD_FDT_MAX_DUMP) + printf("* 0x%p [0x%08x]", data, len); + else { + const __be32 *p; + + printf("<"); + for (j = 0, p = data; j < len/4; j++) + printf("0x%08x%s", fdt32_to_cpu(p[j]), + j < (len/4 - 1) ? " " : ""); + printf(">"); + } + } else { /* anything else... hexdump */ + if (len > CONFIG_CMD_FDT_MAX_DUMP) + printf("* 0x%p [0x%08x]", data, len); + else { + const u8 *s; + + printf("["); + for (j = 0, s = data; j < len; j++) + printf("%02x%s", s[j], j < len - 1 ? " " : ""); + printf("]"); + } + } +} + +/* + * Recursively print (a portion of) the working_fdt. The depth parameter + * determines how deeply nested the fdt is printed. + */ +#define MAX_LEVEL 4 +static int bcd_fdt_print(const void* address, int depth) +{ + static char tabs[MAX_LEVEL+1] = + "\t\t\t\t\t"; + const void *nodep; /* property node pointer */ + int nodeoffset; /* node offset from libfdt */ + int nextoffset; /* next node offset from libfdt */ + uint32_t tag; /* tag */ + int len; /* length of the property */ + int level = 0; /* keep track of nesting level */ + const struct fdt_property *fdt_prop; + const char *pathp; + + nodeoffset = fdt_path_offset (address, "/"); + if (nodeoffset < 0) { + /* + * Not found or something else bad happened. + */ + printf ("libfdt fdt_path_offset() returned %s\n", + fdt_strerror(nodeoffset)); + return 1; + } + + /* + * The user passed in a node path and no property, + * print the node and all subnodes. + */ + while(level >= 0) { + tag = fdt_next_tag(address, nodeoffset, &nextoffset); + switch(tag) { + case FDT_BEGIN_NODE: + pathp = fdt_get_name(address, nodeoffset, NULL); + if (level <= depth) { + if (pathp == NULL) + pathp = "/* NULL pointer error */"; + if (*pathp == '\0') + pathp = "/"; /* root is nameless */ + printf("%s%s {\n", + &tabs[MAX_LEVEL - level], pathp); + } + level++; + if (level >= MAX_LEVEL) { + printf("Nested too deep, aborting.\n"); + return 1; + } + break; + case FDT_END_NODE: + level--; + if (level <= depth) + printf("%s};\n", &tabs[MAX_LEVEL - level]); + if (level == 0) { + level = -1; /* exit the loop */ + } + break; + case FDT_PROP: + fdt_prop = fdt_offset_ptr(address, nodeoffset, + sizeof(*fdt_prop)); + pathp = fdt_string(address, + fdt32_to_cpu(fdt_prop->nameoff)); + len = fdt32_to_cpu(fdt_prop->len); + nodep = fdt_prop->data; + if (len < 0) { + printf ("libfdt fdt_getprop(): %s\n", + fdt_strerror(len)); + return 1; + } else if (len == 0) { + /* the property has no value */ + if (level <= depth) + printf("%s%s;\n", + &tabs[MAX_LEVEL - level], + pathp); + } else { + if (level <= depth) { + printf("%s%s = ", + &tabs[MAX_LEVEL - level], + pathp); + print_data (nodep, len); + printf(";\n"); + } + } + break; + case FDT_NOP: + printf("%s/* NOP */\n", &tabs[MAX_LEVEL - level]); + break; + case FDT_END: + return 1; + default: + if (level <= depth) + printf("Unknown tag 0x%08X\n", tag); + return 1; + } + nodeoffset = nextoffset; + } + return 0; +} + +int do_bcdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const void* bcd_dtc_blob; + int ret = 0; + + bcd_dtc_blob = get_boardinfo_rescue_flash(); + + if (bcd_dtc_blob != NULL) { + bcd_fdt_print(bcd_dtc_blob, 4); + } + + return ret; +} + +/* U_BOOT_CMD(name,maxargs,repeatable,command,"usage","help") */ +U_BOOT_CMD( + bcdinfo, + 1, + 1, + do_bcdinfo, + "Show the Board Configuration Data (stored in rescue flash)", + "" +); +#endif diff --git a/board/scalys/grapeboard/board_configuration_data.h b/board/scalys/grapeboard/board_configuration_data.h new file mode 100644 index 0000000..5424bf0 --- /dev/null +++ b/board/scalys/grapeboard/board_configuration_data.h @@ -0,0 +1,13 @@ +#ifndef _BCD_H +#define _BCD_H + +#define BCD_LENGTH_SIZE 4 + +#define BCD_FLASH_SIZE 0x800000 /* 8 MBytes */ + +#define BCD_HASH_SIZE 4 + +const void* get_boardinfo_rescue_flash(void); +int add_mac_addressess_to_env(const void* blob); + +#endif /* _BCD_H */ diff --git a/board/scalys/grapeboard/eth.c b/board/scalys/grapeboard/eth.c index e02611a..256f996 100644 --- a/board/scalys/grapeboard/eth.c +++ b/board/scalys/grapeboard/eth.c @@ -1,4 +1,7 @@ /* + * Copyright 2017 Scalys B.V. + * opensource@scalys.com + * * Copyright 2015-2016 Freescale Semiconductor, Inc. * Copyright 2017 NXP * diff --git a/board/scalys/grapeboard/gpio_grapeboard.h b/board/scalys/grapeboard/gpio_grapeboard.h new file mode 100644 index 0000000..6553415 --- /dev/null +++ b/board/scalys/grapeboard/gpio_grapeboard.h @@ -0,0 +1,57 @@ +/* + * Copyright 2017 Scalys B.V. + * opensource@scalys.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef GPIO_GRAPEBOARD_H_ +#define GPIO_GRAPEBOARD_H_ + +/* GPIO1 and GPIO2 registers */ +#define CONFIG_SYS_GPIO1 0x2300000 +#define CONFIG_SYS_GPIO2 0x2310000 +#define GPIO_PIN_MASK(shift) (0x80000000 >> shift) + +/* ===================================================== + * Grapeboard ExPI mapping (*pin name at ls1012a side) + * Note: The secondary options require modified RCW. + * ===================================================== + * 3V3 -| 1 2|- 5V0 + * I2C_SDA -| 3 4|- 5V0 + * I2C_SCL -| 5 6|- GND + * CLK0_25MHZ -| 7 8|- UART_TXD + * GND -| 9 10|- UART_RXD + * GPIO1_27* -|11 12|- GPIO2_04* + * GPIO2_05* -|13 14|- GND + * GPIO2_06* -|15 16|- GPIO2_07* + * 3V3 -|17 18|- GPIO2_09* + * SPI_MOSI/GPIO1_24* -|19 20|- GND + * SPI_MISO/GPIO1_28* -|21 22|- GPIO2_10* + * SPI_CLK/GPIO1_29* -|23 24|- SPI_CE0/GPIO1_25* + * GND -|25 26|- SPI_CE1/GPIO1_26* + */ + +/* ExPI gpios */ +#define gpio1_27 GPIO_PIN_MASK(27) /* ExPI pin 11 */ +#define gpio2_04 GPIO_PIN_MASK(4) /* ExPI pin 12 */ +#define gpio2_05 GPIO_PIN_MASK(5) /* ExPI pin 13 */ +#define gpio2_06 GPIO_PIN_MASK(6) /* ExPI pin 15 */ +#define gpio2_07 GPIO_PIN_MASK(7) /* ExPI pin 16 */ +#define gpio2_09 GPIO_PIN_MASK(9) /* ExPI pin 18 */ +#define gpio2_10 GPIO_PIN_MASK(10) /* ExPI pin 22 */ + +/* M.2 gpios */ +#define gpio1_22 GPIO_PIN_MASK(22) +#define gpio2_00 GPIO_PIN_MASK(0) +#define gpio2_01 GPIO_PIN_MASK(1) +#define gpio2_02 GPIO_PIN_MASK(2) +#define M2_CFG1 GPIO_PIN_MASK(11) /* gpio2_11 */ +#define M2_CFG0 GPIO_PIN_MASK(12) /* gpio2_12 */ +#define M2_CFG2 GPIO_PIN_MASK(13) /* gpio2_13 */ +#define M2_CFG3 GPIO_PIN_MASK(14) /* gpio2_14 */ + +/* Other gpios */ +#define QSPI_MUX_N_MASK GPIO_PIN_MASK(3) /* gpio2_03 */ + +#endif /* GPIO_GRAPEBOARD_H_ */ diff --git a/board/scalys/grapeboard/grapeboard.c b/board/scalys/grapeboard/grapeboard.c index a08cfe3..eade1bd 100644 --- a/board/scalys/grapeboard/grapeboard.c +++ b/board/scalys/grapeboard/grapeboard.c @@ -29,83 +29,54 @@ #include #include "usb_grapeboard.h" #include <../../../include/generated/autoconf.h> +#include +#include "gpio_grapeboard.h" DECLARE_GLOBAL_DATA_PTR; -/* GPIO1 registers */ -#define CONFIG_SYS_GPIO1 0x2300000 -#define CONFIG_SYS_GPIO2 0x2310000 -#define GPIO_MASK(shift) (0x80000000 >> shift) - -/* ===================================================== - * Grapeboard ExPI mapping (* pin name at ls1012a side) - * Note: The secondary options require modified RCW. - * ===================================================== - * 3V3 -| 1 2|- 5V0 - * I2C_SDA -| 3 4|- 5V0 - * I2C_SCL -| 5 6|- GND - * CLK0_25MHZ -| 7 8|- UART_TXD - * GND -| 9 10|- UART_RXD - * GPIO1_27* -|11 12|- GPIO2_04* - * GPIO2_05* -|13 14|- GND - * GPIO2_06* -|15 16|- GPIO2_07* - * 3V3 -|17 18|- GPIO2_09* - * SPI_MOSI/GPIO1_24* -|19 20|- GND - * SPI_MISO/GPIO1_28* -|21 22|- GPIO2_10* - * SPI_CLK/GPIO1_29* -|23 24|- SPI_CE0/GPIO1_25* - * GND -|25 26|- SPI_CE1/GPIO1_26* - */ - -/* ExPI gpios */ -#define gpio1_27 GPIO_MASK(27) /* ExPI pin 11 */ -#define gpio2_04 GPIO_MASK(4) /* ExPI pin 12 */ -#define gpio2_05 GPIO_MASK(5) /* ExPI pin 13 */ -#define gpio2_06 GPIO_MASK(6) /* ExPI pin 15 */ -#define gpio2_07 GPIO_MASK(7) /* ExPI pin 16 */ -#define gpio2_09 GPIO_MASK(9) /* ExPI pin 18 */ -#define gpio2_10 GPIO_MASK(10) /* ExPI pin 22 */ - -/* M2 gpios */ -#define gpio1_22 GPIO_MASK(22) -#define gpio2_00 GPIO_MASK(0) -#define gpio2_01 GPIO_MASK(1) -#define gpio2_02 GPIO_MASK(2) -#define M2_CFG1 GPIO_MASK(11) /* gpio2_11 */ -#define M2_CFG0 GPIO_MASK(12) /* gpio2_12 */ -#define M2_CFG2 GPIO_MASK(13) /* gpio2_13 */ -#define M2_CFG3 GPIO_MASK(14) /* gpio2_14 */ - -/* Other gpios */ -#define QSPI_MUX_N_MASK (0x80000000 >> 3) /* gpio2_03 */ - int checkboard(void) { struct ccsr_gpio *pgpio = (void *)(CONFIG_SYS_GPIO2); +#if 0 + const void* bcd_dtc_blob; + int ret; +#endif int m2_config = 0; puts("Board: Grape board\n"); - /* set QSPI chip select muxing to 0 */ + /* set QSPI chip select muxing to 0 */ setbits_be32(&pgpio->gpdir, QSPI_MUX_N_MASK); clrbits_be32(&pgpio->gpdat, QSPI_MUX_N_MASK); - usb_hub_init(); +#if 0 /* todo: test */ + bcd_dtc_blob = get_boardinfo_rescue_flash(); + if (bcd_dtc_blob != NULL) { + /* Board Configuration Data is intact, ready for parsing */ + ret = add_mac_addressess_to_env(bcd_dtc_blob); + if (ret != 0) { + printf("Error adding BCD data to environment\n"); + } + } +#endif + /* Configure USB hub */ + usb_hx3_hub_init(); - /* M.2 init: read input values of M.2 config signals */ + /* Scanning for M.2 module */ clrbits_be32(&pgpio->gpdir, (M2_CFG0 | M2_CFG1 | M2_CFG2 | M2_CFG3)); m2_config = (in_be32(&pgpio->gpdat) & (M2_CFG0 | M2_CFG1 | M2_CFG2 | M2_CFG3)); switch(m2_config >> 17) { case 0: printf("M.2: SATA SSD module found on M.2 port\n"); -#ifdef CONFIG_SERDES_D_TO_PCIE +#if defined(CONFIG_SERDES_D_TO_PCIE) && defined(CONFIG_PBL_IMAGE) printf("Warning: SERDES has not been configured in RCW for SATA!\n"); #endif break; case 1: printf("M.2: PCIe SSD module found on M.2 port\n"); -#ifdef CONFIG_SERDES_D_TO_SATA +#if defined(CONFIG_SERDES_D_TO_SATA) && defined(CONFIG_PBL_IMAGE) printf("Warning: SERDES has not been configured in RCW for PCIe!\n"); #endif break; @@ -120,6 +91,13 @@ int checkboard(void) return 0; } +int misc_init_r(void) +{ + + + return 0; +} + int dram_init(void) { static const struct fsl_mmdc_info mparam = { @@ -209,7 +187,6 @@ void scsi_init(void) #endif } - int ft_board_setup(void *blob, bd_t *bd) { arch_fixup_fdt(blob); diff --git a/board/scalys/grapeboard/usb_grapeboard.c b/board/scalys/grapeboard/usb_grapeboard.c index 176c4be..5a75f99 100644 --- a/board/scalys/grapeboard/usb_grapeboard.c +++ b/board/scalys/grapeboard/usb_grapeboard.c @@ -63,7 +63,7 @@ const uint8_t hx3_settings[5 + HX3_SETTINGS_SIZE] = { 0x00 }; -int usb_hub_init(void) { +int usb_hx3_hub_init(void) { int length, index = 0, i2c_attempts = 0; const int settings_size = sizeof(hx3_settings); uint8_t *data = (uint8_t *)hx3_settings; @@ -81,7 +81,7 @@ int usb_hub_init(void) { if(i2c_write(I2C_ADDRESS_USB_HUB, index, 2, data, length)) { if(i2c_attempts < 1) - printf("\nI2C error during configuring USB hub slave. retrying...\n"); + printf("\nWARNING: I2C error during configuring USB hub slave. retrying...\n"); if(++i2c_attempts >= MAX_I2C_ATTEMPTS){ printf("ERROR: Maximum USB hub configuration attempts reached. Exiting now\n"); return 1; @@ -97,7 +97,7 @@ int usb_hub_init(void) { return 0; } -int usb_hub_reset(void) { +int usb_hx3_hub_reset(void) { /* USB hub cannot be reset in software without resetting the ls1012a */ return 1; } diff --git a/board/scalys/grapeboard/usb_grapeboard.h b/board/scalys/grapeboard/usb_grapeboard.h index b57f102..ae6289b 100644 --- a/board/scalys/grapeboard/usb_grapeboard.h +++ b/board/scalys/grapeboard/usb_grapeboard.h @@ -8,7 +8,7 @@ #ifndef USB_GRAPEBOARD_H_ #define USB_GRAPEBOARD_H_ -int usb_hub_init(void); -int usb_hub_reset(void); +int usb_hx3_hub_init(void); +int usb_hx3_hub_reset(void); #endif /* USB_GRAPEBOARD_H_ */ diff --git a/include/configs/grapeboard.h b/include/configs/grapeboard.h index ebfa2dc..0d5c21e 100644 --- a/include/configs/grapeboard.h +++ b/include/configs/grapeboard.h @@ -22,7 +22,7 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE -/* Match the following u-boot offsets with the value in the PBI instructions */ +/* Match the following u-boot offsets with the value in the PBI instructions! */ #define CONFIG_U_BOOT_PAD_TO 0x1000 #define CONFIG_SYS_TEXT_BASE 0x40001000 @@ -70,8 +70,9 @@ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION +/* Standard flash */ #define FSL_QSPI_FLASH_SIZE SZ_64M -#define FSL_QSPI_FLASH_NUM 1 /* Other flash is not accessible by default */ +#define FSL_QSPI_FLASH_NUM 1 /* QSPI Environment */ #if CONFIG_RESCUE_UBOOT_CONFIG @@ -85,6 +86,19 @@ #endif #endif /* CONFIG_QSPI_BOOT */ +/* SPI */ +#define CONFIG_FSL_DSPI1 +#define CONFIG_DEFAULT_SPI_BUS 0 +#define CONFIG_CMD_SPI +#define MMAP_DSPI DSPI1_BASE_ADDR +#define CONFIG_SYS_DSPI_CTAR0 1 +#define CONFIG_SYS_DSPI_CTAR1 1 + +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 + /* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC @@ -105,6 +119,9 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#include +#include + /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) @@ -122,10 +139,15 @@ #define EMAC2_PHY_ADDR 0x2 #endif -/* USB */ +/* USB XHCI */ +/* todo: fix hx3 hub configuration errors */ #define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_PCI #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#endif /* MMC */ #ifdef CONFIG_MMC @@ -150,6 +172,7 @@ #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI +#if 0 /* todo */ /* Mtdparts configuration */ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS @@ -169,6 +192,7 @@ "mtdparts=spi40000000.0:" \ MTDPART_DEFAULT_PARTITIONS \ "-(rootfs)" +#endif /* Default environment variables */ #define COMMON_UBOOT_CONFIG \ @@ -191,8 +215,10 @@ "ethprime=pfe_eth0\0" \ "ethaddr=02:00:00:ba:be:01\0" \ "eth1addr=02:00:00:ba:be:02\0" \ - "tftp_path=\0" \ - "autoload=no\0" + "tftp_path=.\0" \ + "autoload=no\0" \ + "hwconfig=" \ + "usb0:dr_mode=host\0" /* Default flash specific environment variables */ #if CONFIG_RESCUE_UBOOT_CONFIG @@ -208,30 +234,36 @@ #else /* if CONFIG_STANDARD_UBOOT_CONFIG */ #define CONFIG_EXTRA_ENV_SETTINGS \ COMMON_UBOOT_CONFIG \ - "update_pbl_uboot_qspi_nor_nw=" \ + "tftp_update_pbl_uboot_qspi_nor=" \ "dhcp;" \ "tftp $load_addr $tftp_path/u-boot-pbl.bin;" \ "if test $? = \"0\"; then " \ - "sf probe 0:0;" \ - "sf erase 0 200000;" \ - "sf write $load_addr 0 $filesize;" \ + "run update_pbl_uboot_qspi_nor;" \ "fi\0" \ - "update_ppa_qspi_nor_nw=" \ + "tftp_update_ppa_qspi_nor=" \ "dhcp;" \ "tftp $load_addr $tftp_path/ppa.itb;" \ "if test $? = \"0\"; then " \ - "sf probe 0:0;" \ - "sf erase 240000 40000;" \ - "sf write $load_addr 240000 $filesize;" \ + "run update_ppa_qspi_nor;" \ "fi\0" \ - "update_pfe_qspi_nor_nw=" \ + "tftp_update_pfe_qspi_nor=" \ "dhcp;" \ "tftp $load_addr $tftp_path/pfe_fw_sbl.itb;" \ "if test $? = \"0\"; then " \ - "sf probe 0:0;" \ - "sf erase 280000 40000;" \ - "sf write $load_addr 280000 $filesize;" \ + "run update_pfe_qspi_nor;" \ "fi\0" \ + "update_pbl_uboot_qspi_nor=" \ + "sf probe 0:0;" \ + "sf erase 0 200000;" \ + "sf write $load_addr 0 $filesize\0" \ + "update_ppa_qspi_nor=" \ + "sf probe 0:0;" \ + "sf erase 240000 40000;" \ + "sf write $load_addr 240000 $filesize\0" \ + "update_pfe_qspi_nor=" \ + "sf probe 0:0;" \ + "sf erase 280000 40000;" \ + "sf write $load_addr 280000 $filesize\0" \ "mmcboot=" \ "ext4load mmc 0:1 $fdt_addr_r /boot/grapeboard.dtb;" \ "ext4load mmc 0:1 $kernel_addr_r /boot/uImage;" \ @@ -239,7 +271,7 @@ "pfe stop;" \ "bootm $kernel_addr_r - $fdt_addr_r;" \ "fi\0" \ - "tftpboot=" \ + "netboot=" \ "dhcp;" \ "tftp $fdt_addr_r $tftp_path/grapeboard.dtb;" \ "tftp $kernel_addr_r $tftp_path/uImage;" \ -- cgit v0.10.2