From b07fac8eed8edd5866cb67d5a653599ca5c7b877 Mon Sep 17 00:00:00 2001 From: vojo Date: Wed, 17 Jan 2018 17:19:55 +0100 Subject: clean-up and variable update diff --git a/board/scalys/grapeboard/gpio_grapeboard.h b/board/scalys/grapeboard/gpio_grapeboard.h index 6553415..ae79932 100644 --- a/board/scalys/grapeboard/gpio_grapeboard.h +++ b/board/scalys/grapeboard/gpio_grapeboard.h @@ -22,7 +22,7 @@ * I2C_SCL -| 5 6|- GND * CLK0_25MHZ -| 7 8|- UART_TXD * GND -| 9 10|- UART_RXD - * GPIO1_27* -|11 12|- GPIO2_04* + * SPI_CE2/GPIO1_27* -|11 12|- GPIO2_04* * GPIO2_05* -|13 14|- GND * GPIO2_06* -|15 16|- GPIO2_07* * 3V3 -|17 18|- GPIO2_09* @@ -33,7 +33,13 @@ */ /* ExPI gpios */ +#define gpio1_24 GPIO_PIN_MASK(24) /* ExPI pin 19 */ +#define gpio1_25 GPIO_PIN_MASK(25) /* ExPI pin 24 */ +#define gpio1_26 GPIO_PIN_MASK(26) /* ExPI pin 26 */ #define gpio1_27 GPIO_PIN_MASK(27) /* ExPI pin 11 */ +#define gpio1_28 GPIO_PIN_MASK(28) /* ExPI pin 21 */ +#define gpio1_29 GPIO_PIN_MASK(29) /* ExPI pin 23 */ + #define gpio2_04 GPIO_PIN_MASK(4) /* ExPI pin 12 */ #define gpio2_05 GPIO_PIN_MASK(5) /* ExPI pin 13 */ #define gpio2_06 GPIO_PIN_MASK(6) /* ExPI pin 15 */ @@ -51,7 +57,7 @@ #define M2_CFG2 GPIO_PIN_MASK(13) /* gpio2_13 */ #define M2_CFG3 GPIO_PIN_MASK(14) /* gpio2_14 */ -/* Other gpios */ +/* Misc gpios */ #define QSPI_MUX_N_MASK GPIO_PIN_MASK(3) /* gpio2_03 */ #endif /* GPIO_GRAPEBOARD_H_ */ diff --git a/board/scalys/grapeboard/usb_grapeboard.c b/board/scalys/grapeboard/usb_grapeboard.c index f4d443e..6a2ba36 100644 --- a/board/scalys/grapeboard/usb_grapeboard.c +++ b/board/scalys/grapeboard/usb_grapeboard.c @@ -109,9 +109,3 @@ int usb_hx3_hub_reset(void) { /* USB hub cannot be reset in software without resetting the ls1012a */ return 1; } - -/*void usb_hub_reset_devices(int port) -{ - udelay(100); - return; -}*/ diff --git a/include/configs/grapeboard.h b/include/configs/grapeboard.h index 78b5447..509395f 100644 --- a/include/configs/grapeboard.h +++ b/include/configs/grapeboard.h @@ -136,7 +136,7 @@ /* PFE Ethernet */ #ifdef CONFIG_FSL_PFE -#define EMAC1_PHY_ADDR 0x0 /* may be changed to 1 because of possible bug */ +#define EMAC1_PHY_ADDR 0x0 /* will be changed to address 1 in final version */ #define EMAC2_PHY_ADDR 0x2 #endif @@ -251,32 +251,26 @@ "dhcp;" \ "tftp $load_addr $tftp_path/u-boot-pbl.bin;" \ "if test $? = \"0\"; then " \ - "run update_pbl_uboot_qspi_nor;" \ + "sf probe 0:0;" \ + "sf erase 0 200000;" \ + "sf write $load_addr 0 $filesize;" \ "fi\0" \ "tftp_update_ppa_qspi_nor=" \ "dhcp;" \ "tftp $load_addr $tftp_path/ppa.itb;" \ "if test $? = \"0\"; then " \ - "run update_ppa_qspi_nor;" \ + "sf probe 0:0;" \ + "sf erase 240000 40000;" \ + "sf write $load_addr 240000 $filesize;" \ "fi\0" \ "tftp_update_pfe_qspi_nor=" \ "dhcp;" \ "tftp $load_addr $tftp_path/pfe_fw_sbl.itb;" \ "if test $? = \"0\"; then " \ - "run update_pfe_qspi_nor;" \ + "sf probe 0:0;" \ + "sf erase 280000 40000;" \ + "sf write $load_addr 280000 $filesize;" \ "fi\0" \ - "update_pbl_uboot_qspi_nor=" \ - "sf probe 0:0;" \ - "sf erase 0 200000;" \ - "sf write $load_addr 0 $filesize\0" \ - "update_ppa_qspi_nor=" \ - "sf probe 0:0;" \ - "sf erase 240000 40000;" \ - "sf write $load_addr 240000 $filesize\0" \ - "update_pfe_qspi_nor=" \ - "sf probe 0:0;" \ - "sf erase 280000 40000;" \ - "sf write $load_addr 280000 $filesize\0" \ "mmcboot=" \ "ext4load mmc 0:1 $fdt_addr_r /boot/grapeboard.dtb;" \ "ext4load mmc 0:1 $kernel_addr_r /boot/uImage;" \ @@ -297,7 +291,7 @@ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_BOOTCOMMAND "run mmcboot" #endif -#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/mmcblk0p1 rootfstype=ext4 rw " \ +#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/mmcblk0p1 rootfstype=ext4 rw rootwait" \ "earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000 noinitrd" #endif -- cgit v0.10.2