From 2c0d69713c5f1cd0e3caee20b3725dc8d0b9aa77 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Fri, 22 Jan 2016 14:34:44 +0530 Subject: powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seq Users migrating Freescale's PowerPC SoC U-Boot code to their custom board, often overlook the need to execute set_liodns() and setup_portals() being called by platform files. So Move set_liodns() and setup_portals() to common u-boot boot sequence Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 13a7d0f..8c6b678 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -23,6 +23,10 @@ #include #include #include +#ifdef CONFIG_FSL_CORENET +#include +#include +#endif #include #include #include @@ -788,6 +792,13 @@ int cpu_init_r(void) spin_table_compat = 1; #endif +#ifdef CONFIG_FSL_CORENET + set_liodns(); +#ifdef CONFIG_SYS_DPAA_QBMAN + setup_portals(); +#endif +#endif + l2cache_init(); #if defined(CONFIG_RAMBOOT_PBL) disable_cpc_sram(); diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index 6a8fca6..e582abb 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -1023,10 +1022,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif /* * Adjust core voltage according to voltage ID * This function changes I2C mux to channel 2. diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index 6f0fea1..f41985d 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -125,11 +124,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */ 0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */ - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - return 0; } diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index e600bdb..c6a7242 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -140,8 +139,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); - setup_portals(); board_config_lanes_mux(); return 0; diff --git a/board/freescale/t102xqds/t102xqds.c b/board/freescale/t102xqds/t102xqds.c index 708afca..76793a1 100644 --- a/board/freescale/t102xqds/t102xqds.c +++ b/board/freescale/t102xqds/t102xqds.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -280,10 +279,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); #endif - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); board_mux_lane_to_slot(); board_retimer_ds125df111_init(); diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c index fddd240..01dbf38 100644 --- a/board/freescale/t102xrdb/t102xrdb.c +++ b/board/freescale/t102xrdb/t102xrdb.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include "t102xrdb.h" @@ -151,10 +150,6 @@ int board_early_init_r(void) 0, flash_esel, BOOKE_PAGESZ_256M, 1); #endif - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif #ifdef CONFIG_T1024RDB board_mux_lane(); #endif diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c index eaca57f..d7d56b4 100644 --- a/board/freescale/t1040qds/t1040qds.c +++ b/board/freescale/t1040qds/t1040qds.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -153,10 +152,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); #endif - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); return 0; diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index 3227652..ec97677 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include "../common/sleep.h" @@ -84,11 +83,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); #endif - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - return 0; } diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c index 7c89cd5..bfea3a1 100644 --- a/board/freescale/t208xqds/t208xqds.c +++ b/board/freescale/t208xqds/t208xqds.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -356,11 +355,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - /* Disable remote I2C connection to qixis fpga */ QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE); diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 0c2c1c5..0cb05aa 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include "t208xrdb.h" @@ -81,11 +80,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - /* * Adjust core voltage according to voltage ID * This function changes I2C mux to channel 2. diff --git a/board/freescale/t4qds/t4240emu.c b/board/freescale/t4qds/t4240emu.c index 5441094..f1393f2 100644 --- a/board/freescale/t4qds/t4240emu.c +++ b/board/freescale/t4qds/t4240emu.c @@ -15,7 +15,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -56,11 +55,6 @@ int board_early_init_r(void) MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - return 0; } diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c index 4f2cccd..d6df144 100644 --- a/board/freescale/t4qds/t4240qds.c +++ b/board/freescale/t4qds/t4240qds.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include @@ -552,11 +551,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - /* Disable remote I2C connection to qixis fpga */ QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE); diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c index fac442b..4f0bbed 100644 --- a/board/freescale/t4rdb/t4240rdb.c +++ b/board/freescale/t4rdb/t4240rdb.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include @@ -75,11 +74,6 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); - set_liodns(); -#ifdef CONFIG_SYS_DPAA_QBMAN - setup_portals(); -#endif - return 0; } -- cgit v0.10.2 From 43381474ff99afc02b0433acfdf48ebdd6d11ce2 Mon Sep 17 00:00:00 2001 From: Ashish kumar Date: Fri, 22 Jan 2016 15:50:10 +0530 Subject: arch/powperpc: Fix start_align due to use of __ffs64() instead ffs64() Incorrect DDR law was created in case of B4860qds after commit 2d2f490d. Return value of ffs64() differs from __ffs64(), eg. ffs64(0x80000000) = 0x20 __ffs64(0x80000000) = 0x1f As a result of this change, callers need to adjust the expected return value by removing -1. Signed-off-by: Ashish Kumar Reviewed-by: York Sun diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c index 997aea4..5659ab8 100644 --- a/arch/powerpc/cpu/mpc83xx/law.c +++ b/arch/powerpc/cpu/mpc83xx/law.c @@ -19,7 +19,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (start == 0) start_align = 1ull << (LAW_SIZE_2G + 1); else - start_align = 1ull << (__ffs64(start) - 1); + start_align = 1ull << (__ffs64(start)); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1; @@ -39,7 +39,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (sz) { start += law_sz; - start_align = 1ull << (__ffs64(start) - 1); + start_align = 1ull << (__ffs64(start)); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1; ecm = &immap->sysconf.ddrlaw[1]; diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 24baad4..bd79297 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -188,7 +188,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (start == 0) start_align = 1ull << (LAW_SIZE_32G + 1); else - start_align = 1ull << (__ffs64(start) - 1); + start_align = 1ull << (__ffs64(start)); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1; @@ -203,7 +203,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (sz) { start += law_sz; - start_align = 1ull << (__ffs64(start) - 1); + start_align = 1ull << (__ffs64(start)); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1; -- cgit v0.10.2 From cabe4d2f1970eae618ffac4262b61460b9ad3097 Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 22 Jan 2016 12:15:12 +0800 Subject: board/freescale/common: Check IR chip mode for VID support IR chip on all the boards are required to be used in Intel mode to support VID. VDD will not be adjusted if IR chip is used in other modes. Signed-off-by: Ying Zhang Reviewed-by: York Sun diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index f1bed51..1ea1b88 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -292,7 +292,7 @@ int adjust_vdd(ulong vdd_override) (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif u32 fusesr; - u8 vid; + u8 vid, buf; int vdd_target, vdd_current, vdd_last; int ret, i2caddress; unsigned long vdd_string_override; @@ -346,6 +346,21 @@ int adjust_vdd(ulong vdd_override) debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); } + /* check IR chip work on Intel mode*/ + ret = i2c_read(i2caddress, + IR36021_INTEL_MODE_OOFSET, + 1, (void *)&buf, 1); + if (ret) { + printf("VID: failed to read IR chip mode.\n"); + ret = -1; + goto exit; + } + if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { + printf("VID: IR Chip is not used in Intel mode.\n"); + ret = -1; + goto exit; + } + /* get the voltage ID from fuse status register */ fusesr = in_be32(&gur->dcfg_fusesr); /* diff --git a/board/freescale/common/vid.h b/board/freescale/common/vid.h index a9c7bb4..9182c20 100644 --- a/board/freescale/common/vid.h +++ b/board/freescale/common/vid.h @@ -11,6 +11,10 @@ #define IR36021_LOOP1_VOUT_OFFSET 0x9A #define IR36021_MFR_ID_OFFSET 0x92 #define IR36021_MFR_ID 0x43 +#define IR36021_INTEL_MODE_OOFSET 0x14 +#define IR36021_MODE_MASK 0x20 +#define IR36021_INTEL_MODE 0x00 +#define IR36021_AMD_MODE 0x20 /* step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5 -- cgit v0.10.2 From 2f66a828f7621958b6925fc763380fa87be55ee6 Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 22 Jan 2016 12:15:13 +0800 Subject: powerpc/board/t4240rdb: Enable VID support The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang Reviewed-by: York Sun diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 1ea1b88..1bd65a8 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -42,7 +42,7 @@ int __weak board_vdd_drop_compensation(void) * The IR chip can show up under the following addresses: * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) * 0x09 (Verified on T1040RDB-PA) - * 0x38 (Verified on T2080QDS, T2081QDS) + * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB) */ static int find_ir_chip_on_i2c(void) { diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c index 4f0bbed..406fb13 100644 --- a/board/freescale/t4rdb/t4240rdb.c +++ b/board/freescale/t4rdb/t4240rdb.c @@ -20,6 +20,7 @@ #include "t4rdb.h" #include "cpld.h" +#include "../common/vid.h" DECLARE_GLOBAL_DATA_PTR; @@ -74,6 +75,13 @@ int board_early_init_r(void) MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_256M, 1); + /* + * Adjust core voltage according to voltage ID + * This function changes I2C mux to channel 2. + */ + if (adjust_vdd(0)) + printf("Warning: Adjusting core voltage failed.\n"); + return 0; } diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 73279c8..4a17f41 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -606,6 +606,16 @@ unsigned long get_board_ddr_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv" +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VID +#endif +#define CONFIG_VOL_MONITOR_IR36021_SET +#define CONFIG_VOL_MONITOR_IR36021_READ +/* The lowest and highest voltage allowed for T4240RDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + /* * eSPI - Enhanced SPI */ -- cgit v0.10.2