From edcb0a528be80cb522b57626d7f2ee9ddc4a1073 Mon Sep 17 00:00:00 2001 From: Rajat Srivastava Date: Thu, 1 Feb 2018 16:36:48 +0530 Subject: Kconfig: qspi: Add SPI_ALIGNED_TXFIFO config details This config makes driver send only 16 bytes aligned data to TxFIFO while writing on flash. Signed-off-by: Rajat Srivastava diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 88da9a4..69c08c1 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -210,6 +210,15 @@ config FSL_QSPI used to access the SPI NOR flash on platforms embedding this Freescale IP core. +config FSL_SPI_ALIGNED_TXFIFO + bool "Write only 16 Bytes aligned data on TxFIFO" + depends on FSL_QSPI + help + For some boards, Freescale controller needs driver to fill TxFIFO + till 16 bytes to trigger data transfer, in case of flash write. + This config enables the Freescale QSPI driver to send 16 bytes + aligned data to TxFIFO while performing flash write operation. + config NDS_AE3XX_SPI bool "Andestech AE3XX SPI driver" help -- cgit v0.10.2