From a53d97ae851f6ddd2cb3dbb9cad63f4c3997f542 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 26 Oct 2016 14:08:30 +1300 Subject: arm: mvebu: move SYS_MVEBU_PLL_CLOCK to Kconfig The main PLL frequency is 2GHz for Armada-XP and 1GHZ for Armada 375, 38x and 39x. [ Linux commit ae142bd9976532aa5232ab0b00e621690d8bfe6a ] Signed-off-by: Chris Packham Signed-off-by: Stefan Roese diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 6e8026b..7733936 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -36,6 +36,12 @@ config ARMADA_8K bool select ARM64 +# Armada PLL frequency (used for NAND clock generation) +config SYS_MVEBU_PLL_CLOCK + int + default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K + default "1000000000" if ARMADA_38X || ARMADA_375 + # Armada XP/38x SoC types... config MV78230 bool diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 731fe65..0f69f33 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -31,9 +31,6 @@ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #endif -/* Armada XP PLL frequency (used for NAND clock generation) */ -#define CONFIG_SYS_MVEBU_PLL_CLOCK 2000000000 - /* SOC specific definations */ #define INTREG_BASE 0xd0000000 #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080) -- cgit v0.10.2