From fa5e2d1689b30a10fa81e250a2279357a627f3e8 Mon Sep 17 00:00:00 2001 From: MengDongyang Date: Wed, 24 Aug 2016 12:02:20 +0800 Subject: dts: rk3399: add dwc3_typec node for rk3399 rk3399 has two dwc3 controller for type-C port, add the dts node and enable them. Signed-off-by: MengDongyang Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index e92a492..7b49f6f 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -85,6 +85,10 @@ status = "okay"; }; +&dwc3_typec0 { + status = "okay"; +}; + &usb_host1_ehci { status = "okay"; }; @@ -93,6 +97,10 @@ status = "okay"; }; +&dwc3_typec1 { + status = "okay"; +}; + &pinctrl { pmic { pmic_int_l: pmic-int-l { diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 6d82078..179860c 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -9,6 +9,7 @@ #include #include #include +#define USB_CLASS_HUB 9 / { compatible = "rockchip,rk3399"; @@ -230,6 +231,50 @@ status = "disabled"; }; + dwc3_typec0: usb@fe800000 { + compatible = "rockchip,rk3399-xhci"; + reg = <0x0 0xfe800000 0x0 0x100000>; + status = "disabled"; + rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; + snps,dis-enblslpm-quirk; + snps,phyif-utmi-bits = <16>; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-u2-susphy-quirk; + + #address-cells = <2>; + #size-cells = <2>; + hub { + compatible = "usb-hub"; + usb,device-class = ; + }; + typec_phy0 { + compatible = "rockchip,rk3399-usb3-phy"; + reg = <0x0 0xff7c0000 0x0 0x40000>; + }; + }; + + dwc3_typec1: usb@fe900000 { + compatible = "rockchip,rk3399-xhci"; + reg = <0x0 0xfe900000 0x0 0x100000>; + status = "disabled"; + rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; + snps,dis-enblslpm-quirk; + snps,phyif-utmi-bits = <16>; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-u2-susphy-quirk; + + #address-cells = <2>; + #size-cells = <2>; + hub { + compatible = "usb-hub"; + usb,device-class = ; + }; + typec_phy1 { + compatible = "rockchip,rk3399-usb3-phy"; + reg = <0x0 0xff800000 0x0 0x40000>; + }; + }; + gic: interrupt-controller@fee00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; -- cgit v0.10.2