From 237c36379c76f7f6647bb11c03aa9c5cb9a4972f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 13 Apr 2015 10:51:14 +0900 Subject: ARM: tegra: move NVIDIA common files to arch/arm/mach-tegra All the Tegra boards borrow the files from board/nvidia/common/ directory, i.e., board/nvidia/common/* are not vendor-common files, but SoC-common files. Move NVIDIA common files to arch/arm/mach-tegra/ to clean up Makefiles. As arch/arm/mach-tegra/board.c already exists, this commit renames board/nvidia/common/board.c to arch/arm/mach-tegra/board2.c, expecting they will be consolidated as a second step. Signed-off-by: Masahiro Yamada Acked-by: Marcel Ziswiler Cc: Stephen Warren Cc: Tom Warren Cc: Simon Glass Acked-by: Simon Glass Signed-off-by: Tom Warren diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 1a3e24d..fefc180 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_PWM_TEGRA) += pwm.o endif obj-y += ap.o -obj-y += board.o +obj-y += board.o board2.o obj-y += cache.o obj-y += clock.o obj-y += lowlevel_init.o @@ -25,6 +25,7 @@ obj-y += powergate.o obj-y += xusb-padctl.o obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o obj-$(CONFIG_TEGRA124) += vpr.o +obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c new file mode 100644 index 0000000..131802a --- /dev/null +++ b/arch/arm/mach-tegra/board2.c @@ -0,0 +1,273 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_LCD +#include +#endif +#include +#include +#include +#ifdef CONFIG_PWM_TEGRA +#include +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_TEGRA_CLOCK_SCALING +#include +#endif +#ifdef CONFIG_USB_EHCI_TEGRA +#include +#include +#endif +#ifdef CONFIG_TEGRA_MMC +#include +#include +#endif +#include +#include +#include +#include +#include "emc.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SPL_BUILD +/* TODO(sjg@chromium.org): Remove once SPL supports device tree */ +U_BOOT_DEVICE(tegra_gpios) = { + "gpio_tegra" +}; +#endif + +__weak void pinmux_init(void) {} +__weak void pin_mux_usb(void) {} +__weak void pin_mux_spi(void) {} +__weak void gpio_early_init_uart(void) {} +__weak void pin_mux_display(void) {} + +#if defined(CONFIG_TEGRA_NAND) +__weak void pin_mux_nand(void) +{ + funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT); +} +#endif + +/* + * Routine: power_det_init + * Description: turn off power detects + */ +static void power_det_init(void) +{ +#if defined(CONFIG_TEGRA20) + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + + /* turn off power detects */ + writel(0, &pmc->pmc_pwr_det_latch); + writel(0, &pmc->pmc_pwr_det); +#endif +} + +__weak int tegra_board_id(void) +{ + return -1; +} + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ + int board_id = tegra_board_id(); + + printf("Board: %s", CONFIG_TEGRA_BOARD_STRING); + if (board_id != -1) + printf(", ID: %d\n", board_id); + printf("\n"); + + return 0; +} +#endif /* CONFIG_DISPLAY_BOARDINFO */ + +__weak int tegra_lcd_pmic_init(int board_it) +{ + return 0; +} + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + __maybe_unused int err; + __maybe_unused int board_id; + + /* Do clocks and UART first so that printf() works */ + clock_init(); + clock_verify(); + +#ifdef CONFIG_TEGRA_SPI + pin_mux_spi(); +#endif + +#ifdef CONFIG_PWM_TEGRA + if (pwm_init(gd->fdt_blob)) + debug("%s: Failed to init pwm\n", __func__); +#endif +#ifdef CONFIG_LCD + pin_mux_display(); + tegra_lcd_check_next_stage(gd->fdt_blob, 0); +#endif + /* boot param addr */ + gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); + + power_det_init(); + +#ifdef CONFIG_SYS_I2C_TEGRA +# ifdef CONFIG_TEGRA_PMU + if (pmu_set_nominal()) + debug("Failed to select nominal voltages\n"); +# ifdef CONFIG_TEGRA_CLOCK_SCALING + err = board_emc_init(); + if (err) + debug("Memory controller init failed: %d\n", err); +# endif +# endif /* CONFIG_TEGRA_PMU */ +#ifdef CONFIG_AS3722_POWER + err = as3722_init(NULL); + if (err && err != -ENODEV) + return err; +#endif +#endif /* CONFIG_SYS_I2C_TEGRA */ + +#ifdef CONFIG_USB_EHCI_TEGRA + pin_mux_usb(); + usb_process_devicetree(gd->fdt_blob); +#endif + +#ifdef CONFIG_LCD + board_id = tegra_board_id(); + err = tegra_lcd_pmic_init(board_id); + if (err) + return err; + tegra_lcd_check_next_stage(gd->fdt_blob, 0); +#endif + +#ifdef CONFIG_TEGRA_NAND + pin_mux_nand(); +#endif + + tegra_xusb_padctl_init(gd->fdt_blob); + +#ifdef CONFIG_TEGRA_LP0 + /* save Sdram params to PMC 2, 4, and 24 for WB0 */ + warmboot_save_sdram_params(); + + /* prepare the WB code to LP0 location */ + warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); +#endif + + return 0; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +static void __gpio_early_init(void) +{ +} + +void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); + +int board_early_init_f(void) +{ + pinmux_init(); + board_init_uart_f(); + + /* Initialize periph GPIOs */ + gpio_early_init(); + gpio_early_init_uart(); +#ifdef CONFIG_LCD + tegra_lcd_early_init(gd->fdt_blob); +#endif + + return 0; +} +#endif /* EARLY_INIT */ + +int board_late_init(void) +{ +#ifdef CONFIG_LCD + /* Make sure we finish initing the LCD */ + tegra_lcd_check_next_stage(gd->fdt_blob, 1); +#endif +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (tegra_cpu_is_non_secure()) { + printf("CPU is in NS mode\n"); + setenv("cpu_ns_mode", "1"); + } else { + setenv("cpu_ns_mode", ""); + } +#endif + return 0; +} + +#if defined(CONFIG_TEGRA_MMC) +__weak void pin_mux_mmc(void) +{ +} + +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("%s called\n", __func__); + + /* Enable muxes, etc. for SDMMC controllers */ + pin_mux_mmc(); + + debug("%s: init MMC\n", __func__); + tegra_mmc_init(); + + return 0; +} + +void pad_init_mmc(struct mmc_host *host) +{ +#if defined(CONFIG_TEGRA30) + enum periph_id id = host->mmc_id; + u32 val; + + debug("%s: sdmmc address = %08x, id = %d\n", __func__, + (unsigned int)host->reg, id); + + /* Set the pad drive strength for SDMMC1 or 3 only */ + if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { + debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", + __func__); + return; + } + + val = readl(&host->reg->sdmemcmppadctl); + val &= 0xFFFFFFF0; + val |= MEMCOMP_PADCTRL_VREF; + writel(val, &host->reg->sdmemcmppadctl); + + val = readl(&host->reg->autocalcfg); + val &= 0xFFFF0000; + val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED; + writel(val, &host->reg->autocalcfg); +#endif /* T30 */ +} +#endif /* MMC */ diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c new file mode 100644 index 0000000..8c62f36 --- /dev/null +++ b/arch/arm/mach-tegra/emc.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include "emc.h" +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* These rates are hard-coded for now, until fdt provides them */ +#define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000) +#define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000) + +int board_emc_init(void) +{ + unsigned rate; + + switch (tegra_get_chip_sku()) { + default: + case TEGRA_SOC_T20: + rate = EMC_SDRAM_RATE_T20; + break; + case TEGRA_SOC_T25: + rate = EMC_SDRAM_RATE_T25; + break; + } + return tegra_set_emc(gd->fdt_blob, rate); +} diff --git a/arch/arm/mach-tegra/emc.h b/arch/arm/mach-tegra/emc.h new file mode 100644 index 0000000..4095235 --- /dev/null +++ b/arch/arm/mach-tegra/emc.h @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010,2011 NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _NVIDIA_EMC_H_ +#define _NVIDIA_EMC_H_ + +int board_emc_init(void); + +#endif diff --git a/board/avionic-design/medcom-wide/Makefile b/board/avionic-design/medcom-wide/Makefile index bcf7ccf..1351d1f 100644 --- a/board/avionic-design/medcom-wide/Makefile +++ b/board/avionic-design/medcom-wide/Makefile @@ -8,5 +8,3 @@ # obj-y := ../common/tamonten.o - -include $(srctree)/board/nvidia/common/common.mk diff --git a/board/avionic-design/plutux/Makefile b/board/avionic-design/plutux/Makefile index bcf7ccf..1351d1f 100644 --- a/board/avionic-design/plutux/Makefile +++ b/board/avionic-design/plutux/Makefile @@ -8,5 +8,3 @@ # obj-y := ../common/tamonten.o - -include $(srctree)/board/nvidia/common/common.mk diff --git a/board/avionic-design/tec-ng/Makefile b/board/avionic-design/tec-ng/Makefile index a556b92..8ec9b88 100644 --- a/board/avionic-design/tec-ng/Makefile +++ b/board/avionic-design/tec-ng/Makefile @@ -6,5 +6,3 @@ # obj-y := ../common/tamonten-ng.o - -include $(srctree)/board/nvidia/common/common.mk diff --git a/board/avionic-design/tec/Makefile b/board/avionic-design/tec/Makefile index bcf7ccf..1351d1f 100644 --- a/board/avionic-design/tec/Makefile +++ b/board/avionic-design/tec/Makefile @@ -8,5 +8,3 @@ # obj-y := ../common/tamonten.o - -include $(srctree)/board/nvidia/common/common.mk diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile index e6a0b29..b5fde8d 100644 --- a/board/compal/paz00/Makefile +++ b/board/compal/paz00/Makefile @@ -15,5 +15,3 @@ # obj-y := paz00.o - -include $(srctree)/board/nvidia/common/common.mk diff --git a/board/compulab/trimslice/Makefile b/board/compulab/trimslice/Makefile index 311eb92..5396b21 100644 --- a/board/compulab/trimslice/Makefile +++ b/board/compulab/trimslice/Makefile @@ -6,5 +6,3 @@ # obj-y := trimslice.o - -include $(srctree)/board/nvidia/common/common.mk diff --git a/board/nvidia/common/Makefile b/board/nvidia/common/Makefile deleted file mode 100644 index e3b2651..0000000 --- a/board/nvidia/common/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# Copyright (c) 2011 The Chromium OS Authors. -# SPDX-License-Identifier: GPL-2.0+ - -include $(src)/common.mk diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c deleted file mode 100644 index 131802a..0000000 --- a/board/nvidia/common/board.c +++ /dev/null @@ -1,273 +0,0 @@ -/* - * (C) Copyright 2010,2011 - * NVIDIA Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_LCD -#include -#endif -#include -#include -#include -#ifdef CONFIG_PWM_TEGRA -#include -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_TEGRA_CLOCK_SCALING -#include -#endif -#ifdef CONFIG_USB_EHCI_TEGRA -#include -#include -#endif -#ifdef CONFIG_TEGRA_MMC -#include -#include -#endif -#include -#include -#include -#include -#include "emc.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_SPL_BUILD -/* TODO(sjg@chromium.org): Remove once SPL supports device tree */ -U_BOOT_DEVICE(tegra_gpios) = { - "gpio_tegra" -}; -#endif - -__weak void pinmux_init(void) {} -__weak void pin_mux_usb(void) {} -__weak void pin_mux_spi(void) {} -__weak void gpio_early_init_uart(void) {} -__weak void pin_mux_display(void) {} - -#if defined(CONFIG_TEGRA_NAND) -__weak void pin_mux_nand(void) -{ - funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT); -} -#endif - -/* - * Routine: power_det_init - * Description: turn off power detects - */ -static void power_det_init(void) -{ -#if defined(CONFIG_TEGRA20) - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; - - /* turn off power detects */ - writel(0, &pmc->pmc_pwr_det_latch); - writel(0, &pmc->pmc_pwr_det); -#endif -} - -__weak int tegra_board_id(void) -{ - return -1; -} - -#ifdef CONFIG_DISPLAY_BOARDINFO -int checkboard(void) -{ - int board_id = tegra_board_id(); - - printf("Board: %s", CONFIG_TEGRA_BOARD_STRING); - if (board_id != -1) - printf(", ID: %d\n", board_id); - printf("\n"); - - return 0; -} -#endif /* CONFIG_DISPLAY_BOARDINFO */ - -__weak int tegra_lcd_pmic_init(int board_it) -{ - return 0; -} - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - __maybe_unused int err; - __maybe_unused int board_id; - - /* Do clocks and UART first so that printf() works */ - clock_init(); - clock_verify(); - -#ifdef CONFIG_TEGRA_SPI - pin_mux_spi(); -#endif - -#ifdef CONFIG_PWM_TEGRA - if (pwm_init(gd->fdt_blob)) - debug("%s: Failed to init pwm\n", __func__); -#endif -#ifdef CONFIG_LCD - pin_mux_display(); - tegra_lcd_check_next_stage(gd->fdt_blob, 0); -#endif - /* boot param addr */ - gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); - - power_det_init(); - -#ifdef CONFIG_SYS_I2C_TEGRA -# ifdef CONFIG_TEGRA_PMU - if (pmu_set_nominal()) - debug("Failed to select nominal voltages\n"); -# ifdef CONFIG_TEGRA_CLOCK_SCALING - err = board_emc_init(); - if (err) - debug("Memory controller init failed: %d\n", err); -# endif -# endif /* CONFIG_TEGRA_PMU */ -#ifdef CONFIG_AS3722_POWER - err = as3722_init(NULL); - if (err && err != -ENODEV) - return err; -#endif -#endif /* CONFIG_SYS_I2C_TEGRA */ - -#ifdef CONFIG_USB_EHCI_TEGRA - pin_mux_usb(); - usb_process_devicetree(gd->fdt_blob); -#endif - -#ifdef CONFIG_LCD - board_id = tegra_board_id(); - err = tegra_lcd_pmic_init(board_id); - if (err) - return err; - tegra_lcd_check_next_stage(gd->fdt_blob, 0); -#endif - -#ifdef CONFIG_TEGRA_NAND - pin_mux_nand(); -#endif - - tegra_xusb_padctl_init(gd->fdt_blob); - -#ifdef CONFIG_TEGRA_LP0 - /* save Sdram params to PMC 2, 4, and 24 for WB0 */ - warmboot_save_sdram_params(); - - /* prepare the WB code to LP0 location */ - warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); -#endif - - return 0; -} - -#ifdef CONFIG_BOARD_EARLY_INIT_F -static void __gpio_early_init(void) -{ -} - -void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init"))); - -int board_early_init_f(void) -{ - pinmux_init(); - board_init_uart_f(); - - /* Initialize periph GPIOs */ - gpio_early_init(); - gpio_early_init_uart(); -#ifdef CONFIG_LCD - tegra_lcd_early_init(gd->fdt_blob); -#endif - - return 0; -} -#endif /* EARLY_INIT */ - -int board_late_init(void) -{ -#ifdef CONFIG_LCD - /* Make sure we finish initing the LCD */ - tegra_lcd_check_next_stage(gd->fdt_blob, 1); -#endif -#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) - if (tegra_cpu_is_non_secure()) { - printf("CPU is in NS mode\n"); - setenv("cpu_ns_mode", "1"); - } else { - setenv("cpu_ns_mode", ""); - } -#endif - return 0; -} - -#if defined(CONFIG_TEGRA_MMC) -__weak void pin_mux_mmc(void) -{ -} - -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("%s called\n", __func__); - - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - - debug("%s: init MMC\n", __func__); - tegra_mmc_init(); - - return 0; -} - -void pad_init_mmc(struct mmc_host *host) -{ -#if defined(CONFIG_TEGRA30) - enum periph_id id = host->mmc_id; - u32 val; - - debug("%s: sdmmc address = %08x, id = %d\n", __func__, - (unsigned int)host->reg, id); - - /* Set the pad drive strength for SDMMC1 or 3 only */ - if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { - debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", - __func__); - return; - } - - val = readl(&host->reg->sdmemcmppadctl); - val &= 0xFFFFFFF0; - val |= MEMCOMP_PADCTRL_VREF; - writel(val, &host->reg->sdmemcmppadctl); - - val = readl(&host->reg->autocalcfg); - val &= 0xFFFF0000; - val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED; - writel(val, &host->reg->autocalcfg); -#endif /* T30 */ -} -#endif /* MMC */ diff --git a/board/nvidia/common/common.mk b/board/nvidia/common/common.mk deleted file mode 100644 index 9a9b529..0000000 --- a/board/nvidia/common/common.mk +++ /dev/null @@ -1,3 +0,0 @@ -# common options for all tegra boards -obj-y += ../../nvidia/common/board.o -obj-$(CONFIG_TEGRA_CLOCK_SCALING) += ../../nvidia/common/emc.o diff --git a/board/nvidia/common/emc.c b/board/nvidia/common/emc.c deleted file mode 100644 index 8c62f36..0000000 --- a/board/nvidia/common/emc.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include "emc.h" -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* These rates are hard-coded for now, until fdt provides them */ -#define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000) -#define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000) - -int board_emc_init(void) -{ - unsigned rate; - - switch (tegra_get_chip_sku()) { - default: - case TEGRA_SOC_T20: - rate = EMC_SDRAM_RATE_T20; - break; - case TEGRA_SOC_T25: - rate = EMC_SDRAM_RATE_T25; - break; - } - return tegra_set_emc(gd->fdt_blob, rate); -} diff --git a/board/nvidia/common/emc.h b/board/nvidia/common/emc.h deleted file mode 100644 index 4095235..0000000 --- a/board/nvidia/common/emc.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010,2011 NVIDIA Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _NVIDIA_EMC_H_ -#define _NVIDIA_EMC_H_ - -int board_emc_init(void); - -#endif diff --git a/board/toradex/apalis_t30/Makefile b/board/toradex/apalis_t30/Makefile index a968e6b..0ea3d8f 100644 --- a/board/toradex/apalis_t30/Makefile +++ b/board/toradex/apalis_t30/Makefile @@ -1,6 +1,4 @@ # Copyright (c) 2014 Marcel Ziswiler # SPDX-License-Identifier: GPL-2.0+ -include $(srctree)/board/nvidia/common/common.mk - obj-y += apalis_t30.o diff --git a/board/toradex/colibri_t20/Makefile b/board/toradex/colibri_t20/Makefile index 86f78d9..e5e71ac 100644 --- a/board/toradex/colibri_t20/Makefile +++ b/board/toradex/colibri_t20/Makefile @@ -4,6 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -include $(srctree)/board/nvidia/common/common.mk - obj-y += colibri_t20.o diff --git a/board/toradex/colibri_t30/Makefile b/board/toradex/colibri_t30/Makefile index 3d58a4b..4242902 100644 --- a/board/toradex/colibri_t30/Makefile +++ b/board/toradex/colibri_t30/Makefile @@ -1,6 +1,4 @@ # Copyright (c) 2013-2014 Stefan Agner # SPDX-License-Identifier: GPL-2.0+ -include $(srctree)/board/nvidia/common/common.mk - obj-y += colibri_t30.o -- cgit v0.10.2