From 0b6ba547fa3d0596d50cdc2199343348207e57eb Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 19 Mar 2006 01:01:51 +0100 Subject: Update CHANGELOG diff --git a/CHANGELOG b/CHANGELOG index 542a4d1..08595d5 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,8 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Add support for MPC859/866 Rev. A.0 + * Add command for handling DDR ECC registers on MPC8349EE MDS board. * Fix DDR ECC bit definitions for MPC83xx. -- cgit v0.10.2 From e443c944cf4050daffb46d4788446d6c2df8ac6c Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Mon, 20 Mar 2006 18:02:44 +0100 Subject: Support for redundant environment in NAND Flash. diff --git a/README b/README index 6f61008..4442149 100644 --- a/README +++ b/README @@ -1946,6 +1946,17 @@ to save the current settings. These two #defines specify the offset and size of the environment area within the first NAND device. + - CFG_ENV_OFFSET_REDUND + + This setting describes a second storage area of CFG_ENV_SIZE + size used to hold a redundant copy of the environment data, + so that there is a valid backup copy in case there is a + power failure during a "saveenv" operation. + + Note: CFG_ENV_OFFSET and CFG_ENV_OFFSET_REDUND must be aligned + to a block boundary, and CFG_ENV_SIZE must be a multiple of + the NAND devices block size. + - CFG_SPI_INIT_OFFSET Defines offset to the initial SPI buffer area in DPRAM. The diff --git a/common/env_nand.c b/common/env_nand.c index 4ae68c5..2e1bfa6 100644 --- a/common/env_nand.c +++ b/common/env_nand.c @@ -36,21 +36,19 @@ #include #include #include +#include #include #if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_NAND)) == (CFG_CMD_ENV|CFG_CMD_NAND)) #define CMD_SAVEENV +#elif defined(CFG_ENV_OFFSET_REDUND) +#error Cannot use CFG_ENV_OFFSET_REDUND without CFG_CMD_ENV & CFG_CMD_NAND #endif -#if defined(CFG_ENV_SIZE_REDUND) -#error CFG_ENV_SIZE_REDUND not supported yet +#if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND != CFG_ENV_SIZE) +#error CFG_ENV_SIZE_REDUND should be the same as CFG_ENV_SIZE #endif -#if defined(CFG_ENV_ADDR_REDUND) -#error CFG_ENV_ADDR_REDUND and CFG_ENV_IS_IN_NAND not supported yet -#endif - - #ifdef CONFIG_INFERNO #error CONFIG_INFERNO not supported yet #endif @@ -99,7 +97,7 @@ int env_init(void) { DECLARE_GLOBAL_DATA_PTR; - gd->env_addr = (ulong)&default_environment[0]; + gd->env_addr = (ulong)&default_environment[0]; gd->env_valid = 1; return (0); @@ -110,9 +108,45 @@ int env_init(void) * The legacy NAND code saved the environment in the first NAND device i.e., * nand_dev_desc + 0. This is also the behaviour using the new NAND code. */ +#ifdef CFG_ENV_OFFSET_REDUND int saveenv(void) { - int total, ret = 0; + int total, ret = 0; + + DECLARE_GLOBAL_DATA_PTR; + + env_ptr->flags++; + total = CFG_ENV_SIZE; + + if(gd->env_valid == 1) { + puts ("Erasing redundant Nand..."); + if (nand_erase(&nand_info[0], + CFG_ENV_OFFSET_REDUND, CFG_ENV_SIZE)) + return 1; + puts ("Writing to redundant Nand... "); + ret = nand_write(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total, + (u_char*) env_ptr); + } else { + puts ("Erasing Nand..."); + if (nand_erase(&nand_info[0], + CFG_ENV_OFFSET, CFG_ENV_SIZE)) + return 1; + + puts ("Writing to Nand... "); + ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total, + (u_char*) env_ptr); + } + if (ret || total != CFG_ENV_SIZE) + return 1; + + puts ("done\n"); + gd->env_valid = (gd->env_valid == 2 ? 1 : 2); + return ret; +} +#else /* ! CFG_ENV_OFFSET_REDUND */ +int saveenv(void) +{ + int total, ret = 0; puts ("Erasing Nand..."); if (nand_erase(&nand_info[0], CFG_ENV_OFFSET, CFG_ENV_SIZE)) @@ -128,9 +162,64 @@ int saveenv(void) puts ("done\n"); return ret; } +#endif /* CFG_ENV_OFFSET_REDUND */ #endif /* CMD_SAVEENV */ +#ifdef CFG_ENV_OFFSET_REDUND +void env_relocate_spec (void) +{ +#if !defined(ENV_IS_EMBEDDED) + int crc1_ok = 0, crc2_ok = 0, total; + env_t *tmp_env1, *tmp_env2; + + DECLARE_GLOBAL_DATA_PTR; + + total = CFG_ENV_SIZE; + + tmp_env1 = (env_t *) malloc(CFG_ENV_SIZE); + tmp_env2 = (env_t *) malloc(CFG_ENV_SIZE); + + nand_read(&nand_info[0], CFG_ENV_OFFSET, &total, + (u_char*) tmp_env1); + nand_read(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total, + (u_char*) tmp_env2); + + crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc); + crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc); + + if(!crc1_ok && !crc2_ok) + return use_default(); + else if(crc1_ok && !crc2_ok) + gd->env_valid = 1; + else if(!crc1_ok && crc2_ok) + gd->env_valid = 2; + else { + /* both ok - check serial */ + if(tmp_env1->flags == 255 && tmp_env2->flags == 0) + gd->env_valid = 2; + else if(tmp_env2->flags == 255 && tmp_env1->flags == 0) + gd->env_valid = 1; + else if(tmp_env1->flags > tmp_env2->flags) + gd->env_valid = 1; + else if(tmp_env2->flags > tmp_env1->flags) + gd->env_valid = 2; + else /* flags are equal - almost impossible */ + gd->env_valid = 1; + } + + free(env_ptr); + if(gd->env_valid == 1) { + env_ptr = tmp_env1; + free(tmp_env2); + } else { + env_ptr = tmp_env2; + free(tmp_env1); + } + +#endif /* ! ENV_IS_EMBEDDED */ +} +#else /* ! CFG_ENV_OFFSET_REDUND */ /* * The legacy NAND code saved the environment in the first NAND device i.e., * nand_dev_desc + 0. This is also the behaviour using the new NAND code. @@ -143,14 +232,14 @@ void env_relocate_spec (void) total = CFG_ENV_SIZE; ret = nand_read(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*) env_ptr); - if (ret || total != CFG_ENV_SIZE) + if (ret || total != CFG_ENV_SIZE) return use_default(); if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) return use_default(); #endif /* ! ENV_IS_EMBEDDED */ - } +#endif /* CFG_ENV_OFFSET_REDUND */ static void use_default() { @@ -158,7 +247,7 @@ static void use_default() puts ("*** Warning - bad CRC or NAND, using default environment\n\n"); - if (default_environment_size > CFG_ENV_SIZE){ + if (default_environment_size > CFG_ENV_SIZE){ puts ("*** Error - default environment is too large\n\n"); return; } @@ -168,7 +257,7 @@ static void use_default() default_environment, default_environment_size); env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE); - gd->env_valid = 1; + gd->env_valid = 1; } diff --git a/include/configs/delta.h b/include/configs/delta.h index b42a7e2..f230b03 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -282,6 +282,7 @@ /* #define CFG_ENV_IS_NOWHERE */ #define CFG_ENV_IS_IN_NAND 1 #define CFG_ENV_OFFSET 0x40000 +#define CFG_ENV_OFFSET_REDUND 0x44000 #define CFG_ENV_SIZE 0x4000 #endif /* __CONFIG_H */ diff --git a/include/environment.h b/include/environment.h index bb10964..422f800 100644 --- a/include/environment.h +++ b/include/environment.h @@ -69,6 +69,18 @@ # endif #endif /* CFG_ENV_IS_IN_FLASH */ +#if defined(CFG_ENV_IS_IN_NAND) +# ifndef CFG_ENV_OFFSET +# error "Need to define CFG_ENV_OFFSET when using CFG_ENV_IS_IN_NAND" +# endif +# ifndef CFG_ENV_SIZE +# error "Need to define CFG_ENV_SIZE when using CFG_ENV_IS_IN_NAND" +# endif +# ifdef CFG_ENV_OFFSET_REDUND +# define CFG_REDUNDAND_ENVIRONMENT +# endif +#endif /* CFG_ENV_IS_IN_NAND */ + #ifdef CFG_REDUNDAND_ENVIRONMENT # define ENV_HEADER_SIZE (sizeof(unsigned long) + 1) -- cgit v0.10.2 From 552fc624f28d5db7b25f38c4e104fb7255d7df6b Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Mon, 20 Mar 2006 20:19:37 +0100 Subject: Cleanup of the monahans cpu and delta board port. diff --git a/board/delta/lowlevel_init.S b/board/delta/lowlevel_init.S index 498cf7f..f059db5 100644 --- a/board/delta/lowlevel_init.S +++ b/board/delta/lowlevel_init.S @@ -1,10 +1,5 @@ /* - * Most of this taken from Redboot hal_platform_setup.h with cleanup - * - * NOTE: I haven't clean this up considerably, just enough to get it - * running. See hal_platform_setup.h for the source. See - * board/cradle/lowlevel_init.S for another PXA250 setup that is - * much cleaner. + * (C) Copyright 2006 DENX Software Engineering * * See file CREDITS for list of people who contributed to this * project. @@ -31,14 +26,6 @@ DRAM_SIZE: .long CFG_DRAM_SIZE -/* wait for coprocessor write complete */ -.macro CPWAIT reg - mrc p15,0,\reg,c2,c0,0 - mov \reg,\reg - sub pc,pc,#4 -.endm - - .macro wait time ldr r2, =OSCR mov r3, #0 @@ -49,13 +36,9 @@ DRAM_SIZE: .long CFG_DRAM_SIZE bls 0b .endm -/* - * Memory setup - */ - .globl lowlevel_init lowlevel_init: - /* Set up GPIO pins first ----------------------------------------- */ + /* Set up GPIO pins first */ mov r10, lr /* Configure GPIO Pins 97, 98 UART1 / altern. Fkt. 1 */ @@ -73,22 +56,7 @@ lowlevel_init: bic r1, r1, #0x80000000 str r1, [r0] - /* ---------------------------------------------------------------- */ - /* Enable memory interface */ - /* ---------------------------------------------------------------- */ - - /* ---------------------------------------------------------------- */ - /* Step 1: Wait for at least 200 microsedonds to allow internal */ - /* clocks to settle. Only necessary after hard reset... */ - /* FIXME: can be optimized later */ - /* ---------------------------------------------------------------- */ -; wait #300 - mem_init: - -#define NEW_SDRAM_INIT 1 -#ifdef NEW_SDRAM_INIT - /* Configure ACCR Register - enable DMEMC Clock at 260 / 2 MHz */ ldr r0, =ACCR ldr r1, [r0] @@ -99,7 +67,7 @@ mem_init: /* 2. Programm MDCNFG, leaving DMCEN de-asserted */ ldr r0, =MDCNFG ldr r1, =(MDCNFG_DMAP | MDCNFG_DTYPE | MDCNFG_DTC_2 | MDCNFG_DCSE0 | MDCNFG_DRAC_13) - /* ldr r1, =0x80000403 */ + /* ldr r1, =0x80000403 */ str r1, [r0] ldr r1, [r0] /* delay until written */ @@ -140,121 +108,6 @@ mem_init: orr r1, r1, #MDCNFG_DMCEN str r1, [r0] - -#else /* NEW_SDRAM_INIT */ - - /* configure the MEMCLKCFG register */ - ldr r1, =MEMCLKCFG - ldr r2, =0x00010001 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[0] to data flash SRAM mode */ - ldr r1, =CSADRCFG0 - ldr r2, =0x00320809 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[1] to data flash SRAM mode */ - ldr r1, =CSADRCFG1 - ldr r2, =0x00320809 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set MSC 0 register for SRAM memory */ - ldr r1, =MSC0 - ldr r2, =0x11191119 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[2] to data flash SRAM mode */ - ldr r1, =CSADRCFG2 - ldr r2, =0x00320809 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[3] to VLIO mode */ - ldr r1, =CSADRCFG3 - ldr r2, =0x0032080B - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set MSC 1 register for VLIO memory */ - ldr r1, =MSC1 - ldr r2, =0x123C1119 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - -#if 0 - /* This does not work in Zylonite. -SC */ - ldr r0, =0x15fffff0 - ldr r1, =0xb10b - str r1, [r0] - str r1, [r0, #4] -#endif - - /* Configure ACCR Register */ - ldr r0, =ACCR @ ACCR - ldr r1, =0x0180b108 - str r1, [r0] - ldr r1, [r0] - - /* Configure MDCNFG Register */ - ldr r0, =MDCNFG @ MDCNFG - ldr r1, =0x403 - str r1, [r0] - ldr r1, [r0] - - /* Perform Resistive Compensation by configuring RCOMP register */ - ldr r1, =RCOMP @ RCOMP - ldr r2, =0x000000ff - str r2, [r1] - ldr r2, [r1] - - /* Configure MDMRS Register for SDCS0 */ - ldr r1, =MDMRS @ MDMRS - ldr r2, =0x60000023 - ldr r3, [r1] - orr r2, r2, r3 - str r2, [r1] - ldr r2, [r1] - - /* Configure MDMRS Register for SDCS1 */ - ldr r1, =MDMRS @ MDMRS - ldr r2, =0xa0000023 - ldr r3, [r1] - orr r2, r2, r3 - str r2, [r1] - ldr r2, [r1] - - /* Configure MDREFR */ - ldr r1, =MDREFR @ MDREFR - ldr r2, =0x00000006 - str r2, [r1] - ldr r2, [r1] - - /* Configure EMPI */ - ldr r1, =EMPI @ EMPI - ldr r2, =0x80000000 - str r2, [r1] - ldr r2, [r1] - - /* Hardware DDR Read-Strobe Delay Calibration */ - ldr r0, =DDR_HCAL @ DDR_HCAL - ldr r1, =0x803ffc07 @ the offset is correct? -SC - str r1, [r0] - wait #5 - ldr r1, [r0] - - /* Here we assume the hardware calibration alwasy be successful. -SC */ - /* Set DMCEN bit in MDCNFG Register */ - ldr r0, =MDCNFG @ MDCNFG - ldr r1, [r0] - orr r1, r1, #0x40000000 @ enable SDRAM for Normal Access - str r1, [r0] - -#endif /* NEW_SDRAM_INIT */ - #ifndef CFG_SKIP_DRAM_SCRUB /* scrub/init SDRAM if enabled/present */ ldr r8, =CFG_DRAM_BASE /* base address of SDRAM (CFG_DRAM_BASE) */ @@ -290,96 +143,4 @@ mem_init: mcr p14,0,r0,c10,c0,0 /* dcsr */ endlowlevel_init: - mov pc, lr - - -/* -@******************************************************************************** -@ DDR calibration -@ -@ This function is used to calibrate DQS delay lines. -@ Monahans supports three ways to do it. One is software -@ calibration. Two is hardware calibration. Three is hybrid -@ calibration. -@ -@ TBD -@ -SC -ddr_calibration: - - @ Case 1: Write the correct delay value once - @ Configure DDR_SCAL Register - ldr r0, =DDR_SCAL @ DDR_SCAL -q ldr r1, =0xaf2f2f2f - str r1, [r0] - ldr r1, [r0] -*/ -/* @ Case 2: Software Calibration - @ Write test pattern to memory - ldr r5, =0x0faf0faf @ Data Pattern - ldr r4, =0xa0000000 @ DDR ram - str r5, [r4] - - mov r1, =0x0 @ delay count - mov r6, =0x0 - mov r7, =0x0 -ddr_loop1: - add r1, r1, =0x1 - cmp r1, =0xf - ble end_loop - mov r3, r1 - mov r0, r1, lsl #30 - orr r3, r3, r0 - mov r0, r1, lsl #22 - orr r3, r3, r0 - mov r0, r1, lsl #14 - orr r3, r3, r0 - orr r3, r3, =0x80000000 - ldr r2, =DDR_SCAL - str r3, [r2] - - ldr r2, [r4] - cmp r2, r5 - bne ddr_loop1 - mov r6, r1 -ddr_loop2: - add r1, r1, =0x1 - cmp r1, =0xf - ble end_loop - mov r3, r1 - mov r0, r1, lsl #30 - orr r3, r3, r0 - mov r0, r1, lsl #22 - orr r3, r3, r0 - mov r0, r1, lsl #14 - orr r3, r3, r0 - orr r3, r3, =0x80000000 - ldr r2, =DDR_SCAL - str r3, [r2] - - ldr r2, [r4] - cmp r2, r5 - be ddr_loop2 - mov r7, r2 - - add r3, r6, r7 - lsr r3, r3, =0x1 - mov r0, r1, lsl #30 - orr r3, r3, r0 - mov r0, r1, lsl #22 - orr r3, r3, r0 - mov r0, r1, lsl #14 - orr r3, r3, r0 - orr r3, r3, =0x80000000 - ldr r2, =DDR_SCAL - -end_loop: - - @ Case 3: Hardware Calibratoin - ldr r0, =DDR_HCAL @ DDR_HCAL - ldr r1, =0x803ffc07 @ the offset is correct? -SC - str r1, [r0] - wait #5 - ldr r1, [r0] - mov pc, lr -*/ diff --git a/board/delta/nand.c b/board/delta/nand.c index 50def59..c332f71 100644 --- a/board/delta/nand.c +++ b/board/delta/nand.c @@ -293,11 +293,6 @@ static int dfc_wait(struct mtd_info *mtd, struct nand_chip *this, int state) { unsigned long ndsr=0, event=0; - /* mk@tbd set appropriate timeouts */ - /* if (state == FL_ERASING) */ - /* timeo = CFG_HZ * 400; */ - /* else */ - /* timeo = CFG_HZ * 20; */ if(state == FL_WRITING) { event = NDSR_CS0_CMDD | NDSR_CS0_BBD; } else if(state == FL_ERASING) { @@ -563,13 +558,12 @@ void board_nand_init(struct nand_chip *nand) /* wait 10 us due to cmd buffer clear reset */ - /* wait(10); */ + /* wait(10); */ nand->hwcontrol = dfc_hwcontrol; -/* nand->dev_ready = dfc_device_ready; */ +/* nand->dev_ready = dfc_device_ready; */ nand->eccmode = NAND_ECC_SOFT; - nand->chip_delay = NAND_DELAY_US; nand->options = NAND_BUSWIDTH_16; nand->waitfunc = dfc_wait; nand->read_byte = dfc_read_byte; diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 83ae5e3..a92a450 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -821,21 +821,21 @@ typedef void (*ExcpHndlr) (void) ; #define RTAR __REG(0x40900004) /* RTC Alarm Register */ #define RTSR __REG(0x40900008) /* RTC Status Register */ #define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ -#define RDAR1 __REG(0x40900018) /* Wristwatch Day Alarm Reg 1 */ -#define RDAR2 __REG(0x40900020) /* Wristwatch Day Alarm Reg 2 */ -#define RYAR1 __REG(0x4090001C) /* Wristwatch Year Alarm Reg 1 */ -#define RYAR2 __REG(0x40900024) /* Wristwatch Year Alarm Reg 2 */ -#define SWAR1 __REG(0x4090002C) /* Stopwatch Alarm Register 1 */ -#define SWAR2 __REG(0x40900030) /* Stopwatch Alarm Register 2 */ -#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ -#define RDCR __REG(0x40900010) /* RTC Day Count Register. */ -#define RYCR __REG(0x40900014) /* RTC Year Count Register. */ -#define SWCR __REG(0x40900028) /* Stopwatch Count Register */ -#define RTCPICR __REG(0x40900034) /* Periodic Interrupt Counter Register */ - -#define RTSR_PICE (1 << 15) /* Peridoc interrupt count enable */ -#define RTSR_PIALE (1 << 14) /* Peridoc interrupt Alarm enable */ -#define RTSR_PIAL (1 << 13) /* Peridoc interrupt Alarm status */ +#define RDAR1 __REG(0x40900018) /* Wristwatch Day Alarm Reg 1 */ +#define RDAR2 __REG(0x40900020) /* Wristwatch Day Alarm Reg 2 */ +#define RYAR1 __REG(0x4090001C) /* Wristwatch Year Alarm Reg 1 */ +#define RYAR2 __REG(0x40900024) /* Wristwatch Year Alarm Reg 2 */ +#define SWAR1 __REG(0x4090002C) /* Stopwatch Alarm Register 1 */ +#define SWAR2 __REG(0x40900030) /* Stopwatch Alarm Register 2 */ +#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ +#define RDCR __REG(0x40900010) /* RTC Day Count Register. */ +#define RYCR __REG(0x40900014) /* RTC Year Count Register. */ +#define SWCR __REG(0x40900028) /* Stopwatch Count Register */ +#define RTCPICR __REG(0x40900034) /* Periodic Interrupt Counter Register */ + +#define RTSR_PICE (1 << 15) /* Peridoc interrupt count enable */ +#define RTSR_PIALE (1 << 14) /* Peridoc interrupt Alarm enable */ +#define RTSR_PIAL (1 << 13) /* Peridoc interrupt Alarm status */ #define RTSR_HZE (1 << 3) /* HZ interrupt enable */ #define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ @@ -921,9 +921,10 @@ typedef void (*ExcpHndlr) (void) ; #ifdef CONFIG_CPU_MONAHANS #define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */ -/* Missing: 32 Interrupt priority registers */ -/* mk@tbd: These are the same as beneath for PXA27x: maybe can be - * merged if GPIO Stuff is same too. */ +/* Missing: 32 Interrupt priority registers + * These are the same as beneath for PXA27x: maybe can be merged if + * GPIO Stuff is same too. + */ #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ #define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ #define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ @@ -983,24 +984,24 @@ typedef void (*ExcpHndlr) (void) ; #define GCDR3 __REG(0x40E0042C) /* Bit-wise Clear of GPDR[127:96] */ #define GSRER0 __REG(0x40E00440) /* Set Rising Edge Det. Enable [31:0] */ -#define GSRER1 __REG(0x40E00444) /* Set Rising Edge Det. Enable [63:32] */ +#define GSRER1 __REG(0x40E00444) /* Set Rising Edge Det. Enable [63:32] */ #define GSRER2 __REG(0x40E00448) /* Set Rising Edge Det. Enable [95:64] */ -#define GSRER3 __REG(0x40E0044C) /* Set Rising Edge Det. Enable [127:96] */ +#define GSRER3 __REG(0x40E0044C) /* Set Rising Edge Det. Enable [127:96] */ #define GCRER0 __REG(0x40E00460) /* Clear Rising Edge Det. Enable [31:0] */ -#define GCRER1 __REG(0x40E00464) /* Clear Rising Edge Det. Enable [63:32] */ +#define GCRER1 __REG(0x40E00464) /* Clear Rising Edge Det. Enable [63:32] */ #define GCRER2 __REG(0x40E00468) /* Clear Rising Edge Det. Enable [95:64] */ -#define GCRER3 __REG(0x40E0046C) /* Clear Rising Edge Det. Enable[127:96] */ +#define GCRER3 __REG(0x40E0046C) /* Clear Rising Edge Det. Enable[127:96] */ #define GSFER0 __REG(0x40E00480) /* Set Falling Edge Det. Enable [31:0] */ -#define GSFER1 __REG(0x40E00484) /* Set Falling Edge Det. Enable [63:32] */ +#define GSFER1 __REG(0x40E00484) /* Set Falling Edge Det. Enable [63:32] */ #define GSFER2 __REG(0x40E00488) /* Set Falling Edge Det. Enable [95:64] */ -#define GSFER3 __REG(0x40E0048C) /* Set Falling Edge Det. Enable[127:96] */ +#define GSFER3 __REG(0x40E0048C) /* Set Falling Edge Det. Enable[127:96] */ #define GCFER0 __REG(0x40E004A0) /* Clr Falling Edge Det. Enable [31:0] */ -#define GCFER1 __REG(0x40E004A4) /* Clr Falling Edge Det. Enable [63:32] */ +#define GCFER1 __REG(0x40E004A4) /* Clr Falling Edge Det. Enable [63:32] */ #define GCFER2 __REG(0x40E004A8) /* Clr Falling Edge Det. Enable [95:64] */ -#define GCFER3 __REG(0x40E004AC) /* Clr Falling Edge Det. Enable[127:96] */ +#define GCFER3 __REG(0x40E004AC) /* Clr Falling Edge Det. Enable[127:96] */ #define GSDR(x) __REG2(0x40E00400, ((x) & 0x60) >> 3) #define GCDR(x) __REG2(0x40300420, ((x) & 0x60) >> 3) @@ -1488,8 +1489,8 @@ typedef void (*ExcpHndlr) (void) ; #define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) #define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) -#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT) -#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT) +#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT) +#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT) /* * Power Manager @@ -1709,10 +1710,10 @@ typedef void (*ExcpHndlr) (void) ; #define ACCR_13MEND2 (1 << 21) #define ACCR_PCCE (1 << 11) -#define CKENA_30_MSL0 (1 << 30) /* MSL0 Interface Unit Clock Enable */ -#define CKENA_29_SSP4 (1 << 29) /* SSP3 Unit Clock Enable */ -#define CKENA_28_SSP3 (1 << 28) /* SSP2 Unit Clock Enable */ -#define CKENA_27_SSP2 (1 << 27) /* SSP1 Unit Clock Enable */ +#define CKENA_30_MSL0 (1 << 30) /* MSL0 Interface Unit Clock Enable */ +#define CKENA_29_SSP4 (1 << 29) /* SSP3 Unit Clock Enable */ +#define CKENA_28_SSP3 (1 << 28) /* SSP2 Unit Clock Enable */ +#define CKENA_27_SSP2 (1 << 27) /* SSP1 Unit Clock Enable */ #define CKENA_26_SSP1 (1 << 26) /* SSP0 Unit Clock Enable */ #define CKENA_25_TSI (1 << 25) /* TSI Clock Enable */ #define CKENA_24_AC97 (1 << 24) /* AC97 Unit Clock Enable */ @@ -1720,27 +1721,27 @@ typedef void (*ExcpHndlr) (void) ; #define CKENA_22_FFUART (1 << 22) /* FFUART Unit Clock Enable */ #define CKENA_21_BTUART (1 << 21) /* BTUART Unit Clock Enable */ #define CKENA_20_UDC (1 << 20) /* UDC Clock Enable */ -#define CKENA_19_TPM (1 << 19) /* TPM Unit Clock Enable */ -#define CKENA_18_USIM1 (1 << 18) /* USIM1 Unit Clock Enable */ -#define CKENA_17_USIM0 (1 << 17) /* USIM0 Unit Clock Enable */ -#define CKENA_15_CIR (1 << 15) /* Consumer IR Clock Enable */ -#define CKENA_14_KEY (1 << 14) /* Keypad Controller Clock Enable */ -#define CKENA_13_MMC1 (1 << 13) /* MMC1 Clock Enable */ -#define CKENA_12_MMC0 (1 << 12) /* MMC0 Clock Enable */ -#define CKENA_11_FLASH (1 << 11) /* Boot ROM Clock Enable */ -#define CKENA_10_SRAM (1 << 10) /* SRAM Controller Clock Enable */ -#define CKENA_9_SMC (1 << 9) /* Static Memory Controller */ -#define CKENA_8_DMC (1 << 8) /* Dynamic Memory Controller */ -#define CKENA_7_GRAPHICS (1 << 7) /* 2D Graphics Clock Enable */ +#define CKENA_19_TPM (1 << 19) /* TPM Unit Clock Enable */ +#define CKENA_18_USIM1 (1 << 18) /* USIM1 Unit Clock Enable */ +#define CKENA_17_USIM0 (1 << 17) /* USIM0 Unit Clock Enable */ +#define CKENA_15_CIR (1 << 15) /* Consumer IR Clock Enable */ +#define CKENA_14_KEY (1 << 14) /* Keypad Controller Clock Enable */ +#define CKENA_13_MMC1 (1 << 13) /* MMC1 Clock Enable */ +#define CKENA_12_MMC0 (1 << 12) /* MMC0 Clock Enable */ +#define CKENA_11_FLASH (1 << 11) /* Boot ROM Clock Enable */ +#define CKENA_10_SRAM (1 << 10) /* SRAM Controller Clock Enable */ +#define CKENA_9_SMC (1 << 9) /* Static Memory Controller */ +#define CKENA_8_DMC (1 << 8) /* Dynamic Memory Controller */ +#define CKENA_7_GRAPHICS (1 << 7) /* 2D Graphics Clock Enable */ #define CKENA_6_USBCLI (1 << 6) /* USB Client Unit Clock Enable */ -#define CKENA_4_NAND (1 << 4) /* NAND Flash Controller Clock Enable */ -#define CKENA_3_CAMERA (1 << 3) /* Camera Interface Clock Enable */ +#define CKENA_4_NAND (1 << 4) /* NAND Flash Controller Clock Enable */ +#define CKENA_3_CAMERA (1 << 3) /* Camera Interface Clock Enable */ #define CKENA_2_USBHOST (1 << 2) /* USB Host Unit Clock Enable */ #define CKENA_1_LCD (1 << 1) /* LCD Unit Clock Enable */ #define CKENB_8_1WIRE ((1 << 8) + 32) /* One Wire Interface Unit Clock Enable */ -#define CKENB_7_GPIO ((1 << 7) + 32) /* GPIO Clock Enable */ -#define CKENB_6_IRQ ((1 << 6) + 32) /* Interrupt Controller Clock Enable */ +#define CKENB_7_GPIO ((1 << 7) + 32) /* GPIO Clock Enable */ +#define CKENB_6_IRQ ((1 << 6) + 32) /* Interrupt Controller Clock Enable */ #define CKENB_4_I2C ((1 << 4) + 32) /* I2C Unit Clock Enable */ #define CKENB_1_PWM1 ((1 << 1) + 32) /* PWM2 & PWM3 Clock Enable */ #define CKENB_0_PWM0 ((1 << 0) + 32) /* PWM0 & PWM1 Clock Enable */ @@ -2382,16 +2383,16 @@ typedef void (*ExcpHndlr) (void) ; #define KPAS_SO (0x1 << 31) #define KPASMKPx_SO (0x1 << 31) -#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */ -#define PSLR __REG(0x40F00034) -#define PSTR __REG(0x40F00038) /* Power Manager Standby Configuration Reg */ -#define PSNR __REG(0x40F0003C) /* Power Manager Sense Configuration Reg */ -#define PVCR __REG(0x40F00040) /* Power Manager Voltage Change Control Reg */ -#define PKWR __REG(0x40F00050) /* Power Manager KB Wake-Up Enable Reg */ -#define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Status Reg */ -#define OSMR4 __REG(0x40A00080) /* */ -#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ -#define OMCR4 __REG(0x40A000C0) /* */ +#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */ +#define PSLR __REG(0x40F00034) +#define PSTR __REG(0x40F00038) /* Power Manager Standby Configuration Reg */ +#define PSNR __REG(0x40F0003C) /* Power Manager Sense Configuration Reg */ +#define PVCR __REG(0x40F00040) /* Power Manager Voltage Change Control Reg */ +#define PKWR __REG(0x40F00050) /* Power Manager KB Wake-Up Enable Reg */ +#define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Status Reg */ +#define OSMR4 __REG(0x40A00080) /* */ +#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ +#define OMCR4 __REG(0x40A000C0) /* */ #endif /* CONFIG_PXA27X */ diff --git a/include/configs/delta.h b/include/configs/delta.h index f230b03..cb002f7 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -62,7 +62,7 @@ /* * select serial console configuration */ -#define CONFIG_FFUART 1 +#define CONFIG_FFUART 1 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -168,8 +168,6 @@ #define CFG_NAND_BASE_LIST { CFG_NAND0_BASE } #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 -#define NAND_DELAY_US 25 /* mk@tbd: could be 0, I guess */ /* nand timeout values */ #define CFG_NAND_PROG_ERASE_TO 3000 @@ -178,16 +176,15 @@ #undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */ /* NAND Timing Parameters (in ns) */ -#define NAND_TIMING_tCH 10 -#define NAND_TIMING_tCS 0 +#define NAND_TIMING_tCH 10 +#define NAND_TIMING_tCS 0 #define NAND_TIMING_tWH 20 -#define NAND_TIMING_tWP 40 +#define NAND_TIMING_tWP 40 -#define NAND_TIMING_tRH 20 -#define NAND_TIMING_tRP 40 +#define NAND_TIMING_tRH 20 +#define NAND_TIMING_tRP 40 -#define NAND_TIMING_tR 11123 -/* #define NAND_TIMING_tWHR 110 */ +#define NAND_TIMING_tR 11123 #define NAND_TIMING_tWHR 100 #define NAND_TIMING_tAR 10 @@ -199,87 +196,16 @@ #define CONFIG_MTD_DEBUG #define CONFIG_MTD_DEBUG_VERBOSE 1 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 +#define ADDR_COLUMN 1 +#define ADDR_PAGE 2 +#define ADDR_COLUMN_PAGE 3 #define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 - -#define CFG_NO_FLASH 1 -#ifndef CGF_NO_FLASH -/* these are required by the environment code */ -#define PHYS_FLASH_1 CFG_NAND0_BASE /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x04000000 /* 64 MB */ -#define PHYS_FLASH_BANK_SIZE 0x04000000 /* 64 MB Banks */ -#define PHYS_FLASH_SECT_SIZE (SECTORSIZE*1024) /* KB sectors (x2) */ -#endif +#define NAND_MAX_FLOORS 1 +#define NAND_MAX_CHIPS 1 -/* - * GPIO settings - */ -#define CFG_GPSR0_VAL 0x00008000 -#define CFG_GPSR1_VAL 0x00FC0382 -#define CFG_GPSR2_VAL 0x0001FFFF -#define CFG_GPCR0_VAL 0x00000000 -#define CFG_GPCR1_VAL 0x00000000 -#define CFG_GPCR2_VAL 0x00000000 -#define CFG_GPDR0_VAL 0x0060A800 -#define CFG_GPDR1_VAL 0x00FF0382 -#define CFG_GPDR2_VAL 0x0001C000 -#define CFG_GAFR0_L_VAL 0x98400000 -#define CFG_GAFR0_U_VAL 0x00002950 -#define CFG_GAFR1_L_VAL 0x000A9558 -#define CFG_GAFR1_U_VAL 0x0005AAAA -#define CFG_GAFR2_L_VAL 0xA0000000 -#define CFG_GAFR2_U_VAL 0x00000002 - -#define CFG_PSSR_VAL 0x20 - -/* - * Memory settings - */ -#define CFG_MSC0_VAL 0x23F223F2 -#define CFG_MSC1_VAL 0x3FF1A441 -#define CFG_MSC2_VAL 0x7FF97FF1 -#define CFG_MDCNFG_VAL 0x00001AC9 -#define CFG_MDREFR_VAL 0x00018018 -#define CFG_MDMRS_VAL 0x00000000 - -/* - * PCMCIA and CF Interfaces - */ -#define CFG_MECR_VAL 0x00000000 -#define CFG_MCMEM0_VAL 0x00010504 -#define CFG_MCMEM1_VAL 0x00010504 -#define CFG_MCATT0_VAL 0x00010504 -#define CFG_MCATT1_VAL 0x00010504 -#define CFG_MCIO0_VAL 0x00004715 -#define CFG_MCIO1_VAL 0x00004715 - -#define _LED 0x08000010 -#define LED_BLANK 0x08000040 - -/* - * FLASH and environment organization - */ -#ifndef CFG_NO_FLASH -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */ - - -/* NOTE: many default partitioning schemes assume the kernel starts at the - * second sector, not an environment. You have been warned! - */ -#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE -#endif /* #ifndef CFG_NO_FLASH */ +#define CFG_NO_FLASH 1 -/* #define CFG_ENV_IS_NOWHERE */ #define CFG_ENV_IS_IN_NAND 1 #define CFG_ENV_OFFSET 0x40000 #define CFG_ENV_OFFSET_REDUND 0x44000 -- cgit v0.10.2 From 5725f94aace1ed75bbeb9f3c528f34d1ae4dbe69 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 21 Mar 2006 01:58:07 +0100 Subject: Cleanup MCC200 board configuration; omit non-existent stuff. diff --git a/CHANGELOG b/CHANGELOG index 08595d5..f96f3f9 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,8 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Cleanup MCC200 board configuration; omit non-existent stuff. + * Add support for MPC859/866 Rev. A.0 * Add command for handling DDR ECC registers on MPC8349EE MDS board. diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index d4dee3b..b9b54eb 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -67,13 +67,8 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ ADD_USB_CMD | \ CFG_CMD_BEDBUG | \ - CFG_CMD_DATE | \ - CFG_CMD_DHCP | \ - CFG_CMD_EEPROM | \ CFG_CMD_FAT | \ - CFG_CMD_I2C | \ - CFG_CMD_NFS | \ - CFG_CMD_SNTP ) + CFG_CMD_I2C) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -131,26 +126,12 @@ * I2C configuration */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */ +#define CFG_I2C_MODULE 1 /* Select I2C module #1 or #2 */ #define CFG_I2C_SPEED 100000 /* 100 kHz */ #define CFG_I2C_SLAVE 0x7F /* - * EEPROM configuration - */ -#define CFG_I2C_EEPROM_ADDR 0x58 -#define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_BITS 4 -#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 - -/* - * RTC configuration - */ -#define CONFIG_RTC_PCF8563 -#define CFG_I2C_RTC_ADDR 0x51 - -/* * Flash configuration (8,16 or 32 MB) * TEXT base always at 0xFFF00000 * ENV_ADDR always at 0xFFF40000 @@ -231,7 +212,7 @@ */ /* 0x10000004 = 32MB SDRAM */ /* 0x90000004 = 64MB SDRAM */ -#define CFG_GPS_PORT_CONFIG 0x10000004 +#define CFG_GPS_PORT_CONFIG 0x00000004 /* * Miscellaneous configurable options -- cgit v0.10.2 From 05d8dce9d07cf4073ea15fbc448c1ce22b6baf0f Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 23 Mar 2006 17:10:30 +0100 Subject: Enable Quad UART om MCC200 board. diff --git a/CHANGELOG b/CHANGELOG index f96f3f9..34b8d20 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,8 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Enable Quad UART om MCC200 board. + * Cleanup MCC200 board configuration; omit non-existent stuff. * Add support for MPC859/866 Rev. A.0 diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index b9b54eb..67c2483 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -247,6 +247,11 @@ #define CFG_CS0_START CFG_FLASH_BASE #define CFG_CS0_SIZE CFG_FLASH_SIZE +/* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */ +#define CFG_CS2_START 0x80000000 +#define CFG_CS2_SIZE 0x00001000 +#define CFG_CS2_CFG 0x1d800 + #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 -- cgit v0.10.2 From ba70d6a4170ebbec5513f01ceae66a200102ba9a Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Fri, 24 Mar 2006 12:23:27 +0100 Subject: delta board: DA9030 initialization and i2c support. Some minor changes to make the pxa i2c driver work with the monahans cpu. diff --git a/board/delta/delta.c b/board/delta/delta.c index 3ffcc2a..6ef7e2f 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -26,9 +26,13 @@ */ #include +#include +#include +#include /* ------------------------------------------------------------------------- */ +static void init_DA9030(void); /* * Miscelaneous platform dependent initialisations @@ -54,6 +58,7 @@ int board_late_init(void) { setenv("stdout", "serial"); setenv("stderr", "serial"); + init_DA9030(); return 0; } @@ -73,3 +78,65 @@ int dram_init (void) return 0; } + +/* initialize the DA9030 Power Controller */ +static void init_DA9030() +{ + uchar addr = (uchar) DA9030_I2C_ADDR, val = 0; + + /* setup I2C GPIO's */ + GPIO32 = 0x801; /* SCL = Alt. Fkt. 1 */ + GPIO33 = 0x801; /* SDA = Alt. Fkt. 1 */ + + /* rising Edge on EXTON */ + GPIO17 = 0x8800; + udelay(5); + GPIO17 = 0xc800; + udelay(100000); /* wait for DA9030 */ + + /* reset the watchdog and go active (0xec) */ + val = (SYS_CONTROL_A_HWRES_ENABLE | + (0x6<<4) | + SYS_CONTROL_A_WDOG_ACTION | + SYS_CONTROL_A_WATCHDOG); + + i2c_reg_write(addr, SYS_CONTROL_A, val); + + i2c_reg_write(addr, REG_CONTROL_1_97, 0xfd); /* disable LDO1, enable LDO6 */ + i2c_reg_write(addr, LDO2_3, 0xd1); /* LDO2 =1,9V, LDO3=3,1V */ + i2c_reg_write(addr, LDO4_5, 0xcc); /* LDO2 =1,9V, LDO3=3,1V */ + i2c_reg_write(addr, LDO6_SIMCP, 0x3e); /* LDO6=3,2V, SIMCP = 5V support */ + i2c_reg_write(addr, LDO7_8, 0xc9); /* LDO7=2,7V, LDO8=3,0V */ + i2c_reg_write(addr, LDO9_12, 0xec); /* LDO9=3,0V, LDO12=3,2V */ + i2c_reg_write(addr, BUCK, 0x0c); /* Buck=1.2V */ + i2c_reg_write(addr, REG_CONTROL_2_98, 0x7f); /* All LDO'S on 8,9,10,11,12,14 */ + i2c_reg_write(addr, LDO_10_11, 0xcc); /* LDO10=3.0V LDO11=3.0V */ + i2c_reg_write(addr, LDO_15, 0xae); /* LDO15=1.8V, dislock first 3bit */ + i2c_reg_write(addr, LDO_14_16, 0x05); /* LDO14=2.8V, LDO16=NB */ + i2c_reg_write(addr, LDO_18_19, 0x9c); /* LDO18=3.0V, LDO19=2.7V */ + i2c_reg_write(addr, LDO_17_SIMCP0, 0x2c); /* LDO17=3.0V, SIMCP=3V support */ + i2c_reg_write(addr, BUCK2_DVC1, 0x9a); /* Buck2=1.5V plus Update support of 520 MHz */ + i2c_reg_write(addr, REG_CONTROL_2_18, 0x43); /* Ball on */ + i2c_reg_write(addr, MISC_CONTROLB, 0x08); /* session valid enable */ + i2c_reg_write(addr, USBPUMP, 0xc1); /* start pump, ignore HW signals */ + + val = i2c_reg_read(addr, STATUS); + if(val & STATUS_CHDET) + printf("Charger detected, turning on LED.\n"); + else { + printf("No charger detetected.\n"); + /* undervoltage? print error and power down */ + } +} + + +#if 0 +/* reset the DA9030 watchdog */ +void hw_watchdog_reset(void) +{ + uchar addr = (uchar) DA9030_I2C_ADDR, val = 0; + val = i2c_reg_read(addr, SYS_CONTROL_A); + val |= SYS_CONTROL_A_WATCHDOG; + i2c_reg_write(addr, SYS_CONTROL_A, val); +} +#endif diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c index b6155b1..722d949 100644 --- a/cpu/pxa/i2c.c +++ b/cpu/pxa/i2c.c @@ -47,7 +47,13 @@ /*#define DEBUG_I2C 1 /###* activate local debugging output */ #define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */ -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) + +#if (CFG_I2C_SPEED == 400000) +#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) +#else +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) +#endif + #define I2C_ISR_INIT 0x7FF #ifdef DEBUG_I2C @@ -91,7 +97,11 @@ static void i2c_reset( void ) ICR |= ICR_UR; /* reset the unit */ udelay(100); ICR &= ~ICR_IUE; /* disable unit */ +#ifdef CONFIG_CPU_MONAHANS + CKENB |= (CKENB_4_I2C); /* | CKENB_1_PWM1 | CKENB_0_PWM0); */ +#else /* CONFIG_CPU_MONAHANS */ CKEN |= CKEN14_I2C; /* set the global I2C clock on */ +#endif ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */ ICR = I2C_ICR_INIT; /* set control register values */ ISR = I2C_ISR_INIT; /* set clear interrupt bits */ @@ -104,9 +114,8 @@ static void i2c_reset( void ) * i2c_isr_set_cleared: - wait until certain bits of the I2C status register * are set and cleared * - * @return: 0 in case of success, 1 means timeout (no match within 10 ms). + * @return: 1 in case of success, 0 means timeout (no match within 10 ms). */ - static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask ) { int timeout = 10000; @@ -360,9 +369,9 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) msg.data = 0x00; if ((ret=i2c_transfer(&msg))) return -1; - *(buffer++) = msg.data; - + *buffer = msg.data; PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer)); + buffer++; } diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index a92a450..ebda719 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -475,11 +475,11 @@ typedef void (*ExcpHndlr) (void) ; #define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */ #define ICR_TB 0x8 /* transfer byte bit */ #define ICR_MA 0x10 /* master abort */ -#define ICR_SCLE 0x20 /* master clock enable */ +#define ICR_SCLE 0x20 /* master clock enable, mona SCLEA */ #define ICR_IUE 0x40 /* unit enable */ #define ICR_GCD 0x80 /* general call disable */ #define ICR_ITEIE 0x100 /* enable tx interrupts */ -#define ICR_IRFIE 0x200 /* enable rx interrupts */ +#define ICR_IRFIE 0x200 /* enable rx interrupts, mona: DRFIE */ #define ICR_BEIE 0x400 /* enable bus error ints */ #define ICR_SSDIE 0x800 /* slave STOP detected int enable */ #define ICR_ALDIE 0x1000 /* enable arbitration interrupt */ @@ -923,7 +923,7 @@ typedef void (*ExcpHndlr) (void) ; #define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */ /* Missing: 32 Interrupt priority registers * These are the same as beneath for PXA27x: maybe can be merged if - * GPIO Stuff is same too. + * GPIO Stuff is same too. */ #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ #define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ diff --git a/include/configs/delta.h b/include/configs/delta.h index cb002f7..eaa4c43 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -49,7 +49,6 @@ /* * Hardware drivers */ - #undef TURN_ON_ETHERNET #ifdef TURN_ON_ETHERNET # define CONFIG_DRIVER_SMC91111 1 @@ -59,6 +58,12 @@ # undef CONFIG_SMC_USE_IOFUNCS /* just for use with the kernel */ #endif +#define CONFIG_HARD_I2C 1 /* required for DA9030 access */ +#define CFG_I2C_SPEED 400000 /* I2C speed */ +#define CFG_I2C_SLAVE 1 /* I2C controllers address */ +#define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */ +/* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */ + /* * select serial console configuration */ @@ -73,8 +78,13 @@ #ifdef TURN_ON_ETHERNET # define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING) #else -# define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_ENV | CFG_CMD_NAND) \ - & ~(CFG_CMD_NET | CFG_CMD_FLASH | CFG_CMD_IMLS)) +# define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ + | CFG_CMD_ENV \ + | CFG_CMD_NAND \ + | CFG_CMD_I2C) \ + & ~(CFG_CMD_NET \ + | CFG_CMD_FLASH \ + | CFG_CMD_IMLS)) #endif @@ -121,7 +131,7 @@ #define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */ -#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */ #define CFG_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */ /* valid baudrates */ diff --git a/include/da9030.h b/include/da9030.h new file mode 100644 index 0000000..41108b9 --- /dev/null +++ b/include/da9030.h @@ -0,0 +1,106 @@ +/* + * (C) Copyright 2006 DENX Software Engineering + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* DA9030 register definitions */ +#define CID 0x00 +#define EVENT_A 0x01 +#define EVENT_B 0x02 +#define EVENT_C 0x03 +#define STATUS 0x04 +#define IRQ_MASK_A 0x05 +#define IRQ_MASK_B 0x06 +#define IRQ_MASK_C 0x07 +#define SYS_CONTROL_A 0x08 +#define SYS_CONTROL_B 0x09 +#define FAULT_LOG 0x0A +#define LDO_10_11 0x10 +#define LDO_15 0x11 +#define LDO_14_16 0x12 +#define LDO_18_19 0x13 +#define LDO_17_SIMCP0 0x14 +#define BUCK2_DVC1 0x15 +#define BUCK2_DVC2 0x16 +#define REG_CONTROL_1_17 0x17 +#define REG_CONTROL_2_18 0x18 +#define USBPUMP 0x19 +#define SLEEP_CONTROL 0x1A +#define STARTUP_CONTROL 0x1B +#define LED1_CONTROL 0x20 +#define LED2_CONTROL 0x21 +#define LED3_CONTROL 0x22 +#define LED4_CONTROL 0x23 +#define LEDPC_CONTROL 0x24 +#define WLED_CONTROL 0x25 +#define MISC_CONTROLA 0x26 +#define MISC_CONTROLB 0x27 +#define CHARGE_CONTROL 0x28 +#define CCTR_CONTROL 0x29 +#define TCTR_CONTROL 0x2A +#define CHARGE_PULSE 0x2B + +/* ... some missing ...*/ + +#define LDO1 0x90 +#define LDO2_3 0x91 +#define LDO4_5 0x92 +#define LDO6_SIMCP 0x93 +#define LDO7_8 0x94 +#define LDO9_12 0x95 +#define BUCK 0x96 +#define REG_CONTROL_1_97 0x97 +#define REG_CONTROL_2_98 0x98 +#define REG_SLEEP_CONTROL1 0x99 +#define REG_SLEEP_CONTROL2 0x9A +#define REG_SLEEP_CONTROL3 0x9B +#define ADC_MAN_CONTROL 0xA0 +#define ADC_AUTO_CONTROL 0xA1 +#define VBATMON 0xA2 +#define VBATMONTXMON 0xA3 +#define TBATHIGHP 0xA4 +#define TBATHIGHN 0xA5 +#define TBATLOW 0xA6 +#define MAN_RES 0xB0 +#define VBAT_RES 0xB1 +#define VBATMIN_RES 0xB2 +#define VBATMINTXON_RES 0xB3 +#define ICHMAX_RES 0xB4 +#define ICHMIN_RES 0xB5 +#define ICHAVERAGE_RES 0xB6 +#define VCHMAX_RES 0xB7 +#define VCHMIN_RES 0xB8 +#define TBAT_RES 0xB9 +#define ADC_IN4_RES 0xBA + +#define STATUS_ONKEY_N 0x1 /* current ONKEY_N value */ +#define STATUS_PWREN1 (1<<1) /* PWREN1 value */ +#define STATUS_EXTON (1<<2) /* EXTON value */ +#define STATUS_CHDET (1<<3) /* Charger detection status */ +#define STATUS_TBAT (1<<4) /* Battery over/under temperature status */ +#define STATUS_VBATMON (1<<5) /* VBATMON comparison status */ +#define STATUS_VBATMONTXON (1<<6) /* VBATMONTXON comparison status */ +#define STATUS_CHIOVER (1<<7) /* Charge overcurrent */ + +#define SYS_CONTROL_A_SLEEP_N_PIN_ENABLE 0x1 +#define SYS_CONTROL_A_SHUT_DOWN (1<<1) +#define SYS_CONTROL_A_HWRES_ENABLE (1<<2) +#define SYS_CONTROL_A_WDOG_ACTION (1<<3) +#define SYS_CONTROL_A_WATCHDOG (1<<7) -- cgit v0.10.2 From 40b0bafbb282a8fd2d705be0623948ff551bf26a Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Fri, 24 Mar 2006 14:35:25 +0100 Subject: Added config options CFG_MONAHANS_RUN_MODE_OSC_RATIO and CFG_MONAHANS_TURBO_RUN_MODE_RATIO for configuring the Monahans core frequency. diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 9541c9b..ffaa30f 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -190,6 +190,14 @@ OSTIMER_BASE: .word 0x40a00000 #define OIER 0x1C /* Clock Manager Registers */ +#ifdef CONFIG_CPU_MONAHANS +# ifndef CFG_MONAHANS_RUN_MODE_OSC_RATIO +# error "You have to define CFG_MONAHANS_RUN_MODE_OSC_RATIO!!" +# endif +# ifndef CFG_MONAHANS_TURBO_RUN_MODE_RATIO +# define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 0x1 +# endif +#else /* ! CONFIG_CPU_MONAHANS */ #ifdef CFG_CPUSPEED CC_BASE: .word 0x41300000 #define CCCR 0x00 @@ -197,6 +205,7 @@ cpuspeed: .word CFG_CPUSPEED #else #error "You have to define CFG_CPUSPEED!!" #endif +#endif /* CONFIG_CPU_MONAHANS */ /* takes care the CP15 update has taken place */ .macro CPWAIT reg @@ -233,9 +242,13 @@ cpu_init_crit: str r2, [r1] #endif -#ifndef CONFIG_CPU_MONAHANS + /* set clock speed */ +#ifdef CONFIG_CPU_MONAHANS + ldr r0, =ACCR + ldr r1, =(((CFG_MONAHANS_TURBO_RUN_MODE_RATIO<<8) & ACCR_XN_MASK) | (CFG_MONAHANS_RUN_MODE_OSC_RATIO & ACCR_XL_MASK)) + str r1, [r0] +#else /* ! CONFIG_CPU_MONAHANS */ #ifdef CFG_CPUSPEED - /* set clock speed tbd@mk: required for monahans? */ ldr r0, CC_BASE ldr r1, cpuspeed str r1, [r0, #CCCR] diff --git a/include/configs/delta.h b/include/configs/delta.h index eaa4c43..776ee15 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -132,7 +132,13 @@ #define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */ #define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */ -#define CFG_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */ + +/* Monahans Core Frequency = + * + */ +#define CFG_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */ +#define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */ + /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -- cgit v0.10.2 From 0b953ffc653fc5ab3d3fa47abf0dd9b8bd0703f5 Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Fri, 24 Mar 2006 15:28:02 +0100 Subject: Monahans related documentation update. diff --git a/README b/README index 4442149..a6cbe22 100644 --- a/README +++ b/README @@ -246,6 +246,7 @@ The following options need to be configured: CONFIG_SA1110 CONFIG_ARM7 CONFIG_PXA250 + CONFIG_CPU_MONAHANS MicroBlaze based CPUs: ---------------------- @@ -304,13 +305,13 @@ The following options need to be configured: ----------------- CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250, - CONFIG_CSB637, CONFIG_DNP1110, CONFIG_EP7312, - CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, CONFIG_IMPA7, - CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, CONFIG_KB9202, - CONFIG_LART, CONFIG_LPD7A400, CONFIG_LUBBOCK, - CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON, - CONFIG_P2_OMAP730, CONFIG_SMDK2400, CONFIG_SMDK2410, - CONFIG_TRAB, CONFIG_VCMA9 + CONFIG_CSB637, CONFIG_DELTA, CONFIG_DNP1110, + CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, + CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, + CONFIG_KB9202, CONFIG_LART, CONFIG_LPD7A400, + CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, + CONFIG_SHANNON, CONFIG_P2_OMAP730, CONFIG_SMDK2400, + CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9 MicroBlaze based boards: ------------------------ @@ -379,6 +380,20 @@ The following options need to be configured: that this requires a (stable) reference clock (32 kHz RTC clock or CFG_8XX_XIN) +- Intel Monahans options: + CFG_MONAHANS_RUN_MODE_OSC_RATIO + + Defines the Monahans run mode to oscillator + ratio. Valid values are 8, 16, 24, 31. The core + frequency is this value multiplied by 13 MHz. + + CFG_MONAHANS_TURBO_RUN_MODE_RATIO + + Defines the Monahans turbo mode to oscillator + ratio. Valid values are 1 (default if undefined) and + 2. The core frequency as calculated above is multiplied + by this value. + - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ -- cgit v0.10.2 From f6dbbe986481cff01334c64cacb971a5f237a9a9 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 25 Mar 2006 18:42:54 +0100 Subject: Update CHANGELOG diff --git a/CHANGELOG b/CHANGELOG index 34b8d20..db9899a 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,16 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Update for Delta board: + - redundant NAND environment + - misc Monahans cleanups (remove dead code etc.) + - DA9030 Initialization; some minimal changes to PXA I2C driver to + make it work with the Monahans. + - Make Monahans clock frequency configurable using + CFG_MONAHANS_RUN_MODE_OSC_RATIO and + CFG_MONAHANS_TURBO_RUN_MODE_RATIO. + Merge from Markus Klotzbücher's repo, 25 Mar 2006 + * Enable Quad UART om MCC200 board. * Cleanup MCC200 board configuration; omit non-existent stuff. -- cgit v0.10.2 From c855ef6768cf9cb0bc12f4965592dcd5f353686a Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Mon, 27 Mar 2006 16:01:03 +0200 Subject: delta board: fix DA9030 reset procedure. diff --git a/board/delta/delta.c b/board/delta/delta.c index 6ef7e2f..96928a5 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -89,10 +89,17 @@ static void init_DA9030() GPIO33 = 0x801; /* SDA = Alt. Fkt. 1 */ /* rising Edge on EXTON */ - GPIO17 = 0x8800; + GPIO17 = 0xc800; /* enable pullup */ + GPDR0 |= (1<<17); /* GPIO17 is output */ + GSDR0 = (1<<17); + GPCR0 = (1<<17); /* drive GPIO17 low */ udelay(5); - GPIO17 = 0xc800; - udelay(100000); /* wait for DA9030 */ + GPSR0 = (1<<17); /* drive GPIO17 high */ +#if CFG_DA9030_EXTON_DELAY + udelay((unsigned long) CFG_DA9030_EXTON_DELAY); /* wait for DA9030 */ +#endif + GPCR0 = (1<<17); /* drive GPIO17 low */ + GPIO17 = 0x8800; /* disable pullup */ /* reset the watchdog and go active (0xec) */ val = (SYS_CONTROL_A_HWRES_ENABLE | diff --git a/include/configs/delta.h b/include/configs/delta.h index 776ee15..6329c25 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -62,6 +62,7 @@ #define CFG_I2C_SPEED 400000 /* I2C speed */ #define CFG_I2C_SLAVE 1 /* I2C controllers address */ #define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */ +#define CFG_DA9030_EXTON_DELAY 0 /* wait x us after DA9030 reset via EXTON */ /* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */ /* @@ -133,9 +134,7 @@ #define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */ -/* Monahans Core Frequency = - * - */ +/* Monahans Core Frequency */ #define CFG_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */ #define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */ -- cgit v0.10.2 From b66a9383421805c705654ce9456ec28c202819fb Mon Sep 17 00:00:00 2001 From: Rafal Jaworowski Date: Wed, 29 Mar 2006 13:17:09 +0200 Subject: Set SDelay register in the DDR controller for the MPC5200B chip. diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 44831c6..4197a7c 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -27,6 +27,7 @@ #include #include #include +#include #if defined(CONFIG_LITE5200B) #include "mt46v32m16.h" @@ -89,6 +90,8 @@ long int initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; + uint svr, pvr; + #ifndef CFG_RAMBOOT ulong test1, test2; @@ -183,6 +186,24 @@ long int initdram (int board_type) #endif /* CFG_RAMBOOT */ + /* + * On MPC5200B we need to set the special configuration delay in the + * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM + * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190: + * + * "The SDelay should be written to a value of 0x00000004. It is + * required to account for changes caused by normal wafer processing + * parameters." + */ + svr = get_svr(); + pvr = get_pvr(); + if ((SVR_MJREV(svr) >= 2) && + (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) { + + *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; + __asm__ volatile ("sync"); + } + return dramsize + dramsize2; } diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 2d695d1..8d1e7c6 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -38,7 +38,7 @@ int checkcpu (void) ulong clock = gd->cpu_clk; char buf[32]; #ifndef CONFIG_MGT5100 - uint svr; + uint svr, pvr; #endif puts ("CPU: "); @@ -47,7 +47,8 @@ int checkcpu (void) puts (CPU_ID_STR); printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID); #else - svr = get_svr (); + svr = get_svr(); + pvr = get_pvr(); switch (SVR_VER (svr)) { case SVR_MPC5200: printf ("MPC5200"); @@ -57,11 +58,10 @@ int checkcpu (void) break; } - printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr)); + printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr), + PVR_MAJ(pvr), PVR_MIN(pvr)); #endif - printf (" at %s MHz\n", strmhz (buf, clock)); - return 0; } diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 596e52c..1152f83 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -56,7 +56,9 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -#define CONFIG_PCI 1 +#define CONFIG_PCI + +#if defined(CONFIG_PCI) #define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 @@ -67,6 +69,8 @@ #define CONFIG_PCI_IO_BUS 0x50000000 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000 +#define ADD_PCI_CMD CFG_CMD_PCI +#endif #define CFG_XLB_PIPELINING 1 @@ -76,8 +80,6 @@ #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 -#define ADD_PCI_CMD CFG_CMD_PCI - #else /* MPC5100 */ #define CONFIG_MII 1 diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index f33d858..50a6ac1 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -131,6 +131,7 @@ #if defined(CONFIG_MGT5100) #define MPC5XXX_SDRAM_XLBSEL (MPC5XXX_SDRAM + 0x0010) #endif +#define MPC5XXX_SDRAM_SDELAY (MPC5XXX_SDRAM + 0x0090) /* Clock Distribution Module */ #define MPC5XXX_CDM_JTAGID (MPC5XXX_CDM + 0x0000) -- cgit v0.10.2 From 89f2dfa4c349ae3b040779ac0ab1c9baa1ef025d Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Wed, 29 Mar 2006 17:49:27 +0200 Subject: delta board: minor update to DA9030 code. diff --git a/board/delta/delta.c b/board/delta/delta.c index 96928a5..78d1f7f 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -106,8 +106,10 @@ static void init_DA9030() (0x6<<4) | SYS_CONTROL_A_WDOG_ACTION | SYS_CONTROL_A_WATCHDOG); - - i2c_reg_write(addr, SYS_CONTROL_A, val); + if(i2c_write(addr, SYS_CONTROL_A, 1, &val, 1)) { + printf("Error accessing DA9030 via i2c.\n"); + return; + } i2c_reg_write(addr, REG_CONTROL_1_97, 0xfd); /* disable LDO1, enable LDO6 */ i2c_reg_write(addr, LDO2_3, 0xd1); /* LDO2 =1,9V, LDO3=3,1V */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 6329c25..f2e0a8c 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -62,7 +62,7 @@ #define CFG_I2C_SPEED 400000 /* I2C speed */ #define CFG_I2C_SLAVE 1 /* I2C controllers address */ #define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */ -#define CFG_DA9030_EXTON_DELAY 0 /* wait x us after DA9030 reset via EXTON */ +#define CFG_DA9030_EXTON_DELAY 100000 /* wait x us after DA9030 reset via EXTON */ /* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */ /* -- cgit v0.10.2 From eeaab720f66f0281b9a1ea3c1f8765bf34e4411e Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Wed, 29 Mar 2006 17:59:20 +0200 Subject: Change delta board memory map to start at 0x80000000. diff --git a/board/delta/config.mk b/board/delta/config.mk index 9564625..c72e956 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -2,7 +2,7 @@ #TEXT_BASE = 0xa1700000 #TEXT_BASE = 0xa3080000 #TEXT_BASE = 0x9ffe0000 -TEXT_BASE = 0xa3008000 +TEXT_BASE = 0x83008000 # Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE) BOARDLIBS = drivers/nand/libnand.a diff --git a/include/configs/delta.h b/include/configs/delta.h index f2e0a8c..053a8f7 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -125,8 +125,8 @@ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_DEVICE_NULLDEV 1 -#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ +#define CFG_MEMTEST_START 0x80400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x80800000 /* 4 ... 8 MB in DRAM */ #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ @@ -159,16 +159,16 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x1000000 /* 64 MB */ -#define PHYS_SDRAM_2 0xa1000000 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2 0x81000000 /* SDRAM Bank #2 */ #define PHYS_SDRAM_2_SIZE 0x1000000 /* 64 MB */ -#define PHYS_SDRAM_3 0xa2000000 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3 0x82000000 /* SDRAM Bank #3 */ #define PHYS_SDRAM_3_SIZE 0x1000000 /* 64 MB */ -#define PHYS_SDRAM_4 0xa3000000 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4 0x83000000 /* SDRAM Bank #4 */ #define PHYS_SDRAM_4_SIZE 0x1000000 /* 64 MB */ -#define CFG_DRAM_BASE 0xa0000000 /* at CS0 */ +#define CFG_DRAM_BASE 0x80000000 /* at CS0 */ #define CFG_DRAM_SIZE 0x04000000 /* 64 MB Ram */ #undef CFG_SKIP_DRAM_SCRUB -- cgit v0.10.2 From f2841d377060cb2c3bedfcdfda6aab3066d6c4f1 Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Thu, 30 Mar 2006 13:40:55 +0200 Subject: Add support for ymodem protocol (loady command). Patch by Stefano Babic, 29 Mar 2006 diff --git a/common/Makefile b/common/Makefile index 7dbf84a..eb0b5da 100644 --- a/common/Makefile +++ b/common/Makefile @@ -51,7 +51,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o \ memsize.o miiphybb.o miiphyutil.o \ s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \ usb.o usb_kbd.o usb_storage.o \ - virtex2.o xilinx.o + virtex2.o xilinx.o crc16.o xyzModem.o OBJS = $(AOBJS) $(COBJS) diff --git a/common/cmd_load.c b/common/cmd_load.c index 7498497..54460cd 100644 --- a/common/cmd_load.c +++ b/common/cmd_load.c @@ -29,10 +29,11 @@ #include #include #include - +#include #if (CONFIG_COMMANDS & CFG_CMD_LOADS) static ulong load_serial (ulong offset); +static ulong load_serial_ymodem (ulong offset); static int read_record (char *buf, ulong len); # if (CONFIG_COMMANDS & CFG_CMD_SAVES) static int save_serial (ulong offset, ulong size); @@ -475,21 +476,31 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } } - printf ("## Ready for binary (kermit) download " - "to 0x%08lX at %d bps...\n", - offset, - load_baudrate); - addr = load_serial_bin (offset); + if (strcmp(argv[0],"loady")==0) { + printf ("## Ready for binary (ymodem) download " + "to 0x%08lX at %d bps...\n", + offset, + load_baudrate); + + addr = load_serial_ymodem (offset); - if (addr == ~0) { - load_addr = 0; - printf ("## Binary (kermit) download aborted\n"); - rcode = 1; } else { - printf ("## Start Addr = 0x%08lX\n", addr); - load_addr = addr; - } + printf ("## Ready for binary (kermit) download " + "to 0x%08lX at %d bps...\n", + offset, + load_baudrate); + addr = load_serial_bin (offset); + + if (addr == ~0) { + load_addr = 0; + printf ("## Binary (kermit) download aborted\n"); + rcode = 1; + } else { + printf ("## Start Addr = 0x%08lX\n", addr); + load_addr = addr; + } + } if (load_baudrate != current_baudrate) { printf ("## Switch baudrate to %d bps and press ESC ...\n", current_baudrate); @@ -963,6 +974,66 @@ START: } return ((ulong) os_data_addr - (ulong) bin_start_address); } + +static int getcxmodem(void) { + if (tstc()) + return (getc()); + return -1; +} +static ulong load_serial_ymodem (ulong offset) +{ + int size; + char buf[32]; + int err; + int res; + connection_info_t info; + char ymodemBuf[1024]; + ulong store_addr = ~0; + ulong addr = 0; + + size=0; + info.mode=xyzModem_ymodem; + res=xyzModem_stream_open(&info, &err); + if (!res) { + + while ((res=xyzModem_stream_read(ymodemBuf, 1024, &err)) > 0 ){ + store_addr = addr + offset; + size+=res; + addr+=res; +#ifndef CFG_NO_FLASH + if (addr2info(store_addr)) { + int rc; + + rc = flash_write((char *)ymodemBuf,store_addr,res); + if (rc != 0) { + flash_perror (rc); + return (~0); + } + } else +#endif + { + memcpy ((char *)(store_addr), ymodemBuf, res); + } + + } + } + else { + printf ("%s\n",xyzModem_error(err)); + } + + xyzModem_stream_close(&err); + xyzModem_stream_terminate(false,&getcxmodem); + + + flush_cache (offset, size); + + printf("## Total Size = 0x%08x = %d Bytes\n", size, size); + sprintf(buf, "%X", size); + setenv("filesize", buf); + + return offset; +} + #endif /* CFG_CMD_LOADB */ /* -------------------------------------------------------------------- */ @@ -1022,6 +1093,14 @@ U_BOOT_CMD( " with offset 'off' and baudrate 'baud'\n" ); +U_BOOT_CMD( + loady, 3, 0, do_load_serial_bin, + "loady - load binary file over serial line (ymodem mode)\n", + "[ off ] [ baud ]\n" + " - load binary file over serial line" + " with offset 'off' and baudrate 'baud'\n" +); + #endif /* CFG_CMD_LOADB */ /* -------------------------------------------------------------------- */ diff --git a/common/crc16.c b/common/crc16.c new file mode 100644 index 0000000..d571405 --- /dev/null +++ b/common/crc16.c @@ -0,0 +1,106 @@ +//========================================================================== +// +// crc16.c +// +// 16 bit CRC with polynomial x^16+x^12+x^5+1 +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas,asl +// Date: 2001-01-31 +// Purpose: +// Description: +// +// This code is part of eCos (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "crc.h" + +// Table of CRC constants - implements x^16+x^12+x^5+1 +static const uint16_t crc16_tab[] = { + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, +}; + +uint16_t +cyg_crc16(unsigned char *buf, int len) +{ + int i; + uint16_t cksum; + + cksum = 0; + for (i = 0; i < len; i++) { + cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xFF] ^ (cksum << 8); + } + return cksum; +} + diff --git a/common/xyzModem.c b/common/xyzModem.c new file mode 100644 index 0000000..3c86b13 --- /dev/null +++ b/common/xyzModem.c @@ -0,0 +1,739 @@ +//========================================================================== +// +// xyzModem.c +// +// RedBoot stream handler for xyzModem protocol +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, tsmith, Yoshinori Sato +// Date: 2000-07-14 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== +#include +#include +#include +#include + +// Assumption - run xyzModem protocol over the console port + +// Values magic to the protocol +#define SOH 0x01 +#define STX 0x02 +#define EOT 0x04 +#define ACK 0x06 +#define BSP 0x08 +#define NAK 0x15 +#define CAN 0x18 +#define EOF 0x1A // ^Z for DOS officionados + +#define USE_YMODEM_LENGTH + +// Data & state local to the protocol +static struct { +#ifdef REDBOOT + hal_virtual_comm_table_t* __chan; +#else + int *__chan; +#endif + unsigned char pkt[1024], *bufp; + unsigned char blk,cblk,crc1,crc2; + unsigned char next_blk; // Expected block + int len, mode, total_retries; + int total_SOH, total_STX, total_CAN; + bool crc_mode, at_eof, tx_ack; +#ifdef USE_YMODEM_LENGTH + unsigned long file_length, read_length; +#endif +} xyz; + +#define xyzModem_CHAR_TIMEOUT 2000 // 2 seconds +#define xyzModem_MAX_RETRIES 20 +#define xyzModem_MAX_RETRIES_WITH_CRC 10 +#define xyzModem_CAN_COUNT 3 // Wait for 3 CAN before quitting + + +#ifndef REDBOOT //SB +typedef int cyg_int32; +int CYGACC_COMM_IF_GETC_TIMEOUT (char chan,char *c) { +#define DELAY 20 + unsigned long counter=0; + while (!tstc() && (counter < xyzModem_CHAR_TIMEOUT*1000/DELAY)) { + udelay(DELAY); + counter++; + } + if (tstc()) { + *c=getc(); + return 1; + } + return 0; +} + +void CYGACC_COMM_IF_PUTC(char x,char y) { + putc(y); +} + +// Validate a hex character +__inline__ static bool +_is_hex(char c) +{ + return (((c >= '0') && (c <= '9')) || + ((c >= 'A') && (c <= 'F')) || + ((c >= 'a') && (c <= 'f'))); +} + +// Convert a single hex nibble +__inline__ static int +_from_hex(char c) +{ + int ret = 0; + + if ((c >= '0') && (c <= '9')) { + ret = (c - '0'); + } else if ((c >= 'a') && (c <= 'f')) { + ret = (c - 'a' + 0x0a); + } else if ((c >= 'A') && (c <= 'F')) { + ret = (c - 'A' + 0x0A); + } + return ret; +} + +// Convert a character to lower case +__inline__ static char +_tolower(char c) +{ + if ((c >= 'A') && (c <= 'Z')) { + c = (c - 'A') + 'a'; + } + return c; +} + + + +// +// Parse (scan) a number +// +bool +parse_num(char *s, unsigned long *val, char **es, char *delim) +{ + bool first = true; + int radix = 10; + char c; + unsigned long result = 0; + int digit; + + while (*s == ' ') s++; + while (*s) { + if (first && (s[0] == '0') && (_tolower(s[1]) == 'x')) { + radix = 16; + s += 2; + } + first = false; + c = *s++; + if (_is_hex(c) && ((digit = _from_hex(c)) < radix)) { + // Valid digit +#ifdef CYGPKG_HAL_MIPS + // FIXME: tx49 compiler generates 0x2539018 for MUL which + // isn't any good. + if (16 == radix) + result = result << 4; + else + result = 10 * result; + result += digit; +#else + result = (result * radix) + digit; +#endif + } else { + if (delim != (char *)0) { + // See if this character is one of the delimiters + char *dp = delim; + while (*dp && (c != *dp)) dp++; + if (*dp) break; // Found a good delimiter + } + return false; // Malformatted number + } + } + *val = result; + if (es != (char **)0) { + *es = s; + } + return true; +} + +#endif + +#define USE_SPRINTF +#ifdef DEBUG +#ifndef USE_SPRINTF +// +// Note: this debug setup only works if the target platform has two serial ports +// available so that the other one (currently only port 1) can be used for debug +// messages. +// +static int +zm_dprintf(char *fmt, ...) +{ + int cur_console; + va_list args; + + va_start(args, fmt); +#ifdef REDBOOT + cur_console = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + CYGACC_CALL_IF_SET_CONSOLE_COMM(1); +#endif + diag_vprintf(fmt, args); +#ifdef REDBOOT + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur_console); +#endif +} + +static void +zm_flush(void) +{ +} + +#else +// +// Note: this debug setup works by storing the strings in a fixed buffer +// +#define FINAL +#ifdef FINAL +static char *zm_out = (char *)0x00380000; +static char *zm_out_start = (char *)0x00380000; +#else +static char zm_buf[8192]; +static char *zm_out=zm_buf; +static char *zm_out_start = zm_buf; + +#endif +static int +zm_dprintf(char *fmt, ...) +{ + int len; + va_list args; + + va_start(args, fmt); + len = diag_vsprintf(zm_out, fmt, args); + zm_out += len; + return len; +} + +static void +zm_flush(void) +{ + char *p = zm_out_start; +#ifdef REDBOOT + while (*p) mon_write_char(*p++); +#endif + zm_out = zm_out_start; +} +#endif + +static void +zm_dump_buf(void *buf, int len) +{ +#ifdef REDBOOT + diag_vdump_buf_with_offset(zm_dprintf, buf, len, 0); +#else + +#endif +} + +static unsigned char zm_buf[2048]; +static unsigned char *zm_bp; + +static void +zm_new(void) +{ + zm_bp = zm_buf; +} + +static void +zm_save(unsigned char c) +{ + *zm_bp++ = c; +} + +static void +zm_dump(int line) +{ + zm_dprintf("Packet at line: %d\n", line); + zm_dump_buf(zm_buf, zm_bp-zm_buf); +} + +#define ZM_DEBUG(x) x +#else +#define ZM_DEBUG(x) +#endif + +// Wait for the line to go idle +static void +xyzModem_flush(void) +{ + int res; + char c; + while (true) { + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &c); + if (!res) return; + } +} + +static int +xyzModem_get_hdr(void) +{ + char c; + int res; + bool hdr_found = false; + int i, can_total, hdr_chars; + unsigned short cksum; + + ZM_DEBUG(zm_new()); + // Find the start of a header + can_total = 0; + hdr_chars = 0; + + if (xyz.tx_ack) { + CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); + xyz.tx_ack = false; + } + while (!hdr_found) { + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &c); + ZM_DEBUG(zm_save(c)); + if (res) { + hdr_chars++; + switch (c) { + case SOH: + xyz.total_SOH++; + case STX: + if (c == STX) xyz.total_STX++; + hdr_found = true; + break; + case CAN: + xyz.total_CAN++; + ZM_DEBUG(zm_dump(__LINE__)); + if (++can_total == xyzModem_CAN_COUNT) { + return xyzModem_cancel; + } else { + // Wait for multiple CAN to avoid early quits + break; + } + case EOT: + // EOT only supported if no noise + if (hdr_chars == 1) { + CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); + ZM_DEBUG(zm_dprintf("ACK on EOT #%d\n", __LINE__)); + ZM_DEBUG(zm_dump(__LINE__)); + return xyzModem_eof; + } + default: + // Ignore, waiting for start of header + ; + } + } else { + // Data stream timed out + xyzModem_flush(); // Toss any current input + ZM_DEBUG(zm_dump(__LINE__)); + CYGACC_CALL_IF_DELAY_US((cyg_int32)250000); + return xyzModem_timeout; + } + } + + // Header found, now read the data + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &xyz.blk); + ZM_DEBUG(zm_save(xyz.blk)); + if (!res) { + ZM_DEBUG(zm_dump(__LINE__)); + return xyzModem_timeout; + } + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &xyz.cblk); + ZM_DEBUG(zm_save(xyz.cblk)); + if (!res) { + ZM_DEBUG(zm_dump(__LINE__)); + return xyzModem_timeout; + } + xyz.len = (c == SOH) ? 128 : 1024; + xyz.bufp = xyz.pkt; + for (i = 0; i < xyz.len; i++) { + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &c); + ZM_DEBUG(zm_save(c)); + if (res) { + xyz.pkt[i] = c; + } else { + ZM_DEBUG(zm_dump(__LINE__)); + return xyzModem_timeout; + } + } + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &xyz.crc1); + ZM_DEBUG(zm_save(xyz.crc1)); + if (!res) { + ZM_DEBUG(zm_dump(__LINE__)); + return xyzModem_timeout; + } + if (xyz.crc_mode) { + res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &xyz.crc2); + ZM_DEBUG(zm_save(xyz.crc2)); + if (!res) { + ZM_DEBUG(zm_dump(__LINE__)); + return xyzModem_timeout; + } + } + ZM_DEBUG(zm_dump(__LINE__)); + // Validate the message + if ((xyz.blk ^ xyz.cblk) != (unsigned char)0xFF) { + ZM_DEBUG(zm_dprintf("Framing error - blk: %x/%x/%x\n", xyz.blk, xyz.cblk, (xyz.blk ^ xyz.cblk))); + ZM_DEBUG(zm_dump_buf(xyz.pkt, xyz.len)); + xyzModem_flush(); + return xyzModem_frame; + } + // Verify checksum/CRC + if (xyz.crc_mode) { + cksum = cyg_crc16(xyz.pkt, xyz.len); + if (cksum != ((xyz.crc1 << 8) | xyz.crc2)) { + ZM_DEBUG(zm_dprintf("CRC error - recvd: %02x%02x, computed: %x\n", + xyz.crc1, xyz.crc2, cksum & 0xFFFF)); + return xyzModem_cksum; + } + } else { + cksum = 0; + for (i = 0; i < xyz.len; i++) { + cksum += xyz.pkt[i]; + } + if (xyz.crc1 != (cksum & 0xFF)) { + ZM_DEBUG(zm_dprintf("Checksum error - recvd: %x, computed: %x\n", xyz.crc1, cksum & 0xFF)); + return xyzModem_cksum; + } + } + // If we get here, the message passes [structural] muster + return 0; +} + +int +xyzModem_stream_open(connection_info_t *info, int *err) +{ + int console_chan, stat=0; + int retries = xyzModem_MAX_RETRIES; + int crc_retries = xyzModem_MAX_RETRIES_WITH_CRC; + +// ZM_DEBUG(zm_out = zm_out_start); +#ifdef xyzModem_zmodem + if (info->mode == xyzModem_zmodem) { + *err = xyzModem_noZmodem; + return -1; + } +#endif + +#ifdef REDBOOT + // Set up the I/O channel. Note: this allows for using a different port in the future + console_chan = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + if (info->chan >= 0) { + CYGACC_CALL_IF_SET_CONSOLE_COMM(info->chan); + } else { + CYGACC_CALL_IF_SET_CONSOLE_COMM(console_chan); + } + xyz.__chan = CYGACC_CALL_IF_CONSOLE_PROCS(); + + CYGACC_CALL_IF_SET_CONSOLE_COMM(console_chan); + CYGACC_COMM_IF_CONTROL(*xyz.__chan, __COMMCTL_SET_TIMEOUT, xyzModem_CHAR_TIMEOUT); +#else +// TODO: CHECK ! + int dummy; + xyz.__chan=&dummy; +#endif + xyz.len = 0; + xyz.crc_mode = true; + xyz.at_eof = false; + xyz.tx_ack = false; + xyz.mode = info->mode; + xyz.total_retries = 0; + xyz.total_SOH = 0; + xyz.total_STX = 0; + xyz.total_CAN = 0; +#ifdef USE_YMODEM_LENGTH + xyz.read_length = 0; + xyz.file_length = 0; +#endif + + CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); + + if (xyz.mode == xyzModem_xmodem) { + // X-modem doesn't have an information header - exit here + xyz.next_blk = 1; + return 0; + } + + while (retries-- > 0) { + stat = xyzModem_get_hdr(); + if (stat == 0) { + // Y-modem file information header + if (xyz.blk == 0) { +#ifdef USE_YMODEM_LENGTH + // skip filename + while (*xyz.bufp++); + // get the length + parse_num(xyz.bufp, &xyz.file_length, NULL, " "); +#endif + // The rest of the file name data block quietly discarded + xyz.tx_ack = true; + } + xyz.next_blk = 1; + xyz.len = 0; + return 0; + } else + if (stat == xyzModem_timeout) { + if (--crc_retries <= 0) xyz.crc_mode = false; + CYGACC_CALL_IF_DELAY_US(5*100000); // Extra delay for startup + CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); + xyz.total_retries++; + ZM_DEBUG(zm_dprintf("NAK (%d)\n", __LINE__)); + } + if (stat == xyzModem_cancel) { + break; + } + } + *err = stat; + ZM_DEBUG(zm_flush()); + return -1; +} + +int +xyzModem_stream_read(char *buf, int size, int *err) +{ + int stat, total, len; + int retries; + + total = 0; + stat = xyzModem_cancel; + // Try and get 'size' bytes into the buffer + while (!xyz.at_eof && (size > 0)) { + if (xyz.len == 0) { + retries = xyzModem_MAX_RETRIES; + while (retries-- > 0) { + stat = xyzModem_get_hdr(); + if (stat == 0) { + if (xyz.blk == xyz.next_blk) { + xyz.tx_ack = true; + ZM_DEBUG(zm_dprintf("ACK block %d (%d)\n", xyz.blk, __LINE__)); + xyz.next_blk = (xyz.next_blk + 1) & 0xFF; + +#if defined(xyzModem_zmodem) || defined(USE_YMODEM_LENGTH) + if (xyz.mode == xyzModem_xmodem || xyz.file_length == 0) { +#else + if (1) { +#endif + // Data blocks can be padded with ^Z (EOF) characters + // This code tries to detect and remove them + if ((xyz.bufp[xyz.len-1] == EOF) && + (xyz.bufp[xyz.len-2] == EOF) && + (xyz.bufp[xyz.len-3] == EOF)) { + while (xyz.len && (xyz.bufp[xyz.len-1] == EOF)) { + xyz.len--; + } + } + } + +#ifdef USE_YMODEM_LENGTH + // See if accumulated length exceeds that of the file. + // If so, reduce size (i.e., cut out pad bytes) + // Only do this for Y-modem (and Z-modem should it ever + // be supported since it can fall back to Y-modem mode). + if (xyz.mode != xyzModem_xmodem && 0 != xyz.file_length) { + xyz.read_length += xyz.len; + if (xyz.read_length > xyz.file_length) { + xyz.len -= (xyz.read_length - xyz.file_length); + } + } +#endif + break; + } else if (xyz.blk == ((xyz.next_blk - 1) & 0xFF)) { + // Just re-ACK this so sender will get on with it + CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); + continue; // Need new header + } else { + stat = xyzModem_sequence; + } + } + if (stat == xyzModem_cancel) { + break; + } + if (stat == xyzModem_eof) { + CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); + ZM_DEBUG(zm_dprintf("ACK (%d)\n", __LINE__)); + if (xyz.mode == xyzModem_ymodem) { + CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); + xyz.total_retries++; + ZM_DEBUG(zm_dprintf("Reading Final Header\n")); + stat = xyzModem_get_hdr(); + CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); + ZM_DEBUG(zm_dprintf("FINAL ACK (%d)\n", __LINE__)); + } + xyz.at_eof = true; + break; + } + CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); + xyz.total_retries++; + ZM_DEBUG(zm_dprintf("NAK (%d)\n", __LINE__)); + } + if (stat < 0) { + *err = stat; + xyz.len = -1; + return total; + } + } + // Don't "read" data from the EOF protocol package + if (!xyz.at_eof) { + len = xyz.len; + if (size < len) len = size; + memcpy(buf, xyz.bufp, len); + size -= len; + buf += len; + total += len; + xyz.len -= len; + xyz.bufp += len; + } + } + return total; +} + +void +xyzModem_stream_close(int *err) +{ + diag_printf("xyzModem - %s mode, %d(SOH)/%d(STX)/%d(CAN) packets, %d retries\n", + xyz.crc_mode ? "CRC" : "Cksum", + xyz.total_SOH, xyz.total_STX, xyz.total_CAN, + xyz.total_retries); + ZM_DEBUG(zm_flush()); +} + +// Need to be able to clean out the input buffer, so have to take the +// getc +void xyzModem_stream_terminate(bool abort, int (*getc)(void)) +{ + int c; + + if (abort) { + ZM_DEBUG(zm_dprintf("!!!! TRANSFER ABORT !!!!\n")); + switch (xyz.mode) { + case xyzModem_xmodem: + case xyzModem_ymodem: + // The X/YMODEM Spec seems to suggest that multiple CAN followed by an equal + // number of Backspaces is a friendly way to get the other end to abort. + CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); + CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); + CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); + CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); + CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); + CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); + CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); + CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); + // Now consume the rest of what's waiting on the line. + ZM_DEBUG(zm_dprintf("Flushing serial line.\n")); + xyzModem_flush(); + xyz.at_eof = true; + break; +#ifdef xyzModem_zmodem + case xyzModem_zmodem: + // Might support it some day I suppose. +#endif + break; + } + } else { + ZM_DEBUG(zm_dprintf("Engaging cleanup mode...\n")); + // Consume any trailing crap left in the inbuffer from + // previous recieved blocks. Since very few files are an exact multiple + // of the transfer block size, there will almost always be some gunk here. + // If we don't eat it now, RedBoot will think the user typed it. + ZM_DEBUG(zm_dprintf("Trailing gunk:\n")); + while ((c = (*getc)()) > -1) ; + ZM_DEBUG(zm_dprintf("\n")); + // Make a small delay to give terminal programs like minicom + // time to get control again after their file transfer program + // exits. + CYGACC_CALL_IF_DELAY_US((cyg_int32)250000); + } +} + +char * +xyzModem_error(int err) +{ + switch (err) { + case xyzModem_access: + return "Can't access file"; + break; + case xyzModem_noZmodem: + return "Sorry, zModem not available yet"; + break; + case xyzModem_timeout: + return "Timed out"; + break; + case xyzModem_eof: + return "End of file"; + break; + case xyzModem_cancel: + return "Cancelled"; + break; + case xyzModem_frame: + return "Invalid framing"; + break; + case xyzModem_cksum: + return "CRC/checksum error"; + break; + case xyzModem_sequence: + return "Block sequence error"; + break; + default: + return "Unknown error"; + break; + } +} + +// +// RedBoot interface +// +#if 0 // SB +GETC_IO_FUNCS(xyzModem_io, xyzModem_stream_open, xyzModem_stream_close, + xyzModem_stream_terminate, xyzModem_stream_read, xyzModem_error); +RedBoot_load(xmodem, xyzModem_io, false, false, xyzModem_xmodem); +RedBoot_load(ymodem, xyzModem_io, false, false, xyzModem_ymodem); +#endif diff --git a/include/crc.h b/include/crc.h new file mode 100644 index 0000000..63399bf --- /dev/null +++ b/include/crc.h @@ -0,0 +1,101 @@ +//========================================================================== +// +// crc.h +// +// Interface for the CRC algorithms. +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2002 Andrew Lunn +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Andrew Lunn +// Contributors: Andrew Lunn +// Date: 2002-08-06 +// Purpose: +// Description: +// +// This code is part of eCos (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#ifndef _SERVICES_CRC_CRC_H_ +#define _SERVICES_CRC_CRC_H_ + +#include + +#ifndef __externC +# ifdef __cplusplus +# define __externC extern "C" +# else +# define __externC extern +# endif +#endif + +// Compute a CRC, using the POSIX 1003 definition +extern uint32_t +cyg_posix_crc32(unsigned char *s, int len); + +// Gary S. Brown's 32 bit CRC + +extern uint32_t +cyg_crc32(unsigned char *s, int len); + +// Gary S. Brown's 32 bit CRC, but accumulate the result from a +// previous CRC calculation + +extern uint32_t +cyg_crc32_accumulate(uint32_t crc, unsigned char *s, int len); + +// Ethernet FCS Algorithm + +extern uint32_t +cyg_ether_crc32(unsigned char *s, int len); + +// Ethernet FCS algorithm, but accumulate the result from a previous +// CRC calculation. + +extern uint32_t +cyg_ether_crc32_accumulate(uint32_t crc, unsigned char *s, int len); + +// 16 bit CRC with polynomial x^16+x^12+x^5+1 + +extern uint16_t cyg_crc16(unsigned char *s, int len); + +#endif // _SERVICES_CRC_CRC_H_ + + + diff --git a/include/xyzModem.h b/include/xyzModem.h new file mode 100644 index 0000000..a62a174 --- /dev/null +++ b/include/xyzModem.h @@ -0,0 +1,112 @@ +//========================================================================== +// +// xyzModem.h +// +// RedBoot stream handler for xyzModem protocol +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-07-14 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#ifndef _XYZMODEM_H_ +#define _XYZMODEM_H_ + +#define xyzModem_xmodem 1 +#define xyzModem_ymodem 2 +// Don't define this until the protocol support is in place +//#define xyzModem_zmodem 3 + +#define xyzModem_access -1 +#define xyzModem_noZmodem -2 +#define xyzModem_timeout -3 +#define xyzModem_eof -4 +#define xyzModem_cancel -5 +#define xyzModem_frame -6 +#define xyzModem_cksum -7 +#define xyzModem_sequence -8 + +#define xyzModem_close 1 +#define xyzModem_abort 2 + + +#ifdef REDBOOT +extern getc_io_funcs_t xyzModem_io; +#else +#define CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT +#define CYGACC_CALL_IF_SET_CONSOLE_COMM(x) + +#define diag_vprintf vprintf +#define diag_printf printf +#define diag_vsprintf vsprintf + +#define CYGACC_CALL_IF_DELAY_US(x) udelay(x) + +typedef struct { + char *filename; + int mode; + int chan; +#ifdef CYGPKG_REDBOOT_NETWORKING + struct sockaddr_in *server; +#endif +} connection_info_t; + +typedef unsigned int bool; + +#define false 0 +#define true 1 + +#endif + + +int xyzModem_stream_open(connection_info_t *info, int *err); +void xyzModem_stream_close(int *err); +void xyzModem_stream_terminate(bool method, int (*getc)(void)); +int xyzModem_stream_read(char *buf, int size, int *err); +char *xyzModem_error(int err); + +#endif // _XYZMODEM_H_ -- cgit v0.10.2 From 9e7b5ce61b2641e726a38505ffc077642bff44fa Mon Sep 17 00:00:00 2001 From: Markus Klotzbuecher Date: Thu, 30 Mar 2006 17:00:39 +0200 Subject: delta board: one more DA9030 fix. diff --git a/board/delta/delta.c b/board/delta/delta.c index 78d1f7f..d00d72d 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -79,27 +79,34 @@ int dram_init (void) return 0; } -/* initialize the DA9030 Power Controller */ -static void init_DA9030() +void i2c_init_board() { - uchar addr = (uchar) DA9030_I2C_ADDR, val = 0; + CKENB |= (CKENB_4_I2C); /* setup I2C GPIO's */ GPIO32 = 0x801; /* SCL = Alt. Fkt. 1 */ GPIO33 = 0x801; /* SDA = Alt. Fkt. 1 */ +} - /* rising Edge on EXTON */ - GPIO17 = 0xc800; /* enable pullup */ +/* initialize the DA9030 Power Controller */ +static void init_DA9030() +{ + uchar addr = (uchar) DA9030_I2C_ADDR, val = 0; + + CKENB |= CKENB_7_GPIO; + udelay(100); + + /* Rising Edge on EXTON to reset DA9030 */ + GPIO17 = 0x8800; /* configure GPIO17, no pullup, -down */ GPDR0 |= (1<<17); /* GPIO17 is output */ GSDR0 = (1<<17); GPCR0 = (1<<17); /* drive GPIO17 low */ - udelay(5); GPSR0 = (1<<17); /* drive GPIO17 high */ + #if CFG_DA9030_EXTON_DELAY udelay((unsigned long) CFG_DA9030_EXTON_DELAY); /* wait for DA9030 */ #endif GPCR0 = (1<<17); /* drive GPIO17 low */ - GPIO17 = 0x8800; /* disable pullup */ /* reset the watchdog and go active (0xec) */ val = (SYS_CONTROL_A_HWRES_ENABLE | @@ -114,14 +121,14 @@ static void init_DA9030() i2c_reg_write(addr, REG_CONTROL_1_97, 0xfd); /* disable LDO1, enable LDO6 */ i2c_reg_write(addr, LDO2_3, 0xd1); /* LDO2 =1,9V, LDO3=3,1V */ i2c_reg_write(addr, LDO4_5, 0xcc); /* LDO2 =1,9V, LDO3=3,1V */ - i2c_reg_write(addr, LDO6_SIMCP, 0x3e); /* LDO6=3,2V, SIMCP = 5V support */ + i2c_reg_write(addr, LDO6_SIMCP, 0x3e); /* LDO6=3,2V, SIMCP = 5V support */ i2c_reg_write(addr, LDO7_8, 0xc9); /* LDO7=2,7V, LDO8=3,0V */ i2c_reg_write(addr, LDO9_12, 0xec); /* LDO9=3,0V, LDO12=3,2V */ - i2c_reg_write(addr, BUCK, 0x0c); /* Buck=1.2V */ + i2c_reg_write(addr, BUCK, 0x0c); /* Buck=1.2V */ i2c_reg_write(addr, REG_CONTROL_2_98, 0x7f); /* All LDO'S on 8,9,10,11,12,14 */ - i2c_reg_write(addr, LDO_10_11, 0xcc); /* LDO10=3.0V LDO11=3.0V */ + i2c_reg_write(addr, LDO_10_11, 0xcc); /* LDO10=3.0V LDO11=3.0V */ i2c_reg_write(addr, LDO_15, 0xae); /* LDO15=1.8V, dislock first 3bit */ - i2c_reg_write(addr, LDO_14_16, 0x05); /* LDO14=2.8V, LDO16=NB */ + i2c_reg_write(addr, LDO_14_16, 0x05); /* LDO14=2.8V, LDO16=NB */ i2c_reg_write(addr, LDO_18_19, 0x9c); /* LDO18=3.0V, LDO19=2.7V */ i2c_reg_write(addr, LDO_17_SIMCP0, 0x2c); /* LDO17=3.0V, SIMCP=3V support */ i2c_reg_write(addr, BUCK2_DVC1, 0x9a); /* Buck2=1.5V plus Update support of 520 MHz */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 053a8f7..5edea95 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -63,6 +63,7 @@ #define CFG_I2C_SLAVE 1 /* I2C controllers address */ #define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */ #define CFG_DA9030_EXTON_DELAY 100000 /* wait x us after DA9030 reset via EXTON */ +#define CFG_I2C_INIT_BOARD 1 /* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */ /* -- cgit v0.10.2 From 62534beb2fdd67490c3723f22b8982e7d64fc104 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 17 Mar 2006 10:28:24 +0100 Subject: Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) 405 SDRAM: - The SDRAM parameters can now be defined in the board config file and the 405 SDRAM controller values will be calculated upon bootup (see PPChameleonEVB). When those settings are not defined in the board config file, the register setup will be as it is now, so this implementation should not break any current design using this code. Thanks to Andrea Marson from DAVE for this patch. 440 DDR: - Added function sdram_tr1_set to auto calculate the TR1 value for the DDR. - Added ECC support (see p3p440). Patch by Stefan Roese, 17 Mar 2006 diff --git a/CHANGELOG b/CHANGELOG index 34b8d20..16b50e9 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -33,6 +33,24 @@ Changes since U-Boot 1.1.4: * Add support for Lite5200B board. Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006 +* Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) + + 405 SDRAM: - The SDRAM parameters can now be defined in the board + config file and the 405 SDRAM controller values will + be calculated upon bootup (see PPChameleonEVB). + When those settings are not defined in the board + config file, the register setup will be as it is now, + so this implementation should not break any current + design using this code. + + Thanks to Andrea Marson from DAVE for this patch. + + 440 DDR: - Added function sdram_tr1_set to auto calculate the + TR1 value for the DDR. + - Added ECC support (see p3p440). + + Patch by Stefan Roese, 17 Mar 2006 + * Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c index e9548cd..c5ab017 100644 --- a/cpu/ppc4xx/sdram.c +++ b/cpu/ppc4xx/sdram.c @@ -1,7 +1,10 @@ /* - * (C) Copyright 2005 + * (C) Copyright 2005-2006 * Stefan Roese, DENX Software Engineering, sr@denx.de. * + * (C) Copyright 2006 + * DAVE Srl + * * (C) Copyright 2002-2004 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com * @@ -27,28 +30,19 @@ #include #include #include +#include "sdram.h" #ifdef CONFIG_SDRAM_BANK0 -#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data) - - -struct sdram_conf_s { - unsigned long size; - unsigned long reg; -}; - -typedef struct sdram_conf_s sdram_conf_t; - #ifndef CFG_SDRAM_TABLE sdram_conf_t mb0cf[] = { - {(128 << 20), 0x000A4001}, /* (0-128MB) Address Mode 3, 13x10(4) */ - {(64 << 20), 0x00084001}, /* (0-64MB) Address Mode 3, 13x9(4) */ - {(32 << 20), 0x00062001}, /* (0-32MB) Address Mode 2, 12x9(4) */ - {(16 << 20), 0x00046001}, /* (0-16MB) Address Mode 4, 12x8(4) */ - {(4 << 20), 0x00008001}, /* (0-4MB) Address Mode 5, 11x8(2) */ + {(128 << 20), 13, 0x000A4001}, /* (0-128MB) Address Mode 3, 13x10(4) */ + {(64 << 20), 13, 0x00084001}, /* (0-64MB) Address Mode 3, 13x9(4) */ + {(32 << 20), 12, 0x00062001}, /* (0-32MB) Address Mode 2, 12x9(4) */ + {(16 << 20), 12, 0x00046001}, /* (0-16MB) Address Mode 4, 12x8(4) */ + {(4 << 20), 11, 0x00008001}, /* (0-4MB) Address Mode 5, 11x8(2) */ }; #else sdram_conf_t mb0cf[] = CFG_SDRAM_TABLE; @@ -59,31 +53,138 @@ sdram_conf_t mb0cf[] = CFG_SDRAM_TABLE; #ifndef CONFIG_440 +#ifdef CFG_SDRAM_CASL +static ulong ns2clks(ulong ns) +{ + ulong bus_period_x_10 = ONE_BILLION / (get_bus_freq(0) / 10); + + return ((ns * 10) + bus_period_x_10) / bus_period_x_10; +} +#endif /* CFG_SDRAM_CASL */ + +static ulong compute_sdtr1(ulong speed) +{ +#ifdef CFG_SDRAM_CASL + ulong tmp; + ulong sdtr1 = 0; + + /* CASL */ + if (CFG_SDRAM_CASL < 2) + sdtr1 |= (1 << SDRAM0_TR_CASL); + else + if (CFG_SDRAM_CASL > 4) + sdtr1 |= (3 << SDRAM0_TR_CASL); + else + sdtr1 |= ((CFG_SDRAM_CASL-1) << SDRAM0_TR_CASL); + + /* PTA */ + tmp = ns2clks(CFG_SDRAM_PTA); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_PTA); + else + sdtr1 |= ((4-1) << SDRAM0_TR_PTA); + + /* CTP */ + tmp = ns2clks(CFG_SDRAM_CTP); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_CTP); + else + sdtr1 |= ((4-1) << SDRAM0_TR_CTP); + + /* LDF */ + tmp = ns2clks(CFG_SDRAM_LDF); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_LDF); + else + sdtr1 |= ((2-1) << SDRAM0_TR_LDF); + + /* RFTA */ + tmp = ns2clks(CFG_SDRAM_RFTA); + if ((tmp >= 4) && (tmp <= 10)) + sdtr1 |= ((tmp-4) << SDRAM0_TR_RFTA); + else + sdtr1 |= ((10-4) << SDRAM0_TR_RFTA); + + /* RCD */ + tmp = ns2clks(CFG_SDRAM_RCD); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_RCD); + else + sdtr1 |= ((4-1) << SDRAM0_TR_RCD); + + return sdtr1; +#else /* CFG_SDRAM_CASL */ + /* + * If no values are configured in the board config file + * use the default values, which seem to be ok for most + * boards. + * + * REMARK: + * For new board ports we strongly recommend to define the + * correct values for the used SDRAM chips in your board + * config file (see PPChameleonEVB.h) + */ + if (speed > 100000000) { + /* + * 133 MHz SDRAM + */ + return 0x01074015; + } else { + /* + * default: 100 MHz SDRAM + */ + return 0x0086400d; + } +#endif /* CFG_SDRAM_CASL */ +} + +/* refresh is expressed in ms */ +static ulong compute_rtr(ulong speed, ulong rows, ulong refresh) +{ +#ifdef CFG_SDRAM_CASL + ulong tmp; + + tmp = ((refresh*1000*1000) / (1 << rows)) * (speed / 1000); + tmp /= 1000000; + + return ((tmp & 0x00003FF8) << 16); +#else /* CFG_SDRAM_CASL */ + if (speed > 100000000) { + /* + * 133 MHz SDRAM + */ + return 0x07f00000; + } else { + /* + * default: 100 MHz SDRAM + */ + return 0x05f00000; + } +#endif /* CFG_SDRAM_CASL */ +} + /* * Autodetect onboard SDRAM on 405 platforms */ void sdram_init(void) { + ulong speed; ulong sdtr1; - ulong rtr; int i; - /* - * Support for 100MHz and 133MHz SDRAM - */ - if (get_bus_freq(0) > 100000000) { - /* - * 133 MHz SDRAM - */ - sdtr1 = 0x01074015; - rtr = 0x07f00000; - } else { - /* - * default: 100 MHz SDRAM - */ - sdtr1 = 0x0086400d; - rtr = 0x05f00000; - } + /* + * Determine SDRAM speed + */ + speed = get_bus_freq(0); /* parameter not used on ppc4xx */ + + /* + * sdtr1 (register SDRAM0_TR) must take into account timings listed + * in SDRAM chip datasheet. rtr (register SDRAM0_RTR) must take into + * account actual SDRAM size. So we can set up sdtr1 according to what + * is specified in board configuration file while rtr dependds on SDRAM + * size we are assuming before detection. + */ + sdtr1 = compute_sdtr1(speed); for (i=0; i all done */ return mb0cf[i].size; diff --git a/cpu/ppc4xx/sdram.h b/cpu/ppc4xx/sdram.h new file mode 100644 index 0000000..62b5442 --- /dev/null +++ b/cpu/ppc4xx/sdram.h @@ -0,0 +1,78 @@ +/* + * (C) Copyright 2006 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * (C) Copyright 2006 + * DAVE Srl + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SDRAM_H_ +#define _SDRAM_H_ + +#include + +#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data) + +#define ONE_BILLION 1000000000 + +struct sdram_conf_s { + unsigned long size; + int rows; + unsigned long reg; +}; + +typedef struct sdram_conf_s sdram_conf_t; + +/* Bitfields offsets */ +#define SDRAM0_TR_CASL (31 - 8) +#define SDRAM0_TR_PTA (31 - 13) +#define SDRAM0_TR_CTP (31 - 15) +#define SDRAM0_TR_LDF (31 - 17) +#define SDRAM0_TR_RFTA (31 - 29) +#define SDRAM0_TR_RCD (31 - 31) + +#ifdef CFG_SDRAM_CL +/* SDRAM timings [ns] according to AMCC/IBM names (see SDRAM_faq.doc) */ +#define CFG_SDRAM_CASL CFG_SDRAM_CL +#define CFG_SDRAM_PTA CFG_SDRAM_tRP +#define CFG_SDRAM_CTP (CFG_SDRAM_tRC - CFG_SDRAM_tRCD - CFG_SDRAM_tRP) +#define CFG_SDRAM_LDF 0 +#ifdef CFG_SDRAM_tRFC +#define CFG_SDRAM_RFTA CFG_SDRAM_tRFC +#else +#define CFG_SDRAM_RFTA CFG_SDRAM_tRC +#endif +#define CFG_SDRAM_RCD CFG_SDRAM_tRCD +#endif /* #ifdef CFG_SDRAM_CL */ + +/* + * Some defines for the 440 DDR controller + */ +#define SDRAM_CFG0_DC_EN 0x80000000 /* SDRAM Controller Enable */ +#define SDRAM_CFG0_MEMCHK 0x30000000 /* Memory data error checking mask*/ +#define SDRAM_CFG0_MEMCHK_NON 0x00000000 /* No ECC generation */ +#define SDRAM_CFG0_MEMCHK_GEN 0x20000000 /* ECC generation */ +#define SDRAM_CFG0_MEMCHK_CHK 0x30000000 /* ECC generation and checking */ +#define SDRAM_CFG0_DRAMWDTH 0x02000000 /* DRAM width mask */ +#define SDRAM_CFG0_DRAMWDTH_32 0x00000000 /* 32 bits */ +#define SDRAM_CFG0_DRAMWDTH_64 0x02000000 /* 64 bits */ + +#endif diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index e1155e2..16e2cc6 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -139,8 +139,18 @@ #define CFG_I2C_RTC_ADDR 0x68 #define CFG_M41T11_BASE_YEAR 1900 +/* + * SDRAM configuration (please see cpu/ppc/sdram.[ch]) + */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ +/* SDRAM timings used in datasheet */ +#define CFG_SDRAM_CL 2 +#define CFG_SDRAM_tRP 20 +#define CFG_SDRAM_tRC 65 +#define CFG_SDRAM_tRCD 20 +#undef CFG_SDRAM_tRFC + /* * Miscellaneous configurable options */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 831d018..0662544 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2005 + * (C) Copyright 2005-2006 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * (C) Copyright 2002 Scott McNutt @@ -71,9 +71,10 @@ * DDR SDRAM *----------------------------------------------------------------------*/ #define CONFIG_SDRAM_BANK0 1 /* init onboard DDR SDRAM bank 0*/ -#define CFG_SDRAM_TABLE { \ - {(256 << 20), 0x000C4001}, /* 256MB mode 3, 13x10(4) */ \ - {(64 << 20), 0x00082001}} /* 64MB mode 2, 12x9(4) */ +#define CONFIG_SDRAM_ECC /* enable ECC support */ +#define CFG_SDRAM_TABLE { \ + {(256 << 20), 13, 0x000C4001}, /* 256MB mode 3, 13x10(4)*/ \ + {(64 << 20), 12, 0x00082001}} /* 64MB mode 2, 12x9(4) */ /*----------------------------------------------------------------------- * Serial Port @@ -275,6 +276,9 @@ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ +#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */ + #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ -- cgit v0.10.2 From 35118539435d1a6f40eab348a4ac2040f3bd882c Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 31 Mar 2006 15:18:37 +0200 Subject: Reorder CHANGELOG diff --git a/CHANGELOG b/CHANGELOG index 16b50e9..c8d4e42 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,24 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) + + 405 SDRAM: - The SDRAM parameters can now be defined in the board + config file and the 405 SDRAM controller values will + be calculated upon bootup (see PPChameleonEVB). + When those settings are not defined in the board + config file, the register setup will be as it is now, + so this implementation should not break any current + design using this code. + + Thanks to Andrea Marson from DAVE for this patch. + + 440 DDR: - Added function sdram_tr1_set to auto calculate the + TR1 value for the DDR. + - Added ECC support (see p3p440). + + Patch by Stefan Roese, 17 Mar 2006 + * Enable Quad UART om MCC200 board. * Cleanup MCC200 board configuration; omit non-existent stuff. @@ -33,24 +51,6 @@ Changes since U-Boot 1.1.4: * Add support for Lite5200B board. Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006 -* Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) - - 405 SDRAM: - The SDRAM parameters can now be defined in the board - config file and the 405 SDRAM controller values will - be calculated upon bootup (see PPChameleonEVB). - When those settings are not defined in the board - config file, the register setup will be as it is now, - so this implementation should not break any current - design using this code. - - Thanks to Andrea Marson from DAVE for this patch. - - 440 DDR: - Added function sdram_tr1_set to auto calculate the - TR1 value for the DDR. - - Added ECC support (see p3p440). - - Patch by Stefan Roese, 17 Mar 2006 - * Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories -- cgit v0.10.2 From d87080b721e4f8dca977af7571c5338ae7bb8db7 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 31 Mar 2006 18:32:53 +0200 Subject: GCC-4.x fixes: clean up global data pointer initialization for all boards. diff --git a/CHANGELOG b/CHANGELOG index db9899a..a1b5250 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,9 @@ Changes since U-Boot 1.1.4: ====================================================================== +* GCC-4.x fixes: clean up global data pointer initialization for all + boards + * Update for Delta board: - redundant NAND environment - misc Monahans cleanups (remove dead code etc.) diff --git a/README b/README index 59f4cd2..ae9e10f 100644 --- a/README +++ b/README @@ -3309,6 +3309,8 @@ On ARM, the following registers are used: ==> U-Boot will use R8 to hold a pointer to the global data +NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope, +or current versions of GCC may "optimize" the code too much. Memory Management: ------------------ diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c index 0934e1b..40f41c7 100644 --- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c +++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c @@ -1,6 +1,7 @@ /* * (C) Copyright 2002 * Hyperion Entertainment, ThomasF@hyperion-entertainment.com + * (C) Copyright 2006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -88,8 +89,6 @@ long initdram (int board_type) void after_reloc (ulong dest_addr, gd_t *gd) { -/* HJF: DECLARE_GLOBAL_DATA_PTR; */ - board_init_r (gd, dest_addr); } diff --git a/board/MAI/AmigaOneG3SE/articiaS.c b/board/MAI/AmigaOneG3SE/articiaS.c index a4dad64..3901b80 100644 --- a/board/MAI/AmigaOneG3SE/articiaS.c +++ b/board/MAI/AmigaOneG3SE/articiaS.c @@ -29,6 +29,8 @@ #include "smbus.h" #include "via686.h" +DECLARE_GLOBAL_DATA_PTR; + #undef DEBUG struct dimm_bank { @@ -82,7 +84,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte) long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks) { - DECLARE_GLOBAL_DATA_PTR; int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR; uint32 busclock = gd->bus_clk; uint32 memclock = busclock; @@ -394,8 +395,6 @@ uint32 burst_to_len (uint32 support) long articiaS_ram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - register uint32 i; register uint32 value1; register uint32 value2; diff --git a/board/MAI/AmigaOneG3SE/articiaS_pci.c b/board/MAI/AmigaOneG3SE/articiaS_pci.c index d2e9f29..480dae5 100644 --- a/board/MAI/AmigaOneG3SE/articiaS_pci.c +++ b/board/MAI/AmigaOneG3SE/articiaS_pci.c @@ -26,6 +26,8 @@ #include "memio.h" #include "articiaS.h" +DECLARE_GLOBAL_DATA_PTR; + #undef ARTICIA_PCI_DEBUG #ifdef ARTICIA_PCI_DEBUG @@ -493,8 +495,6 @@ pci_dev_t video_dev; int articiaS_init_vga (void) { - DECLARE_GLOBAL_DATA_PTR; - extern void shutdown_bios(void); pci_dev_t dev = ~0; int busnr = 0; diff --git a/board/MAI/AmigaOneG3SE/cmd_boota.c b/board/MAI/AmigaOneG3SE/cmd_boota.c index 3e2835a..143bba2 100644 --- a/board/MAI/AmigaOneG3SE/cmd_boota.c +++ b/board/MAI/AmigaOneG3SE/cmd_boota.c @@ -3,6 +3,7 @@ #include "../disk/part_amiga.h" #include +DECLARE_GLOBAL_DATA_PTR; #undef BOOTA_DEBUG @@ -108,8 +109,6 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) s = getenv ("autostart"); if (s && strcmp (s, "yes") == 0) { - DECLARE_GLOBAL_DATA_PTR; - void (*boot) (bd_t *, char *, block_dev_desc_t *); char *args; diff --git a/board/MAI/AmigaOneG3SE/serial.c b/board/MAI/AmigaOneG3SE/serial.c index e83fb46..b6f57c7 100644 --- a/board/MAI/AmigaOneG3SE/serial.c +++ b/board/MAI/AmigaOneG3SE/serial.c @@ -4,6 +4,8 @@ #include "memio.h" #include "articiaS.h" +DECLARE_GLOBAL_DATA_PTR; + #ifndef CFG_NS16550 static uint32 ComPort1; @@ -150,8 +152,6 @@ const NS16550_t Com1 = (NS16550_t) CFG_NS16550_COM2; int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - uint32 clock_divisor = 115200 / gd->baudrate; NS16550_init (Com0, clock_divisor); @@ -239,8 +239,6 @@ void serial_puts (const char *string) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - uint32 clock_divisor = 115200 / gd->baudrate; NS16550_init (Com0, clock_divisor); diff --git a/board/MAI/AmigaOneG3SE/via686.c b/board/MAI/AmigaOneG3SE/via686.c index c797e47..3606db8 100644 --- a/board/MAI/AmigaOneG3SE/via686.c +++ b/board/MAI/AmigaOneG3SE/via686.c @@ -28,6 +28,8 @@ #include "via686.h" #include "i8259.h" +DECLARE_GLOBAL_DATA_PTR; + #undef VIA_DEBUG #ifdef VIA_DEBUG @@ -226,33 +228,31 @@ __asm (" .globl via_calibrate_time_base \n" extern unsigned long via_calibrate_time_base(void); -void via_calibrate_bus_freq(void) +void via_calibrate_bus_freq (void) { - DECLARE_GLOBAL_DATA_PTR; - - unsigned long tb; + unsigned long tb; - /* This is 20 microseconds */ - #define CALIBRATE_TIME 28636 + /* This is 20 microseconds */ +#define CALIBRATE_TIME 28636 + /* Enable the timer (and disable speaker) */ + unsigned char c; - /* Enable the timer (and disable speaker) */ - unsigned char c; - c = in_byte(0x61); - out_byte(0x61, ((c & ~0x02) | 0x01)); + c = in_byte (0x61); + out_byte (0x61, ((c & ~0x02) | 0x01)); - /* Set timer 2 to low/high writing */ - out_byte(0x43, 0xb0); - out_byte(0x42, CALIBRATE_TIME & 0xff); - out_byte(0x42, CALIBRATE_TIME >>8); + /* Set timer 2 to low/high writing */ + out_byte (0x43, 0xb0); + out_byte (0x42, CALIBRATE_TIME & 0xff); + out_byte (0x42, CALIBRATE_TIME >> 8); - /* Read the time base */ - tb = via_calibrate_time_base(); + /* Read the time base */ + tb = via_calibrate_time_base (); - if (tb >= 700000) - gd->bus_clk = 133333333; - else - gd->bus_clk = 100000000; + if (tb >= 700000) + gd->bus_clk = 133333333; + else + gd->bus_clk = 100000000; } diff --git a/board/MAI/AmigaOneG3SE/video.c b/board/MAI/AmigaOneG3SE/video.c index 36e3c62..f6327f7 100644 --- a/board/MAI/AmigaOneG3SE/video.c +++ b/board/MAI/AmigaOneG3SE/video.c @@ -26,6 +26,8 @@ #include "memio.h" #include +DECLARE_GLOBAL_DATA_PTR; + unsigned char *cursor_position; unsigned int cursor_row; unsigned int cursor_col; @@ -480,7 +482,6 @@ extern char version_string[]; void video_banner(void) { block_dev_desc_t *ide; - DECLARE_GLOBAL_DATA_PTR; int i; char *s; int maxdev; diff --git a/board/Marvell/common/serial.c b/board/Marvell/common/serial.c index 9d0d213..6a1d4d7 100644 --- a/board/Marvell/common/serial.c +++ b/board/Marvell/common/serial.c @@ -45,13 +45,13 @@ #include "ns16550.h" +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_MPSC int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) int clock_divisor = 230400 / gd->baudrate; #endif @@ -88,8 +88,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate); } @@ -97,8 +95,6 @@ void serial_setbrg (void) int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = 230400 / gd->baudrate; #ifdef CFG_INIT_CHAN1 @@ -130,8 +126,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = 230400 / gd->baudrate; #ifdef CFG_INIT_CHAN1 diff --git a/board/Marvell/db64360/mpsc.c b/board/Marvell/db64360/mpsc.c index ccb3adc..d8acd31 100644 --- a/board/Marvell/db64360/mpsc.c +++ b/board/Marvell/db64360/mpsc.c @@ -42,6 +42,8 @@ #include "../include/memory.h" +DECLARE_GLOBAL_DATA_PTR; + /* Define this if you wish to use the MPSC as a register based UART. * This will force the serial port to not use the SDMA engine at all. */ @@ -114,9 +116,7 @@ static void mpsc_debug_init (void) /* Clear the CFR (CHR4) */ /* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */ - temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &" - -REG_GAP)); + temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP)); temp &= 0xffffff00; temp |= BIT29; GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP), @@ -158,7 +158,6 @@ char mpsc_getchar_debug (void) * global variables [josh] */ int mpsc_putchar_early (char ch) { - DECLARE_GLOBAL_DATA_PTR; int mpsc = CHANNEL; int temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP)); @@ -511,7 +510,6 @@ void mpsc_init2 (void) int galbrg_set_baudrate (int channel, int rate) { - DECLARE_GLOBAL_DATA_PTR; int clock; galbrg_disable (channel); /*ok */ diff --git a/board/Marvell/db64360/mv_eth.c b/board/Marvell/db64360/mv_eth.c index 3c5dee7..e5a87ad 100644 --- a/board/Marvell/db64360/mv_eth.c +++ b/board/Marvell/db64360/mv_eth.c @@ -732,6 +732,7 @@ int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr, pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */ pkt_info.byte_cnt = dataSize; pkt_info.buf_ptr = (unsigned int) dataPtr; + pkt_info.return_info = 0; status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info); if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) { diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c index d2635f8..f04aaf9 100644 --- a/board/Marvell/db64360/sdram_init.c +++ b/board/Marvell/db64360/sdram_init.c @@ -42,6 +42,8 @@ #include "64360.h" #include "mv_regs.h" +DECLARE_GLOBAL_DATA_PTR; + #undef DEBUG #define MAP_PCI @@ -246,8 +248,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte) /* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */ static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long spd_checksum; #ifdef ZUMA_NTL diff --git a/board/Marvell/db64460/mpsc.c b/board/Marvell/db64460/mpsc.c index 33fbc49..b783aff 100644 --- a/board/Marvell/db64460/mpsc.c +++ b/board/Marvell/db64460/mpsc.c @@ -42,6 +42,8 @@ #include "../include/memory.h" +DECLARE_GLOBAL_DATA_PTR; + /* Define this if you wish to use the MPSC as a register based UART. * This will force the serial port to not use the SDMA engine at all. */ @@ -114,9 +116,7 @@ static void mpsc_debug_init (void) /* Clear the CFR (CHR4) */ /* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */ - temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &" - -REG_GAP)); + temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP)); temp &= 0xffffff00; temp |= BIT29; GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP), @@ -158,7 +158,6 @@ char mpsc_getchar_debug (void) * global variables [josh] */ int mpsc_putchar_early (char ch) { - DECLARE_GLOBAL_DATA_PTR; int mpsc = CHANNEL; int temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP)); @@ -511,7 +510,6 @@ void mpsc_init2 (void) int galbrg_set_baudrate (int channel, int rate) { - DECLARE_GLOBAL_DATA_PTR; int clock; galbrg_disable (channel); /*ok */ diff --git a/board/Marvell/db64460/mv_eth.c b/board/Marvell/db64460/mv_eth.c index ec5d581..b2c7835 100644 --- a/board/Marvell/db64460/mv_eth.c +++ b/board/Marvell/db64460/mv_eth.c @@ -731,6 +731,7 @@ int mv64460_eth_xmit (struct eth_device *dev, volatile void *dataPtr, pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */ pkt_info.byte_cnt = dataSize; pkt_info.buf_ptr = (unsigned int) dataPtr; + pkt_info.return_info = 0; status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info); if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) { diff --git a/board/Marvell/db64460/sdram_init.c b/board/Marvell/db64460/sdram_init.c index 8cfe84c..1762202 100644 --- a/board/Marvell/db64460/sdram_init.c +++ b/board/Marvell/db64460/sdram_init.c @@ -42,6 +42,8 @@ #include "64460.h" #include "mv_regs.h" +DECLARE_GLOBAL_DATA_PTR; + #undef DEBUG #define MAP_PCI @@ -246,8 +248,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte) /* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */ static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long spd_checksum; #ifdef ZUMA_NTL diff --git a/board/adsvix/adsvix.c b/board/adsvix/adsvix.c index 5e770e9..c430d63 100644 --- a/board/adsvix/adsvix.c +++ b/board/adsvix/adsvix.c @@ -30,6 +30,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* @@ -38,8 +40,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -62,8 +62,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c index a2595ee..dcafac9 100644 --- a/board/amcc/ebony/ebony.c +++ b/board/amcc/ebony/ebony.c @@ -28,6 +28,8 @@ #define FLASH_ONBD_N 2 /* 00000010 */ #define FLASH_SRAM_SEL 1 /* 00000001 */ +DECLARE_GLOBAL_DATA_PTR; + long int fixed_sdram(void); int board_early_init_f(void) @@ -107,7 +109,7 @@ long int initdram(int board_type) long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) - dram_size = spd_sdram(0); + dram_size = spd_sdram(); #else dram_size = fixed_sdram(); #endif @@ -235,8 +237,6 @@ int pci_pre_init(struct pci_controller *hose) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller *hose) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index c6b79a9..06a57f6 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -28,6 +28,7 @@ #include #include "epld.h" +DECLARE_GLOBAL_DATA_PTR; extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ @@ -291,8 +292,6 @@ int pci_pre_init( struct pci_controller *hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller *hose) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c index d1a29c5..3f6d204 100644 --- a/board/amcc/ocotea/ocotea.c +++ b/board/amcc/ocotea/ocotea.c @@ -30,6 +30,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define BOOT_SMALL_FLASH 32 /* 00100000 */ #define FLASH_ONBD_N 2 /* 00000010 */ #define FLASH_SRAM_SEL 1 /* 00000001 */ @@ -204,7 +206,7 @@ long int initdram (int board_type) long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) - dram_size = spd_sdram (0); + dram_size = spd_sdram (); #else dram_size = fixed_sdram (); #endif @@ -334,8 +336,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c index f1a96a6..292e026 100644 --- a/board/amcc/walnut/walnut.c +++ b/board/amcc/walnut/walnut.c @@ -99,7 +99,7 @@ void sdram_init(void) */ long int initdram(int board_type) { - return spd_sdram(0); + return spd_sdram(); } int testdram(void) diff --git a/board/amcc/yellowstone/yellowstone.c b/board/amcc/yellowstone/yellowstone.c index 8ddf910..20965c8 100644 --- a/board/amcc/yellowstone/yellowstone.c +++ b/board/amcc/yellowstone/yellowstone.c @@ -24,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ int board_early_init_f(void) @@ -136,7 +138,6 @@ int board_early_init_f(void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; uint pbcr; int size_val = 0; diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 509d8e4..392d0dc 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -24,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ int board_early_init_f(void) @@ -132,7 +134,6 @@ int board_early_init_f(void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; uint pbcr; int size_val = 0; diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c index 39c4157..c6ee772 100644 --- a/board/amirix/ap1000/serial.c +++ b/board/amirix/ap1000/serial.c @@ -27,9 +27,7 @@ #include -#if 0 -#include "serial.h" -#endif +DECLARE_GLOBAL_DATA_PTR; const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1, (NS16550_t) CFG_NS16550_COM2 }; @@ -40,8 +38,6 @@ static int gComPort = 0; int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; (void) NS16550_init (COM_PORTS[0], clock_divisor); @@ -71,8 +67,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; #ifdef CFG_INIT_CHAN1 diff --git a/board/armadillo/armadillo.c b/board/armadillo/armadillo.c index de04c66..ca5bd1d 100644 --- a/board/armadillo/armadillo.c +++ b/board/armadillo/armadillo.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ @@ -37,8 +39,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Activate LED flasher */ IO_LEDFLSH = 0x40; @@ -53,8 +53,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/assabet/assabet.c b/board/assabet/assabet.c index d3ccbb5..4f84a58 100644 --- a/board/assabet/assabet.c +++ b/board/assabet/assabet.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* @@ -99,8 +101,6 @@ neponset_init(void) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_arch_number = MACH_TYPE_ASSABET; gd->bd->bi_boot_params = 0xc0000100; @@ -112,8 +112,6 @@ board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/at91rm9200dk/at91rm9200dk.c b/board/at91rm9200dk/at91rm9200dk.c index 9016776..002981a 100644 --- a/board/at91rm9200dk/at91rm9200dk.c +++ b/board/at91rm9200dk/at91rm9200dk.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* * Miscelaneous platform dependent initialisations @@ -34,8 +36,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Enable Ctrlc */ console_init_f (); @@ -56,8 +56,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; return 0; diff --git a/board/bmw/serial.c b/board/bmw/serial.c index f36a41b..712a95b 100644 --- a/board/bmw/serial.c +++ b/board/bmw/serial.c @@ -24,6 +24,8 @@ #include #include "ns16550.h" +DECLARE_GLOBAL_DATA_PTR; + #if CONFIG_CONS_INDEX == 1 static struct NS16550 *console = (struct NS16550 *) (CFG_EUMB_ADDR + 0x4500); @@ -38,8 +40,6 @@ extern ulong get_bus_freq (ulong); int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = gd->bus_clk / 16 / gd->baudrate; NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor); @@ -75,8 +75,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate; NS16550_reinit (console, clock_divisor); diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c index cc1bc16..307894f 100644 --- a/board/cerf250/cerf250.c +++ b/board/cerf250/cerf250.c @@ -27,6 +27,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ @@ -36,8 +38,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -60,8 +60,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c index 4d2013b..d34737c 100644 --- a/board/cm4008/cm4008.c +++ b/board/cm4008/cm4008.c @@ -31,6 +31,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ #define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) @@ -75,8 +77,6 @@ int board_late_init (void) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of CM4008 */ gd->bd->bi_arch_number = 624; @@ -92,8 +92,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c index 65eaa94..02d05af 100644 --- a/board/cm41xx/cm41xx.c +++ b/board/cm41xx/cm41xx.c @@ -31,6 +31,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ #define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) @@ -75,8 +77,6 @@ int board_late_init (void) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of CM41xx */ gd->bd->bi_arch_number = 672; @@ -92,8 +92,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/cmc_pu2/cmc_pu2.c b/board/cmc_pu2/cmc_pu2.c index 14168e6..9ae3c42 100644 --- a/board/cmc_pu2/cmc_pu2.c +++ b/board/cmc_pu2/cmc_pu2.c @@ -33,6 +33,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* * Miscelaneous platform dependent initialisations @@ -45,7 +47,6 @@ int hw_detect (void); int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; AT91PS_PIO piob = AT91C_BASE_PIOB; AT91PS_PIO pioc = AT91C_BASE_PIOC; @@ -109,8 +110,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; return 0; diff --git a/board/cogent/serial.c b/board/cogent/serial.c index 4c20017..2b595a8 100644 --- a/board/cogent/serial.c +++ b/board/cogent/serial.c @@ -6,6 +6,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR) #if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \ @@ -25,76 +27,65 @@ int serial_init (void) { -/* DECLARE_GLOBAL_DATA_PTR; */ - - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ - serial_setbrg (); - cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ - cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ - cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ + cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */ + serial_setbrg (); + cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ + cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */ + cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ - return (0); + return (0); } -void -serial_setbrg (void) +void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - unsigned int divisor; - unsigned char lcr; - - if ((divisor = br_to_div(gd->baudrate)) == 0) - divisor = DEFDIV; - - lcr = cma_mb_reg_read(&mbsp->ser_lcr); - cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/ - cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff); - cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); - cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */ + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; + unsigned int divisor; + unsigned char lcr; + + if ((divisor = br_to_div (gd->baudrate)) == 0) + divisor = DEFDIV; + + lcr = cma_mb_reg_read (&mbsp->ser_lcr); + cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */ + cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff); + cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff); + cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */ } -void -serial_putc(const char c) +void serial_putc (const char c) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - if (c == '\n') - serial_putc('\r'); + if (c == '\n') + serial_putc ('\r'); - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) - ; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0); - cma_mb_reg_write(&mbsp->ser_thr, c); + cma_mb_reg_write (&mbsp->ser_thr, c); } -void -serial_puts(const char *s) +void serial_puts (const char *s) { - while (*s != '\0') - serial_putc(*s++); + while (*s != '\0') + serial_putc (*s++); } -int -serial_getc(void) +int serial_getc (void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) - ; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0); - return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f); + return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f); } -int -serial_tstc(void) +int serial_tstc (void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0); + return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0); } #endif /* CONS_NONE */ @@ -118,71 +109,63 @@ serial_tstc(void) #error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial #endif -void -kgdb_serial_init(void) +void kgdb_serial_init (void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; - unsigned int divisor; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; + unsigned int divisor; - if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0) - divisor = DEFDIV; + if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0) + divisor = DEFDIV; - cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ - cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/ - cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff); - cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); - cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ - cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ - cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ + cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */ + cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */ + cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff); + cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff); + cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ + cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */ + cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ - printf("[on cma10x serial port B] "); + printf ("[on cma10x serial port B] "); } -void -putDebugChar(int c) +void putDebugChar (int c) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) - ; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0); - cma_mb_reg_write(&mbsp->ser_thr, c & 0xff); + cma_mb_reg_write (&mbsp->ser_thr, c & 0xff); } -void -putDebugStr(const char *str) +void putDebugStr (const char *str) { - while (*str != '\0') { - if (*str == '\n') - putDebugChar('\r'); - putDebugChar(*str++); - } + while (*str != '\0') { + if (*str == '\n') + putDebugChar ('\r'); + putDebugChar (*str++); + } } -int -getDebugChar(void) +int getDebugChar (void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) - ; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0); - return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f); + return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f); } -void -kgdb_interruptible(int yes) +void kgdb_interruptible (int yes) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; - - if (yes == 1) { - printf("kgdb: turning serial ints on\n"); - cma_mb_reg_write(&mbsp->ser_ier, 0xf); - } - else { - printf("kgdb: turning serial ints off\n"); - cma_mb_reg_write(&mbsp->ser_ier, 0x0); - } + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; + + if (yes == 1) { + printf ("kgdb: turning serial ints on\n"); + cma_mb_reg_write (&mbsp->ser_ier, 0xf); + } else { + printf ("kgdb: turning serial ints off\n"); + cma_mb_reg_write (&mbsp->ser_ier, 0x0); + } } #endif /* KGDB && KGDB_NONE */ diff --git a/board/cradle/cradle.c b/board/cradle/cradle.c index 6f65f32..6d8d555 100644 --- a/board/cradle/cradle.c +++ b/board/cradle/cradle.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ @@ -181,8 +183,6 @@ int board_init (void) /**********************************************************/ { - DECLARE_GLOBAL_DATA_PTR; - led_code (0xf, YELLOW); /* arch number of HHP Cradle */ @@ -209,8 +209,6 @@ int dram_init (void) /**********************************************************/ { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/csb226/csb226.c b/board/csb226/csb226.c index c99a715..80caf8b 100644 --- a/board/csb226/csb226.c +++ b/board/csb226/csb226.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SHOW_BOOT_PROGRESS # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) #else @@ -65,8 +67,6 @@ int misc_init_r(void) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -88,8 +88,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/csb637/csb637.c b/board/csb637/csb637.c index 6100a53..aeb1a13 100644 --- a/board/csb637/csb637.c +++ b/board/csb637/csb637.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* * Miscelaneous platform dependent initialisations @@ -33,8 +35,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Enable Ctrlc */ console_init_f (); @@ -51,8 +51,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; return 0; diff --git a/board/cu824/cu824.c b/board/cu824/cu824.c index 5844a5c..3edd27a 100644 --- a/board/cu824/cu824.c +++ b/board/cu824/cu824.c @@ -2,7 +2,7 @@ * (C) Copyright 2001 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. * - * (C) Copyright 2001, 2002 + * (C) Copyright 2001-2006 * Wolfgang Denk, DENX Software Engineering, * See file CREDITS for list of people who contributed to this @@ -29,12 +29,12 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define BOARD_REV_REG 0xFE80002B int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char revision = *(volatile char *)(BOARD_REV_REG); char buf[32]; diff --git a/board/dave/B2/B2.c b/board/dave/B2/B2.c index 29676b8..64fe948 100644 --- a/board/dave/B2/B2.c +++ b/board/dave/B2/B2.c @@ -27,13 +27,14 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * Miscelaneous platform dependent initialization */ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; u32 temp; /* Configuration Port Control Register*/ @@ -119,8 +120,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c index 52055b8..e8302d9 100644 --- a/board/dave/PPChameleonEVB/PPChameleonEVB.c +++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* Prototypes */ @@ -81,8 +83,6 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */ int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* adjust flash start and size as well as the offset */ gd->bd->bi_flashstart = 0 - flash_info[0].size; gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN; diff --git a/board/delta/delta.c b/board/delta/delta.c index 6ef7e2f..2b72386 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -30,6 +30,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ static void init_DA9030(void); @@ -40,8 +42,6 @@ static void init_DA9030(void); int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -65,8 +65,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c index 24c3e00..ab8e7be 100644 --- a/board/dnp1110/dnp1110.c +++ b/board/dnp1110/dnp1110.c @@ -24,8 +24,8 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -33,25 +33,21 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ /* arch number of DNP1110-Board */ gd->bd->bi_arch_number = MACH_TYPE_DNP1110; - /* flash vpp on */ - PPDR |= 0x80; /* assumes LCD controller is off */ - PPSR |= 0x80; + /* flash vpp on */ + PPDR |= 0x80; /* assumes LCD controller is off */ + PPSR |= 0x80; return 0; } int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c index fc48ed5..555475e 100644 --- a/board/eltec/bab7xx/bab7xx.c +++ b/board/eltec/bab7xx/bab7xx.c @@ -31,6 +31,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /*---------------------------------------------------------------------------*/ /* * Get Bus clock frequency @@ -169,8 +171,6 @@ long int initdram (int board_type) void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; - /* * Jump to the main U-Boot board init code */ diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c index a9dbeb2..108adb1 100644 --- a/board/eltec/elppc/elppc.c +++ b/board/eltec/elppc/elppc.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ int checkboard (void) @@ -137,8 +139,6 @@ void watchdog_reset (void) void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; - /* * Jump to the main U-Boot board init code */ diff --git a/board/ep7312/ep7312.c b/board/ep7312/ep7312.c index 11eab23..6968a5d 100644 --- a/board/ep7312/ep7312.c +++ b/board/ep7312/ep7312.c @@ -25,8 +25,7 @@ #include #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -34,8 +33,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Activate LED flasher */ IO_LEDFLSH = 0x40; @@ -50,8 +47,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c index 4b2b07a..078df00 100644 --- a/board/esd/apc405/apc405.c +++ b/board/esd/apc405/apc405.c @@ -26,7 +26,7 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #if 0 #define FPGA_DEBUG @@ -166,8 +166,6 @@ int misc_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile unsigned short *fpga_mode = (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL); volatile unsigned short *fpga_ctrl2 = @@ -301,8 +299,6 @@ int misc_init_r (void) int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned char str[64]; int i = getenv_r ("serial#", str, sizeof(str)); diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c index 3aac3c6..dfead33 100644 --- a/board/esd/ar405/ar405.c +++ b/board/esd/ar405/ar405.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); extern void lxt971_no_sleep(void); @@ -53,8 +55,6 @@ const unsigned char fpgadata_xl30[] = { int board_early_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - int index, len, i; int status; @@ -151,8 +151,6 @@ int board_early_init_f (void) int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - int index; int len; char str[64]; diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c index 2ced6cb..055a397 100644 --- a/board/esd/canbt/canbt.c +++ b/board/esd/canbt/canbt.c @@ -26,6 +26,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); @@ -50,8 +51,6 @@ const unsigned char fpgadata[] = { int board_early_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long cntrl0Reg; int index, len, i; int status; diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c index e283a92..cb04710 100644 --- a/board/esd/cms700/cms700.c +++ b/board/esd/cms700/cms700.c @@ -26,10 +26,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; extern void lxt971_no_sleep(void); - /* fpga configuration data - not compressed, generated by bin2c */ const unsigned char fpgadata[] = { @@ -87,8 +87,6 @@ int misc_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* adjust flash start and offset */ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; gd->bd->bi_flashoffset = 0; diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index 1a27ca0..36bf329 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f (void) { unsigned long cntrl0Reg; @@ -74,7 +76,6 @@ int misc_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned long cntrl0Reg; /* adjust flash start and offset */ diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 2ab9673..f803610 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -27,7 +27,8 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; + extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/ #if 0 #define FPGA_DEBUG @@ -100,8 +101,6 @@ int board_early_init_f (void) #endif #ifdef FPGA_DEBUG - DECLARE_GLOBAL_DATA_PTR; - /* set up serial port with default baudrate */ (void) get_clocks (); gd->baudrate = CONFIG_BAUDRATE; @@ -126,8 +125,6 @@ int board_early_init_f (void) if (status != 0) { /* booting FPGA failed */ #ifndef FPGA_DEBUG - DECLARE_GLOBAL_DATA_PTR; - /* set up serial port with default baudrate */ (void) get_clocks (); gd->baudrate = CONFIG_BAUDRATE; @@ -268,7 +265,6 @@ int misc_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned long cntrl0Reg; /* adjust flash start and offset */ @@ -707,8 +703,6 @@ U_BOOT_CMD( */ int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd = gd->bd; char *buf; ulong crc; diff --git a/board/esd/cpci750/mpsc.c b/board/esd/cpci750/mpsc.c index 52398b2..25c10e0 100644 --- a/board/esd/cpci750/mpsc.c +++ b/board/esd/cpci750/mpsc.c @@ -42,6 +42,8 @@ #include "../../Marvell/include/memory.h" +DECLARE_GLOBAL_DATA_PTR; + /* Define this if you wish to use the MPSC as a register based UART. * This will force the serial port to not use the SDMA engine at all. */ @@ -157,7 +159,6 @@ char mpsc_getchar_debug (void) * global variables [josh] */ int mpsc_putchar_early (char ch) { - DECLARE_GLOBAL_DATA_PTR; int mpsc = CHANNEL; int temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP)); @@ -510,7 +511,6 @@ void mpsc_init2 (void) int galbrg_set_baudrate (int channel, int rate) { - DECLARE_GLOBAL_DATA_PTR; int clock; galbrg_disable (channel); /*ok */ diff --git a/board/esd/cpci750/mv_eth.c b/board/esd/cpci750/mv_eth.c index be176dc..bc84ef0 100644 --- a/board/esd/cpci750/mv_eth.c +++ b/board/esd/cpci750/mv_eth.c @@ -733,6 +733,7 @@ int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr, pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */ pkt_info.byte_cnt = dataSize; pkt_info.buf_ptr = (unsigned int) dataPtr; + pkt_info.return_info = 0; status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info); if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) { diff --git a/board/esd/cpci750/sdram_init.c b/board/esd/cpci750/sdram_init.c index db545ef..6bdfc1d 100644 --- a/board/esd/cpci750/sdram_init.c +++ b/board/esd/cpci750/sdram_init.c @@ -45,6 +45,7 @@ #include "64360.h" #include "mv_regs.h" +DECLARE_GLOBAL_DATA_PTR; #undef DEBUG /* #define DEBUG */ @@ -250,8 +251,6 @@ NSto10PS(unsigned char spd_byte) /* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */ static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long spd_checksum; uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR; diff --git a/board/esd/cpci750/serial.c b/board/esd/cpci750/serial.c index 44de052..ba32ac1 100644 --- a/board/esd/cpci750/serial.c +++ b/board/esd/cpci750/serial.c @@ -38,13 +38,12 @@ #include "../../Marvell/include/memory.h" #include "serial.h" - #include "mpsc.h" +DECLARE_GLOBAL_DATA_PTR; + int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - mpsc_init (gd->baudrate); return (0); @@ -70,8 +69,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate); } diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c index 7bf7bb5..fcb8cbb 100644 --- a/board/esd/cpciiser4/cpciiser4.c +++ b/board/esd/cpciiser4/cpciiser4.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); @@ -55,8 +57,6 @@ const unsigned char fpgadata[] = { int board_early_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - int index, len, i; volatile unsigned char dummy; int status; diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c index fd51f7f..240ab78 100644 --- a/board/esd/dp405/dp405.c +++ b/board/esd/dp405/dp405.c @@ -26,6 +26,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; /* fpga configuration data - not compressed, generated by bin2c */ const unsigned char fpgadata[] = @@ -84,8 +85,6 @@ int misc_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* adjust flash start and offset */ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; gd->bd->bi_flashoffset = 0; diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c index 26e8341..a019ce4 100644 --- a/board/esd/du405/du405.c +++ b/board/esd/du405/du405.c @@ -28,6 +28,8 @@ #include <405gp_i2c.h> #include +DECLARE_GLOBAL_DATA_PTR; + /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); @@ -55,8 +57,6 @@ const unsigned char fpgadata[] = { int board_early_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - int index, len, i; int status; diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c index 99fd556..ea344c0 100644 --- a/board/esd/hh405/hh405.c +++ b/board/esd/hh405/hh405.c @@ -34,6 +34,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_VIDEO_SM501 #define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\ @@ -358,8 +360,6 @@ int board_early_init_f (void) int cf_enable(void) { - DECLARE_GLOBAL_DATA_PTR; - int i; volatile unsigned short *fpga_ctrl = @@ -391,8 +391,6 @@ int cf_enable(void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile unsigned short *fpga_ctrl = (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL); volatile unsigned short *lcd_contrast = @@ -628,8 +626,6 @@ int misc_init_r (void) int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char str[64]; int i = getenv_r ("serial#", str, sizeof(str)); @@ -673,8 +669,6 @@ long int initdram (int board_type) #ifdef CONFIG_IDE_RESET void ide_set_reset(int on) { - DECLARE_GLOBAL_DATA_PTR; - volatile unsigned short *fpga_mode = (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL); volatile unsigned short *fpga_status = @@ -788,8 +782,6 @@ U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, */ void video_get_info_str (int line_number, char *info) { - DECLARE_GLOBAL_DATA_PTR; - char str[64]; char str2[64]; int i = getenv_r("serial#", str2, sizeof(str)); diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c index 0c6771f..1e0accb 100644 --- a/board/esd/hub405/hub405.c +++ b/board/esd/hub405/hub405.c @@ -26,10 +26,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; extern void lxt971_no_sleep(void); - int board_revision(void) { unsigned long osrl_reg; @@ -110,8 +110,6 @@ int misc_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); @@ -208,8 +206,6 @@ int misc_init_r (void) */ int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char str[64]; int i = getenv_r ("serial#", str, sizeof(str)); diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c index 4be4d7e..e5d2273 100644 --- a/board/esd/pci405/pci405.c +++ b/board/esd/pci405/pci405.c @@ -30,6 +30,7 @@ #include "pci405.h" +DECLARE_GLOBAL_DATA_PTR; /* Prototypes */ int gunzip(void *, int, unsigned char *, unsigned long *); @@ -111,8 +112,6 @@ int board_revision(void) unsigned long fpga_done_state(void) { - DECLARE_GLOBAL_DATA_PTR; - if (gd->board_type < 2) { return FPGA_DONE_STATE_V11; } else { @@ -123,8 +122,6 @@ unsigned long fpga_done_state(void) unsigned long fpga_init_state(void) { - DECLARE_GLOBAL_DATA_PTR; - if (gd->board_type < 2) { return FPGA_INIT_STATE_V11; } else { @@ -320,8 +317,6 @@ int misc_init_r (void) int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char str[64]; int i = getenv_r ("serial#", str, sizeof(str)); diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index f9e4d43..7499671 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -29,10 +29,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; extern void lxt971_no_sleep(void); - /* fpga configuration data - not compressed, generated by bin2c */ const unsigned char fpgadata[] = { @@ -100,8 +100,6 @@ int board_early_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* adjust flash start and offset */ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; gd->bd->bi_flashoffset = 0; diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c index bc5fa7c..8be552e 100644 --- a/board/esd/vom405/vom405.c +++ b/board/esd/vom405/vom405.c @@ -26,10 +26,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; extern void lxt971_no_sleep(void); - /* fpga configuration data - not compressed, generated by bin2c */ const unsigned char fpgadata[] = { @@ -81,8 +81,6 @@ int board_early_init_f (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* adjust flash start and offset */ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; gd->bd->bi_flashoffset = 0; diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c index 93c502c..08ed635 100644 --- a/board/etin/debris/debris.c +++ b/board/etin/debris/debris.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkboard (void) { /*TODO: Check processor type */ @@ -170,8 +172,6 @@ void nvram_write(long dest, const void *src, size_t count) int misc_init_r(void) { - DECLARE_GLOBAL_DATA_PTR; - /* Write ethernet addr in NVRAM for VxWorks */ nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS, (char*)&gd->bd->bi_enetaddr[0], 6); diff --git a/board/etx094/etx094.c b/board/etx094/etx094.c index dba3c11..eb58b5d 100644 --- a/board/etx094/etx094.c +++ b/board/etx094/etx094.c @@ -24,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ static long int dram_size (long int, long int *, long int); @@ -90,8 +92,6 @@ const uint sdram_table[] = { int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char *s = getenv ("serial#"); char *e; diff --git a/board/evb4510/evb4510.c b/board/evb4510/evb4510.c index 0008e5a..13abbb7 100644 --- a/board/evb4510/evb4510.c +++ b/board/evb4510/evb4510.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_EVB4510 /* ------------------------------------------------------------------------- */ @@ -35,8 +37,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - icache_enable(); /* address for the kernel command line */ @@ -52,7 +52,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; #if CONFIG_NR_DRAM_BANKS == 2 diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c index 6a9d164..ab59941 100644 --- a/board/evb64260/evb64260.c +++ b/board/evb64260/evb64260.c @@ -37,6 +37,9 @@ #include "mpsc.h" #include "i2c.h" #include "64260.h" + +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_ZUMA_V2 extern void zuma_mbox_init(void); #endif @@ -323,8 +326,6 @@ int misc_init_r (void) void after_reloc(ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; - /* check to see if we booted from the sram. If so, move things * back to the way they should be. (we're running from main * memory at this point now */ diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c index ee623ca..98ac7f6 100644 --- a/board/evb64260/mpsc.c +++ b/board/evb64260/mpsc.c @@ -32,6 +32,8 @@ #include #include "mpsc.h" +DECLARE_GLOBAL_DATA_PTR; + int (*mpsc_putchar)(char ch) = mpsc_putchar_early; static volatile unsigned int *rx_desc_base=NULL; @@ -115,7 +117,6 @@ struct _tag_mirror_hack { int mpsc_putchar_early(char ch) { - DECLARE_GLOBAL_DATA_PTR; int mpsc=CHANNEL; int temp=GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP); galmpsc_set_tcschar(mpsc,ch); @@ -177,79 +178,82 @@ mpsc_putchar_sdma(char ch) return 0; } -char -mpsc_getchar(void) +char mpsc_getchar (void) { - DECLARE_GLOBAL_DATA_PTR; - static unsigned int done = 0; - volatile char ch; - unsigned int len=0, idx=0, temp; - - volatile unsigned int *p; - - - do { - p=&rx_desc_base[rx_desc_index*8]; - - INVALIDATE_DCACHE(&p[0], &p[1]); - /* Wait for character */ - while (p[1] & DESC_OWNER){ - udelay(100); - INVALIDATE_DCACHE(&p[0], &p[1]); - } - - /* Handle error case */ - if (p[1] & (1<<15)) { - printf("oops, error: %08x\n", p[1]); - - temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,CHANNEL,GALMPSC_REG_GAP); - temp |= (1 << 23); - GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2, CHANNEL,GALMPSC_REG_GAP, temp); - - /* Can't poll on abort bit, so we just wait. */ - udelay(100); + static unsigned int done = 0; + volatile char ch; + unsigned int len = 0, idx = 0, temp; - galsdma_enable_rx(); - } - - /* Number of bytes left in this descriptor */ - len = p[0] & 0xffff; - - if (len) { - /* Where to look */ - idx = 5; - if (done > 3) idx = 4; - if (done > 7) idx = 7; - if (done > 11) idx = 6; - - INVALIDATE_DCACHE(&p[idx], &p[idx+1]); - ch = p[idx] & 0xff; - done++; - } + volatile unsigned int *p; - if (done < len) { - /* this descriptor has more bytes still - * shift down the char we just read, and leave the - * buffer in place for the next time around - */ - p[idx] = p[idx] >> 8; - FLUSH_DCACHE(&p[idx], &p[idx+1]); - } - if (done == len) { - /* nothing left in this descriptor. - * go to next one - */ - p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST; - p[0] = 0x00100000; - FLUSH_DCACHE(&p[0], &p[1]); - /* Next descriptor */ - rx_desc_index = (rx_desc_index + 1) % RX_DESC; - done = 0; - } - } while (len==0); /* galileo bug.. len might be zero */ - - return ch; + do { + p = &rx_desc_base[rx_desc_index * 8]; + + INVALIDATE_DCACHE (&p[0], &p[1]); + /* Wait for character */ + while (p[1] & DESC_OWNER) { + udelay (100); + INVALIDATE_DCACHE (&p[0], &p[1]); + } + + /* Handle error case */ + if (p[1] & (1 << 15)) { + printf ("oops, error: %08x\n", p[1]); + + temp = GTREGREAD_MIRROR (GALMPSC_CHANNELREG_2, + CHANNEL, GALMPSC_REG_GAP); + temp |= (1 << 23); + GT_REG_WRITE_MIRROR (GALMPSC_CHANNELREG_2, CHANNEL, + GALMPSC_REG_GAP, temp); + + /* Can't poll on abort bit, so we just wait. */ + udelay (100); + + galsdma_enable_rx (); + } + + /* Number of bytes left in this descriptor */ + len = p[0] & 0xffff; + + if (len) { + /* Where to look */ + idx = 5; + if (done > 3) + idx = 4; + if (done > 7) + idx = 7; + if (done > 11) + idx = 6; + + INVALIDATE_DCACHE (&p[idx], &p[idx + 1]); + ch = p[idx] & 0xff; + done++; + } + + if (done < len) { + /* this descriptor has more bytes still + * shift down the char we just read, and leave the + * buffer in place for the next time around + */ + p[idx] = p[idx] >> 8; + FLUSH_DCACHE (&p[idx], &p[idx + 1]); + } + + if (done == len) { + /* nothing left in this descriptor. + * go to next one + */ + p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST; + p[0] = 0x00100000; + FLUSH_DCACHE (&p[0], &p[1]); + /* Next descriptor */ + rx_desc_index = (rx_desc_index + 1) % RX_DESC; + done = 0; + } + } while (len == 0); /* galileo bug.. len might be zero */ + + return ch; } int @@ -266,8 +270,6 @@ mpsc_test_char(void) int mpsc_init(int baud) { - DECLARE_GLOBAL_DATA_PTR; - memset(MIRROR_HACK, 0, sizeof(struct _tag_mirror_hack)); MIRROR_HACK->GALMPSC_ROUTING_REGISTER_M=0x3fffffff; @@ -382,7 +384,6 @@ mpsc_init2(void) int galbrg_set_baudrate(int channel, int rate) { - DECLARE_GLOBAL_DATA_PTR; int clock; galbrg_disable(channel); @@ -410,7 +411,6 @@ galbrg_set_baudrate(int channel, int rate) static int galbrg_set_CDV(int channel, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP); @@ -424,7 +424,6 @@ galbrg_set_CDV(int channel, int value) static int galbrg_enable(int channel) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP); @@ -437,7 +436,6 @@ galbrg_enable(int channel) static int galbrg_disable(int channel) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP); @@ -450,7 +448,6 @@ galbrg_disable(int channel) static int galbrg_set_clksrc(int channel, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG,channel, GALBRG_REG_GAP); @@ -583,7 +580,6 @@ galsdma_set_burstsize(int channel, unsigned int value) static int galmpsc_connect(int channel, int connect) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR_G(GALMPSC_ROUTING_REGISTER); @@ -629,7 +625,6 @@ galmpsc_route_serial(int channel, int connect) static int galmpsc_route_rx_clock(int channel, int brg) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR_G(GALMPSC_RxC_ROUTE); @@ -647,7 +642,6 @@ galmpsc_route_rx_clock(int channel, int brg) static int galmpsc_route_tx_clock(int channel, int brg) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR_G(GALMPSC_TxC_ROUTE); @@ -688,7 +682,6 @@ galmpsc_write_config_regs(int mpsc, int mode) static int galmpsc_config_channel_regs(int mpsc) { - DECLARE_GLOBAL_DATA_PTR; GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, 0); GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, 0); GT_REG_WRITE(GALMPSC_CHANNELREG_3+(mpsc*GALMPSC_REG_GAP), 1); @@ -709,7 +702,6 @@ galmpsc_config_channel_regs(int mpsc) static int galmpsc_set_brkcnt(int mpsc, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP); @@ -723,7 +715,6 @@ galmpsc_set_brkcnt(int mpsc, int value) static int galmpsc_set_tcschar(int mpsc, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP); @@ -737,7 +728,6 @@ galmpsc_set_tcschar(int mpsc, int value) static int galmpsc_set_char_length(int mpsc, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP); @@ -751,7 +741,6 @@ galmpsc_set_char_length(int mpsc, int value) static int galmpsc_set_stop_bit_length(int mpsc, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP); @@ -764,7 +753,6 @@ galmpsc_set_stop_bit_length(int mpsc, int value) static int galmpsc_set_parity(int mpsc, int value) { - DECLARE_GLOBAL_DATA_PTR; unsigned int temp; temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP); @@ -784,7 +772,6 @@ galmpsc_set_parity(int mpsc, int value) static int galmpsc_enter_hunt(int mpsc) { - DECLARE_GLOBAL_DATA_PTR; int temp; temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP); @@ -802,7 +789,6 @@ galmpsc_enter_hunt(int mpsc) static int galmpsc_shutdown(int mpsc) { - DECLARE_GLOBAL_DATA_PTR; #if 0 unsigned int temp; diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c index 8d63c6f..fae6d10 100644 --- a/board/evb64260/sdram_init.c +++ b/board/evb64260/sdram_init.c @@ -35,6 +35,8 @@ #include "i2c.h" #include "64260.h" +DECLARE_GLOBAL_DATA_PTR; + /* #define DEBUG */ #define MAP_PCI @@ -199,7 +201,6 @@ static int check_dimm (uchar slot, sdram_info_t * info) * the array which is passed in with the relevant information */ static int check_dimm (uchar slot, sdram_info_t * info) { - DECLARE_GLOBAL_DATA_PTR; uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR; int ret; uchar rows, cols, sdram_banks, supp_cal, width, cal_val; diff --git a/board/evb64260/serial.c b/board/evb64260/serial.c index d9c7a15..191445c 100644 --- a/board/evb64260/serial.c +++ b/board/evb64260/serial.c @@ -39,6 +39,8 @@ #include "mpsc.h" +DECLARE_GLOBAL_DATA_PTR; + #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1, (NS16550_t) CFG_NS16550_COM2 }; @@ -48,8 +50,6 @@ const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1, int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; #endif @@ -90,8 +90,6 @@ serial_tstc(void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - galbrg_set_baudrate(CONFIG_MPSC_PORT, gd->baudrate); } @@ -99,8 +97,6 @@ serial_setbrg (void) int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; #ifdef CFG_INIT_CHAN1 @@ -137,8 +133,6 @@ serial_tstc(void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; #ifdef CFG_INIT_CHAN1 diff --git a/board/ezkit533/ezkit533.c b/board/ezkit533/ezkit533.c index f8ee900..8d6c8de 100644 --- a/board/ezkit533/ezkit533.c +++ b/board/ezkit533/ezkit533.c @@ -30,6 +30,8 @@ #include "psd4256.h" #endif +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28); @@ -41,7 +43,6 @@ int checkboard(void) long int initdram(int board_type) { - DECLARE_GLOBAL_DATA_PTR; #ifdef DEBUG int brate; char *tmp = getenv("baudrate"); diff --git a/board/gcplus/gcplus.c b/board/gcplus/gcplus.c index 261e894..829b597 100644 --- a/board/gcplus/gcplus.c +++ b/board/gcplus/gcplus.c @@ -26,7 +26,8 @@ #include #include -/* ------------------------------------------------------------------------- */ + +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -35,8 +36,6 @@ int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT; gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */ @@ -62,8 +61,6 @@ board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c index 37788d5..2ba7e0e 100644 --- a/board/gen860t/fpga.c +++ b/board/gen860t/fpga.c @@ -32,6 +32,8 @@ #include #include "fpga.h" +DECLARE_GLOBAL_DATA_PTR; + #if (CONFIG_FPGA) #if 0 @@ -189,8 +191,6 @@ void fpga_selectmap_init (void) */ int gen860t_init_fpga (void) { - DECLARE_GLOBAL_DATA_PTR; - int i; PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off); diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c index b7a1b56..eb73221 100644 --- a/board/gen860t/gen860t.c +++ b/board/gen860t/gen860t.c @@ -30,6 +30,8 @@ #include "fpga.h" #include "ioport.h" +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_STATUS_LED #include #endif @@ -126,8 +128,6 @@ const uint selectmap_upm_table[] = { */ int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char *s; char buf[64]; int i; @@ -305,5 +305,3 @@ int post_hotkeys_pressed (void) return 0; /* No hotkeys supported */ } #endif - -/* vim: set ts=4 sw=4 tw=78 : */ diff --git a/board/hermes/hermes.c b/board/hermes/hermes.c index e95d9ee..a523db1 100644 --- a/board/hermes/hermes.c +++ b/board/hermes/hermes.c @@ -32,6 +32,8 @@ # define SHOW_BOOT_PROGRESS(arg) #endif +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ static long int dram_size (long int, long int *, long int); @@ -105,8 +107,6 @@ const uint sdram_table[] = { int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char *s = getenv ("serial#"); char *e; diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c index 0596fa4..6868f26 100644 --- a/board/hymod/bsp.c +++ b/board/hymod/bsp.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /*----------------------------------------------------------------------- * Board Special Commands: FPGA load/store, EEPROM erase */ @@ -75,8 +77,6 @@ int fpga_load (int mezz, uchar *addr, ulong size) { - DECLARE_GLOBAL_DATA_PTR; - hymod_conf_t *cp = &gd->bd->bi_hymod_conf; xlx_info_t *fp; xlx_iopins_t *fpgaio; diff --git a/board/hymod/env.c b/board/hymod/env.c index f9e1421..062553b 100644 --- a/board/hymod/env.c +++ b/board/hymod/env.c @@ -23,6 +23,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* imports from fetch.c */ extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *)); @@ -32,8 +34,6 @@ static char *def_global_env_path = "/hymod/global_env"; static int env_callback (uchar *name, uchar *value) { - DECLARE_GLOBAL_DATA_PTR; - hymod_conf_t *cp = &gd->bd->bi_hymod_conf; char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver; int override = 1, append = 0, remove = 0, nnl, ovl, nvl; diff --git a/board/hymod/hymod.c b/board/hymod/hymod.c index dea0a70..5e98e9e 100644 --- a/board/hymod/hymod.c +++ b/board/hymod/hymod.c @@ -30,6 +30,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* imports from eeprom.c */ @@ -424,8 +426,6 @@ initdram (int board_type) int last_stage_init (void) { - DECLARE_GLOBAL_DATA_PTR; - hymod_conf_t *cp = &gd->bd->bi_hymod_conf; int rc; diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 081ef65..7b9a83d 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * I/O Port configuration table * @@ -295,8 +297,6 @@ long int initdram (int board_type) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_flashstart = 0xff800000; } diff --git a/board/impa7/impa7.c b/board/impa7/impa7.c index e496923..3230dd4 100644 --- a/board/impa7/impa7.c +++ b/board/impa7/impa7.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ @@ -34,8 +36,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Activate LED flasher */ IO_LEDFLSH = 0x40; @@ -50,8 +50,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c index ae5402e..7f8f47c 100644 --- a/board/innokom/innokom.c +++ b/board/innokom/innokom.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SHOW_BOOT_PROGRESS # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) #else @@ -95,8 +97,6 @@ int misc_init_r(void) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -116,8 +116,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/integratorap/integratorap.c b/board/integratorap/integratorap.c index d4f61d6..e659907 100644 --- a/board/integratorap/integratorap.c +++ b/board/integratorap/integratorap.c @@ -39,6 +39,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + void flash__init (void); void ether__init (void); void peripheral_power_enable (void); @@ -65,8 +67,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of Integrator Board */ gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR; @@ -480,8 +480,6 @@ void ether__init (void) ******************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/integratorcp/integratorcp.c b/board/integratorcp/integratorcp.c index 216876b..d6d6e13 100644 --- a/board/integratorcp/integratorcp.c +++ b/board/integratorcp/integratorcp.c @@ -35,6 +35,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + void flash__init (void); void ether__init (void); void peripheral_power_enable (void); @@ -54,8 +56,6 @@ void show_boot_progress(int progress) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of Integrator Board */ gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR; @@ -105,8 +105,6 @@ void ether__init (void) ******************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c index c04626a..aa96591 100644 --- a/board/ixdp425/ixdp425.c +++ b/board/ixdp425/ixdp425.c @@ -28,11 +28,7 @@ #include #include -/* ------------------------------------------------------------------------- */ - - -/* local prototypes */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -49,8 +45,6 @@ int board_post_init (void) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of IXDP */ gd->bd->bi_arch_number = MACH_TYPE_IXDP425; @@ -64,8 +58,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/kb9202/kb9202.c b/board/kb9202/kb9202.c index 4a7cf77..ec51dca 100644 --- a/board/kb9202/kb9202.c +++ b/board/kb9202/kb9202.c @@ -31,7 +31,8 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; + /* * Miscelaneous platform dependent initialisations */ @@ -42,8 +43,6 @@ void lowlevel_init(void) { int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Enable Ctrlc */ console_init_f (); @@ -60,8 +59,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; return 0; diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c index e621c43..4e377a1 100644 --- a/board/kup/kup4k/kup4k.c +++ b/board/kup/kup4k/kup4k.c @@ -29,6 +29,8 @@ #include "s1d13706.h" #endif +DECLARE_GLOBAL_DATA_PTR; + #undef DEBUG #ifdef DEBUG # define debugk(fmt,args...) printf(fmt ,##args) @@ -44,10 +46,6 @@ typedef struct { /* ------------------------------------------------------------------------- */ -#if 0 -static long int dram_size (long int, long int *, long int); -#endif - #ifdef CONFIG_KUP4K_LOGO void lcd_logo(bd_t *bd); #endif @@ -235,62 +233,8 @@ long int initdram (int board_type) /* ------------------------------------------------------------------------- */ -/* - * Check memory range for valid RAM. A simple memory test determines - * the actually available RAM size between addresses `base' and - * `base + maxsize'. Some (not all) hardware errors are detected: - * - short between address lines - * - short between data lines - */ -#if 0 -static long int dram_size (long int mamr_value, long int *base, - long int maxsize) -{ - volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - volatile long int *addr; - ulong cnt, val; - ulong save[32]; /* to make test non-destructive */ - unsigned char i = 0; - - memctl->memc_mamr = mamr_value; - - for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) { - addr = base + cnt; /* pointer arith! */ - - save[i++] = *addr; - *addr = ~cnt; - } - - /* write 0 to base address */ - addr = base; - save[i] = *addr; - *addr = 0; - - /* check at base address */ - if ((val = *addr) != 0) { - *addr = save[i]; - return (0); - } - - for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) { - addr = base + cnt; /* pointer arith! */ - - val = *addr; - *addr = save[--i]; - - if (val != (~cnt)) { - return (cnt * sizeof (long)); - } - } - return (maxsize); -} -#endif - int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - #ifdef CONFIG_STATUS_LED volatile immap_t *immap = (immap_t *) CFG_IMMR; #endif diff --git a/board/lart/lart.c b/board/lart/lart.c index 66b730d..8d534c8 100644 --- a/board/lart/lart.c +++ b/board/lart/lart.c @@ -24,6 +24,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ @@ -33,8 +35,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -49,7 +49,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; bd->bi_dram[0].start = PHYS_SDRAM_1; diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c index 95634ac..14fd28f 100644 --- a/board/logodl/logodl.c +++ b/board/logodl/logodl.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /** * board_init: - setup some data structures * @@ -33,8 +35,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -57,8 +57,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/lpd7a40x/lpd7a40x.c b/board/lpd7a40x/lpd7a40x.c index 4c373ee..e12bbf0 100644 --- a/board/lpd7a40x/lpd7a40x.c +++ b/board/lpd7a40x/lpd7a40x.c @@ -37,14 +37,14 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* * Miscellaneous platform dependent initialisations */ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* set up the I/O ports */ /* enable flash programming */ @@ -74,8 +74,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/lubbock/lubbock.c b/board/lubbock/lubbock.c index e618ab9..5829170 100644 --- a/board/lubbock/lubbock.c +++ b/board/lubbock/lubbock.c @@ -27,8 +27,7 @@ #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -36,8 +35,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -60,8 +57,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c index a174b57..9e8ea2d 100644 --- a/board/lwmon/lwmon.c +++ b/board/lwmon/lwmon.c @@ -45,6 +45,8 @@ V* Verification: dzu@denx.de #include #include /* for strdup */ +DECLARE_GLOBAL_DATA_PTR; + /*------------------------ Local prototypes ---------------------------*/ static long int dram_size (long int, long int *, long int); static void kbd_init (void); @@ -455,8 +457,6 @@ Z* for the lwmon board. ***********************************************************************/ int board_postclk_init (void) { - DECLARE_GLOBAL_DATA_PTR; - kbd_init(); #ifdef CONFIG_MODEM_SUPPORT @@ -471,15 +471,11 @@ int board_postclk_init (void) struct serial_device * default_serial_console (void) { - DECLARE_GLOBAL_DATA_PTR; - return gd->do_mdm_init ? &serial_scc_device : &serial_smc_device; } static void kbd_init (void) { - DECLARE_GLOBAL_DATA_PTR; - uchar kbd_data[KEYBD_DATALEN]; uchar tmp_data[KEYBD_DATALEN]; uchar val, errcd; @@ -571,8 +567,6 @@ V* Verification: dzu@denx.de ***********************************************************************/ int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - uchar kbd_data[KEYBD_DATALEN]; char keybd_env[2 * KEYBD_DATALEN + 1]; uchar kbd_init_status = gd->kbd_status >> 8; diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c index d1c99fd..456411d 100644 --- a/board/mcc200/mcc200.c +++ b/board/mcc200/mcc200.c @@ -30,6 +30,8 @@ #include "mt48lc8m32b2-6-7.h" +DECLARE_GLOBAL_DATA_PTR; + extern flash_info_t flash_info[]; /* FLASH chips info */ ulong flash_get_size (ulong base, int banknum); @@ -190,8 +192,6 @@ int checkboard (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* * Adjust flash start and offset to detected values */ diff --git a/board/ml2/serial.c b/board/ml2/serial.c index 92baba9..74687f1 100644 --- a/board/ml2/serial.c +++ b/board/ml2/serial.c @@ -29,70 +29,59 @@ #include #endif -#if 0 -#include "serial.h" -#endif +DECLARE_GLOBAL_DATA_PTR; #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1, - (NS16550_t) CFG_NS16550_COM2 }; + (NS16550_t) CFG_NS16550_COM2 +}; #endif -int -serial_init (void) +int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; + int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; #ifdef CFG_INIT_CHAN1 - (void)NS16550_init(COM_PORTS[0], clock_divisor); + (void) NS16550_init (COM_PORTS[0], clock_divisor); #endif #ifdef CFG_INIT_CHAN2 - (void)NS16550_init(COM_PORTS[1], clock_divisor); + (void) NS16550_init (COM_PORTS[1], clock_divisor); #endif - return 0; + return 0; } -void -serial_putc(const char c) +void serial_putc (const char c) { - if (c == '\n') - NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r'); + if (c == '\n') + NS16550_putc (COM_PORTS[CFG_DUART_CHAN], '\r'); - NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c); + NS16550_putc (COM_PORTS[CFG_DUART_CHAN], c); } -int -serial_getc(void) +int serial_getc (void) { - return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]); + return NS16550_getc (COM_PORTS[CFG_DUART_CHAN]); } -int -serial_tstc(void) +int serial_tstc (void) { - return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]); + return NS16550_tstc (COM_PORTS[CFG_DUART_CHAN]); } -void -serial_setbrg (void) +void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - - int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; + int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate; #ifdef CFG_INIT_CHAN1 - NS16550_reinit(COM_PORTS[0], clock_divisor); + NS16550_reinit (COM_PORTS[0], clock_divisor); #endif #ifdef CFG_INIT_CHAN2 - NS16550_reinit(COM_PORTS[1], clock_divisor); + NS16550_reinit (COM_PORTS[1], clock_divisor); #endif } -void -serial_puts (const char *s) +void serial_puts (const char *s) { while (*s) { serial_putc (*s++); @@ -100,32 +89,27 @@ serial_puts (const char *s) } #if (CONFIG_COMMANDS & CFG_CMD_KGDB) -void -kgdb_serial_init(void) +void kgdb_serial_init (void) { } -void -putDebugChar (int c) +void putDebugChar (int c) { serial_putc (c); } -void -putDebugStr (const char *str) +void putDebugStr (const char *str) { serial_puts (str); } -int -getDebugChar (void) +int getDebugChar (void) { - return serial_getc(); + return serial_getc (); } -void -kgdb_interruptible (int yes) +void kgdb_interruptible (int yes) { return; } -#endif /* CFG_CMD_KGDB */ +#endif /* CFG_CMD_KGDB */ diff --git a/board/modnet50/modnet50.c b/board/modnet50/modnet50.c index 448c623..4544069 100644 --- a/board/modnet50/modnet50.c +++ b/board/modnet50/modnet50.c @@ -24,8 +24,7 @@ #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -33,7 +32,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; /* address for the kernel command line */ gd->bd->bi_boot_params = 0x800; return 0; @@ -41,7 +39,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; if (CONFIG_NR_DRAM_BANKS == 2) { diff --git a/board/mp2usb/mp2usb.c b/board/mp2usb/mp2usb.c index e75be1e..486d44c 100644 --- a/board/mp2usb/mp2usb.c +++ b/board/mp2usb/mp2usb.c @@ -31,15 +31,14 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; + /* * Miscelaneous platform dependent initialisations */ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Enable Ctrlc */ console_init_f (); @@ -56,8 +55,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; return 0; diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c index 505acbc..9841298 100644 --- a/board/mpc8349ads/mpc8349ads.c +++ b/board/mpc8349ads/mpc8349ads.c @@ -64,7 +64,7 @@ long int initdram (int board_type) /* DDR SDRAM - Main SODIMM */ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR; #if defined(CONFIG_SPD_EEPROM) - msize = spd_sdram(NULL); + msize = spd_sdram(); #else msize = fixed_sdram(); #endif diff --git a/board/mpc8349ads/pci.c b/board/mpc8349ads/pci.c index c559424..319e35c 100644 --- a/board/mpc8349ads/pci.c +++ b/board/mpc8349ads/pci.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_PCI /* System RAM mapped to PCI space */ @@ -127,7 +129,6 @@ pib_init(void) void pci_init_board(void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t * immr; volatile clk8349_t * clk; volatile law8349_t * pci_law; diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c index b331d6e..06d021a 100644 --- a/board/mpl/common/common_util.c +++ b/board/mpl/common/common_util.c @@ -42,6 +42,9 @@ #include "../mip405/mip405.h" #include <405gp_pci.h> #endif + +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_PATI) #define FIRM_START 0xFFF00000 #endif @@ -584,7 +587,6 @@ extern int get_boot_mode(void); void video_get_info_str (int line_number, char *info) { /* init video info strings for graphic console */ - DECLARE_GLOBAL_DATA_PTR; PPC405_SYS_INFO sys_info; char rev; int i,boot; diff --git a/board/mpl/common/memtst.c b/board/mpl/common/memtst.c index 2c77d37..ff1190a 100644 --- a/board/mpl/common/memtst.c +++ b/board/mpl/common/memtst.c @@ -50,13 +50,15 @@ int testdram (void) #include #include <405gp_i2c.h> +DECLARE_GLOBAL_DATA_PTR; + #define FALSE 0 #define TRUE 1 -#define TEST_QUIET 8 +#define TEST_QUIET 8 #define TEST_SHOW_PROG 4 #define TEST_SHOW_ERR 2 -#define TEST_SHOW_ALL 1 +#define TEST_SHOW_ALL 1 #define TESTPAT1 0xAA55AA55 #define TESTPAT2 0x55AA55AA @@ -468,7 +470,6 @@ static RAM_MEMTEST_FUNC test_stage[TEST_STAGES] = { void mem_test_reloc(void) { - DECLARE_GLOBAL_DATA_PTR; unsigned long addr; int i; for (i=0; i< TEST_STAGES; i++) { diff --git a/board/mpl/common/pci.c b/board/mpl/common/pci.c index 692930b..bde14be 100644 --- a/board/mpl/common/pci.c +++ b/board/mpl/common/pci.c @@ -32,7 +32,7 @@ #ifdef CONFIG_405GP #ifdef CONFIG_PCI -#undef DEBUG +DECLARE_GLOBAL_DATA_PTR; #include "piix4_pci.h" #include "pci_parts.h" @@ -94,7 +94,6 @@ static struct pci_controller hose = { static void reloc_pci_cfg_table(struct pci_config_table *table) { - DECLARE_GLOBAL_DATA_PTR; unsigned long addr; for (; table && table->vendor; table++) { diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 9c469b0..34f3289 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -70,6 +70,9 @@ #include "../common/common_util.h" #include #include + +DECLARE_GLOBAL_DATA_PTR; + extern block_dev_desc_t * scsi_get_dev(int dev); extern block_dev_desc_t * ide_get_dev(int dev); @@ -189,8 +192,6 @@ const sdram_t sdram_table[] = { void SDRAM_err (const char *s) { #ifndef SDRAM_DEBUG - DECLARE_GLOBAL_DATA_PTR; - (void) get_clocks (); gd->baudrate = 9600; serial_init (); @@ -241,8 +242,6 @@ void write_4hex (unsigned long val) int init_sdram (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long tmp, baseaddr; unsigned short i; unsigned char trp_clocks, @@ -681,7 +680,6 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */ int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; /* adjust flash start and size as well as the offset */ gd->bd->bi_flashstart=0-flash_info[0].size; gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN; diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index a398362..3828608 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -31,6 +31,8 @@ #include "../common/isa.h" #include "../common/common_util.h" +DECLARE_GLOBAL_DATA_PTR; + #undef SDRAM_DEBUG #define FALSE 0 @@ -134,8 +136,6 @@ unsigned short NSto10PS (unsigned char spd_byte) void SDRAM_err (const char *s) { #ifndef SDRAM_DEBUG - DECLARE_GLOBAL_DATA_PTR; - (void) get_clocks (); gd->baudrate = 9600; serial_init (); @@ -191,9 +191,6 @@ int board_early_init_f (void) trc_clocks, tctp_clocks; unsigned char cal_index, cal_val, spd_version, spd_chksum; unsigned char buf[8]; -#ifdef SDRAM_DEBUG - DECLARE_GLOBAL_DATA_PTR; -#endif /* set up the config port */ mtdcr (ebccfga, pb7ap); mtdcr (ebccfgd, CONFIG_PORT_AP); @@ -613,8 +610,6 @@ static int test_dram (unsigned long ramsize); long int initdram (int board_type) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long bank_reg[4], tmp, bank_size; int i, ds; unsigned long TotalSize; @@ -666,7 +661,6 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */ int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; /* adjust flash start and size as well as the offset */ gd->bd->bi_flashstart=0-flash_info[0].size; gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN; diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c index ffdba5d..0d2003d 100644 --- a/board/mpl/vcma9/vcma9.c +++ b/board/mpl/vcma9/vcma9.c @@ -32,7 +32,7 @@ #include "vcma9.h" #include "../common/common_util.h" -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #define FCLK_SPEED 1 @@ -71,7 +71,6 @@ static inline void delay(unsigned long loops) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); @@ -275,8 +274,6 @@ static void Show_VCMA9_Info(char *board_name, char *serial) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr(); diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c index 20a551d..ee8f3e3 100644 --- a/board/mvblue/mvblue.c +++ b/board/mvblue/mvblue.c @@ -14,6 +14,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + u32 get_BoardType (void); #define PCI_CONFIG(b,d,f,r) cpu_to_le32(0x80000000 | ((b&0xff)<<16) \ @@ -50,7 +52,6 @@ void hw_watchdog_reset (void) } int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; ulong busfreq = get_bus_freq (0); char buf[32]; u32 BoardType = get_BoardType (); diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c index 5c33ba3..913f95c 100644 --- a/board/mx1ads/mx1ads.c +++ b/board/mx1ads/mx1ads.c @@ -27,7 +27,7 @@ /*#include */ #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #define FCLK_SPEED 1 @@ -55,10 +55,11 @@ #if 0 -static inline void delay (unsigned long loops) { +static inline void delay (unsigned long loops) +{ __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); + "subs %0, %1, #1\n" + "bne 1b":"=r" (loops):"0" (loops)); } #endif @@ -67,62 +68,58 @@ static inline void delay (unsigned long loops) { * Miscellaneous platform dependent initialisations */ -void SetAsynchMode(void) { - __asm__ ( - "mrc p15,0,r0,c1,c0,0 \n" - "mov r2, #0xC0000000 \n" - "orr r0,r2,r0 \n" - "mcr p15,0,r0,c1,c0,0 \n" - ); +void SetAsynchMode (void) +{ + __asm__ ("mrc p15,0,r0,c1,c0,0 \n" + "mov r2, #0xC0000000 \n" + "orr r0,r2,r0 \n" "mcr p15,0,r0,c1,c0,0 \n"); } static u32 mc9328sid; -int board_init (void) { +int board_init (void) +{ + volatile unsigned int tmp; - DECLARE_GLOBAL_DATA_PTR; + mc9328sid = SIDR; - volatile unsigned int tmp; + GPCR = 0x000003AB; /* I/O pad driving strength */ - mc9328sid = SIDR; - - GPCR = 0x000003AB; /* I/O pad driving strength */ - -/* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */ + /* MX1_CS1U = 0x00000A00; *//* SRAM initialization */ /* MX1_CS1L = 0x11110601; */ - MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ + MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ /* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and * BCLK divider to 2 (i.e. BCLK to 48 MHz) */ - CSCR = 0xAF000403; + CSCR = 0xAF000403; - CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */ - CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */ + CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */ + CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */ /* setup cs4 for cs8900 ethernet */ - CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */ - CS4L = 0x00001501; + CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */ + CS4L = 0x00001501; - GIUS(0) &= 0xFF3FFFFF; - GPR(0) &= 0xFF3FFFFF; + GIUS (0) &= 0xFF3FFFFF; + GPR (0) &= 0xFF3FFFFF; - tmp = *(unsigned int *)(0x1500000C); - tmp = *(unsigned int *)(0x1500000C); + tmp = *(unsigned int *) (0x1500000C); + tmp = *(unsigned int *) (0x1500000C); - SetAsynchMode(); + SetAsynchMode (); gd->bd->bi_arch_number = MACH_TYPE_MX1ADS; - gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ - icache_enable(); - dcache_enable(); + icache_enable (); + dcache_enable (); /* set PERCLKs */ - PCDR = 0x00000055; /* set PERCLKS */ + PCDR = 0x00000055; /* set PERCLKS */ /* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes * PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place @@ -135,34 +132,38 @@ int board_init (void) { return 0; } -int board_late_init(void) { - - setenv("stdout", "serial"); - setenv("stderr", "serial"); - - switch (mc9328sid) { - case 0x0005901d : - printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n",mc9328sid); - break; - case 0x04d4c01d : - printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n",mc9328sid); - break; - case 0x00d4c01d : - printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n",mc9328sid); - break; - - default : - printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n",mc9328sid); - break; +int board_late_init (void) +{ + + setenv ("stdout", "serial"); + setenv ("stderr", "serial"); + + switch (mc9328sid) { + case 0x0005901d: + printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n", + mc9328sid); + break; + case 0x04d4c01d: + printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n", + mc9328sid); + break; + case 0x00d4c01d: + printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n", + mc9328sid); + break; + + default: + printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n", + mc9328sid); + break; } return 0; } -int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - +int dram_init (void) +{ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; return 0; } diff --git a/board/mx1fs2/mx1fs2.c b/board/mx1fs2/mx1fs2.c index 9e7a06c..1c026f0 100644 --- a/board/mx1fs2/mx1fs2.c +++ b/board/mx1fs2/mx1fs2.c @@ -19,9 +19,10 @@ */ #include - #include +DECLARE_GLOBAL_DATA_PTR; + #define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) extern void imx_gpio_mode(int gpio_mode); @@ -79,8 +80,6 @@ static void logo_init(void) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_arch_number = MACH_TYPE_MX1FS2; gd->bd->bi_boot_params = 0x08000100; serial_init(); @@ -91,8 +90,6 @@ serial_init(); int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - #if ( CONFIG_NR_DRAM_BANKS > 0 ) gd->bd->bi_dram[0].start = MX1FS2_SDRAM_1; gd->bd->bi_dram[0].size = MX1FS2_SDRAM_1_SIZE; diff --git a/board/nc650/flash.c b/board/nc650/flash.c index ce2f83b..8d7c172 100644 --- a/board/nc650/flash.c +++ b/board/nc650/flash.c @@ -32,6 +32,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifndef CFG_OR_TIMING_FLASH_AT_50MHZ #define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \ OR_SCY_2_CLK | OR_EHTR | OR_BI) @@ -95,8 +97,6 @@ unsigned long flash_init (void) #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ int scy, trlx, flash_or_timing, clk_diff; - DECLARE_GLOBAL_DATA_PTR; - scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4; if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) { trlx = OR_TRLX; diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c index 62615e5..4b7eba1 100644 --- a/board/netstar/netstar.c +++ b/board/netstar/netstar.c @@ -22,10 +22,10 @@ #include +DECLARE_GLOBAL_DATA_PTR; + int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of NetStar board */ /* TODO: use define from asm/mach-types.h */ gd->bd->bi_arch_number = 692; @@ -38,8 +38,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/ns9750dev/ns9750dev.c b/board/ns9750dev/ns9750dev.c index ea00d5a..1dd348a 100644 --- a/board/ns9750dev/ns9750dev.c +++ b/board/ns9750dev/ns9750dev.c @@ -41,6 +41,8 @@ # include <./ns9750_bbus.h> #endif +DECLARE_GLOBAL_DATA_PTR; + void flash__init( void ); void ether__init( void ); @@ -60,8 +62,6 @@ static inline void delay( unsigned long loops ) int board_init( void ) { - DECLARE_GLOBAL_DATA_PTR; - /* Active BBUS modules */ *get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0; @@ -114,8 +114,6 @@ void ether__init (void) ******************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c index 65d45c1..4a426ec 100644 --- a/board/nx823/nx823.c +++ b/board/nx823/nx823.c @@ -28,12 +28,10 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; static long int dram_size (long int, long int *, long int); -/* ------------------------------------------------------------------------- */ - #define _NOT_USED_ 0xFFFFFFFF const uint sdram_table[] = { @@ -366,8 +364,6 @@ u_long *my_sernum; int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - char tmp[50]; u_char *e = gd->bd->bi_enetaddr; @@ -387,8 +383,6 @@ int misc_init_r (void) void load_sernum_ethaddr (void) { - DECLARE_GLOBAL_DATA_PTR; - int i; bd_t *bd = gd->bd; diff --git a/board/omap1510inn/omap1510innovator.c b/board/omap1510inn/omap1510innovator.c index f037f42..8941209 100644 --- a/board/omap1510inn/omap1510innovator.c +++ b/board/omap1510inn/omap1510innovator.c @@ -31,6 +31,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + static void flash__init (void); static void ether__init (void); @@ -47,8 +49,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of OMAP 1510-Board */ gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR; @@ -122,8 +122,6 @@ static void ether__init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/omap1610inn/omap1610innovator.c b/board/omap1610inn/omap1610innovator.c index 7842518..8dbe686 100644 --- a/board/omap1610inn/omap1610innovator.c +++ b/board/omap1610inn/omap1610innovator.c @@ -36,6 +36,8 @@ #include <./configs/omap1510.h> #endif +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_CS_AUTOBOOT unsigned long omap_flash_base; #endif @@ -60,8 +62,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - if (machine_is_omap_h2()) gd->bd->bi_arch_number = MACH_TYPE_OMAP_H2; else if (machine_is_omap_innovator()) @@ -153,8 +153,6 @@ void ether__init (void) ******************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/omap2420h4/omap2420h4.c b/board/omap2420h4/omap2420h4.c index 2387176..f7f75e0 100644 --- a/board/omap2420h4/omap2420h4.c +++ b/board/omap2420h4/omap2420h4.c @@ -36,7 +36,9 @@ extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; #endif - void wait_for_command_complete(unsigned int wd_base); +DECLARE_GLOBAL_DATA_PTR; + +void wait_for_command_complete(unsigned int wd_base); /******************************************************* * Routine: delay @@ -54,8 +56,6 @@ static inline void delay (unsigned long loops) *****************************************/ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gpmc_init(); /* in SRAM or SDRM, finish GPMC */ gd->bd->bi_arch_number = MACH_TYPE_OMAP_H4; /* board id for linux */ @@ -195,7 +195,6 @@ void ether_init (void) **********************************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned int size0=0,size1=0; u32 mtype, btype, rev, cpu; u8 chg_on = 0x5; /* enable charge of back up battery */ diff --git a/board/omap5912osk/omap5912osk.c b/board/omap5912osk/omap5912osk.c index 1faa084..e9e6b0e 100644 --- a/board/omap5912osk/omap5912osk.c +++ b/board/omap5912osk/omap5912osk.c @@ -38,6 +38,8 @@ #include <./configs/omap1510.h> #endif +DECLARE_GLOBAL_DATA_PTR; + void flash__init (void); void ether__init (void); void set_muxconf_regs (void); @@ -58,8 +60,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK; /* adress of boot parameters */ @@ -136,8 +136,6 @@ void ether__init (void) ******************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/omap730p2/omap730p2.c b/board/omap730p2/omap730p2.c index 256c6a6..309d667 100644 --- a/board/omap730p2/omap730p2.c +++ b/board/omap730p2/omap730p2.c @@ -34,6 +34,8 @@ #include <./configs/omap730.h> #endif +DECLARE_GLOBAL_DATA_PTR; + int test_boot_mode(void); void spin_up_leds(void); void flash__init (void); @@ -84,8 +86,6 @@ void toggle_backup_led(void) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of OMAP 730 P2 Board - Same as the Innovator! */ gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2; @@ -180,8 +180,6 @@ void ether__init (void) ******************************/ int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/oxc/oxc.c b/board/oxc/oxc.c index fa7ff02..6cc3cc5 100644 --- a/board/oxc/oxc.c +++ b/board/oxc/oxc.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkboard (void) { puts ( "Board: OXC8240\n" ); @@ -184,8 +186,6 @@ int misc_init_r (void) #ifdef CFG_OXC_GENERATE_IP { - DECLARE_GLOBAL_DATA_PTR; - char str[32]; unsigned long ip = CFG_OXC_IPMASK; bd_t *bd = gd->bd; diff --git a/board/pcippc2/fpga_serial.c b/board/pcippc2/fpga_serial.c index 579bfc7..5f89d9b 100644 --- a/board/pcippc2/fpga_serial.c +++ b/board/pcippc2/fpga_serial.c @@ -29,6 +29,8 @@ #include "hardware.h" #include "pcippc2.h" +DECLARE_GLOBAL_DATA_PTR; + /* 8 data, 1 stop, no parity */ #define LCRVAL 0x03 @@ -92,8 +94,6 @@ int fpga_serial_tstc (void) void fpga_serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - int clock_divisor = 115200 / gd->baudrate; fpga_serial_wait (); diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c index 231b505..a216c55 100644 --- a/board/pcippc2/pcippc2.c +++ b/board/pcippc2/pcippc2.c @@ -34,6 +34,8 @@ #include "sconsole.h" #include "fpga_serial.h" +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_WATCHDOG) static int pcippc2_wdt_init_done = 0; @@ -108,8 +110,6 @@ int board_early_init_f (void) void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; - /* Jump to the main U-Boot board init code */ board_init_r ((gd_t *)gd, dest_addr); diff --git a/board/pcippc2/sconsole.c b/board/pcippc2/sconsole.c index a9f2b29..3b19069 100644 --- a/board/pcippc2/sconsole.c +++ b/board/pcippc2/sconsole.c @@ -26,6 +26,8 @@ #include "sconsole.h" +DECLARE_GLOBAL_DATA_PTR; + void (*sconsole_putc) (char) = 0; void (*sconsole_puts) (const char *) = 0; int (*sconsole_getc) (void) = 0; @@ -34,8 +36,6 @@ void (*sconsole_setbrg) (void) = 0; int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - sconsole_buffer_t *sb = SCONSOLE_BUFFER; sb->pos = 0; @@ -104,8 +104,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - if (sconsole_setbrg) { (*sconsole_setbrg) (); } else { diff --git a/board/pleb2/pleb2.c b/board/pleb2/pleb2.c index ce9245c..dc6fac4 100644 --- a/board/pleb2/pleb2.c +++ b/board/pleb2/pleb2.c @@ -28,8 +28,7 @@ #include #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -37,8 +36,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -61,8 +58,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c index d4cc5cb..65c5291 100644 --- a/board/pm520/pm520.c +++ b/board/pm520/pm520.c @@ -34,6 +34,8 @@ #include "mt48lc16m16a2-75.h" #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CFG_RAMBOOT static void sdram_start (int hi_addr) { @@ -281,7 +283,6 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */ int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; /* adjust flash start */ gd->bd->bi_flashstart = flash_info[0].start[0]; return (0); diff --git a/board/pn62/pn62.c b/board/pn62/pn62.c index 377aaa8..b2f348d 100644 --- a/board/pn62/pn62.c +++ b/board/pn62/pn62.c @@ -26,6 +26,7 @@ #include "pn62.h" +DECLARE_GLOBAL_DATA_PTR; static int get_serial_number (char *string, int size); static int get_mac_address (int id, u8 * mac, char *string, int size); @@ -122,8 +123,6 @@ void pci_init_board (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - char str[20]; u8 mac[6]; diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c index d42a643..2f28e9d 100644 --- a/board/prodrive/p3p440/p3p440.c +++ b/board/prodrive/p3p440/p3p440.c @@ -29,6 +29,8 @@ #include "p3p440.h" +DECLARE_GLOBAL_DATA_PTR; + void set_led(int color) { switch (color) { @@ -141,8 +143,6 @@ int checkboard(void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - /* * Adjust flash start and offset to detected values */ @@ -206,8 +206,6 @@ int pci_pre_init(struct pci_controller *hose) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller *hose) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/pxa255_idp/pxa_idp.c b/board/pxa255_idp/pxa_idp.c index d5b993a..5765c55 100644 --- a/board/pxa255_idp/pxa_idp.c +++ b/board/pxa255_idp/pxa_idp.c @@ -33,8 +33,7 @@ #include #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -42,8 +41,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -86,8 +83,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/quantum/quantum.c b/board/quantum/quantum.c index 2861bc3..afa6e11 100644 --- a/board/quantum/quantum.c +++ b/board/quantum/quantum.c @@ -170,14 +170,14 @@ static long int dram_size (long int mamr_value, long int *base, memctl->memc_mamr = mamr_value; for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) { - addr = base + cnt; /* pointer arith! */ + addr = (volatile ulong *)(base + cnt); /* pointer arith! */ save[i++] = *addr; *addr = ~cnt; } /* write 0 to base address */ - addr = base; + addr = (volatile ulong *)base; save[i] = *addr; *addr = 0; @@ -194,7 +194,7 @@ static long int dram_size (long int mamr_value, long int *base, } for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) { - addr = base + cnt; /* pointer arith! */ + addr = (volatile ulong *)(base + cnt); /* pointer arith! */ val = *addr; *addr = save[--i]; diff --git a/board/rbc823/kbd.c b/board/rbc823/kbd.c index c27929d..6d530f6 100644 --- a/board/rbc823/kbd.c +++ b/board/rbc823/kbd.c @@ -33,6 +33,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define SMC_INDEX 0 #define PROFF_SMC PROFF_SMC1 #define CPM_CR_CH_SMC CPM_CR_CH_SMC1 @@ -46,8 +48,6 @@ void smc1_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c index ea4c65d..edb775d 100644 --- a/board/sacsng/clkinit.c +++ b/board/sacsng/clkinit.c @@ -30,6 +30,8 @@ #include "clkinit.h" +DECLARE_GLOBAL_DATA_PTR; + int Daq64xSampling = 0; @@ -257,7 +259,6 @@ void Daq_BRG_Set_ExtClk(uint brg, uint extc) uint Daq_BRG_Rate(uint brg) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immr = (immap_t *)CFG_IMMR; uint *brg_ptr; uint brg_cnt; @@ -295,7 +296,6 @@ uint Daq_Get_SampleRate(void) void Daq_Init_Clocks(int sample_rate, int sample_64x) { - DECLARE_GLOBAL_DATA_PTR; volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */); uint mclk_divisor; /* MCLK divisor */ int flag; /* Interrupt state */ diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c index 3530416..7816472 100644 --- a/board/sandburst/common/sb_common.c +++ b/board/sandburst/common/sb_common.c @@ -29,6 +29,8 @@ #include "ppc440gx_i2c.h" #include "sb_common.h" +DECLARE_GLOBAL_DATA_PTR; + long int fixed_sdram (void); /************************************************************************* @@ -203,7 +205,7 @@ long int initdram (int board_type) long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) - dram_size = spd_sdram (0); + dram_size = spd_sdram (); #else dram_size = fixed_sdram (); #endif @@ -341,8 +343,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/sbc405/sbc405.c b/board/sbc405/sbc405.c index cad5873..0ae6d0b 100644 --- a/board/sbc405/sbc405.c +++ b/board/sbc405/sbc405.c @@ -98,7 +98,7 @@ int checkboard (void) long int initdram (int board_type) { - return spd_sdram (0); + return spd_sdram (); } /* ------------------------------------------------------------------------- */ diff --git a/board/sbc8240/sbc8240.c b/board/sbc8240/sbc8240.c index a6d3bab..8a52f67 100644 --- a/board/sbc8240/sbc8240.c +++ b/board/sbc8240/sbc8240.c @@ -29,12 +29,12 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define BOARD_REV_REG 0xFE80002B int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char revision = *(volatile char *)(BOARD_REV_REG); char buf[32]; diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c index cd52324..b6add59 100644 --- a/board/sc520_cdp/sc520_cdp.c +++ b/board/sc520_cdp/sc520_cdp.c @@ -30,6 +30,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #undef SC520_CDP_DEBUG #ifdef SC520_CDP_DEBUG @@ -481,8 +483,6 @@ int pci_enable_legacy_video_ports(struct pci_controller *hose) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - init_sc520(); bus_init(); irq_init(); diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c index e7a7d51..ed226fd 100644 --- a/board/sc520_spunk/sc520_spunk.c +++ b/board/sc520_spunk/sc520_spunk.c @@ -29,9 +29,7 @@ #include #include - -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Theory: @@ -483,8 +481,6 @@ int pci_enable_legacy_video_ports(struct pci_controller *hose) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - init_sc520(); bus_init(); irq_init(); diff --git a/board/scb9328/scb9328.c b/board/scb9328/scb9328.c index 3ed8753..3f6831b 100644 --- a/board/scb9328/scb9328.c +++ b/board/scb9328/scb9328.c @@ -20,42 +20,41 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SHOW_BOOT_PROGRESS # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) #else # define SHOW_BOOT_PROGRESS(arg) #endif -int board_init( void ){ - DECLARE_GLOBAL_DATA_PTR; - - gd->bd->bi_arch_number = MACH_TYPE_SCB9328; - gd->bd->bi_boot_params = 0x08000100; +int board_init (void) +{ + gd->bd->bi_arch_number = MACH_TYPE_SCB9328; + gd->bd->bi_boot_params = 0x08000100; - return 0; + return 0; } -int dram_init( void ){ - DECLARE_GLOBAL_DATA_PTR; - +int dram_init (void) +{ #if ( CONFIG_NR_DRAM_BANKS > 0 ) - gd->bd->bi_dram[0].start = SCB9328_SDRAM_1; - gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE; + gd->bd->bi_dram[0].start = SCB9328_SDRAM_1; + gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE; #endif #if ( CONFIG_NR_DRAM_BANKS > 1 ) - gd->bd->bi_dram[1].start = SCB9328_SDRAM_2; - gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE; + gd->bd->bi_dram[1].start = SCB9328_SDRAM_2; + gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE; #endif #if ( CONFIG_NR_DRAM_BANKS > 2 ) - gd->bd->bi_dram[2].start = SCB9328_SDRAM_3; - gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE; + gd->bd->bi_dram[2].start = SCB9328_SDRAM_3; + gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE; #endif #if ( CONFIG_NR_DRAM_BANKS > 3 ) - gd->bd->bi_dram[3].start = SCB9328_SDRAM_4; - gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE; + gd->bd->bi_dram[3].start = SCB9328_SDRAM_4; + gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE; #endif - - return 0; + return 0; } /** diff --git a/board/shannon/shannon.c b/board/shannon/shannon.c index 0d9f146..8cd1fc3 100644 --- a/board/shannon/shannon.c +++ b/board/shannon/shannon.c @@ -24,8 +24,7 @@ #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -33,8 +32,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* but if we use InfernoLoader, we must do some inits here */ @@ -75,7 +72,6 @@ int dram_init (void) { #if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \ defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4) - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; #endif diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c index d20688d..8783aaf 100644 --- a/board/siemens/SCM/scm.c +++ b/board/siemens/SCM/scm.c @@ -27,6 +27,8 @@ #include "scm.h" +DECLARE_GLOBAL_DATA_PTR; + static void config_scoh_cs(void); extern int fpga_init(void); @@ -300,8 +302,6 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, */ int power_on_reset (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Test Reset Status Register */ return gd->reset_status & RSR_CSRS ? 0 : 1; } diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c index a25dffd..a4cb4dc 100644 --- a/board/sixnet/sixnet.c +++ b/board/sixnet/sixnet.c @@ -38,6 +38,8 @@ extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; #endif +DECLARE_GLOBAL_DATA_PTR; + #define ORMASK(size) ((-size) & OR_AM_MSK) static long ram_size(ulong *, long); @@ -256,8 +258,6 @@ int board_postclk_init (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; char* s; diff --git a/board/smdk2400/smdk2400.c b/board/smdk2400/smdk2400.c index cb70218..4d1f1a6 100644 --- a/board/smdk2400/smdk2400.c +++ b/board/smdk2400/smdk2400.c @@ -28,7 +28,7 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_MODEM_SUPPORT static int key_pressed(void); @@ -45,7 +45,6 @@ extern int do_mdm_init; /* defined in common/main.c */ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); @@ -94,8 +93,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c index 9623aef..802348d 100644 --- a/board/smdk2410/smdk2410.c +++ b/board/smdk2410/smdk2410.c @@ -28,7 +28,7 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #define FCLK_SPEED 1 @@ -67,7 +67,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); @@ -117,8 +116,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/stamp/stamp.c b/board/stamp/stamp.c index 3fe0134..7e3af20 100644 --- a/board/stamp/stamp.c +++ b/board/stamp/stamp.c @@ -29,6 +29,8 @@ #include #include "stamp.h" +DECLARE_GLOBAL_DATA_PTR; + #define STATUS_LED_OFF 0 #define STATUS_LED_ON 1 @@ -49,7 +51,6 @@ int checkboard (void) long int initdram (int board_type) { - DECLARE_GLOBAL_DATA_PTR; #ifdef DEBUG printf ("SDRAM attributes:\n"); printf (" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; " diff --git a/board/sx1/sx1.c b/board/sx1/sx1.c index e45f6ae..aaef76e 100644 --- a/board/sx1/sx1.c +++ b/board/sx1/sx1.c @@ -27,6 +27,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + static void flash__init (void); static void ether__init (void); @@ -43,8 +45,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of SX1 Board */ gd->bd->bi_arch_number = MACH_TYPE_SX1; @@ -116,8 +116,6 @@ static void ether__init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c index dada673..b5c12e3 100644 --- a/board/tqm834x/tqm834x.c +++ b/board/tqm834x/tqm834x.c @@ -32,6 +32,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define IOSYNC asm("eieio") #define ISYNC asm("isync") #define SYNC asm("sync") @@ -142,7 +144,6 @@ int checkboard (void) puts("Board: TQM834x\n"); #ifdef CONFIG_PCI - DECLARE_GLOBAL_DATA_PTR; volatile immap_t * immr; u32 w, f; diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c index c03b60d..69b9101 100644 --- a/board/tqm85xx/tqm85xx.c +++ b/board/tqm85xx/tqm85xx.c @@ -36,6 +36,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + extern flash_info_t flash_info[]; /* FLASH chips info */ void local_bus_init (void); @@ -257,7 +259,6 @@ int checkboard (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile ccsr_lbc_t *memctl = &immap->im_lbc; diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c index 97bb5c3..ab57ee5 100644 --- a/board/tqm8xx/flash.c +++ b/board/tqm8xx/flash.c @@ -31,6 +31,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) # ifndef CFG_OR_TIMING_FLASH_AT_50MHZ # define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \ @@ -63,8 +65,6 @@ unsigned long flash_init (void) #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ int scy, trlx, flash_or_timing, clk_diff; - DECLARE_GLOBAL_DATA_PTR; - scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4; if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) { trlx = OR_TRLX; diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c index 017bdf9..520bea8 100644 --- a/board/tqm8xx/tqm8xx.c +++ b/board/tqm8xx/tqm8xx.c @@ -31,12 +31,10 @@ #include #endif -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; static long int dram_size (long int, long int *, long int); -/* ------------------------------------------------------------------------- */ - #define _NOT_USED_ 0xFFFFFFFF const uint sdram_table[] = @@ -104,8 +102,6 @@ const uint sdram_table[] = int checkboard (void) { - DECLARE_GLOBAL_DATA_PTR; - char *s = getenv ("serial#"); puts ("Board: "); diff --git a/board/trab/memory.c b/board/trab/memory.c index 9104413..4097892 100644 --- a/board/trab/memory.c +++ b/board/trab/memory.c @@ -454,10 +454,11 @@ int memory_post_tests (unsigned long start, unsigned long size) } #if 0 +DECLARE_GLOBAL_DATA_PTR; + int memory_post_test (int flags) { int ret = 0; - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; unsigned long memsize = (bd->bi_memsize >= 256 << 20 ? 256 << 20 : bd->bi_memsize) - (1 << 20); diff --git a/board/trab/trab.c b/board/trab/trab.c index e8dfd2c..868a899 100644 --- a/board/trab/trab.c +++ b/board/trab/trab.c @@ -28,7 +28,7 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #ifdef CFG_BRIGHTNESS static void spi_init(void); @@ -52,8 +52,6 @@ extern int do_mdm_init; /* defined in common/main.c */ #define KBD_MDELAY 5000 static void udelay_no_timer (int usec) { - DECLARE_GLOBAL_DATA_PTR; - int i; int delay = usec * 3; @@ -70,7 +68,6 @@ int board_init () #if defined(CONFIG_VFD) extern int vfd_init_clocks(void); #endif - DECLARE_GLOBAL_DATA_PTR; S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); @@ -141,8 +138,6 @@ int board_init () int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; return 0; diff --git a/board/trab/vfd.c b/board/trab/vfd.c index f510ee5..cea8b0b 100644 --- a/board/trab/vfd.c +++ b/board/trab/vfd.c @@ -39,6 +39,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_VFD /************************************************************************/ @@ -86,7 +88,6 @@ unsigned char bit_vfd_table[112][18][2][4][2]; */ void init_grid_ctrl(void) { - DECLARE_GLOBAL_DATA_PTR; ulong adr, grid_cycle; unsigned int bit, display; unsigned char temp, bit_nr; @@ -172,7 +173,6 @@ void init_grid_ctrl(void) */ void create_vfd_table(void) { - DECLARE_GLOBAL_DATA_PTR; unsigned long vfd_table[112][18][2][4][2]; unsigned int x, y, color, display, entry, pixel; unsigned int x_abcdef = 0; @@ -280,7 +280,6 @@ void set_vfd_pixel(unsigned char x, unsigned char y, unsigned char color, unsigned char display, unsigned char value) { - DECLARE_GLOBAL_DATA_PTR; ulong adr; unsigned char bit_nr, temp; @@ -435,8 +434,6 @@ int drv_vfd_init(void) static int vfd_init_done = 0; int vfd_inv_data = 0; - DECLARE_GLOBAL_DATA_PTR; - if (vfd_init_done != 0) return (0); vfd_init_done = 1; diff --git a/board/versatile/versatile.c b/board/versatile/versatile.c index 0274027..9d1a25e 100644 --- a/board/versatile/versatile.c +++ b/board/versatile/versatile.c @@ -35,6 +35,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + void flash__init (void); void ether__init (void); void peripheral_power_enable (void); @@ -61,9 +63,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - - /* * set clock frequency: * VERSATILE_REFCLK is 32KHz diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c index 7a2d243..04093d1 100644 --- a/board/voiceblue/voiceblue.c +++ b/board/voiceblue/voiceblue.c @@ -21,10 +21,10 @@ #include +DECLARE_GLOBAL_DATA_PTR; + int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - *((volatile unsigned char *) VOICEBLUE_LED_REG) = 0xaa; /* arch number of VoiceBlue board */ @@ -39,8 +39,6 @@ int board_init(void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - *((volatile unsigned short *) VOICEBLUE_LED_REG) = 0xff; /* Take the Ethernet controller out of reset and wait diff --git a/board/wepep250/wepep250.c b/board/wepep250/wepep250.c index 56cb855..fe4b6a9 100644 --- a/board/wepep250/wepep250.c +++ b/board/wepep250/wepep250.c @@ -23,45 +23,45 @@ #include #include -int board_init( void ){ - DECLARE_GLOBAL_DATA_PTR; +DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250; - gd->bd->bi_boot_params = 0xa0000000; +int board_init (void) +{ + gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250; + gd->bd->bi_boot_params = 0xa0000000; /* * Setup GPIO stuff to get serial working */ #if defined( CONFIG_FFUART ) - GPDR1 = 0x80; - GAFR1_L = 0x8010; + GPDR1 = 0x80; + GAFR1_L = 0x8010; #elif defined( CONFIG_BTUART ) - GPDR1 = 0x800; - GAFR1_L = 0x900000; + GPDR1 = 0x800; + GAFR1_L = 0x900000; #endif - PSSR = 0x20; + PSSR = 0x20; - return 0; + return 0; } -int dram_init( void ){ - DECLARE_GLOBAL_DATA_PTR; - +int dram_init (void) +{ #if ( CONFIG_NR_DRAM_BANKS > 0 ) - gd->bd->bi_dram[0].start = WEP_SDRAM_1; - gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE; + gd->bd->bi_dram[0].start = WEP_SDRAM_1; + gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE; #endif #if ( CONFIG_NR_DRAM_BANKS > 1 ) - gd->bd->bi_dram[1].start = WEP_SDRAM_2; - gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE; + gd->bd->bi_dram[1].start = WEP_SDRAM_2; + gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE; #endif #if ( CONFIG_NR_DRAM_BANKS > 2 ) - gd->bd->bi_dram[2].start = WEP_SDRAM_3; - gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE; + gd->bd->bi_dram[2].start = WEP_SDRAM_3; + gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE; #endif #if ( CONFIG_NR_DRAM_BANKS > 3 ) - gd->bd->bi_dram[3].start = WEP_SDRAM_4; - gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE; + gd->bd->bi_dram[3].start = WEP_SDRAM_4; + gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE; #endif - return 0; + return 0; } diff --git a/board/xaeniax/xaeniax.c b/board/xaeniax/xaeniax.c index 26fb312..9baa457 100644 --- a/board/xaeniax/xaeniax.c +++ b/board/xaeniax/xaeniax.c @@ -30,8 +30,7 @@ #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -39,8 +38,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -63,8 +60,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; /* gd->bd->bi_dram[1].start = PHYS_SDRAM_2;*/ diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c index 19bcc6f..c204b88 100644 --- a/board/xilinx/ml300/serial.c +++ b/board/xilinx/ml300/serial.c @@ -43,6 +43,8 @@ #include #include "xparameters.h" +DECLARE_GLOBAL_DATA_PTR; + #define USE_CHAN1 \ ((defined XPAR_UARTNS550_0_BASEADDR) && (defined CFG_INIT_CHAN1)) #define USE_CHAN2 \ @@ -64,7 +66,6 @@ int serial_init(void) { #if USE_CHAN1 - DECLARE_GLOBAL_DATA_PTR; int clock_divisor; clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate; @@ -103,7 +104,6 @@ void serial_setbrg(void) { #if USE_CHAN1 - DECLARE_GLOBAL_DATA_PTR; int clock_divisor; clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate; diff --git a/board/xm250/xm250.c b/board/xm250/xm250.c index ef5e9da..528d323 100644 --- a/board/xm250/xm250.c +++ b/board/xm250/xm250.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* local prototypes */ @@ -61,7 +63,6 @@ int board_init (void) /**********************************************************/ { - DECLARE_GLOBAL_DATA_PTR; /* arch number of MicroSys XM250 */ gd->bd->bi_arch_number = MACH_TYPE_XM250; @@ -76,8 +77,6 @@ int dram_init (void) /**********************************************************/ { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c index bb36c96..a569b53 100644 --- a/board/xpedite1k/xpedite1k.c +++ b/board/xpedite1k/xpedite1k.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define BOOT_SMALL_FLASH 32 /* 00100000 */ #define FLASH_ONBD_N 2 /* 00000010 */ #define FLASH_SRAM_SEL 1 /* 00000001 */ @@ -107,7 +109,7 @@ long int initdram (int board_type) long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) - dram_size = spd_sdram (0); + dram_size = spd_sdram (); #else dram_size = fixed_sdram (); #endif @@ -238,8 +240,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/xsengine/xsengine.c b/board/xsengine/xsengine.c index a9919db..23d56c4 100644 --- a/board/xsengine/xsengine.c +++ b/board/xsengine/xsengine.c @@ -27,14 +27,14 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* * Miscelaneous platform dependent initialisations */ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -56,8 +56,6 @@ int board_post_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/zylonite/zylonite.c b/board/zylonite/zylonite.c index e618ab9..5829170 100644 --- a/board/zylonite/zylonite.c +++ b/board/zylonite/zylonite.c @@ -27,8 +27,7 @@ #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -36,8 +35,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ @@ -60,8 +57,6 @@ int board_late_init(void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 40e28dd..04fa4fa 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -28,6 +28,7 @@ #include #include /* for print_IPaddr */ +DECLARE_GLOBAL_DATA_PTR; #if (CONFIG_COMMANDS & CFG_CMD_BDI) static void print_num(const char *, ulong); @@ -39,8 +40,6 @@ static void print_str(const char *, const char *); int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - int i; bd_t *bd = gd->bd; char buf[32]; @@ -127,8 +126,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - int i; bd_t *bd = gd->bd; @@ -153,8 +150,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - int i; bd_t *bd = gd->bd; @@ -187,8 +182,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - int i; bd_t *bd = gd->bd; @@ -215,8 +208,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - int i; bd_t *bd = gd->bd; diff --git a/common/cmd_bedbug.c b/common/cmd_bedbug.c index cdb379d..48086a6 100644 --- a/common/cmd_bedbug.c +++ b/common/cmd_bedbug.c @@ -11,187 +11,183 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) #ifndef MAX #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif -extern void show_regs __P((struct pt_regs*)); -extern int run_command __P((const char*, int)); +extern void show_regs __P ((struct pt_regs *)); +extern int run_command __P ((const char *, int)); extern char console_buffer[]; -ulong dis_last_addr = 0; /* Last address disassembled */ -ulong dis_last_len = 20; /* Default disassembler length */ -CPU_DEBUG_CTX bug_ctx; /* Bedbug context structure */ - +ulong dis_last_addr = 0; /* Last address disassembled */ +ulong dis_last_len = 20; /* Default disassembler length */ +CPU_DEBUG_CTX bug_ctx; /* Bedbug context structure */ + /* ====================================================================== * U-Boot's puts function does not append a newline, so the bedbug stuff * will use this for the output of the dis/assembler. * ====================================================================== */ -int bedbug_puts(const char *str) +int bedbug_puts (const char *str) { - /* -------------------------------------------------- */ + /* -------------------------------------------------- */ - printf( "%s\r\n", str ); - return 0; -} /* bedbug_puts */ + printf ("%s\r\n", str); + return 0; +} /* bedbug_puts */ + - /* ====================================================================== * Initialize the bug_ctx structure used by the bedbug debugger. This is * specific to the CPU since each has different debug registers and * settings. * ====================================================================== */ -void bedbug_init( void ) +void bedbug_init (void) { - /* -------------------------------------------------- */ + /* -------------------------------------------------- */ #if defined(CONFIG_4xx) - void bedbug405_init( void ); - bedbug405_init(); + void bedbug405_init (void); + + bedbug405_init (); #elif defined(CONFIG_8xx) - void bedbug860_init( void ); - bedbug860_init(); + void bedbug860_init (void); + + bedbug860_init (); #endif #if defined(CONFIG_MPC824X) || defined(CONFIG_MPC8260) - /* Processors that are 603e core based */ - void bedbug603e_init( void ); + /* Processors that are 603e core based */ + void bedbug603e_init (void); - bedbug603e_init(); + bedbug603e_init (); #endif - return; -} /* bedbug_init */ + return; +} /* bedbug_init */ + - /* ====================================================================== * Entry point from the interpreter to the disassembler. Repeated calls * will resume from the last disassembled address. * ====================================================================== */ -int do_bedbug_dis (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - ulong addr; /* Address to start disassembly from */ - ulong len; /* # of instructions to disassemble */ - /* -------------------------------------------------- */ - - /* Setup to go from the last address if none is given */ - addr = dis_last_addr; - len = dis_last_len; - - if (argc < 2) - { - printf ("Usage:\n%s\n", cmdtp->usage); - return 1; - } - - if(( flag & CMD_FLAG_REPEAT ) == 0 ) - { - /* New command */ - addr = simple_strtoul( argv[1], NULL, 16 ); - - /* If an extra param is given then it is the length */ - if( argc > 2 ) - len = simple_strtoul( argv[2], NULL, 16 ); - } - - /* Run the disassembler */ - disppc( (unsigned char *)addr, 0, len, bedbug_puts, F_RADHEX ); - - dis_last_addr = addr + (len * 4); - dis_last_len = len; - return 0; -} /* do_bedbug_dis */ -U_BOOT_CMD( - ds, 3, 1, do_bedbug_dis, - "ds - disassemble memory\n", - "ds
[# instructions]\n" -); + ulong addr; /* Address to start disassembly from */ + ulong len; /* # of instructions to disassemble */ + + /* -------------------------------------------------- */ + + /* Setup to go from the last address if none is given */ + addr = dis_last_addr; + len = dis_last_len; + + if (argc < 2) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + if ((flag & CMD_FLAG_REPEAT) == 0) { + /* New command */ + addr = simple_strtoul (argv[1], NULL, 16); + + /* If an extra param is given then it is the length */ + if (argc > 2) + len = simple_strtoul (argv[2], NULL, 16); + } + + /* Run the disassembler */ + disppc ((unsigned char *) addr, 0, len, bedbug_puts, F_RADHEX); + + dis_last_addr = addr + (len * 4); + dis_last_len = len; + return 0; +} /* do_bedbug_dis */ + +U_BOOT_CMD (ds, 3, 1, do_bedbug_dis, + "ds - disassemble memory\n", + "ds
[# instructions]\n"); /* ====================================================================== * Entry point from the interpreter to the assembler. Assembles * instructions in consecutive memory locations until a '.' (period) is * entered on a line by itself. * ====================================================================== */ -int do_bedbug_asm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - long mem_addr; /* Address to assemble into */ - unsigned long instr; /* Machine code for text */ - char prompt[ 15 ]; /* Prompt string for user input */ - int asm_err; /* Error code from the assembler*/ - /* -------------------------------------------------- */ - int rcode = 0; - - if (argc < 2) - { - printf ("Usage:\n%s\n", cmdtp->usage); - return 1; - } - - printf( "\nEnter '.' when done\n" ); - mem_addr = simple_strtoul( argv[ 1 ], NULL, 16 ); - - while( 1 ) - { - putc( '\n' ); - disppc( (unsigned char *)mem_addr, 0, 1, bedbug_puts, F_RADHEX ); - - sprintf( prompt, "%08lx: ", mem_addr ); - readline( prompt ); - - if( console_buffer[ 0 ] && strcmp( console_buffer, "." )) - { - if(( instr = asmppc( mem_addr, console_buffer, &asm_err )) != 0 ) - { - *(unsigned long *)mem_addr = instr; - mem_addr += 4; - } - else - { - printf( "*** Error: %s ***\n", asm_error_str( asm_err )); - rcode = 1; - } - } - else - { - break; - } - } - return rcode; -} /* do_bedbug_asm */ -U_BOOT_CMD( - as, 2, 0, do_bedbug_asm, - "as - assemble memory\n", - "as
\n" -); + long mem_addr; /* Address to assemble into */ + unsigned long instr; /* Machine code for text */ + char prompt[15]; /* Prompt string for user input */ + int asm_err; /* Error code from the assembler */ + + /* -------------------------------------------------- */ + int rcode = 0; + + if (argc < 2) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + printf ("\nEnter '.' when done\n"); + mem_addr = simple_strtoul (argv[1], NULL, 16); + + while (1) { + putc ('\n'); + disppc ((unsigned char *) mem_addr, 0, 1, bedbug_puts, + F_RADHEX); + + sprintf (prompt, "%08lx: ", mem_addr); + readline (prompt); + + if (console_buffer[0] && strcmp (console_buffer, ".")) { + if ((instr = + asmppc (mem_addr, console_buffer, + &asm_err)) != 0) { + *(unsigned long *) mem_addr = instr; + mem_addr += 4; + } else { + printf ("*** Error: %s ***\n", + asm_error_str (asm_err)); + rcode = 1; + } + } else { + break; + } + } + return rcode; +} /* do_bedbug_asm */ + +U_BOOT_CMD (as, 2, 0, do_bedbug_asm, + "as - assemble memory\n", "as
\n"); /* ====================================================================== * Used to set a break point from the interpreter. Simply calls into the * CPU-specific break point set routine. * ====================================================================== */ -int do_bedbug_break (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - /* -------------------------------------------------- */ - if( bug_ctx.do_break ) - (*bug_ctx.do_break)( cmdtp, flag, argc, argv ); - return 0; - -} /* do_bedbug_break */ -U_BOOT_CMD( - break, 3, 0, do_bedbug_break, - "break - set or clear a breakpoint\n", - " - Set or clear a breakpoint\n" - "break
- Break at an address\n" - "break off - Disable breakpoint.\n" - "break show - List breakpoints.\n" -); + /* -------------------------------------------------- */ + if (bug_ctx.do_break) + (*bug_ctx.do_break) (cmdtp, flag, argc, argv); + return 0; + +} /* do_bedbug_break */ + +U_BOOT_CMD (break, 3, 0, do_bedbug_break, + "break - set or clear a breakpoint\n", + " - Set or clear a breakpoint\n" + "break
- Break at an address\n" + "break off - Disable breakpoint.\n" + "break show - List breakpoints.\n"); /* ====================================================================== * Called from the debug interrupt routine. Simply calls the CPU-specific @@ -200,16 +196,16 @@ U_BOOT_CMD( void do_bedbug_breakpoint (struct pt_regs *regs) { - /* -------------------------------------------------- */ + /* -------------------------------------------------- */ - if( bug_ctx.break_isr ) - (*bug_ctx.break_isr)( regs ); + if (bug_ctx.break_isr) + (*bug_ctx.break_isr) (regs); - return; -} /* do_bedbug_breakpoint */ + return; +} /* do_bedbug_breakpoint */ + - /* ====================================================================== * Called from the CPU-specific breakpoint handling routine. Enter a * mini main loop until the stopped flag is cleared from the breakpoint @@ -218,81 +214,77 @@ void do_bedbug_breakpoint (struct pt_regs *regs) * This handles the parts of the debugger that are common to all CPU's. * ====================================================================== */ -void bedbug_main_loop( unsigned long addr, struct pt_regs *regs ) +void bedbug_main_loop (unsigned long addr, struct pt_regs *regs) { - int len; /* Length of command line */ - int flag; /* Command flags */ - int rc = 0; /* Result from run_command*/ - char prompt_str[ 20 ]; /* Prompt string */ - static char lastcommand[ CFG_CBSIZE ] = {0}; /* previous command */ - /* -------------------------------------------------- */ + int len; /* Length of command line */ + int flag; /* Command flags */ + int rc = 0; /* Result from run_command */ + char prompt_str[20]; /* Prompt string */ + static char lastcommand[CFG_CBSIZE] = { 0 }; /* previous command */ + /* -------------------------------------------------- */ - if( bug_ctx.clear ) - (*bug_ctx.clear)( bug_ctx.current_bp ); + if (bug_ctx.clear) + (*bug_ctx.clear) (bug_ctx.current_bp); - printf( "Breakpoint %d: ", bug_ctx.current_bp ); - disppc( (unsigned char *)addr, 0, 1, bedbug_puts, F_RADHEX ); + printf ("Breakpoint %d: ", bug_ctx.current_bp); + disppc ((unsigned char *) addr, 0, 1, bedbug_puts, F_RADHEX); - bug_ctx.stopped = 1; - bug_ctx.regs = regs; + bug_ctx.stopped = 1; + bug_ctx.regs = regs; - sprintf( prompt_str, "BEDBUG.%d =>", bug_ctx.current_bp ); + sprintf (prompt_str, "BEDBUG.%d =>", bug_ctx.current_bp); - /* A miniature main loop */ - while( bug_ctx.stopped ) - { - len = readline( prompt_str ); + /* A miniature main loop */ + while (bug_ctx.stopped) { + len = readline (prompt_str); - flag = 0; /* assume no special flags for now */ + flag = 0; /* assume no special flags for now */ - if (len > 0) - strcpy( lastcommand, console_buffer ); - else if( len == 0 ) - flag |= CMD_FLAG_REPEAT; + if (len > 0) + strcpy (lastcommand, console_buffer); + else if (len == 0) + flag |= CMD_FLAG_REPEAT; - if (len == -1) - printf ("\n"); - else - rc = run_command( lastcommand, flag ); + if (len == -1) + printf ("\n"); + else + rc = run_command (lastcommand, flag); - if (rc <= 0) { - /* invalid command or not repeatable, forget it */ - lastcommand[0] = 0; - } - } + if (rc <= 0) { + /* invalid command or not repeatable, forget it */ + lastcommand[0] = 0; + } + } - bug_ctx.regs = NULL; - bug_ctx.current_bp = 0; + bug_ctx.regs = NULL; + bug_ctx.current_bp = 0; - return; -} /* bedbug_main_loop */ + return; +} /* bedbug_main_loop */ + - /* ====================================================================== * Interpreter command to continue from a breakpoint. Just clears the * stopped flag in the context so that the breakpoint routine will * return. * ====================================================================== */ -int do_bedbug_continue (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - +int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - /* -------------------------------------------------- */ - - if( ! bug_ctx.stopped ) - { - printf( "Not at a breakpoint\n" ); - return 1; - } - - bug_ctx.stopped = 0; - return 0; -} /* do_bedbug_continue */ -U_BOOT_CMD( - continue, 1, 0, do_bedbug_continue, - "continue- continue from a breakpoint\n", - " - continue from a breakpoint.\n" -); + /* -------------------------------------------------- */ + + if (!bug_ctx.stopped) { + printf ("Not at a breakpoint\n"); + return 1; + } + + bug_ctx.stopped = 0; + return 0; +} /* do_bedbug_continue */ + +U_BOOT_CMD (continue, 1, 0, do_bedbug_continue, + "continue- continue from a breakpoint\n", + " - continue from a breakpoint.\n"); /* ====================================================================== * Interpreter command to continue to the next instruction, stepping into @@ -300,31 +292,30 @@ U_BOOT_CMD( * the address passes control to the CPU-specific set breakpoint routine * for the current breakpoint number. * ====================================================================== */ -int do_bedbug_step (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - unsigned long addr; /* Address to stop at */ - /* -------------------------------------------------- */ - - if( ! bug_ctx.stopped ) - { - printf( "Not at a breakpoint\n" ); - return 1; - } - - if( !find_next_address( (unsigned char *)&addr, FALSE, bug_ctx.regs )) - return 1; - - if( bug_ctx.set ) - (*bug_ctx.set)( bug_ctx.current_bp, addr ); - - bug_ctx.stopped = 0; - return 0; -} /* do_bedbug_step */ -U_BOOT_CMD( - step, 1, 1, do_bedbug_step, - "step - single step execution.\n", - " - single step execution.\n" -); + unsigned long addr; /* Address to stop at */ + + /* -------------------------------------------------- */ + + if (!bug_ctx.stopped) { + printf ("Not at a breakpoint\n"); + return 1; + } + + if (!find_next_address ((unsigned char *) &addr, FALSE, bug_ctx.regs)) + return 1; + + if (bug_ctx.set) + (*bug_ctx.set) (bug_ctx.current_bp, addr); + + bug_ctx.stopped = 0; + return 0; +} /* do_bedbug_step */ + +U_BOOT_CMD (step, 1, 1, do_bedbug_step, + "step - single step execution.\n", + " - single step execution.\n"); /* ====================================================================== * Interpreter command to continue to the next instruction, stepping over @@ -332,105 +323,97 @@ U_BOOT_CMD( * the address passes control to the CPU-specific set breakpoint routine * for the current breakpoint number. * ====================================================================== */ -int do_bedbug_next (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - unsigned long addr; /* Address to stop at */ - /* -------------------------------------------------- */ - - if( ! bug_ctx.stopped ) - { - printf( "Not at a breakpoint\n" ); - return 1; - } - - if( !find_next_address( (unsigned char *)&addr, TRUE, bug_ctx.regs )) - return 1; - - if( bug_ctx.set ) - (*bug_ctx.set)( bug_ctx.current_bp, addr ); - - bug_ctx.stopped = 0; - return 0; -} /* do_bedbug_next */ -U_BOOT_CMD( - next, 1, 1, do_bedbug_next, - "next - single step execution, stepping over subroutines.\n", - " - single step execution, stepping over subroutines.\n" -); + unsigned long addr; /* Address to stop at */ + + /* -------------------------------------------------- */ + + if (!bug_ctx.stopped) { + printf ("Not at a breakpoint\n"); + return 1; + } + + if (!find_next_address ((unsigned char *) &addr, TRUE, bug_ctx.regs)) + return 1; + + if (bug_ctx.set) + (*bug_ctx.set) (bug_ctx.current_bp, addr); + + bug_ctx.stopped = 0; + return 0; +} /* do_bedbug_next */ + +U_BOOT_CMD (next, 1, 1, do_bedbug_next, + "next - single step execution, stepping over subroutines.\n", + " - single step execution, stepping over subroutines.\n"); /* ====================================================================== * Interpreter command to print the current stack. This assumes an EABI * architecture, so it starts with GPR R1 and works back up the stack. * ====================================================================== */ -int do_bedbug_stack (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - - unsigned long sp; /* Stack pointer */ - unsigned long func; /* LR from stack */ - int depth; /* Stack iteration level */ - int skip = 1; /* Flag to skip the first entry */ - unsigned long top; /* Top of memory address */ - /* -------------------------------------------------- */ - - if( ! bug_ctx.stopped ) - { - printf( "Not at a breakpoint\n" ); - return 1; - } - - top = gd->bd->bi_memstart + gd->bd->bi_memsize; - depth = 0; - - printf( "Depth PC\n" ); - printf( "----- --------\n" ); - printf( "%5d %08lx\n", depth++, bug_ctx.regs->nip ); - - sp = bug_ctx.regs->gpr[ 1 ]; - func = *(unsigned long *)(sp+4); - - while(( func < top ) && ( sp < top )) - { - if( !skip ) - printf( "%5d %08lx\n", depth++, func ); - else - --skip; - - sp = *(unsigned long *)sp; - func = *(unsigned long *)(sp+4); - } - return 0; -} /* do_bedbug_stack */ -U_BOOT_CMD( - where, 1, 1, do_bedbug_stack, - "where - Print the running stack.\n", - " - Print the running stack.\n" -); + unsigned long sp; /* Stack pointer */ + unsigned long func; /* LR from stack */ + int depth; /* Stack iteration level */ + int skip = 1; /* Flag to skip the first entry */ + unsigned long top; /* Top of memory address */ + + /* -------------------------------------------------- */ + + if (!bug_ctx.stopped) { + printf ("Not at a breakpoint\n"); + return 1; + } + + top = gd->bd->bi_memstart + gd->bd->bi_memsize; + depth = 0; + + printf ("Depth PC\n"); + printf ("----- --------\n"); + printf ("%5d %08lx\n", depth++, bug_ctx.regs->nip); + + sp = bug_ctx.regs->gpr[1]; + func = *(unsigned long *) (sp + 4); + + while ((func < top) && (sp < top)) { + if (!skip) + printf ("%5d %08lx\n", depth++, func); + else + --skip; + + sp = *(unsigned long *) sp; + func = *(unsigned long *) (sp + 4); + } + return 0; +} /* do_bedbug_stack */ + +U_BOOT_CMD (where, 1, 1, do_bedbug_stack, + "where - Print the running stack.\n", + " - Print the running stack.\n"); /* ====================================================================== * Interpreter command to dump the registers. Calls the CPU-specific * show registers routine. * ====================================================================== */ -int do_bedbug_rdump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - /* -------------------------------------------------- */ - - if( ! bug_ctx.stopped ) - { - printf( "Not at a breakpoint\n" ); - return 1; - } - - show_regs( bug_ctx.regs ); - return 0; -} /* do_bedbug_rdump */ -U_BOOT_CMD( - rdump, 1, 1, do_bedbug_rdump, - "rdump - Show registers.\n", - " - Show registers.\n" -); + /* -------------------------------------------------- */ + + if (!bug_ctx.stopped) { + printf ("Not at a breakpoint\n"); + return 1; + } + + show_regs (bug_ctx.regs); + return 0; +} /* do_bedbug_rdump */ + +U_BOOT_CMD (rdump, 1, 1, do_bedbug_rdump, + "rdump - Show registers.\n", " - Show registers.\n"); /* ====================================================================== */ -#endif /* CFG_CMD_BEDBUG */ +#endif /* CFG_CMD_BEDBUG */ /* diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 5b58d4e..e68f16f 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -28,14 +28,12 @@ #include #include - -/* -------------------------------------------------------------------- */ +#if defined(CONFIG_I386) +DECLARE_GLOBAL_DATA_PTR; +#endif int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -#if defined(CONFIG_I386) - DECLARE_GLOBAL_DATA_PTR; -#endif ulong addr, rc; int rcode = 0; diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index aeb7842..fdf7180 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -38,6 +38,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); @@ -469,7 +471,6 @@ U_BOOT_CMD( static void fixup_silent_linux () { - DECLARE_GLOBAL_DATA_PTR; char buf[256], *start, *end; char *cmdline = getenv ("bootargs"); @@ -512,8 +513,6 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, ulong *len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; - ulong sp; ulong len, checksum; ulong initrd_start, initrd_end; @@ -856,8 +855,6 @@ do_bootm_netbsd (cmd_tbl_t *cmdtp, int flag, ulong *len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; - image_header_t *hdr = &header; void (*loader)(bd_t *, image_header_t *, char *, char *); @@ -941,7 +938,6 @@ do_bootm_artos (cmd_tbl_t *cmdtp, int flag, ulong *len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; ulong top; char *s, *cmdline; char **fwenv, **ss; @@ -1370,7 +1366,6 @@ static void do_bootm_rtems (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], ulong addr, ulong *len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; image_header_t *hdr = &header; void (*entry_point)(bd_t *); diff --git a/common/cmd_date.c b/common/cmd_date.c index a569d78..84932f7 100644 --- a/common/cmd_date.c +++ b/common/cmd_date.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if (CONFIG_COMMANDS & CFG_CMD_DATE) const char *weekdays[] = { @@ -40,7 +42,6 @@ int mk_date (char *, struct rtc_time *); int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; struct rtc_time tm; int rcode = 0; diff --git a/common/cmd_elf.c b/common/cmd_elf.c index eccf2e9..1d92bb3 100644 --- a/common/cmd_elf.c +++ b/common/cmd_elf.c @@ -19,6 +19,9 @@ #include #include +#if defined(CONFIG_WALNUT) || defined(CFG_VXWORKS_MAC_PTR) +DECLARE_GLOBAL_DATA_PTR; +#endif #if (CONFIG_COMMANDS & CFG_CMD_ELF) @@ -78,11 +81,6 @@ int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * ====================================================================== */ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -#if defined(CONFIG_WALNUT) || \ - defined(CFG_VXWORKS_MAC_PTR) - DECLARE_GLOBAL_DATA_PTR; -#endif - unsigned long addr; /* Address of image */ unsigned long bootaddr; /* Address to put the bootline */ char *bootline; /* Text of the bootline */ diff --git a/common/cmd_ide.c b/common/cmd_ide.c index b67d35a..41621ba 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -60,6 +60,10 @@ unsigned long mips_io_port_base = 0; # define SHOW_BOOT_PROGRESS(arg) #endif +#ifdef CONFIG_IDE_8xx_DIRECT +DECLARE_GLOBAL_DATA_PTR; +#endif + #ifdef __PPC__ # define EIEIO __asm__ volatile ("eieio") # define SYNC __asm__ volatile ("sync") @@ -498,7 +502,6 @@ void ide_init (void) { #ifdef CONFIG_IDE_8xx_DIRECT - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); #endif diff --git a/common/cmd_immap.c b/common/cmd_immap.c index 559d7b4..fa79b45 100644 --- a/common/cmd_immap.c +++ b/common/cmd_immap.c @@ -41,6 +41,10 @@ #include #endif +#if defined(CONFIG_8xx) || defined(CONFIG_8260) +DECLARE_GLOBAL_DATA_PTR; +#endif + static void unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -450,10 +454,8 @@ static void prbrg (int n, uint val) uint div16 = (val & CPM_BRG_DIV16) != 0; #if defined(CONFIG_8xx) - DECLARE_GLOBAL_DATA_PTR; ulong clock = gd->cpu_clk; #elif defined(CONFIG_8260) - DECLARE_GLOBAL_DATA_PTR; ulong clock = gd->brg_clk; #endif diff --git a/common/cmd_load.c b/common/cmd_load.c index 7498497..b18709a 100644 --- a/common/cmd_load.c +++ b/common/cmd_load.c @@ -30,6 +30,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; #if (CONFIG_COMMANDS & CFG_CMD_LOADS) static ulong load_serial (ulong offset); @@ -53,7 +54,6 @@ int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) char *env_echo; int rcode = 0; #ifdef CFG_LOADS_BAUD_CHANGE - DECLARE_GLOBAL_DATA_PTR; int load_baudrate, current_baudrate; load_baudrate = current_baudrate = gd->baudrate; @@ -213,7 +213,6 @@ load_serial (ulong offset) static int read_record (char *buf, ulong len) { - DECLARE_GLOBAL_DATA_PTR; char *p; char c; @@ -256,7 +255,6 @@ int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ulong offset = 0; ulong size = 0; #ifdef CFG_LOADS_BAUD_CHANGE - DECLARE_GLOBAL_DATA_PTR; int save_baudrate, current_baudrate; save_baudrate = current_baudrate = gd->baudrate; @@ -433,8 +431,6 @@ char his_quote; /* quote chars he'll use */ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - ulong offset = 0; ulong addr; int load_baudrate, current_baudrate; diff --git a/common/cmd_log.c b/common/cmd_log.c index efc9689..042a403 100644 --- a/common/cmd_log.c +++ b/common/cmd_log.c @@ -46,6 +46,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_LOGBUFFER) /* Local prototypes */ @@ -73,7 +75,6 @@ static unsigned long *ext_logged_chars; in linux/kernel/printk */ void logbuff_init_ptrs (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned long *ext_tag; unsigned long post_word; char *s; @@ -139,8 +140,6 @@ static void logbuff_puts (const char *s) void logbuff_log(char *msg) { - DECLARE_GLOBAL_DATA_PTR; - if ((gd->post_log_word & LOGBUFF_INITIALIZED)) { logbuff_printk (msg); } else { diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index ecf1db4..6257fbd 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -50,6 +50,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CFG_ENV_IS_IN_NVRAM) && \ !defined(CFG_ENV_IS_IN_EEPROM) && \ !defined(CFG_ENV_IS_IN_FLASH) && \ @@ -152,8 +154,6 @@ int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int _do_setenv (int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - int i, len, oldval; int console = -1; uchar *env, *nxt = NULL; diff --git a/common/console.c b/common/console.c index 3c535d2..e9f23be 100644 --- a/common/console.c +++ b/common/console.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_AMIGAONEG3SE int console_changed = 0; #endif @@ -48,7 +50,6 @@ extern int overwrite_console (void); static int console_setfile (int file, device_t * dev) { - DECLARE_GLOBAL_DATA_PTR; int error = 0; if (dev == NULL) @@ -161,8 +162,6 @@ void fprintf (int file, const char *fmt, ...) int getc (void) { - DECLARE_GLOBAL_DATA_PTR; - if (gd->flags & GD_FLG_DEVINIT) { /* Get from the standard input */ return fgetc (stdin); @@ -174,8 +173,6 @@ int getc (void) int tstc (void) { - DECLARE_GLOBAL_DATA_PTR; - if (gd->flags & GD_FLG_DEVINIT) { /* Test the standard input */ return ftstc (stdin); @@ -187,8 +184,6 @@ int tstc (void) void putc (const char c) { - DECLARE_GLOBAL_DATA_PTR; - #ifdef CONFIG_SILENT_CONSOLE if (gd->flags & GD_FLG_SILENT) return; @@ -205,8 +200,6 @@ void putc (const char c) void puts (const char *s) { - DECLARE_GLOBAL_DATA_PTR; - #ifdef CONFIG_SILENT_CONSOLE if (gd->flags & GD_FLG_SILENT) return; @@ -258,8 +251,6 @@ static int ctrlc_disabled = 0; /* see disable_ctrl() */ static int ctrlc_was_pressed = 0; int ctrlc (void) { - DECLARE_GLOBAL_DATA_PTR; - if (!ctrlc_disabled && gd->have_console) { if (tstc ()) { switch (getc ()) { @@ -370,8 +361,6 @@ int console_assign (int file, char *devname) /* Called before relocation - use serial functions */ int console_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->have_console = 1; #ifdef CONFIG_SILENT_CONSOLE @@ -407,7 +396,6 @@ device_t *search_device (int flags, char *name) /* Called after the relocation - use desired console functions */ int console_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; char *stdinname, *stdoutname, *stderrname; device_t *inputdev = NULL, *outputdev = NULL, *errdev = NULL; #ifdef CFG_CONSOLE_ENV_OVERWRITE @@ -499,8 +487,6 @@ int console_init_r (void) /* Called after the relocation - use desired console functions */ int console_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - device_t *inputdev = NULL, *outputdev = NULL; int i, items = ListNumItems (devlist); diff --git a/common/devices.c b/common/devices.c index bd4dfa0..ddf8f8e 100644 --- a/common/devices.c +++ b/common/devices.c @@ -34,6 +34,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + list_t devlist = 0; device_t *stdio_devices[] = { NULL, NULL, NULL }; char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" }; @@ -160,8 +162,6 @@ int device_deregister(char *devname) int devices_init (void) { #ifndef CONFIG_ARM /* already relocated for current ARM implementation */ - DECLARE_GLOBAL_DATA_PTR; - ulong relocation_offset = gd->reloc_off; int i; diff --git a/common/dlmalloc.c b/common/dlmalloc.c index 0c04872..20c2069 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -949,6 +949,8 @@ void malloc_stats(); #endif /* 0 */ /* Moved to malloc.h */ #include +DECLARE_GLOBAL_DATA_PTR; + /* Emulation of sbrk for WIN32 All code within the ifdef WIN32 is untested by me. @@ -1493,8 +1495,6 @@ static mbinptr av_[NAV * 2 + 2] = { void malloc_bin_reloc (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long *p = (unsigned long *)(&av_[2]); int i; for (i=2; i<(sizeof(av_)/sizeof(mbinptr)); ++i) { diff --git a/common/env_common.c b/common/env_common.c index 3201135..eb33422 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -37,6 +37,8 @@ # define SHOW_BOOT_PROGRESS(arg) #endif +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_AMIGAONEG3SE extern void enable_nvram(void); extern void disable_nvram(void); @@ -150,7 +152,6 @@ void env_crc_update (void) static uchar env_get_char_init (int index) { - DECLARE_GLOBAL_DATA_PTR; uchar c; /* if crc was bad, use the default environment */ @@ -167,7 +168,6 @@ static uchar env_get_char_init (int index) #ifdef CONFIG_AMIGAONEG3SE uchar env_get_char_memory (int index) { - DECLARE_GLOBAL_DATA_PTR; uchar retval; enable_nvram(); if (gd->env_valid) { @@ -181,8 +181,6 @@ uchar env_get_char_memory (int index) #else uchar env_get_char_memory (int index) { - DECLARE_GLOBAL_DATA_PTR; - if (gd->env_valid) { return ( *((uchar *)(gd->env_addr + index)) ); } else { @@ -193,8 +191,6 @@ uchar env_get_char_memory (int index) uchar *env_get_addr (int index) { - DECLARE_GLOBAL_DATA_PTR; - if (gd->env_valid) { return ( ((uchar *)(gd->env_addr + index)) ); } else { @@ -204,8 +200,6 @@ uchar *env_get_addr (int index) void env_relocate (void) { - DECLARE_GLOBAL_DATA_PTR; - DEBUGF ("%s[%d] offset = 0x%lx\n", __FUNCTION__,__LINE__, gd->reloc_off); diff --git a/common/env_dataflash.c b/common/env_dataflash.c index 8834da0..93fff29 100644 --- a/common/env_dataflash.c +++ b/common/env_dataflash.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + env_t *env_ptr = NULL; char * env_name_spec = "dataflash"; @@ -68,8 +70,6 @@ int i; */ int env_init(void) { - DECLARE_GLOBAL_DATA_PTR; - ulong crc, len, new; unsigned off; uchar buf[64]; diff --git a/common/env_eeprom.c b/common/env_eeprom.c index 50c623e..2adc129 100644 --- a/common/env_eeprom.c +++ b/common/env_eeprom.c @@ -32,6 +32,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + env_t *env_ptr = NULL; char * env_name_spec = "EEPROM"; @@ -75,8 +77,6 @@ int saveenv(void) */ int env_init(void) { - DECLARE_GLOBAL_DATA_PTR; - ulong crc, len, new; unsigned off; uchar buf[64]; diff --git a/common/env_flash.c b/common/env_flash.c index a2ea9c4..1674b30 100644 --- a/common/env_flash.c +++ b/common/env_flash.c @@ -35,6 +35,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH)) #define CMD_SAVEENV #elif defined(CFG_ENV_ADDR_REDUND) @@ -89,8 +91,6 @@ extern int default_environment_size; uchar env_get_char_spec (int index) { - DECLARE_GLOBAL_DATA_PTR; - return ( *((uchar *)(gd->env_addr + index)) ); } @@ -98,7 +98,6 @@ uchar env_get_char_spec (int index) int env_init(void) { - DECLARE_GLOBAL_DATA_PTR; int crc1_ok = 0, crc2_ok = 0; uchar flag1 = flash_addr->flags; @@ -260,7 +259,6 @@ Done: int env_init(void) { - DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_OMAP2420H4 int flash_probe(void); @@ -358,8 +356,6 @@ void env_relocate_spec (void) { #if !defined(ENV_IS_EMBEDDED) || defined(CFG_ENV_ADDR_REDUND) #ifdef CFG_ENV_ADDR_REDUND - DECLARE_GLOBAL_DATA_PTR; - if (gd->env_addr != (ulong)&(flash_addr->data)) { env_t * etmp = flash_addr; ulong ltmp = end_addr; diff --git a/common/env_nand.c b/common/env_nand.c index a6af74a..0a05b09 100644 --- a/common/env_nand.c +++ b/common/env_nand.c @@ -78,11 +78,10 @@ env_t *env_ptr = 0; /* local functions */ static void use_default(void); +DECLARE_GLOBAL_DATA_PTR; uchar env_get_char_spec (int index) { - DECLARE_GLOBAL_DATA_PTR; - return ( *((uchar *)(gd->env_addr + index)) ); } @@ -95,8 +94,6 @@ uchar env_get_char_spec (int index) */ int env_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->env_addr = (ulong)&default_environment[0]; gd->env_valid = 1; @@ -114,8 +111,6 @@ int saveenv(void) ulong total; int ret = 0; - DECLARE_GLOBAL_DATA_PTR; - env_ptr->flags++; total = CFG_ENV_SIZE; @@ -174,8 +169,6 @@ void env_relocate_spec (void) int crc1_ok = 0, crc2_ok = 0; env_t *tmp_env1, *tmp_env2; - DECLARE_GLOBAL_DATA_PTR; - total = CFG_ENV_SIZE; tmp_env1 = (env_t *) malloc(CFG_ENV_SIZE); @@ -245,8 +238,6 @@ void env_relocate_spec (void) static void use_default() { - DECLARE_GLOBAL_DATA_PTR; - puts ("*** Warning - bad CRC or NAND, using default environment\n\n"); if (default_environment_size > CFG_ENV_SIZE){ diff --git a/common/env_nowhere.c b/common/env_nowhere.c index ee4237c..17ecc77 100644 --- a/common/env_nowhere.c +++ b/common/env_nowhere.c @@ -32,6 +32,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + env_t *env_ptr = NULL; extern uchar default_environment[]; @@ -44,8 +46,6 @@ void env_relocate_spec (void) uchar env_get_char_spec (int index) { - DECLARE_GLOBAL_DATA_PTR; - return ( *((uchar *)(gd->env_addr + index)) ); } @@ -56,8 +56,6 @@ uchar env_get_char_spec (int index) */ int env_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->env_addr = (ulong)&default_environment[0]; gd->env_valid = 0; diff --git a/common/env_nvram.c b/common/env_nvram.c index a406e42..7c18896 100644 --- a/common/env_nvram.c +++ b/common/env_nvram.c @@ -42,6 +42,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CFG_ENV_IS_IN_NVRAM /* Environment is in NVRAM */ #include @@ -74,7 +76,6 @@ uchar env_get_char_spec (int index) return c; #else - DECLARE_GLOBAL_DATA_PTR; uchar retval; enable_nvram(); retval = *((uchar *)(gd->env_addr + index)); @@ -92,8 +93,6 @@ uchar env_get_char_spec (int index) return c; #else - DECLARE_GLOBAL_DATA_PTR; - return *((uchar *)(gd->env_addr + index)); #endif } @@ -135,7 +134,6 @@ int saveenv (void) */ int env_init (void) { - DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_AMIGAONEG3SE enable_nvram(); #endif diff --git a/common/exports.c b/common/exports.c index 9858217..ef25338 100644 --- a/common/exports.c +++ b/common/exports.c @@ -1,6 +1,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + static void dummy(void) { } @@ -12,7 +14,6 @@ unsigned long get_version(void) void jumptable_init (void) { - DECLARE_GLOBAL_DATA_PTR; int i; gd->jt = (void **) malloc (XF_MAX * sizeof (void *)); diff --git a/common/hush.c b/common/hush.c index bb5041a..feb5627 100644 --- a/common/hush.c +++ b/common/hush.c @@ -138,6 +138,8 @@ extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); / #endif #ifdef __U_BOOT__ +DECLARE_GLOBAL_DATA_PTR; + #define EXIT_SUCCESS 0 #define EOF -1 #define syntax() syntax_err() @@ -3272,7 +3274,6 @@ int parse_file_outer(void) #ifdef __U_BOOT__ static void u_boot_hush_reloc(void) { - DECLARE_GLOBAL_DATA_PTR; unsigned long addr; struct reserved_combo *r; diff --git a/common/lcd.c b/common/lcd.c index e64972f..0be1912 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -50,7 +50,6 @@ #include #endif - #ifdef CONFIG_LCD /************************************************************************/ @@ -68,6 +67,8 @@ # endif #endif +DECLARE_GLOBAL_DATA_PTR; + ulong lcd_setmem (ulong addr); static void lcd_drawchars (ushort x, ushort y, uchar *str, int count); @@ -339,8 +340,6 @@ static void test_pattern (void) int drv_lcd_init (void) { - DECLARE_GLOBAL_DATA_PTR; - device_t lcddev; int rc; @@ -682,8 +681,6 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) static void *lcd_logo (void) { #ifdef CONFIG_LCD_INFO - DECLARE_GLOBAL_DATA_PTR; - char info[80]; char temp[32]; #endif /* CONFIG_LCD_INFO */ diff --git a/common/lynxkdi.c b/common/lynxkdi.c index ed1b595..76a271b 100644 --- a/common/lynxkdi.c +++ b/common/lynxkdi.c @@ -20,13 +20,14 @@ #if defined(CONFIG_LYNXKDI) #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_MPC8260) || defined(CONFIG_440EP) || defined(CONFIG_440GR) void lynxkdi_boot ( image_header_t *hdr ) { void (*lynxkdi)(void) = (void(*)(void)) ntohl(hdr->ih_ep); lynxos_bootparms_t *parms = (lynxos_bootparms_t *)0x0020; bd_t *kbd; - DECLARE_GLOBAL_DATA_PTR; u32 *psz = (u32 *)(ntohl(hdr->ih_load) + 0x0204); memset( parms, 0, sizeof(*parms)); diff --git a/common/main.c b/common/main.c index 445cb18..758ef8d 100644 --- a/common/main.c +++ b/common/main.c @@ -36,6 +36,10 @@ #include +#ifdef CONFIG_SILENT_CONSOLE +DECLARE_GLOBAL_DATA_PTR; +#endif + #if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY) extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */ #endif @@ -105,14 +109,10 @@ static __inline__ int abortboot(int bootdelay) u_int i; #ifdef CONFIG_SILENT_CONSOLE - { - DECLARE_GLOBAL_DATA_PTR; - - if (gd->flags & GD_FLG_SILENT) { - /* Restore serial console */ - console_assign (stdout, "serial"); - console_assign (stderr, "serial"); - } + if (gd->flags & GD_FLG_SILENT) { + /* Restore serial console */ + console_assign (stdout, "serial"); + console_assign (stderr, "serial"); } #endif @@ -195,17 +195,13 @@ static __inline__ int abortboot(int bootdelay) # endif #ifdef CONFIG_SILENT_CONSOLE - { - DECLARE_GLOBAL_DATA_PTR; - - if (abort) { - /* permanently enable normal console output */ - gd->flags &= ~(GD_FLG_SILENT); - } else if (gd->flags & GD_FLG_SILENT) { - /* Restore silent console */ - console_assign (stdout, "nulldev"); - console_assign (stderr, "nulldev"); - } + if (abort) { + /* permanently enable normal console output */ + gd->flags &= ~(GD_FLG_SILENT); + } else if (gd->flags & GD_FLG_SILENT) { + /* Restore silent console */ + console_assign (stdout, "nulldev"); + console_assign (stderr, "nulldev"); } #endif @@ -223,14 +219,10 @@ static __inline__ int abortboot(int bootdelay) int abort = 0; #ifdef CONFIG_SILENT_CONSOLE - { - DECLARE_GLOBAL_DATA_PTR; - - if (gd->flags & GD_FLG_SILENT) { - /* Restore serial console */ - console_assign (stdout, "serial"); - console_assign (stderr, "serial"); - } + if (gd->flags & GD_FLG_SILENT) { + /* Restore serial console */ + console_assign (stdout, "serial"); + console_assign (stderr, "serial"); } #endif @@ -279,17 +271,13 @@ static __inline__ int abortboot(int bootdelay) putc ('\n'); #ifdef CONFIG_SILENT_CONSOLE - { - DECLARE_GLOBAL_DATA_PTR; - - if (abort) { - /* permanently enable normal console output */ - gd->flags &= ~(GD_FLG_SILENT); - } else if (gd->flags & GD_FLG_SILENT) { - /* Restore silent console */ - console_assign (stdout, "nulldev"); - console_assign (stderr, "nulldev"); - } + if (abort) { + /* permanently enable normal console output */ + gd->flags &= ~(GD_FLG_SILENT); + } else if (gd->flags & GD_FLG_SILENT) { + /* Restore silent console */ + console_assign (stdout, "nulldev"); + console_assign (stderr, "nulldev"); } #endif diff --git a/common/serial.c b/common/serial.c index 22d8fd0..2acbd08 100644 --- a/common/serial.c +++ b/common/serial.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_SERIAL_MULTI) static struct serial_device *serial_devices = NULL; @@ -49,8 +51,6 @@ struct serial_device *default_serial_console (void) static int serial_register (struct serial_device *dev) { - DECLARE_GLOBAL_DATA_PTR; - dev->init += gd->reloc_off; dev->setbrg += gd->reloc_off; dev->getc += gd->reloc_off; @@ -131,8 +131,6 @@ void serial_reinit_all (void) int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { struct serial_device *dev = default_serial_console (); @@ -144,8 +142,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { struct serial_device *dev = default_serial_console (); @@ -158,8 +154,6 @@ void serial_setbrg (void) int serial_getc (void) { - DECLARE_GLOBAL_DATA_PTR; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { struct serial_device *dev = default_serial_console (); @@ -171,8 +165,6 @@ int serial_getc (void) int serial_tstc (void) { - DECLARE_GLOBAL_DATA_PTR; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { struct serial_device *dev = default_serial_console (); @@ -184,8 +176,6 @@ int serial_tstc (void) void serial_putc (const char c) { - DECLARE_GLOBAL_DATA_PTR; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { struct serial_device *dev = default_serial_console (); @@ -198,8 +188,6 @@ void serial_putc (const char c) void serial_puts (const char *s) { - DECLARE_GLOBAL_DATA_PTR; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { struct serial_device *dev = default_serial_console (); diff --git a/common/soft_i2c.c b/common/soft_i2c.c index b3642da..bffcd44 100644 --- a/common/soft_i2c.c +++ b/common/soft_i2c.c @@ -39,6 +39,10 @@ /* #define DEBUG_I2C */ +#ifdef DEBUG_I2C +DECLARE_GLOBAL_DATA_PTR; +#endif + /*----------------------------------------------------------------------- * Definitions @@ -53,7 +57,6 @@ #ifdef DEBUG_I2C #define PRINTD(fmt,args...) do { \ - DECLARE_GLOBAL_DATA_PTR; \ if (gd->have_console) \ printf (fmt ,##args); \ } while (0) diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c index 629ed66..706c880 100644 --- a/cpu/74xx_7xx/cpu.c +++ b/cpu/74xx_7xx/cpu.c @@ -49,6 +49,8 @@ #include "../board/MAI/AmigaOneG3SE/memio.h" #endif +DECLARE_GLOBAL_DATA_PTR; + cpu_t get_cpu_type(void) { @@ -111,8 +113,6 @@ get_cpu_type(void) #if !defined(CONFIG_BAB7xx) int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - uint type = get_cpu_type(); uint pvr = get_pvr(); ulong clock = gd->cpu_clk; @@ -258,8 +258,6 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #ifdef CONFIG_AMIGAONEG3SE unsigned long get_tbclk(void) { - DECLARE_GLOBAL_DATA_PTR; - return (gd->bus_clk / 4); } #else /* ! CONFIG_AMIGAONEG3SE */ diff --git a/cpu/74xx_7xx/speed.c b/cpu/74xx_7xx/speed.c index f94ff78..2dc5107 100644 --- a/cpu/74xx_7xx/speed.c +++ b/cpu/74xx_7xx/speed.c @@ -29,6 +29,8 @@ #include "../board/MAI/AmigaOneG3SE/via686.h" #endif +DECLARE_GLOBAL_DATA_PTR; + static const int hid1_multipliers_x_10[] = { 25, /* 0000 - 2.5x */ 75, /* 0001 - 7.5x */ @@ -85,7 +87,6 @@ static const int hid1_fx_multipliers_x_10[] = { int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; ulong clock = 0; /* calculate the clock frequency based upon the CPU type */ diff --git a/cpu/74xx_7xx/traps.c b/cpu/74xx_7xx/traps.c index ac5f8bf..50c5eeb 100644 --- a/cpu/74xx_7xx/traps.c +++ b/cpu/74xx_7xx/traps.c @@ -36,6 +36,10 @@ #include #include +#ifdef CONFIG_AMIGAONEG3SE +DECLARE_GLOBAL_DATA_PTR; +#endif + #if (CONFIG_COMMANDS & CFG_CMD_KGDB) int (*debugger_exception_handler)(struct pt_regs *) = 0; #endif @@ -58,9 +62,6 @@ extern unsigned long search_exception_table(unsigned long); void print_backtrace(unsigned long *sp) { -#ifdef CONFIG_AMIGAONEG3SE - DECLARE_GLOBAL_DATA_PTR; -#endif int cnt = 0; unsigned long i; diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c index 85a4849..fa78eaa 100644 --- a/cpu/arm1136/cpu.c +++ b/cpu/arm1136/cpu.c @@ -37,6 +37,10 @@ #include #endif +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) { @@ -88,8 +92,6 @@ int cpu_init (void) * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c index 0f99979..054bab9 100644 --- a/cpu/arm720t/serial.c +++ b/cpu/arm720t/serial.c @@ -34,10 +34,10 @@ #include +DECLARE_GLOBAL_DATA_PTR; + void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int reg = 0; switch (gd->baudrate) { diff --git a/cpu/arm720t/serial_netarm.c b/cpu/arm720t/serial_netarm.c index 5ad98f0..bc6bf30 100644 --- a/cpu/arm720t/serial_netarm.c +++ b/cpu/arm720t/serial_netarm.c @@ -34,6 +34,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #define PORTA (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTA)) #if !defined(CONFIG_NETARM_NS7520) #define PORTB (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTB)) @@ -67,9 +69,6 @@ extern void _netarm_led_FAIL1(void); */ void serial_setbrg (void) { - /* get the gd pointer */ - DECLARE_GLOBAL_DATA_PTR; - /* set 0 ... make sure pins are configured for serial */ #if !defined(CONFIG_NETARM_NS7520) PORTA = PORTB = diff --git a/cpu/arm920t/at91rm9200/serial.c b/cpu/arm920t/at91rm9200/serial.c index a281932..d563445 100644 --- a/cpu/arm920t/at91rm9200/serial.c +++ b/cpu/arm920t/at91rm9200/serial.c @@ -33,6 +33,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_DBGU) && !defined(CONFIG_USART0) && !defined(CONFIG_USART1) #error must define one of CONFIG_DBGU or CONFIG_USART0 or CONFIG_USART1 #endif @@ -50,7 +52,6 @@ AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US1; void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; int baudrate; if ((baudrate = gd->baudrate) <= 0) diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c index 2f7963d..f93bf57 100644 --- a/cpu/arm920t/cpu.c +++ b/cpu/arm920t/cpu.c @@ -33,6 +33,10 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) { @@ -91,8 +95,6 @@ int cpu_init (void) * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/arm920t/ks8695/serial.c b/cpu/arm920t/ks8695/serial.c index 0dd91e7..aacd1be 100644 --- a/cpu/arm920t/ks8695/serial.c +++ b/cpu/arm920t/ks8695/serial.c @@ -25,6 +25,8 @@ #error "Bad: you didn't configure serial ..." #endif +DECLARE_GLOBAL_DATA_PTR; + /* * Define the UART hardware register access structure. */ @@ -54,7 +56,6 @@ int serial_console = 1; void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; volatile struct ks8695uart *uartp = KS8695_UART_ADDR; /* Set to global baud rate and 8 data bits, no parity, 1 stop bit*/ diff --git a/cpu/arm920t/s3c24x0/serial.c b/cpu/arm920t/s3c24x0/serial.c index 8327443..36851ad 100644 --- a/cpu/arm920t/s3c24x0/serial.c +++ b/cpu/arm920t/s3c24x0/serial.c @@ -27,6 +27,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SERIAL1 #define UART_NR S3C24X0_UART0 @@ -48,7 +50,6 @@ void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); int i; unsigned int reg = 0; diff --git a/cpu/arm925t/cpu.c b/cpu/arm925t/cpu.c index c1c6b03..d85b7fa 100644 --- a/cpu/arm925t/cpu.c +++ b/cpu/arm925t/cpu.c @@ -33,6 +33,10 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) { @@ -91,8 +95,6 @@ int cpu_init (void) * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c index f57c5a5..722732e 100644 --- a/cpu/arm926ejs/cpu.c +++ b/cpu/arm926ejs/cpu.c @@ -33,6 +33,10 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) { @@ -91,8 +95,6 @@ int cpu_init (void) * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/arm946es/cpu.c b/cpu/arm946es/cpu.c index ba0a4e4..4c63a8d 100644 --- a/cpu/arm946es/cpu.c +++ b/cpu/arm946es/cpu.c @@ -33,6 +33,10 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) { @@ -91,8 +95,6 @@ int cpu_init (void) * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/arm_intcm/cpu.c b/cpu/arm_intcm/cpu.c index d03b09d..e2309f8 100644 --- a/cpu/arm_intcm/cpu.c +++ b/cpu/arm_intcm/cpu.c @@ -33,14 +33,16 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + int cpu_init (void) { /* * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/bf533/serial.c b/cpu/bf533/serial.c index 84ae9d9..7b43ffd 100644 --- a/cpu/bf533/serial.c +++ b/cpu/bf533/serial.c @@ -51,6 +51,8 @@ #include #include "bf533_serial.h" +DECLARE_GLOBAL_DATA_PTR; + unsigned long pll_div_fact; void calc_baud(void) @@ -72,7 +74,6 @@ void calc_baud(void) void serial_setbrg(void) { int i; - DECLARE_GLOBAL_DATA_PTR; calc_baud(); diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520.c index 689e775..c83f0bb 100644 --- a/cpu/i386/sc520.c +++ b/cpu/i386/sc520.c @@ -36,6 +36,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * utility functions for boards based on the AMD sc520 * @@ -93,8 +95,6 @@ u32 read_mmcr_long(u16 mmcr) void init_sc520(void) { - DECLARE_GLOBAL_DATA_PTR; - /* Set the UARTxCTL register at it's slower, * baud clock giving us a 1.8432 MHz reference */ @@ -139,7 +139,6 @@ void init_sc520(void) unsigned long init_sc520_dram(void) { - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; u32 dram_present=0; diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c index db13008..e7299a7 100644 --- a/cpu/i386/serial.c +++ b/cpu/i386/serial.c @@ -55,6 +55,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #define UART_RBR 0x00 #define UART_THR 0x00 #define UART_IER 0x01 @@ -126,13 +128,9 @@ static int serial_div(int baudrate) int serial_init(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile char val; - int bdiv = serial_div(gd->baudrate); - outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */ outb(bdiv, UART0_BASE + UART_DLL); /* set baudrate divisor */ outb(bdiv >> 8, UART0_BASE + UART_DLM);/* set baudrate divisor */ @@ -150,8 +148,6 @@ int serial_init(void) void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned short bdiv; bdiv = serial_div(gd->baudrate); @@ -410,8 +406,6 @@ int serial_buffered_tstc(void) #if (CONFIG_KGDB_SER_INDEX & 2) void kgdb_serial_init(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile char val; bdiv = serial_div (CONFIG_KGDB_BAUDRATE); diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c index 9383473..2a2bd50 100644 --- a/cpu/ixp/cpu.c +++ b/cpu/ixp/cpu.c @@ -34,14 +34,16 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + int cpu_init (void) { /* * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/ixp/serial.c b/cpu/ixp/serial.c index aea0cf8..2015958 100644 --- a/cpu/ixp/serial.c +++ b/cpu/ixp/serial.c @@ -31,10 +31,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int quot = 0; int uart = CFG_IXP425_CONSOLE; diff --git a/cpu/lh7a40x/cpu.c b/cpu/lh7a40x/cpu.c index 718f253..578eb73 100644 --- a/cpu/lh7a40x/cpu.c +++ b/cpu/lh7a40x/cpu.c @@ -33,6 +33,10 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) { @@ -90,8 +94,6 @@ int cpu_init (void) * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/lh7a40x/serial.c b/cpu/lh7a40x/serial.c index ff5b2d8..2132c05 100644 --- a/cpu/lh7a40x/serial.c +++ b/cpu/lh7a40x/serial.c @@ -21,6 +21,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CONSOLE_UART1) # define UART_CONSOLE 1 #elif defined(CONFIG_CONSOLE_UART2) @@ -33,7 +35,6 @@ void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); int i; unsigned int reg = 0; diff --git a/cpu/mcf52x2/serial.c b/cpu/mcf52x2/serial.c index c730922..79628d0 100644 --- a/cpu/mcf52x2/serial.c +++ b/cpu/mcf52x2/serial.c @@ -38,6 +38,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_M5249 #define DoubleClock(a) ((double)(CFG_CLK/2) / 32.0 / (double)(a)) #else @@ -134,12 +136,10 @@ int rs_get_char(void) } void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; rs_serial_setbaudrate(0,gd->bd->bi_baudrate); } int serial_init(void) { - DECLARE_GLOBAL_DATA_PTR; rs_serial_init(0,gd->baudrate); return 0; } diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c index 519c992..ac860b2 100644 --- a/cpu/mcf52x2/speed.c +++ b/cpu/mcf52x2/speed.c @@ -24,13 +24,13 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * get_clocks() fills in gd->cpu_clock and gd->bus_clk */ int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->cpu_clk = CFG_CLK; #ifdef CONFIG_M5249 gd->bus_clk = gd->cpu_clk / 2; diff --git a/cpu/mpc5xx/cpu.c b/cpu/mpc5xx/cpu.c index 0c22a31..4bef90c 100644 --- a/cpu/mpc5xx/cpu.c +++ b/cpu/mpc5xx/cpu.c @@ -34,6 +34,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; #if (defined(CONFIG_MPC555)) # define ID_STR "MPC555/556" @@ -62,8 +63,6 @@ static int check_cpu_version (long clock, uint pvr, uint immr) */ int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong clock = gd->cpu_clk; uint immr = get_immr (0); /* Return full IMMR contents */ uint pvr = get_pvr (); /* Retrieve PVR register */ @@ -104,7 +103,6 @@ void reset_5xx_watchdog (volatile immap_t * immr) */ unsigned long get_tbclk (void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immr = (volatile immap_t *) CFG_IMMR; ulong oscclk, factor; diff --git a/cpu/mpc5xx/serial.c b/cpu/mpc5xx/serial.c index 4868782..ac5556f 100644 --- a/cpu/mpc5xx/serial.c +++ b/cpu/mpc5xx/serial.c @@ -34,6 +34,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; /* * Local function prototypes @@ -128,7 +129,6 @@ int serial_tstc() void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immr = (immap_t *)CFG_IMMR; short scxbr; diff --git a/cpu/mpc5xx/speed.c b/cpu/mpc5xx/speed.c index f6097f5..6a1fa15 100644 --- a/cpu/mpc5xx/speed.c +++ b/cpu/mpc5xx/speed.c @@ -31,12 +31,13 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * Get cpu and bus clock */ int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immr = (immap_t *) CFG_IMMR; #ifndef CONFIG_5xx_GCLK_FREQ diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 2d695d1..563d5af 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -31,10 +31,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong clock = gd->cpu_clk; char buf[32]; #ifndef CONFIG_MGT5100 @@ -94,8 +94,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) */ unsigned long get_tbclk (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong tbclk; tbclk = (gd->bus_clk + 3L) / 4L; diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index 3df0050..4a370ff 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -24,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * Breath some life into the CPU... * @@ -32,8 +34,6 @@ */ void cpu_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned long addecr = (1 << 25); /* Boot_CS */ #if defined(CFG_RAMBOOT) && defined(CONFIG_MGT5100) addecr |= (1 << 22); /* SDRAM enable */ diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c index 2e8e549..19737ce 100644 --- a/cpu/mpc5xxx/fec.c +++ b/cpu/mpc5xxx/fec.c @@ -14,6 +14,8 @@ #include "sdma.h" #include "fec.h" +DECLARE_GLOBAL_DATA_PTR; + /* #define DEBUG 0x28 */ #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \ @@ -242,7 +244,6 @@ static void mpc5xxx_fec_set_hwaddr(mpc5xxx_fec_priv *fec, char *mac) /********************************************************************/ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis) { - DECLARE_GLOBAL_DATA_PTR; mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv; struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; @@ -393,7 +394,6 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis) /********************************************************************/ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis) { - DECLARE_GLOBAL_DATA_PTR; mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv; const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */ diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c index 044db46..0f02e78 100644 --- a/cpu/mpc5xxx/i2c.c +++ b/cpu/mpc5xxx/i2c.c @@ -23,6 +23,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_HARD_I2C #include @@ -228,7 +230,6 @@ void i2c_init(int speed, int saddr) static int mpc_get_fdr(int speed) { - DECLARE_GLOBAL_DATA_PTR; static int fdr = -1; if (fdr == -1) { diff --git a/cpu/mpc5xxx/ide.c b/cpu/mpc5xxx/ide.c index 1af794c..29b99f6 100644 --- a/cpu/mpc5xxx/ide.c +++ b/cpu/mpc5xxx/ide.c @@ -27,6 +27,8 @@ #ifdef CFG_CMD_IDE #include +DECLARE_GLOBAL_DATA_PTR; + #define CALC_TIMING(t) (t + period - 1) / period #ifdef CONFIG_IDE_RESET @@ -35,7 +37,6 @@ extern void init_ide_reset (void); int ide_preinit (void) { - DECLARE_GLOBAL_DATA_PTR; long period, t0, t1, t2_8, t2_16, t4, ta; vu_long reg; struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA; diff --git a/cpu/mpc5xxx/serial.c b/cpu/mpc5xxx/serial.c index 91e1def..cacb9f0 100644 --- a/cpu/mpc5xxx/serial.c +++ b/cpu/mpc5xxx/serial.c @@ -33,6 +33,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_PSC_CONSOLE) #if CONFIG_PSC_CONSOLE == 1 @@ -55,8 +57,6 @@ int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; unsigned long baseclk; int div; @@ -146,8 +146,6 @@ serial_tstc(void) void serial_setbrg(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; unsigned long baseclk, div; diff --git a/cpu/mpc5xxx/speed.c b/cpu/mpc5xxx/speed.c index 4f4e814..7847adc 100644 --- a/cpu/mpc5xxx/speed.c +++ b/cpu/mpc5xxx/speed.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* Bus-to-Core Multipliers */ @@ -43,8 +45,6 @@ static int bus2core[] = { int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong val, vco; #if !defined(CFG_MPC5XXX_CLKIN) @@ -81,8 +81,6 @@ int get_clocks (void) int prt_mpc5xxx_clks (void) { - DECLARE_GLOBAL_DATA_PTR; - printf(" Bus %ld MHz, IPB %ld MHz, PCI %ld MHz\n", gd->bus_clk / 1000000, gd->ipb_clk / 1000000, gd->pci_clk / 1000000); diff --git a/cpu/mpc8220/cpu.c b/cpu/mpc8220/cpu.c index 0cfe808..be274cd 100644 --- a/cpu/mpc8220/cpu.c +++ b/cpu/mpc8220/cpu.c @@ -31,10 +31,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong clock = gd->cpu_clk; char buf[32]; @@ -81,8 +81,6 @@ int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) */ unsigned long get_tbclk (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong tbclk; tbclk = (gd->bus_clk + 3L) / 4L; diff --git a/cpu/mpc8220/cpu_init.c b/cpu/mpc8220/cpu_init.c index 8c358a8..3cf5f66 100644 --- a/cpu/mpc8220/cpu_init.c +++ b/cpu/mpc8220/cpu_init.c @@ -24,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * Breath some life into the CPU... * @@ -32,8 +34,6 @@ */ void cpu_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile flexbus8220_t *flexbus = (volatile flexbus8220_t *) MMAP_FB; volatile pcfg8220_t *portcfg = (volatile pcfg8220_t *) MMAP_PCFG; volatile xlbarb8220_t *xlbarb = (volatile xlbarb8220_t *) MMAP_XLBARB; diff --git a/cpu/mpc8220/dramSetup.c b/cpu/mpc8220/dramSetup.c index 1d0d384..08e3172 100644 --- a/cpu/mpc8220/dramSetup.c +++ b/cpu/mpc8220/dramSetup.c @@ -32,6 +32,8 @@ characteristics to initialize the dram on MPC8220 #include "i2cCore.h" #include "dramSetup.h" +DECLARE_GLOBAL_DATA_PTR; + #define SPD_SIZE CFG_SDRAM_SPD_SIZE #define DRAM_SPD (CFG_SDRAM_SPD_I2C_ADDR)<<1 /* on Board SPD eeprom */ #define TOTAL_BANK CFG_SDRAM_TOTAL_BANKS @@ -91,8 +93,6 @@ int spd_readbyte (volatile i2c8220_t * pi2c, u8 * readb, int *index) int readSpdData (u8 * spdData) { - DECLARE_GLOBAL_DATA_PTR; - volatile i2c8220_t *pi2cReg; volatile pcfg8220_t *pcfg; u8 slvAdr = DRAM_SPD; @@ -403,8 +403,6 @@ u8 checkMuxSetting (u8 rows, u8 columns) u32 dramSetup (void) { - DECLARE_GLOBAL_DATA_PTR; - draminfo_t DramInfo[TOTAL_BANK]; draminfo_t *pDramInfo; u32 size, temp, cfg_value, mode_value, refresh; diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c index 62f7c0f..d67936d 100644 --- a/cpu/mpc8220/i2c.c +++ b/cpu/mpc8220/i2c.c @@ -23,6 +23,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_HARD_I2C #include @@ -235,7 +237,6 @@ void i2c_init (int speed, int saddr) static int mpc_get_fdr (int speed) { - DECLARE_GLOBAL_DATA_PTR; static int fdr = -1; if (fdr == -1) { diff --git a/cpu/mpc8220/speed.c b/cpu/mpc8220/speed.c index 8346efe..200a762 100644 --- a/cpu/mpc8220/speed.c +++ b/cpu/mpc8220/speed.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + typedef struct pllmultiplier { u8 hid1; int multi; @@ -39,8 +41,6 @@ typedef struct pllmultiplier { int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; - pllcfg_t bus2core[] = { {0x02, 2, 8}, /* 1 */ {0x01, 2, 4}, @@ -109,8 +109,6 @@ int get_clocks (void) int prt_mpc8220_clks (void) { - DECLARE_GLOBAL_DATA_PTR; - printf (" Bus %ld MHz, CPU %ld MHz, PCI %ld MHz, VCO %ld MHz\n", gd->bus_clk / 1000000, gd->cpu_clk / 1000000, gd->pci_clk / 1000000, gd->vco_clk / 1000000); diff --git a/cpu/mpc8220/uart.c b/cpu/mpc8220/uart.c index 5f54aac..0c4b536 100644 --- a/cpu/mpc8220/uart.c +++ b/cpu/mpc8220/uart.c @@ -30,12 +30,13 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define PSC_BASE MMAP_PSC1 #if defined(CONFIG_PSC_CONSOLE) int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; volatile psc8220_t *psc = (psc8220_t *) PSC_BASE; u32 counter; @@ -106,8 +107,6 @@ int serial_tstc (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile psc8220_t *psc = (psc8220_t *) PSC_BASE; u32 counter; diff --git a/cpu/mpc824x/cpu.c b/cpu/mpc824x/cpu.c index 312dfe2..0a45cc8 100644 --- a/cpu/mpc824x/cpu.c +++ b/cpu/mpc824x/cpu.c @@ -26,10 +26,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int pvr = get_pvr (); unsigned int version = pvr >> 16; unsigned char revision; diff --git a/cpu/mpc824x/speed.c b/cpu/mpc824x/speed.c index a37a087..fdcb972 100644 --- a/cpu/mpc824x/speed.c +++ b/cpu/mpc824x/speed.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* NOTE: This describes the proper use of this file. * @@ -107,8 +109,6 @@ short pllratio_to_factor[] = { /* compute the CPU and memory bus clock frequencies */ int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; - uint hid1 = mfspr(HID1); hid1 = (hid1 >> (32-5)) & 0x1f; gd->cpu_clk = (pllratio_to_factor[hid1] * get_bus_freq(0) + 5) diff --git a/cpu/mpc8260/commproc.c b/cpu/mpc8260/commproc.c index e5c5fcf..8777e77 100644 --- a/cpu/mpc8260/commproc.c +++ b/cpu/mpc8260/commproc.c @@ -20,11 +20,11 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + void m8260_cpm_reset(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile ulong count; @@ -54,8 +54,6 @@ m8260_cpm_reset(void) uint m8260_cpm_dpalloc(uint size, uint align) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; uint retloc; uint align_mask, off; @@ -112,8 +110,6 @@ m8260_cpm_hostalloc(uint size, uint align) void m8260_cpm_setbrg(uint brg, uint rate) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile uint *bp; uint cd = BRG_UART_CLK / rate; @@ -137,8 +133,6 @@ m8260_cpm_setbrg(uint brg, uint rate) void m8260_cpm_fastbrg(uint brg, uint rate, int div16) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile uint *bp; diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 5d97933..4f23012 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2003 + * (C) Copyright 2000-2006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -47,10 +47,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong clock = gd->cpu_clk; uint pvr = get_pvr (); @@ -264,8 +264,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) */ unsigned long get_tbclk (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong tbclk; tbclk = (gd->bus_clk + 3L) / 4L; diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c index babcce4..640026b 100644 --- a/cpu/mpc8260/cpu_init.c +++ b/cpu/mpc8260/cpu_init.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + static void config_8260_ioports (volatile immap_t * immr) { int portnum; @@ -97,7 +99,6 @@ static void config_8260_ioports (volatile immap_t * immr) */ void cpu_init_f (volatile immap_t * immr) { - DECLARE_GLOBAL_DATA_PTR; #if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ uint sccr; #endif @@ -222,8 +223,6 @@ void cpu_init_f (volatile immap_t * immr) */ int cpu_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) gd->bd->bi_immr_base; immr->im_cpm.cp_rccr = CFG_RCCR; @@ -236,8 +235,6 @@ int cpu_init_r (void) */ int prt_8260_rsr (void) { - DECLARE_GLOBAL_DATA_PTR; - static struct { ulong mask; char *desc; diff --git a/cpu/mpc8260/ether_fcc.c b/cpu/mpc8260/ether_fcc.c index ed3515f..584c40f 100644 --- a/cpu/mpc8260/ether_fcc.c +++ b/cpu/mpc8260/ether_fcc.c @@ -51,6 +51,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET) && \ defined(CONFIG_NET_MULTI) @@ -644,8 +646,6 @@ swap16 (unsigned short x) void eth_loopback_test (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile cpm8260_t *cp = &(immr->im_cpm); int c, nclosed; diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index ea97ab8..34bd389 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -34,6 +34,8 @@ /* define to enable debug messages */ #undef DEBUG_I2C +DECLARE_GLOBAL_DATA_PTR; + /* uSec to wait between polls of the i2c */ #define DELAY_US 100 /* uSec to wait for the CPM to start processing the buffer */ @@ -213,8 +215,6 @@ static int i2c_setrate(int hz, int speed) void i2c_init(int speed, int slaveadd) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immap = (immap_t *)CFG_IMMR ; volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm; volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; diff --git a/cpu/mpc8260/interrupts.c b/cpu/mpc8260/interrupts.c index b2e4d83..56e9a72 100644 --- a/cpu/mpc8260/interrupts.c +++ b/cpu/mpc8260/interrupts.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /****************************************************************************/ struct irq_action { @@ -140,8 +142,6 @@ static int m8260_get_irq (struct pt_regs *regs) int interrupt_init_cpu (unsigned *decrementer_count) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) CFG_IMMR; *decrementer_count = (gd->bus_clk / 4) / CFG_HZ; diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c index 44576de..ea5514f 100644 --- a/cpu/mpc8260/pci.c +++ b/cpu/mpc8260/pci.c @@ -33,6 +33,11 @@ #include #include #include + +#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 +DECLARE_GLOBAL_DATA_PTR; +#endif + /* * Local->PCI map (from CPU) controlled by * MPC826x master window @@ -234,9 +239,6 @@ static inline void pci_outl (u32 addr, u32 data) void pci_mpc8250_init (struct pci_controller *hose) { -#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 - DECLARE_GLOBAL_DATA_PTR; -#endif u16 tempShort; volatile immap_t *immap = (immap_t *) CFG_IMMR; diff --git a/cpu/mpc8260/serial_scc.c b/cpu/mpc8260/serial_scc.c index 32016f2..3a6eaf0 100644 --- a/cpu/mpc8260/serial_scc.c +++ b/cpu/mpc8260/serial_scc.c @@ -32,6 +32,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CONS_ON_SCC) #if CONFIG_CONS_INDEX == 1 /* Console on SCC1 */ @@ -181,8 +183,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - #if defined(CONFIG_CONS_USE_EXTC) m8260_cpm_extcbrg(SCC_INDEX, gd->baudrate, CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL); diff --git a/cpu/mpc8260/serial_smc.c b/cpu/mpc8260/serial_smc.c index b486f83..f3dffeb 100644 --- a/cpu/mpc8260/serial_smc.c +++ b/cpu/mpc8260/serial_smc.c @@ -34,6 +34,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CONS_ON_SMC) #if CONFIG_CONS_INDEX == 1 /* Console on SMC1 */ @@ -170,8 +172,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - #if defined(CONFIG_CONS_USE_EXTC) m8260_cpm_extcbrg(brg_map[SMC_INDEX], gd->baudrate, CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL); diff --git a/cpu/mpc8260/speed.c b/cpu/mpc8260/speed.c index 99afe76..360404f 100644 --- a/cpu/mpc8260/speed.c +++ b/cpu/mpc8260/speed.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ------------------------------------------------------------------------- */ /* Bus-to-Core Multiplier */ @@ -101,8 +103,6 @@ corecnf_t corecnf_tab[] = { int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong clkin; ulong sccr, dfbrg; @@ -159,8 +159,6 @@ int get_clocks (void) int prt_8260_clks (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immap = (immap_t *) CFG_IMMR; ulong sccr, dfbrg; ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf; diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index f24d3a4..7ca1ceb 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -38,10 +38,11 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkcpu(void) { - DECLARE_GLOBAL_DATA_PTR; ulong clock = gd->cpu_clk; u32 pvr = get_pvr(); char buf[32]; @@ -138,8 +139,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) unsigned long get_tbclk(void) { - DECLARE_GLOBAL_DATA_PTR; - ulong tbclk; tbclk = (gd->bus_clk + 3L) / 4L; diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index acf6862..6ed0992 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * Breathe some life into the CPU... * @@ -38,8 +40,6 @@ */ void cpu_init_f (volatile immap_t * im) { - DECLARE_GLOBAL_DATA_PTR; - /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c index dfd51c1..5a0babf 100644 --- a/cpu/mpc83xx/interrupts.c +++ b/cpu/mpc83xx/interrupts.c @@ -35,6 +35,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + struct irq_action { interrupt_handler_t *handler; void *arg; @@ -43,8 +45,6 @@ struct irq_action { int interrupt_init_cpu (unsigned *decrementer_count) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) CFG_IMMRBAR; *decrementer_count = (gd->bus_clk / 4) / CFG_HZ; diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c index 1368fc3..ad6b3f6 100644 --- a/cpu/mpc83xx/speed.c +++ b/cpu/mpc83xx/speed.c @@ -32,6 +32,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* ----------------------------------------------------------------- */ typedef enum { @@ -92,7 +94,6 @@ corecnf_t corecnf_tab[] = { */ int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *im = (immap_t *)CFG_IMMRBAR; u32 pci_sync_in; u8 spmf; @@ -342,14 +343,11 @@ int get_clocks (void) *********************************************/ ulong get_bus_freq (ulong dummy) { - DECLARE_GLOBAL_DATA_PTR; return gd->csb_clk; } int print_clock_conf (void) { - DECLARE_GLOBAL_DATA_PTR; - printf("Clock configuration:\n"); printf(" Coherent System Bus: %4d MHz\n",gd->csb_clk/1000000); printf(" Core: %4d MHz\n",gd->core_clk/1000000); diff --git a/cpu/mpc83xx/traps.c b/cpu/mpc83xx/traps.c index c7a5638..44345af 100644 --- a/cpu/mpc83xx/traps.c +++ b/cpu/mpc83xx/traps.c @@ -40,6 +40,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* Returns 0 if exception not found and fixup otherwise. */ extern unsigned long search_exception_table(unsigned long); @@ -52,7 +54,6 @@ extern unsigned long search_exception_table(unsigned long); void print_backtrace(unsigned long *sp) { - DECLARE_GLOBAL_DATA_PTR; int cnt = 0; unsigned long i; diff --git a/cpu/mpc85xx/commproc.c b/cpu/mpc85xx/commproc.c index aa8a5a5..3504d50 100644 --- a/cpu/mpc85xx/commproc.c +++ b/cpu/mpc85xx/commproc.c @@ -24,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CPM2) /* * because we have stack and init data in dual port ram @@ -35,8 +37,6 @@ void m8560_cpm_reset(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile ulong count; @@ -64,8 +64,6 @@ m8560_cpm_reset(void) uint m8560_cpm_dpalloc(uint size, uint align) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; uint retloc; uint align_mask, off; @@ -122,8 +120,6 @@ m8560_cpm_hostalloc(uint size, uint align) void m8560_cpm_setbrg(uint brg, uint rate) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile uint *bp; @@ -146,8 +142,6 @@ m8560_cpm_setbrg(uint brg, uint rate) void m8560_cpm_fastbrg(uint brg, uint rate, int div16) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile uint *bp; diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index efde9cc..c12b47b 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -30,6 +30,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_CPM2 static void config_8560_ioports (volatile immap_t * immr) { @@ -103,7 +105,6 @@ static void config_8560_ioports (volatile immap_t * immr) void cpu_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile ccsr_lbc_t *memctl = &immap->im_lbc; extern void m8560_cpm_reset (void); diff --git a/cpu/mpc85xx/serial_scc.c b/cpu/mpc85xx/serial_scc.c index cf060d6..4e925f8 100644 --- a/cpu/mpc85xx/serial_scc.c +++ b/cpu/mpc85xx/serial_scc.c @@ -35,6 +35,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CPM2) #if defined(CONFIG_CONS_ON_SCC) @@ -186,8 +188,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - #if defined(CONFIG_CONS_USE_EXTC) m8560_cpm_extcbrg(SCC_INDEX, gd->baudrate, CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL); diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index d736742..ca81ee7 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* --------------------------------------------------------------- */ void get_sys_info (sys_info_t * sysInfo) @@ -80,7 +82,6 @@ void get_sys_info (sys_info_t * sysInfo) int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; sys_info_t sys_info; #if defined(CONFIG_CPM2) volatile immap_t *immap = (immap_t *) CFG_IMMR; diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c index a87eed2..904f052 100644 --- a/cpu/mpc85xx/traps.c +++ b/cpu/mpc85xx/traps.c @@ -39,6 +39,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if (CONFIG_COMMANDS & CFG_CMD_KGDB) int (*debugger_exception_handler)(struct pt_regs *) = 0; #endif @@ -83,7 +85,6 @@ extern void do_bedbug_breakpoint(struct pt_regs *); void print_backtrace(unsigned long *sp) { - DECLARE_GLOBAL_DATA_PTR; int cnt = 0; unsigned long i; diff --git a/cpu/mpc8xx/commproc.c b/cpu/mpc8xx/commproc.c index 75740e0..07c763c 100644 --- a/cpu/mpc8xx/commproc.c +++ b/cpu/mpc8xx/commproc.c @@ -24,12 +24,12 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CFG_ALLOC_DPRAM int dpram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Reclaim the DP memory for our use. */ gd->dp_alloc_base = CPM_DATAONLY_BASE; gd->dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE; @@ -43,7 +43,6 @@ int dpram_init (void) */ uint dpram_alloc (uint size) { - DECLARE_GLOBAL_DATA_PTR; uint addr = gd->dp_alloc_base; if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top) @@ -56,8 +55,6 @@ uint dpram_alloc (uint size) uint dpram_base (void) { - DECLARE_GLOBAL_DATA_PTR; - return gd->dp_alloc_base; } @@ -67,8 +64,6 @@ uint dpram_base (void) */ uint dpram_alloc_align (uint size, uint align) { - DECLARE_GLOBAL_DATA_PTR; - uint addr, mask = align - 1; addr = (gd->dp_alloc_base + mask) & ~mask; @@ -83,8 +78,6 @@ uint dpram_alloc_align (uint size, uint align) uint dpram_base_align (uint align) { - DECLARE_GLOBAL_DATA_PTR; - uint mask = align - 1; return (gd->dp_alloc_base + mask) & ~mask; diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index c4a0cba..97112f0 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -39,6 +39,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + static char *cpu_warning = "\n " \ "*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***"; @@ -349,8 +351,6 @@ static int check_CPU (long clock, uint pvr, uint immr) int checkcpu (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong clock = gd->cpu_clk; uint immr = get_immr (0); /* Return full IMMR contents */ uint pvr = get_pvr (); @@ -539,8 +539,6 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ unsigned long get_tbclk (void) { - DECLARE_GLOBAL_DATA_PTR; - uint immr = get_immr (0); /* Return full IMMR contents */ volatile immap_t *immap = (volatile immap_t *)(immr & 0xFFFF0000); ulong oscclk, factor, pll; diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c index b2c59c6..1a7111f 100644 --- a/cpu/mpc8xx/cpu_init.c +++ b/cpu/mpc8xx/cpu_init.c @@ -27,6 +27,10 @@ #include #include +#if defined(CFG_RTCSC) || defined(CFG_RMDS) +DECLARE_GLOBAL_DATA_PTR; +#endif + #if defined(CFG_I2C_UCODE_PATCH) || defined(CFG_SPI_UCODE_PATCH) void cpm_load_patch (volatile immap_t * immr); #endif @@ -259,8 +263,6 @@ void cpu_init_f (volatile immap_t * immr) int cpu_init_r (void) { #if defined(CFG_RTCSC) || defined(CFG_RMDS) - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd = gd->bd; volatile immap_t *immr = (volatile immap_t *) (bd->bi_immr_base); #endif diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c index d2f5d88..6006478 100644 --- a/cpu/mpc8xx/fec.c +++ b/cpu/mpc8xx/fec.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #undef ET_DEBUG #if (CONFIG_COMMANDS & CFG_CMD_NET) && \ @@ -371,7 +373,6 @@ static inline void fec_half_duplex(struct eth_device *dev) static void fec_pin_init(int fecidx) { - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; volatile immap_t *immr = (immap_t *) CFG_IMMR; volatile fec_t *fecp; diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c index 682db53..6c59374 100644 --- a/cpu/mpc8xx/i2c.c +++ b/cpu/mpc8xx/i2c.c @@ -37,6 +37,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + /* define to enable debug messages */ #undef DEBUG_I2C @@ -205,8 +207,6 @@ i2c_setrate (int hz, int speed) void i2c_init(int speed, int slaveaddr) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immap = (immap_t *)CFG_IMMR ; volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm; volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c; @@ -615,8 +615,6 @@ int i2c_probe(uchar chip) int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) { - DECLARE_GLOBAL_DATA_PTR; - i2c_state_t state; uchar xaddr[4]; int rc; @@ -671,8 +669,6 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) { - DECLARE_GLOBAL_DATA_PTR; - i2c_state_t state; uchar xaddr[4]; int rc; diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c index fa0405f..26a82cc 100644 --- a/cpu/mpc8xx/serial.c +++ b/cpu/mpc8xx/serial.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */ #if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */ @@ -65,7 +67,6 @@ static void serial_setdivisor(volatile cpm8xx_t *cp) { - DECLARE_GLOBAL_DATA_PTR; int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate; if(divisor/16>0x1000) { @@ -268,8 +269,6 @@ smc_putc(const char c) volatile cpm8xx_t *cpmp = &(im->im_cpm); #ifdef CONFIG_MODEM_SUPPORT - DECLARE_GLOBAL_DATA_PTR; - if (gd->be_quiet) return; #endif @@ -553,8 +552,6 @@ scc_putc(const char c) volatile cpm8xx_t *cpmp = &(im->im_cpm); #ifdef CONFIG_MODEM_SUPPORT - DECLARE_GLOBAL_DATA_PTR; - if (gd->be_quiet) return; #endif @@ -649,13 +646,11 @@ struct serial_device serial_scc_device = #ifdef CONFIG_MODEM_SUPPORT void disable_putc(void) { - DECLARE_GLOBAL_DATA_PTR; gd->be_quiet = 1; } void enable_putc(void) { - DECLARE_GLOBAL_DATA_PTR; gd->be_quiet = 0; } #endif diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c index f038316..57f91c0 100644 --- a/cpu/mpc8xx/speed.c +++ b/cpu/mpc8xx/speed.c @@ -25,6 +25,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) || defined(CFG_MEASURE_CPUCLK) || defined(DEBUG) #define PITC_SHIFT 16 @@ -181,8 +183,6 @@ unsigned long measure_gclk(void) */ int get_clocks (void) { - DECLARE_GLOBAL_DATA_PTR; - uint immr = get_immr (0); /* Return full IMMR contents */ volatile immap_t *immap = (immap_t *) (immr & 0xFFFF0000); uint sccr = immap->im_clkrst.car_sccr; @@ -238,8 +238,6 @@ static long init_pll_866 (long clk); */ int get_clocks_866 (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) CFG_IMMR; char tmp[64]; long cpuclk = 0; @@ -277,8 +275,6 @@ int get_clocks_866 (void) */ int sdram_adjust_866 (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) CFG_IMMR; long mamr; @@ -371,8 +367,6 @@ static long init_pll_866 (long clk) */ int adjust_sdram_tbs_8xx (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) CFG_IMMR; long mamr; long sccr; diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index ee60477..918de67 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -39,6 +39,8 @@ #ifdef CONFIG_VIDEO +DECLARE_GLOBAL_DATA_PTR; + /************************************************************************/ /* ** DEBUG SETTINGS */ /************************************************************************/ @@ -1164,7 +1166,6 @@ static void *video_logo (void) u16 *screen = video_fb_address, width = VIDEO_COLS; #ifdef VIDEO_INFO # ifndef CONFIG_FADS - DECLARE_GLOBAL_DATA_PTR; char temp[32]; # endif char info[80]; @@ -1282,8 +1283,6 @@ static int video_init (void *videobase) int drv_video_init (void) { - DECLARE_GLOBAL_DATA_PTR; - int error, devices = 1; device_t videodev; diff --git a/cpu/nios/serial.c b/cpu/nios/serial.c index 4bdda25..5ecdc6d 100644 --- a/cpu/nios/serial.c +++ b/cpu/nios/serial.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /*------------------------------------------------------------------ * JTAG acts as the serial port *-----------------------------------------------------------------*/ @@ -83,7 +85,6 @@ int serial_init (void) { return (0);} void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned div; div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c index 2d08c93..3d76603 100644 --- a/cpu/nios2/serial.c +++ b/cpu/nios2/serial.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /*------------------------------------------------------------------ * JTAG acts as the serial port *-----------------------------------------------------------------*/ @@ -93,7 +95,6 @@ int serial_init (void) { return (0);} void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned div; div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index 947b85e..fad895b 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -77,6 +77,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_405GP) || defined(CONFIG_405EP) #ifdef CONFIG_PCI @@ -92,8 +94,6 @@ ushort pmc405_pci_subsys_deviceid(void); *-----------------------------------------------------------------------------*/ void pci_405gp_init(struct pci_controller *hose) { - DECLARE_GLOBAL_DATA_PTR; - int i, reg_num = 0; bd_t *bd = gd->bd; diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index a26533c..0cd72b0 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -37,6 +37,10 @@ #include #include +#if !defined(CONFIG_405) +DECLARE_GLOBAL_DATA_PTR; +#endif + #if defined(CONFIG_440) #define FREQ_EBC (sys_info.freqEPB) @@ -116,7 +120,6 @@ static int do_chip_reset(unsigned long sys0, unsigned long sys1); int checkcpu (void) { #if !defined(CONFIG_405) /* not used on Xilinx 405 FPGA implementations */ - DECLARE_GLOBAL_DATA_PTR; uint pvr = get_pvr(); ulong clock = gd->cpu_clk; char buf[32]; diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index 79cfba3..1a139d7 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -27,6 +27,10 @@ #include #include +#if defined(CONFIG_405GP) || defined(CONFIG_405EP) +DECLARE_GLOBAL_DATA_PTR; +#endif + #define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data) @@ -209,8 +213,6 @@ cpu_init_f (void) int cpu_init_r (void) { #if defined(CONFIG_405GP) || defined(CONFIG_405EP) - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd = gd->bd; unsigned long reg; #if defined(CONFIG_405GP) diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c index be94b57..7db1cd8 100644 --- a/cpu/ppc4xx/i2c.c +++ b/cpu/ppc4xx/i2c.c @@ -16,6 +16,8 @@ #ifdef CONFIG_HARD_I2C +DECLARE_GLOBAL_DATA_PTR; + #define IIC_OK 0 #define IIC_NOK 1 #define IIC_NOK_LA 2 /* Lost arbitration */ @@ -350,7 +352,6 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) { uchar xaddr[4]; int ret; - DECLARE_GLOBAL_DATA_PTR; if ( alen > 4 ) { printf ("I2C read: addr len %d not supported\n", alen); diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c index 1d8dc7c..3aae4ce 100644 --- a/cpu/ppc4xx/interrupts.c +++ b/cpu/ppc4xx/interrupts.c @@ -36,6 +36,8 @@ #include #include "vecnum.h" +DECLARE_GLOBAL_DATA_PTR; + /****************************************************************************/ /* @@ -96,8 +98,6 @@ static __inline__ void set_evpr(unsigned long val) int interrupt_init_cpu (unsigned *decrementer_count) { - DECLARE_GLOBAL_DATA_PTR; - int vec; unsigned long val; diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c index e7f6bcb..83c9479 100644 --- a/cpu/ppc4xx/serial.c +++ b/cpu/ppc4xx/serial.c @@ -59,6 +59,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + /*****************************************************************************/ #ifdef CONFIG_IOP480 @@ -161,8 +163,6 @@ int serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile char val; unsigned short br_reg; @@ -185,8 +185,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned short br_reg; br_reg = ((((CONFIG_CPUCLOCK * 1000000) / 16) / gd->baudrate) - 1); @@ -431,8 +429,6 @@ int serial_init_dev (unsigned long dev_base) int serial_init(void) #endif { - DECLARE_GLOBAL_DATA_PTR; - unsigned long reg; unsigned long udiv; unsigned short bdiv; @@ -520,8 +516,6 @@ int serial_init_dev (unsigned long dev_base) int serial_init (void) #endif { - DECLARE_GLOBAL_DATA_PTR; - unsigned long reg; unsigned long tmp; unsigned long clk; @@ -597,8 +591,6 @@ void serial_setbrg_dev (unsigned long dev_base) void serial_setbrg (void) #endif { - DECLARE_GLOBAL_DATA_PTR; - unsigned long tmp; unsigned long clk; unsigned long udiv; @@ -880,8 +872,6 @@ int serial_buffered_tstc (void) #if (CONFIG_KGDB_SER_INDEX & 2) void kgdb_serial_init (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile char val; unsigned short br_reg; diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c index 553c491..02b4383 100644 --- a/cpu/ppc4xx/speed.c +++ b/cpu/ppc4xx/speed.c @@ -26,7 +26,7 @@ #include #include -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #define ONE_BILLION 1000000000 @@ -522,8 +522,6 @@ ulong get_PCI_freq (void) int get_clocks (void) { #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || defined(CONFIG_405) || defined(CONFIG_405EP) - DECLARE_GLOBAL_DATA_PTR; - sys_info_t sys_info; get_sys_info (&sys_info); @@ -533,8 +531,6 @@ int get_clocks (void) #endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */ #ifdef CONFIG_IOP480 - DECLARE_GLOBAL_DATA_PTR; - gd->cpu_clk = 66000000; gd->bus_clk = 66000000; #endif diff --git a/cpu/pxa/cpu.c b/cpu/pxa/cpu.c index b33d674..0ee8180 100644 --- a/cpu/pxa/cpu.c +++ b/cpu/pxa/cpu.c @@ -34,14 +34,16 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + int cpu_init (void) { /* * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c index 9bf2a7c..cb3a478 100644 --- a/cpu/pxa/serial.c +++ b/cpu/pxa/serial.c @@ -32,10 +32,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int quot = 0; if (gd->baudrate == 1200) diff --git a/cpu/s3c44b0/serial.c b/cpu/s3c44b0/serial.c index 70b4ee8..95d0266 100644 --- a/cpu/s3c44b0/serial.c +++ b/cpu/s3c44b0/serial.c @@ -37,6 +37,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* flush serial input queue. returns 0 on success or negative error * number otherwise */ @@ -68,8 +70,6 @@ static int serial_flush_output(void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - u32 divisor = 0; /* get correct divisor */ diff --git a/cpu/sa1100/cpu.c b/cpu/sa1100/cpu.c index 17e5b0d..f1bd644 100644 --- a/cpu/sa1100/cpu.c +++ b/cpu/sa1100/cpu.c @@ -33,14 +33,16 @@ #include #include +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + int cpu_init (void) { /* * setup up stacks if necessary */ #ifdef CONFIG_USE_IRQ - DECLARE_GLOBAL_DATA_PTR; - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif diff --git a/cpu/sa1100/serial.c b/cpu/sa1100/serial.c index a598489..5d18875 100644 --- a/cpu/sa1100/serial.c +++ b/cpu/sa1100/serial.c @@ -31,10 +31,10 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int reg = 0; if (gd->baudrate == 1200) diff --git a/drivers/netconsole.c b/drivers/netconsole.c index 9a0a24f..69089f9 100644 --- a/drivers/netconsole.c +++ b/drivers/netconsole.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + static char input_buffer[512]; static int input_size = 0; /* char count in input buffer */ static int input_offset = 0; /* offset to valid chars in input buffer */ @@ -105,8 +107,6 @@ int nc_input_packet (uchar * pkt, unsigned dest, unsigned src, unsigned len) static void nc_send_packet (const char *buf, int len) { - DECLARE_GLOBAL_DATA_PTR; - struct eth_device *eth; int inited = 0; uchar *pkt; diff --git a/drivers/ns9750_serial.c b/drivers/ns9750_serial.c index aced3da..8dff367 100644 --- a/drivers/ns9750_serial.c +++ b/drivers/ns9750_serial.c @@ -33,6 +33,8 @@ #include "ns9750_bbus.h" /* for GPIOs */ #include "ns9750_ser.h" /* for serial configuration */ +DECLARE_GLOBAL_DATA_PTR; + #define CONSOLE CONFIG_CONS_INDEX static unsigned int calcBitrateRegister( void ); @@ -183,8 +185,6 @@ void serial_setbrg( void ) static unsigned int calcBitrateRegister( void ) { - DECLARE_GLOBAL_DATA_PTR; - return ( NS9750_SER_BITRATE_EBIT | NS9750_SER_BITRATE_CLKMUX_BCLK | NS9750_SER_BITRATE_TMODE | @@ -204,8 +204,6 @@ static unsigned int calcBitrateRegister( void ) static unsigned int calcRxCharGapRegister( void ) { - DECLARE_GLOBAL_DATA_PTR; - return NS9750_SER_RX_CHAR_TIMER_TRUN; } diff --git a/drivers/ps2ser.c b/drivers/ps2ser.c index e2a38dc..724fa40 100644 --- a/drivers/ps2ser.c +++ b/drivers/ps2ser.c @@ -21,6 +21,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* #define DEBUG */ #define PS2SER_BAUD 57600 @@ -61,8 +63,6 @@ static int ps2buf_out_idx; #ifdef CONFIG_MPC5xxx int ps2ser_init(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; unsigned long baseclk; int div; diff --git a/drivers/s3c4510b_uart.c b/drivers/s3c4510b_uart.c index 44b96a9..ddcd591 100644 --- a/drivers/s3c4510b_uart.c +++ b/drivers/s3c4510b_uart.c @@ -50,6 +50,8 @@ #include #include "s3c4510b_uart.h" +DECLARE_GLOBAL_DATA_PTR; + static UART *uart; /* flush serial input queue. returns 0 on success or negative error @@ -82,8 +84,6 @@ static int serial_flush_output(void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - UART_LINE_CTRL ulctrl; UART_CTRL uctrl; UART_BAUD_DIV ubd; diff --git a/drivers/serial.c b/drivers/serial.c index 057a1ab..228781b 100644 --- a/drivers/serial.c +++ b/drivers/serial.c @@ -30,6 +30,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_CONS_INDEX) #error "No console index specified." #elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4) @@ -77,7 +79,6 @@ static NS16550_t serial_ports[4] = { static int calc_divisor (NS16550_t port) { - DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { diff --git a/drivers/serial_max3100.c b/drivers/serial_max3100.c index bbe212b..35c5596 100644 --- a/drivers/serial_max3100.c +++ b/drivers/serial_max3100.c @@ -28,6 +28,8 @@ #ifdef CONFIG_MAX3100_SERIAL +DECLARE_GLOBAL_DATA_PTR; + /**************************************************************/ /* convienient macros */ @@ -217,7 +219,6 @@ int serial_init(void) { unsigned int wconf, rconf; int i; - DECLARE_GLOBAL_DATA_PTR; wconf = 0; diff --git a/drivers/tsec.c b/drivers/tsec.c index 4c5e1b5..7ec565c 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -23,6 +23,8 @@ #include "tsec.h" #include "miiphy.h" +DECLARE_GLOBAL_DATA_PTR; + #define TX_BUF_CNT 2 static uint rxIdx; /* index of the current RX buffer */ @@ -1082,7 +1084,6 @@ static void relocate_cmds(void) struct phy_cmd **cmdlistptr; struct phy_cmd *cmd; int i,j,k; - DECLARE_GLOBAL_DATA_PTR; for(i=0; phy_info[i]; i++) { /* First thing's first: relocate the pointers to the diff --git a/examples/mem_to_mem_idma2intr.c b/examples/mem_to_mem_idma2intr.c index 3a269c9..3ff2804 100644 --- a/examples/mem_to_mem_idma2intr.c +++ b/examples/mem_to_mem_idma2intr.c @@ -30,6 +30,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define STANDALONE #ifndef STANDALONE /* Linked into/Part of PPCBoot */ @@ -346,8 +348,6 @@ static uint dpbase = 0; uint dpalloc (uint size, uint align) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *) CFG_IMMR; uint retloc; uint align_mask, off; diff --git a/examples/timer.c b/examples/timer.c index 037fdfd..13ec06f 100644 --- a/examples/timer.c +++ b/examples/timer.c @@ -26,6 +26,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #undef DEBUG #define TIMER_PERIOD 1000000 /* 1 second clock */ @@ -115,8 +117,6 @@ static char *usage = "\n[q, b, e, ?] "; int timer (int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - cpmtimer8xx_t *cpmtimerp; /* Pointer to the CPM Timer structure */ tid_8xx_cpmtimer_t hw; tid_8xx_cpmtimer_t *hwp = &hw; diff --git a/lib_arm/armlinux.c b/lib_arm/armlinux.c index dba2ff7..56b7fca 100644 --- a/lib_arm/armlinux.c +++ b/lib_arm/armlinux.c @@ -30,6 +30,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); @@ -77,8 +79,6 @@ extern image_header_t header; /* from cmd_bootm.c */ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], ulong addr, ulong *len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; - ulong len = 0, checksum; ulong initrd_start, initrd_end; ulong data; diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c index 55d13fa..d9dc2b6 100644 --- a/lib_blackfin/board.c +++ b/lib_blackfin/board.c @@ -35,6 +35,8 @@ #include "blackfin_board.h" #include "../drivers/smc91111.h" +DECLARE_GLOBAL_DATA_PTR; + extern flash_info_t flash_info[]; @@ -76,8 +78,6 @@ static void display_flash_config(ulong size) static int init_baudrate(void) { - DECLARE_GLOBAL_DATA_PTR; - uchar tmp[64]; int i = getenv_r("baudrate", tmp, sizeof(tmp)); gd->bd->bi_baudrate = gd->baudrate = (i > 0) @@ -89,7 +89,6 @@ static int init_baudrate(void) #ifdef DEBUG static void display_global_data(void) { - DECLARE_GLOBAL_DATA_PTR; bd_t *bd; bd = gd->bd; printf("--flags:%x\n", gd->flags); @@ -136,7 +135,6 @@ static void display_global_data(void) void board_init_f(ulong bootflag) { - DECLARE_GLOBAL_DATA_PTR; ulong addr; bd_t *bd; @@ -173,7 +171,6 @@ void board_init_f(ulong bootflag) void board_init_r(gd_t * id, ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; ulong size; extern void malloc_bin_reloc(void); char *s, *e; diff --git a/lib_i386/bios_setup.c b/lib_i386/bios_setup.c index bc97815..75f04a0 100644 --- a/lib_i386/bios_setup.c +++ b/lib_i386/bios_setup.c @@ -36,6 +36,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define NUMVECTS 256 #define BIOS_DATA ((char*)0x400) @@ -136,7 +138,6 @@ static void setvector(int vector, u16 segment, void *handler) int bios_setup(void) { - DECLARE_GLOBAL_DATA_PTR; static int done=0; int vector; struct pci_controller *pri_hose; diff --git a/lib_i386/board.c b/lib_i386/board.c index e90eb6e..4175fdb 100644 --- a/lib_i386/board.c +++ b/lib_i386/board.c @@ -38,6 +38,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + extern long _i386boot_start; extern long _i386boot_end; extern long _i386boot_romdata_start; @@ -80,8 +82,6 @@ static ulong mem_malloc_brk = 0; static int mem_malloc_init(void) { - DECLARE_GLOBAL_DATA_PTR; - /* start malloc area right after the stack */ mem_malloc_start = i386boot_bss_start + i386boot_bss_size + CFG_STACK_SIZE; @@ -130,8 +130,6 @@ char *strmhz (char *buf, long hz) */ static int init_baudrate (void) { - DECLARE_GLOBAL_DATA_PTR; - char tmp[64]; /* long enough for environment variables */ int i = getenv_r("baudrate", tmp, 64); @@ -167,7 +165,6 @@ static int display_banner (void) */ static int display_dram_config (void) { - DECLARE_GLOBAL_DATA_PTR; int i; puts ("DRAM Configuration:\n"); @@ -233,7 +230,6 @@ gd_t *global_data; void start_i386boot (void) { - DECLARE_GLOBAL_DATA_PTR; char *s; int i; ulong size; diff --git a/lib_m68k/board.c b/lib_m68k/board.c index 6b3edd6..e25833b 100644 --- a/lib_m68k/board.c +++ b/lib_m68k/board.c @@ -60,6 +60,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + static char *failed = "*** failed ***\n"; #ifdef CONFIG_PCU_E @@ -111,8 +113,6 @@ static ulong mem_malloc_brk = 0; */ static void mem_malloc_init (void) { - DECLARE_GLOBAL_DATA_PTR; - ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off; mem_malloc_end = dest_addr; @@ -177,8 +177,6 @@ typedef int (init_fnc_t) (void); static int init_baudrate (void) { - DECLARE_GLOBAL_DATA_PTR; - uchar tmp[64]; /* long enough for environment variables */ int i = getenv_r ("baudrate", tmp, sizeof (tmp)); @@ -192,8 +190,6 @@ static int init_baudrate (void) static int init_func_ram (void) { - DECLARE_GLOBAL_DATA_PTR; - int board_type = 0; /* use dummy arg */ puts ("DRAM: "); @@ -263,8 +259,6 @@ init_fnc_t *init_sequence[] = { void board_init_f (ulong bootflag) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd; ulong len, addr, addr_sp; gd_t *id; @@ -414,7 +408,6 @@ board_init_f (ulong bootflag) */ void board_init_r (gd_t *id, ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; cmd_tbl_t *cmdtp; char *s, *e; bd_t *bd; diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c index a32de1a..f87f56e 100644 --- a/lib_m68k/m68k_linux.c +++ b/lib_m68k/m68k_linux.c @@ -27,6 +27,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define PHYSADDR(x) x #define LINUX_MAX_ENVS 256 @@ -56,8 +58,6 @@ static void linux_env_set (char *env_name, char *env_val); void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], ulong addr, ulong * len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; - ulong len = 0, checksum; ulong initrd_start, initrd_end; ulong data; diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c index bc987a3..026d247 100644 --- a/lib_microblaze/board.c +++ b/lib_microblaze/board.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + const char version_string[] = U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"; @@ -72,8 +74,6 @@ init_fnc_t *init_sequence[] = { void board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd; init_fnc_t **init_fnc_ptr; diff --git a/lib_mips/mips_linux.c b/lib_mips/mips_linux.c index 12e8435..952d5a9 100644 --- a/lib_mips/mips_linux.c +++ b/lib_mips/mips_linux.c @@ -28,6 +28,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define LINUX_MAX_ENVS 256 #define LINUX_MAX_ARGS 256 @@ -56,8 +58,6 @@ static void linux_env_set (char * env_name, char * env_val); void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], ulong addr, ulong * len_ptr, int verify) { - DECLARE_GLOBAL_DATA_PTR; - ulong len = 0, checksum; ulong initrd_start, initrd_end; ulong data; diff --git a/lib_nios/board.c b/lib_nios/board.c index e6cda52..0a0d2e3 100644 --- a/lib_nios/board.c +++ b/lib_nios/board.c @@ -32,6 +32,7 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; /* * All attempts to come up with a "common" initialization sequence @@ -106,8 +107,6 @@ init_fnc_t *init_sequence[] = { /***********************************************************************/ void board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd; init_fnc_t **init_fnc_ptr; char *s, *e; diff --git a/lib_nios2/board.c b/lib_nios2/board.c index 0e0b042..cd23037 100644 --- a/lib_nios2/board.c +++ b/lib_nios2/board.c @@ -32,6 +32,7 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; /* * All attempts to come up with a "common" initialization sequence @@ -106,8 +107,6 @@ init_fnc_t *init_sequence[] = { /***********************************************************************/ void board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd; init_fnc_t **init_fnc_ptr; char *s, *e; diff --git a/lib_ppc/board.c b/lib_ppc/board.c index e569e97..e68cf1f 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -90,6 +90,7 @@ extern flash_info_t flash_info[]; #endif #include + DECLARE_GLOBAL_DATA_PTR; #if defined(CFG_ENV_IS_EMBEDDED) diff --git a/net/net.c b/net/net.c index 5062037..1d1c98f 100644 --- a/net/net.c +++ b/net/net.c @@ -92,6 +92,8 @@ #if (CONFIG_COMMANDS & CFG_CMD_NET) +DECLARE_GLOBAL_DATA_PTR; + #define ARP_TIMEOUT 5 /* Seconds before trying ARP again */ #ifndef CONFIG_NET_RETRY_COUNT # define ARP_TIMEOUT_COUNT 5 /* # of timeouts before giving up */ @@ -266,8 +268,6 @@ void ArpTimeoutCheck(void) int NetLoop(proto_t protocol) { - DECLARE_GLOBAL_DATA_PTR; - bd_t *bd = gd->bd; #ifdef CONFIG_NET_MULTI @@ -572,9 +572,6 @@ startAgainHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len) void NetStartAgain (void) { -#ifdef CONFIG_NET_MULTI - DECLARE_GLOBAL_DATA_PTR; -#endif char *nretry; int noretry = 0, once = 0; diff --git a/post/ether.c b/post/ether.c index 660620e..8c87b59 100644 --- a/post/ether.c +++ b/post/ether.c @@ -51,6 +51,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define MIN_PACKET_LENGTH 64 #define MAX_PACKET_LENGTH 256 #define TEST_NUM 1 @@ -109,7 +111,6 @@ static RTXBD *rtx; static void scc_init (int scc_index) { - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; static int proff[] = diff --git a/post/memory.c b/post/memory.c index a10bc50..a2c088b 100644 --- a/post/memory.c +++ b/post/memory.c @@ -157,6 +157,8 @@ #if CONFIG_POST & CFG_POST_MEMORY +DECLARE_GLOBAL_DATA_PTR; + /* * Define INJECT_*_ERRORS for testing error detection in the presence of * _good_ hardware. @@ -455,7 +457,6 @@ static int memory_post_tests (unsigned long start, unsigned long size) int memory_post_test (int flags) { int ret = 0; - DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; unsigned long memsize = (bd->bi_memsize >= 256 << 20 ? 256 << 20 : bd->bi_memsize) - (1 << 20); diff --git a/post/post.c b/post/post.c index b3df91a..e1066da 100644 --- a/post/post.c +++ b/post/post.c @@ -32,14 +32,14 @@ #ifdef CONFIG_POST +DECLARE_GLOBAL_DATA_PTR; + #define POST_MAX_NUMBER 32 #define BOOTMODE_MAGIC 0xDEAD0000 int post_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - int res = 0; unsigned int i; @@ -62,7 +62,6 @@ int post_init_f (void) void post_bootmode_init (void) { - DECLARE_GLOBAL_DATA_PTR; int bootmode = post_bootmode_get (0); int newword; @@ -110,20 +109,17 @@ int post_bootmode_get (unsigned int *last_test) /* POST tests run before relocation only mark status bits .... */ static void post_log_mark_start ( unsigned long testid ) { - DECLARE_GLOBAL_DATA_PTR; gd->post_log_word |= (testid)<<16; } static void post_log_mark_succ ( unsigned long testid ) { - DECLARE_GLOBAL_DATA_PTR; gd->post_log_word |= testid; } /* ... and the messages are output once we are relocated */ void post_output_backlog ( void ) { - DECLARE_GLOBAL_DATA_PTR; int j; for (j = 0; j < post_list_size; j++) { @@ -379,8 +375,6 @@ int post_log (char *format, ...) void post_reloc (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int i; /* diff --git a/post/sysmon.c b/post/sysmon.c index 72fcac3..f61d598 100644 --- a/post/sysmon.c +++ b/post/sysmon.c @@ -52,6 +52,8 @@ #if CONFIG_POST & CFG_POST_SYSMON +DECLARE_GLOBAL_DATA_PTR; + static int sysmon_temp_invalid = 0; /* #define DEBUG */ @@ -159,8 +161,6 @@ int sysmon_init_f (void) void sysmon_reloc (void) { - DECLARE_GLOBAL_DATA_PTR; - sysmon_t ** l; sysmon_table_t * t; @@ -281,8 +281,6 @@ static void sysmon_ccfl_enable (sysmon_table_t * this) int sysmon_post_test (int flags) { - DECLARE_GLOBAL_DATA_PTR; - int res = 0; sysmon_table_t * t; uint val; diff --git a/post/uart.c b/post/uart.c index 23bf036..fd97e38 100644 --- a/post/uart.c +++ b/post/uart.c @@ -50,6 +50,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define CTLR_SMC 0 #define CTLR_SCC 1 @@ -82,8 +84,6 @@ static int proff_scc[] = static void smc_init (int smc_index) { - DECLARE_GLOBAL_DATA_PTR; - static int cpm_cr_ch[] = { CPM_CR_CH_SMC1, CPM_CR_CH_SMC2 }; volatile immap_t *im = (immap_t *) CFG_IMMR; @@ -288,8 +288,6 @@ static int smc_getc (int smc_index) static void scc_init (int scc_index) { - DECLARE_GLOBAL_DATA_PTR; - static int cpm_cr_ch[] = { CPM_CR_CH_SCC1, CPM_CR_CH_SCC2, -- cgit v0.10.2 From 2662b40cace272da5759040622561d821c878d56 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 1 Apr 2006 13:41:03 +0200 Subject: * Changes/fixes for drivers/cfi_flash.c: - Add Intel legacy lock/unlock support to common CFI driver On some Intel flash's (e.g. Intel J3) legacy unlocking is supported, meaning that unlocking of one sector will unlock all sectors of this bank. Using this feature, unlocking of all sectors upon startup (via env var "unlock=yes") will get much faster. - Fixed problem with multiple reads of envronment variable "unlock" as pointed out by Reinhard Arlt & Anders Larsen. - Removed unwanted linefeeds from "protect" command when CFG_FLASH_PROTECTION is enabled. - Changed p3p400 board to use CFG_FLASH_PROTECTION Patch by Stefan Roese, 01 Apr 2006 * Changes/fixes for drivers/cfi_flash.c: - Correctly handle the cases where CFG_HZ != 1000 (several XScale-based boards) - Fix the timeout calculation of buffered writes (off by a factor of 1000) Patch by Anders Larsen, 31 Mar 2006 diff --git a/CHANGELOG b/CHANGELOG index 34b8d20..4c5b62c 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,33 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Changes/fixes for drivers/cfi_flash.c: + + - Add Intel legacy lock/unlock support to common CFI driver + + On some Intel flash's (e.g. Intel J3) legacy unlocking is + supported, meaning that unlocking of one sector will unlock + all sectors of this bank. Using this feature, unlocking + of all sectors upon startup (via env var "unlock=yes") will + get much faster. + + - Fixed problem with multiple reads of envronment variable + "unlock" as pointed out by Reinhard Arlt & Anders Larsen. + + - Removed unwanted linefeeds from "protect" command when + CFG_FLASH_PROTECTION is enabled. + + - Changed p3p400 board to use CFG_FLASH_PROTECTION + + Patch by Stefan Roese, 01 Apr 2006 + +* Changes/fixes for drivers/cfi_flash.c: + - Correctly handle the cases where CFG_HZ != 1000 (several + XScale-based boards) + - Fix the timeout calculation of buffered writes (off by a + factor of 1000) + Patch by Anders Larsen, 31 Mar 2006 + * Enable Quad UART om MCC200 board. * Cleanup MCC200 board configuration; omit non-existent stuff. diff --git a/common/cmd_flash.c b/common/cmd_flash.c index 0aa4783..201f4e3 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -455,6 +455,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #ifdef CONFIG_HAS_DATAFLASH int status; #endif + if (argc < 3) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; @@ -655,10 +656,10 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last) #endif /* CFG_FLASH_PROTECTION */ } } + } #if defined(CFG_FLASH_PROTECTION) - if (!rcode) putc ('\n'); + puts (" done\n"); #endif /* CFG_FLASH_PROTECTION */ - } printf ("%sProtected %d sectors\n", p ? "" : "Un-", protected); diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index a989d34..2e37480 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -117,6 +117,7 @@ #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */ #define FLASH_OFFSET_WTOUT 0x1F #define FLASH_OFFSET_WBTOUT 0x20 #define FLASH_OFFSET_ETOUT 0x21 @@ -346,6 +347,10 @@ unsigned long flash_init (void) unsigned long size = 0; int i; +#ifdef CFG_FLASH_PROTECTION + char *s = getenv("unlock"); +#endif + /* Init: no FLASHes known */ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; @@ -357,15 +362,39 @@ unsigned long flash_init (void) #endif /* CFG_FLASH_QUIET_TEST */ } #ifdef CFG_FLASH_PROTECTION - else { - char *s = getenv("unlock"); + else if ((s != NULL) && (strcmp(s, "yes") == 0)) { + /* + * Only the U-Boot image and it's environment is protected, + * all other sectors are unprotected (unlocked) if flash + * hardware protection is used (CFG_FLASH_PROTECTION) and + * the environment variable "unlock" is set to "yes". + */ + if (flash_info[i].legacy_unlock) { + int k; + + /* + * Disable legacy_unlock temporarily, since + * flash_real_protect would relock all other sectors + * again otherwise. + */ + flash_info[i].legacy_unlock = 0; - if (((s = getenv("unlock")) != NULL) && (strcmp(s, "yes") == 0)) { /* - * Only the U-Boot image and it's environment is protected, - * all other sectors are unprotected (unlocked) if flash - * hardware protection is used (CFG_FLASH_PROTECTION) and - * the environment variable "unlock" is set to "yes". + * Legacy unlocking (e.g. Intel J3) -> unlock only one + * sector. This will unlock all sectors. + */ + flash_real_protect (&flash_info[i], 0, 0); + + flash_info[i].legacy_unlock = 1; + + /* + * Manually mark other sectors as unlocked (unprotected) + */ + for (k = 1; k < flash_info[i].sector_count; k++) + flash_info[i].protect[k] = 0; + } else { + /* + * No legancy unlocking -> unlock all sectors */ flash_protect (FLAG_PROTECT_CLEAR, flash_info[i].start[0], @@ -668,8 +697,12 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) prot ? "protect" : "unprotect")) == 0) { info->protect[sector] = prot; - /* Intel's unprotect unprotects all locking */ - if (prot == 0) { + + /* + * On some of Intel's flash chips (marked via legacy_unlock) + * unprotect unprotects all locking. + */ + if ((prot == 0) && (info->legacy_unlock)) { flash_sect_t i; for (i = 0; i < info->sector_count; i++) { @@ -746,6 +779,10 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; +#if CFG_HZ != 1000 + tout *= CFG_HZ/1000; +#endif + /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { @@ -1082,6 +1119,10 @@ ulong flash_get_size (ulong base, int banknum) uchar num_erase_regions; int erase_region_size; int erase_region_count; +#ifdef CFG_FLASH_PROTECTION + int ext_addr; + info->legacy_unlock = 0; +#endif info->start[0] = base; @@ -1095,6 +1136,13 @@ ulong flash_get_size (ulong base, int banknum) case CFI_CMDSET_INTEL_EXTENDED: default: info->cmd_reset = FLASH_CMD_RESET; +#ifdef CFG_FLASH_PROTECTION + /* read legacy lock/unlock bit from intel flash */ + ext_addr = flash_read_ushort (info, 0, + FLASH_OFFSET_EXT_QUERY_T_P_ADDR); + info->legacy_unlock = + flash_read_uchar (info, ext_addr + 5) & 0x08; +#endif break; case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: @@ -1160,8 +1208,9 @@ ulong flash_get_size (ulong base, int banknum) info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE)); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT); info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); - info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)); + info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 831d018..19656fc 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -146,6 +146,7 @@ "cp.b 100000 fffc0000 40000;" \ "setenv filesize;saveenv\0" \ "upd=run load;run update\0" \ + "unlock=yes\0" \ "" #define CONFIG_BOOTCOMMAND "run net_nfs" @@ -275,6 +276,9 @@ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_PROTECTION 1 /* use hardware protection */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ + #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ diff --git a/include/flash.h b/include/flash.h index 4c68c68..a84dc68 100644 --- a/include/flash.h +++ b/include/flash.h @@ -45,6 +45,7 @@ typedef struct { ushort vendor; /* the primary vendor id */ ushort cmd_reset; /* Vendor specific reset command */ ushort interface; /* used for x8/x16 adjustments */ + ushort legacy_unlock; /* support Intel legacy (un)locking */ #endif } flash_info_t; -- cgit v0.10.2 From db28ddb4da7387f4658ae5d032263258e53a1f37 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Mon, 3 Apr 2006 15:46:10 +0200 Subject: Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473] diff --git a/CHANGELOG b/CHANGELOG index fdb6aae..271f0fb 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,9 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S + Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473] + * Add support for ymodem protocol download Patch by Stefano Babic, 29 Mar 2006 diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 4603cf5..346f0d0 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -237,6 +237,7 @@ _start_armboot: .word start_armboot */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * flush v4 I/D caches @@ -264,7 +265,7 @@ cpu_init_crit: bl lowlevel_init mov lr, ip mov pc, lr - +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* ************************************************************************* -- cgit v0.10.2 From 1707626650f2cd2c716902de5a81616d7e60c85f Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Wed, 5 Apr 2006 20:37:11 +0200 Subject: Correct PM828_PCI_config Makefile target. diff --git a/Makefile b/Makefile index beea5d2..af0c25a 100644 --- a/Makefile +++ b/Makefile @@ -1187,7 +1187,7 @@ PM828_config \ PM828_PCI_config \ PM828_ROMBOOT_config \ PM828_ROMBOOT_PCI_config: unconfig - @if [ -z "$(findstring _PCI_,$@)" ] ; then \ + @if [ "$(findstring _PCI_,$@)" ] ; then \ echo "#define CONFIG_PCI" >>include/config.h ; \ echo "... with PCI enabled" ; \ else \ -- cgit v0.10.2 From 2fc000d756920b340945a74ec1214a34d9e84858 Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Wed, 5 Apr 2006 20:46:41 +0200 Subject: Remove dependencies between DoC code and old legacy NAND driver. Necessary defines and data structures were copied to DoC specific files so that legacy NAND code could be entirely removed from u-boot tree in the near future. diff --git a/common/cmd_doc.c b/common/cmd_doc.c index 37b7325..ab37516 100644 --- a/common/cmd_doc.c +++ b/common/cmd_doc.c @@ -22,11 +22,7 @@ #if (CONFIG_COMMANDS & CFG_CMD_DOC) #include -#include -#include - #include -#include #ifdef CFG_DOC_SUPPORT_2000 #define DoC_is_2000(doc) (doc->ChipID == DOC_ChipID_Doc2k) @@ -69,6 +65,32 @@ static struct DiskOnChip doc_dev_desc[CFG_MAX_DOC_DEVICE]; /* Current DOC Device */ static int curr_device = -1; +/* Supported NAND flash devices */ +static struct nand_flash_dev nand_flash_ids[] = { + {"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0}, + {"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0}, + {"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0}, + {"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0}, + {"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0}, + {"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0}, + {"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0}, + {"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0}, + {"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0}, + {"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0}, + {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0}, + {"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0}, + {"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0}, + {"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0}, + {"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0}, + {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0}, + {"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0}, + {"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0}, + {"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1}, + {"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1}, + {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0}, + {NULL,} +}; + /* ------------------------------------------------------------------------- */ int do_doc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h index ebf9a76..eeb1d7e 100644 --- a/include/linux/mtd/doc2000.h +++ b/include/linux/mtd/doc2000.h @@ -91,6 +91,13 @@ struct DiskOnChip; #define ADDR_PAGE 2 #define ADDR_COLUMN_PAGE 3 +struct Nand { + char floor, chip; + unsigned long curadr; + unsigned char curmode; + /* Also some erase/write/pipeline info when we get that far */ +}; + struct DiskOnChip { unsigned long physadr; unsigned long virtadr; @@ -148,4 +155,62 @@ void doc_probe(unsigned long physadr); void doc_print(struct DiskOnChip*); +/* + * Standard NAND flash commands + */ +#define NAND_CMD_READ0 0 +#define NAND_CMD_READ1 1 +#define NAND_CMD_PAGEPROG 0x10 +#define NAND_CMD_READOOB 0x50 +#define NAND_CMD_ERASE1 0x60 +#define NAND_CMD_STATUS 0x70 +#define NAND_CMD_SEQIN 0x80 +#define NAND_CMD_READID 0x90 +#define NAND_CMD_ERASE2 0xd0 +#define NAND_CMD_RESET 0xff + +/* + * NAND Flash Manufacturer ID Codes + */ +#define NAND_MFR_TOSHIBA 0x98 +#define NAND_MFR_SAMSUNG 0xec + +/* + * NAND Flash Device ID Structure + * + * Structure overview: + * + * name - Complete name of device + * + * manufacture_id - manufacturer ID code of device. + * + * model_id - model ID code of device. + * + * chipshift - total number of address bits for the device which + * is used to calculate address offsets and the total + * number of bytes the device is capable of. + * + * page256 - denotes if flash device has 256 byte pages or not. + * + * pageadrlen - number of bytes minus one needed to hold the + * complete address into the flash array. Keep in + * mind that when a read or write is done to a + * specific address, the address is input serially + * 8 bits at a time. This structure member is used + * by the read/write routines as a loop index for + * shifting the address out 8 bits at a time. + * + * erasesize - size of an erase block in the flash device. + */ +struct nand_flash_dev { + char * name; + int manufacture_id; + int model_id; + int chipshift; + char page256; + char pageadrlen; + unsigned long erasesize; + int bus16; +}; + #endif /* __MTD_DOC2000_H__ */ -- cgit v0.10.2 From 5fbb2cd3b1b11352dfb73f0b8326c323662182a8 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 6 Apr 2006 11:35:18 +0200 Subject: Update CHANGELOG diff --git a/CHANGELOG b/CHANGELOG index 5040a6b..b6e289e 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Fix Lite5200B support: initialize SDelay register + See Freescale's AN3221 "MPC5200B SDRAM Initialization and + Configuration", 3.3.1 SDelay--MBAR + 0x0190 + * Changes/fixes for drivers/cfi_flash.c: - Add Intel legacy lock/unlock support to common CFI driver -- cgit v0.10.2 From 3a5e21881a194f4d4e053be8410d82a2458e8544 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 6 Apr 2006 15:03:42 +0200 Subject: MCC200 Board: fix flash unprotection code for flash > 32 MB. diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c index 456411d..5fe239f 100644 --- a/board/mcc200/mcc200.c +++ b/board/mcc200/mcc200.c @@ -238,6 +238,16 @@ int misc_init_r (void) &flash_info[CFG_MAX_FLASH_BANKS - 1]); } + if (gd->bd->bi_flashsize > (32 << 20)) { + /* Unprotect the upper bank of the Flash */ + *(volatile int*)MPC5XXX_CS0_CFG |= (1 << 6); + flash_protect (FLAG_PROTECT_CLEAR, + flash_info[0].start[0], + (flash_info[0].start[0] + flash_info[0].size) / 2 - 1, + &flash_info[0]); + *(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6); + } + return (0); } -- cgit v0.10.2 From 6db39708117d6391a72f3fc3ea7860231b630270 Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Sat, 8 Apr 2006 19:08:06 +0200 Subject: Fix JFFS2 support for legacy NAND driver. Some more NAND cleanup and small fixes. diff --git a/Makefile b/Makefile index af0c25a..9b93463 100644 --- a/Makefile +++ b/Makefile @@ -133,6 +133,8 @@ LIBS += disk/libdisk.a LIBS += rtc/librtc.a LIBS += dtt/libdtt.a LIBS += drivers/libdrivers.a +LIBS += drivers/nand/libnand.a +LIBS += drivers/nand_legacy/libnand_legacy.a LIBS += drivers/sk98lin/libsk98lin.a LIBS += post/libpost.a post/cpu/libcpu.a LIBS += common/libcommon.a diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk index 433429b..35cb655 100644 --- a/board/amcc/bamboo/config.mk +++ b/board/amcc/bamboo/config.mk @@ -32,6 +32,3 @@ endif ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000 endif - -# legacy nand support -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk index 1dc635f..9083aac 100644 --- a/board/dave/PPChameleonEVB/config.mk +++ b/board/dave/PPChameleonEVB/config.mk @@ -26,9 +26,3 @@ # Reserve 320 kB for Monitor TEXT_BASE = 0xFFFB0000 - -# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined) -BOARDLIBS = drivers/nand/libnand.a - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/delta/config.mk b/board/delta/config.mk index 9564625..61828bb 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -3,6 +3,3 @@ #TEXT_BASE = 0xa3080000 #TEXT_BASE = 0x9ffe0000 TEXT_BASE = 0xa3008000 - -# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE) -BOARDLIBS = drivers/nand/libnand.a diff --git a/board/delta/nand.c b/board/delta/nand.c index c4df6e5..7982548 100644 --- a/board/delta/nand.c +++ b/board/delta/nand.c @@ -23,7 +23,7 @@ #include #if (CONFIG_COMMANDS & CFG_CMD_NAND) -#ifdef CONFIG_NEW_NAND_CODE +#if !defined(CFG_NAND_LEGACY) #include #include diff --git a/board/esd/ash405/config.mk b/board/esd/ash405/config.mk index 3cf5dd8..1d743a9 100644 --- a/board/esd/ash405/config.mk +++ b/board/esd/ash405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk index 0c56c40..5c3c01c 100644 --- a/board/esd/cms700/config.mk +++ b/board/esd/cms700/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c index cad8211..5cd3423 100644 --- a/board/esd/common/auto_update.c +++ b/board/esd/common/auto_update.c @@ -24,8 +24,8 @@ #include -#ifndef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support! +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) +#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support! #endif #include @@ -74,7 +74,7 @@ extern int flash_write (char *, ulong, ulong); /* change char* to void* to shutup the compiler */ extern block_dev_desc_t *get_dev (char*, int); -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) /* references to names in cmd_nand.c */ #define NANDRW_READ 0x01 #define NANDRW_WRITE 0x00 @@ -84,7 +84,7 @@ extern struct nand_chip nand_dev_desc[]; extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len, size_t * retlen, u_char * buf); extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean); -#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */ extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE]; @@ -188,7 +188,7 @@ int au_do_update(int i, long sz) int off, rc; uint nbytes; int k; -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) int total; #endif @@ -262,7 +262,7 @@ int au_do_update(int i, long sz) debug ("flash_sect_erase(%lx, %lx);\n", start, end); flash_sect_erase(start, end); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) printf("Updating NAND FLASH with image %s\n", au_image[i].name); debug ("nand_legacy_erase(%lx, %lx);\n", start, end); rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0); @@ -290,7 +290,7 @@ int au_do_update(int i, long sz) debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes); rc = flash_write((char *)addr, start, nbytes); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes); rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2, start, nbytes, (size_t *)&total, (uchar *)addr); @@ -308,7 +308,7 @@ int au_do_update(int i, long sz) if (au_image[i].type != AU_NAND) { rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size)); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP, start, nbytes, (size_t *)&total, (uchar *)addr); rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size)); diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk index ceff4c4..0be45c7 100644 --- a/board/esd/cpci405/config.mk +++ b/board/esd/cpci405/config.mk @@ -38,6 +38,3 @@ TEXT_BASE = 0xFFFD0000 endif endif endif - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/hh405/config.mk b/board/esd/hh405/config.mk index 798a3fa..7129ad5 100644 --- a/board/esd/hh405/config.mk +++ b/board/esd/hh405/config.mk @@ -29,6 +29,3 @@ TEXT_BASE = 0xFFF80000 #TEXT_BASE = 0xFFFC0000 #TEXT_BASE = 0x00FC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/hub405/config.mk b/board/esd/hub405/config.mk index 4c60c35..a6d31aa 100644 --- a/board/esd/hub405/config.mk +++ b/board/esd/hub405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk index 916b285..25b2105 100644 --- a/board/esd/plu405/config.mk +++ b/board/esd/plu405/config.mk @@ -27,6 +27,3 @@ TEXT_BASE = 0xFFFC0000 #TEXT_BASE = 0x00FC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk index 72e8103..219a4eb 100644 --- a/board/esd/voh405/config.mk +++ b/board/esd/voh405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFF80000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/wuh405/config.mk b/board/esd/wuh405/config.mk index 3cf5dd8..1d743a9 100644 --- a/board/esd/wuh405/config.mk +++ b/board/esd/wuh405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netphone/config.mk b/board/netphone/config.mk index de179c2..8497ebc 100644 --- a/board/netphone/config.mk +++ b/board/netphone/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netstar/config.mk b/board/netstar/config.mk index 50d647a..8b73e97 100644 --- a/board/netstar/config.mk +++ b/board/netstar/config.mk @@ -9,6 +9,3 @@ # XXX TEXT_BASE = 0x20012000 TEXT_BASE = 0x13FC0000 - -# Compile the new NAND code -BOARDLIBS = drivers/nand/libnand.a diff --git a/board/netta/netta.c b/board/netta/netta.c index 9194bfb..4923e3a 100644 --- a/board/netta/netta.c +++ b/board/netta/netta.c @@ -555,9 +555,9 @@ int board_early_init_f(void) return 0; } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) -#include +#include extern ulong nand_probe(ulong physadr); extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; diff --git a/board/netta2/config.mk b/board/netta2/config.mk index de179c2..8497ebc 100644 --- a/board/netta2/config.mk +++ b/board/netta2/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netvia/config.mk b/board/netvia/config.mk index 583174a..9dddaad 100644 --- a/board/netvia/config.mk +++ b/board/netvia/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/sixnet/config.mk b/board/sixnet/config.mk index 8e73d2f..0cd8f44 100644 --- a/board/sixnet/config.mk +++ b/board/sixnet/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xF8000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/drivers/nand/diskonchip.c b/drivers/nand/diskonchip.c index afaae83..e17af70 100644 --- a/drivers/nand/diskonchip.c +++ b/drivers/nand/diskonchip.c @@ -21,9 +21,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif +#if !defined(CFG_NAND_LEGACY) #include #include @@ -1786,3 +1784,4 @@ module_exit(cleanup_nanddoc); MODULE_LICENSE("GPL"); MODULE_AUTHOR("David Woodhouse "); MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n"); +#endif diff --git a/drivers/nand/nand.c b/drivers/nand/nand.c index dd80026..e1781fc 100644 --- a/drivers/nand/nand.c +++ b/drivers/nand/nand.c @@ -23,11 +23,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c index e0b4060..b7a5d32 100644 --- a/drivers/nand/nand_base.c +++ b/drivers/nand/nand_base.c @@ -72,11 +72,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include #include diff --git a/drivers/nand/nand_bbt.c b/drivers/nand/nand_bbt.c index ac16872..aaa9400 100644 --- a/drivers/nand/nand_bbt.c +++ b/drivers/nand/nand_bbt.c @@ -54,11 +54,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include #include diff --git a/drivers/nand/nand_ecc.c b/drivers/nand/nand_ecc.c index e0d0e8b..f33be96 100644 --- a/drivers/nand/nand_ecc.c +++ b/drivers/nand/nand_ecc.c @@ -37,11 +37,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include /* diff --git a/drivers/nand/nand_ids.c b/drivers/nand/nand_ids.c index 3d4d372..8b58736 100644 --- a/drivers/nand/nand_ids.c +++ b/drivers/nand/nand_ids.c @@ -13,11 +13,7 @@ #include -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include diff --git a/drivers/nand_legacy/nand_legacy.c b/drivers/nand_legacy/nand_legacy.c index 3989ca2..458046d 100644 --- a/drivers/nand_legacy/nand_legacy.c +++ b/drivers/nand_legacy/nand_legacy.c @@ -10,11 +10,6 @@ */ #include - -#ifndef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support! -#endif - #include #include #include @@ -27,7 +22,7 @@ # define SHOW_BOOT_PROGRESS(arg) #endif -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) #include #include @@ -1612,4 +1607,13 @@ static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc) #endif -#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ +#ifdef CONFIG_JFFS2_NAND +int read_jffs2_nand(size_t start, size_t len, + size_t * retlen, u_char * buf, int nanddev) +{ + return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2, + start, len, retlen, buf); +} +#endif /* CONFIG_JFFS2_NAND */ + +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */ diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 49c8652..41ff4c1 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -144,7 +144,11 @@ static struct part_info *current_part; #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) +#if defined(CFG_NAND_LEGACY) +#include +#else #include +#endif /* * Support for jffs2 on top of NAND-flash * @@ -155,8 +159,14 @@ static struct part_info *current_part; * */ +#if defined(CFG_NAND_LEGACY) +/* this one defined in nand_legacy.c */ +int read_jffs2_nand(size_t start, size_t len, + size_t * retlen, u_char * buf, int nanddev); +#else /* info for NAND chips, defined in drivers/nand/nand.c */ extern nand_info_t nand_info[]; +#endif #define NAND_PAGE_SIZE 512 #define NAND_PAGE_SHIFT 9 @@ -167,7 +177,6 @@ extern nand_info_t nand_info[]; #endif #define NAND_CACHE_SIZE (NAND_CACHE_PAGES*NAND_PAGE_SIZE) -#ifdef CFG_NAND_LEGACY static u8* nand_cache = NULL; static u32 nand_cache_off = (u32)-1; @@ -175,7 +184,11 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) { struct mtdids *id = current_part->dev->id; u32 bytes_read = 0; +#if defined(CFG_NAND_LEGACY) + size_t retlen; +#else ulong retlen; +#endif int cpy_bytes; while (bytes_read < size) { @@ -193,14 +206,24 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) } } +#if defined(CFG_NAND_LEGACY) + if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE, + &retlen, nand_cache, id->num) < 0 || + retlen != NAND_CACHE_SIZE) { + printf("read_nand_cached: error reading nand off %#x size %d bytes\n", + nand_cache_off, NAND_CACHE_SIZE); + return -1; + } +#else retlen = NAND_CACHE_SIZE; if (nand_read(&nand_info[id->num], nand_cache_off, - &retlen, nand_cache) != 0 || + &retlen, nand_cache) != 0 || retlen != NAND_CACHE_SIZE) { printf("read_nand_cached: error reading nand off %#x size %d bytes\n", nand_cache_off, NAND_CACHE_SIZE); return -1; } +#endif } cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read); if (cpy_bytes > size - bytes_read) @@ -251,7 +274,6 @@ static void put_fl_mem_nand(void *buf) { free(buf); } -#endif /* CFG_NAND_LEGACY */ #endif /* #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) */ @@ -294,7 +316,7 @@ static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf) return get_fl_mem_nor(off); #endif -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) if (id->type == MTD_DEV_TYPE_NAND) return get_fl_mem_nand(off, size, ext_buf); #endif @@ -312,7 +334,7 @@ static inline void *get_node_mem(u32 off) return get_node_mem_nor(off); #endif -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) if (id->type == MTD_DEV_TYPE_NAND) return get_node_mem_nand(off); #endif @@ -323,7 +345,7 @@ static inline void *get_node_mem(u32 off) static inline void put_fl_mem(void *buf) { -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) struct mtdids *id = current_part->dev->id; if (id->type == MTD_DEV_TYPE_NAND) diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index ffe89cb..7ec4599 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -193,6 +193,8 @@ */ #define CFG_NAND0_BASE 0xFF400000 #define CFG_NAND1_BASE 0xFF000000 +#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE } +#define NAND_BIG_DELAY_US 25 /* For CATcenter there is only NAND on the module */ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ @@ -218,9 +220,9 @@ #define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */ -#define NAND_DISABLE_CE(nand) do \ +#define MACRO_NAND_DISABLE_CE(nandptr) do \ { \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ + switch((unsigned long)nandptr) \ { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \ @@ -231,9 +233,9 @@ } \ } while(0) -#define NAND_ENABLE_CE(nand) do \ +#define MACRO_NAND_ENABLE_CE(nandptr) do \ { \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ + switch((unsigned long)nandptr) \ { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \ @@ -244,8 +246,7 @@ } \ } while(0) - -#define NAND_CTL_CLRALE(nandptr) do \ +#define MACRO_NAND_CTL_CLRALE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -258,7 +259,7 @@ } \ } while(0) -#define NAND_CTL_SETALE(nandptr) do \ +#define MACRO_NAND_CTL_SETALE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -271,7 +272,7 @@ } \ } while(0) -#define NAND_CTL_CLRCLE(nandptr) do \ +#define MACRO_NAND_CTL_CLRCLE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -284,7 +285,7 @@ } \ } while(0) -#define NAND_CTL_SETCLE(nandptr) do { \ +#define MACRO_NAND_CTL_SETCLE(nandptr) do { \ switch((unsigned long)nandptr) { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 1e9a99e..16a9ea5 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -178,8 +178,6 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include -#define CFG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index aaa44c5..29eb874 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -236,6 +236,7 @@ */ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#define CFG_NAND_LEGACY #define CFG_NAND0_BASE 0xE1000000 #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 371ea17..3c59df4 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -217,6 +217,8 @@ /* * NAND flash support */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 #define NAND_ChipID_UNKNOWN 0x00 #define SECTORSIZE 512 diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 1bcd88d..25b6345 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -609,6 +609,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_MTD_NAND_UNSAFE diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 21945a3..242c837 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -326,8 +326,6 @@ /************************************************************ * Disk-On-Chip configuration ************************************************************/ -#define CFG_NAND_LEGACY - #define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ #define CFG_DOC_SHORT_TIMEOUT #define CFG_DOC_SUPPORT_2000 diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 3f29190..5f48a70 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -248,6 +248,7 @@ */ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#define CFG_NAND_LEGACY #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/delta.h b/include/configs/delta.h index b42a7e2..31feaa3 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -162,7 +162,8 @@ * NAND Flash */ /* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */ -#define CONFIG_NEW_NAND_CODE +#undef CFG_NAND_LEGACY + #define CFG_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */ #undef CFG_NAND1_BASE diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 12252ac..5837461 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -132,6 +132,7 @@ /* * Board NAND Info. */ +#define CFG_NAND_LEGACY #define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index be6c36c..614a046 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -436,6 +436,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_ECC_JFFS2 #define CONFIG_MTD_NAND_VERIFY_WRITE -- cgit v0.10.2 From bb74140defaff27ccd4c7f8ecfec3244f5890777 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 11 Apr 2006 14:39:21 +0200 Subject: Fixes common/cmd_flash.c: - fix some compiler/parser error, if using m68k tool chain - optical fix for protect on/off all messages, if using more then one bank Patch by Jens Scharsig, 28 July 2005 diff --git a/CHANGELOG b/CHANGELOG index b6e289e..216cb63 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,13 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Fixes common/cmd_flash.c: + + - fix some compiler/parser error, if using m68k tool chain + - optical fix for protect on/off all messages, if using more + then one bank + Patch by Jens Scharsig, 28 July 2005 + * Fix Lite5200B support: initialize SDelay register See Freescale's AN3221 "MPC5200B SDRAM Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190 diff --git a/common/cmd_flash.c b/common/cmd_flash.c index 201f4e3..cb1c5bb 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -125,13 +125,16 @@ abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl) static int addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last) { - char len_used = 0; /* indicates if the "start +length" form used */ char *ep; + char len_used; /* indicates if the "start +length" form used */ + char found; + ulong bank; *addr_first = simple_strtoul(arg1, &ep, 16); if (ep == arg1 || *ep != '\0') return -1; + len_used = 0; if (arg2 && *arg2 == '+'){ len_used = 1; ++arg2; @@ -142,9 +145,6 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last) return -1; if (len_used){ - char found = 0; - ulong bank; - /* * *addr_last has the length, compute correct *addr_last * XXX watch out for the integer overflow! Right now it is @@ -159,6 +159,7 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last) */ /* find the end addr of the sector where the *addr_last is */ + found = 0; for (bank = 0; bank < CFG_MAX_FLASH_BANKS && !found; ++bank){ int i; flash_info_t *info = &flash_info[bank]; @@ -506,12 +507,10 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) info->protect[i] = p; #endif /* CFG_FLASH_PROTECTION */ } - } - #if defined(CFG_FLASH_PROTECTION) - if (!rcode) puts (" done\n"); + if (!rcode) puts (" done\n"); #endif /* CFG_FLASH_PROTECTION */ - + } return rcode; } -- cgit v0.10.2 From ad88297e2f14220f34417d1304d256285887aed4 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 11 Apr 2006 14:53:29 +0200 Subject: * Fix dbau1x00 Board - Fix dbau1x00 boards broken by dbau1550 patch PLL:s were not set for boards other than 1550. Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. Default boot is now bootp for cards other than 1550. Patch by Thomas Lange Aug 10 2005 diff --git a/CHANGELOG b/CHANGELOG index 216cb63..e006f0e 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,6 +1,12 @@ ====================================================================== Changes since U-Boot 1.1.4: ====================================================================== +* Fix dbau1x00 Board + - Fix dbau1x00 boards broken by dbau1550 patch + PLL:s were not set for boards other than 1550. + Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. + Default boot is now bootp for cards other than 1550. + Patch by Thomas Lange Aug 10 2005 * Fixes common/cmd_flash.c: diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S index 7afd584..14a7846 100644 --- a/board/dbau1x00/lowlevel_init.S +++ b/board/dbau1x00/lowlevel_init.S @@ -185,6 +185,8 @@ tlbloop: bne t0, t2, tlbloop nop +#endif /* CONFIG_DBAU1550 */ + /* First setup pll:s to make serial work ok */ /* We have a 12 MHz crystal */ li t0, SYS_CPUPLL @@ -205,6 +207,7 @@ tlbloop: sw t1, 0(t0) /* aux pll */ sync +#ifdef CONFIG_DBAU1550 /* Static memory controller */ /* RCE0 - can not change while fetching, do so from icache */ move t2, ra /* Store return address */ @@ -237,7 +240,7 @@ noCacheJump: sw t1, 0(t0) #else /* CONFIG_DBAU1550 */ li t0, MEM_STTIME0 - li t1, 0x00014C0F + li t1, 0x040181D7 sw t1, 0(t0) /* RCE0 AMD 29LV640M MirrorBit Flash */ diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index 0a10e3c..4cc5085 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -81,8 +81,7 @@ CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \ CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C)) #else /* CONFIG_DBAU1550 */ -/* Boot from Compact flash partition 2 as default */ -#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm" +#define CONFIG_BOOTCOMMAND "bootp;bootm" #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \ ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \ @@ -133,8 +132,6 @@ #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */ -#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} - #else /* CONFIG_DBAU1550 */ #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ @@ -145,6 +142,8 @@ #endif /* CONFIG_DBAU1550 */ +#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} + #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1 -- cgit v0.10.2 From b81a4630a3914d611ca3e72b451c4509c60ae9b1 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 13 Apr 2006 16:35:22 +0200 Subject: Fix Quad UART mapping on MCC200 board due to new HW revision diff --git a/CHANGELOG b/CHANGELOG index 1ddbcc2..97f729c 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,8 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Fix Quad UART mapping on MCC200 board due to new HW revision + * Fix JFFS2 support for legacy NAND driver. * Remove dependencies between DoC code and old legacy NAND driver. diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 67c2483..2b1c0d0 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -250,7 +250,7 @@ /* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */ #define CFG_CS2_START 0x80000000 #define CFG_CS2_SIZE 0x00001000 -#define CFG_CS2_CFG 0x1d800 +#define CFG_CS2_CFG 0x1d300 #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 -- cgit v0.10.2 From cf48eb9abd76e5a056937a4e49be094826026abc Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 16 Apr 2006 10:51:58 +0200 Subject: Some code cleanup diff --git a/CHANGELOG b/CHANGELOG index 20f72e8..becc55c 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,19 +1,20 @@ ====================================================================== Changes since U-Boot 1.1.4: ====================================================================== -* Fix dbau1x00 Board - - Fix dbau1x00 boards broken by dbau1550 patch - PLL:s were not set for boards other than 1550. - Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. - Default boot is now bootp for cards other than 1550. - Patch by Thomas Lange Aug 10 2005 -* Fixes common/cmd_flash.c: +* Some code cleanup - - fix some compiler/parser error, if using m68k tool chain - - optical fix for protect on/off all messages, if using more - then one bank - Patch by Jens Scharsig, 28 July 2005 +* Fix dbau1x00 boards broken by dbau1550 patch + PLL:s were not set for boards other than 1550. + Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. + Default boot is now bootp for cards other than 1550. + Patch by Thomas Lange, 10 Aug 2005 + +* Fixes common/cmd_flash.c: + - fix some compiler/parser error, if using m68k tool chain + - optical fix for protect on/off all messages, if using more + then one bank + Patch by Jens Scharsig, 28 Jul 2005 * Fix Quad UART mapping on MCC200 board due to new HW revision @@ -57,18 +58,18 @@ Changes since U-Boot 1.1.4: * Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) 405 SDRAM: - The SDRAM parameters can now be defined in the board - config file and the 405 SDRAM controller values will - be calculated upon bootup (see PPChameleonEVB). - When those settings are not defined in the board - config file, the register setup will be as it is now, - so this implementation should not break any current - design using this code. + config file and the 405 SDRAM controller values will + be calculated upon bootup (see PPChameleonEVB). + When those settings are not defined in the board + config file, the register setup will be as it is now, + so this implementation should not break any current + design using this code. - Thanks to Andrea Marson from DAVE for this patch. + Thanks to Andrea Marson from DAVE for this patch. 440 DDR: - Added function sdram_tr1_set to auto calculate the - TR1 value for the DDR. - - Added ECC support (see p3p440). + TR1 value for the DDR. + - Added ECC support (see p3p440). Patch by Stefan Roese, 17 Mar 2006 @@ -442,7 +443,7 @@ Changes since U-Boot 1.1.4: are removed from the default U-Boot build. Enable DEBUG for lib_arm/board.c to enable debug messages. New CONFIG_DISPLAY_CPUINFO and CONFIG_DISPLAY_BOARDINFO options. - Patch by Stefan Roese, 24 Jan 2006 + Patch by Stefan Roese, 24 Jan 2006 * Fix various compiler warnings on ppc4xx builds (ELDK 4.0) Patch by Stefan Roese, 18 Jan 2006 @@ -588,11 +589,11 @@ Changes for U-Boot 1.1.4: * Add support for multiple PHYs. Tested on the following boards: - cmcpu2 (at91rm9200/ether.c) + cmcpu2 (at91rm9200/ether.c) PPChameleon (ppc4xx/4xx_enet.c) - yukon (mpc8220/fec.c) - uc100 (mpc8xx/fec.c) - tqm834x (mpc834x/tsec.c) with EEPRO100 + yukon (mpc8220/fec.c) + uc100 (mpc8xx/fec.c) + tqm834x (mpc834x/tsec.c) with EEPRO100 lite5200 (mpc5xxx/fec.c) with EEPRO100 card (drivers/eepro100.c) Main changes include: common/miiphyutil.c @@ -1132,18 +1133,18 @@ Changes for U-Boot 1.1.3: The first one is to define a single, static partition: #undef CONFIG_JFFS2_CMDLINE - #define CONFIG_JFFS2_DEV "nor0" - #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF /* use whole device */ - #define CONFIG_JFFS2_PART_SIZE 0x00100000 /* use 1MB */ - #define CONFIG_JFFS2_PART_OFFSET 0x00000000 + #define CONFIG_JFFS2_DEV "nor0" + #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF /* use whole device */ + #define CONFIG_JFFS2_PART_SIZE 0x00100000 /* use 1MB */ + #define CONFIG_JFFS2_PART_OFFSET 0x00000000 The second method uses the mtdparts command line option and dynamic partitioning: /* mtdparts command line support */ #define CONFIG_JFFS2_CMDLINE - #define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2" - #define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)" + #define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2" + #define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)" Command line of course produces bigger images, and may be inappropriate for some targets, so by default it's off. @@ -3456,7 +3457,7 @@ Changes for U-Boot 1.0.1: Bring ARM memory layout in sync with the documentation: stack and malloc-heap are now located _below_ the U-Boot code -* Accelerate booting on TRAB board: read and check autoupdate image +* Accelerate booting on TRAB board: read and check autoupdate image headers first instead of always reading the whole images. * Fix type in MPC5XXX code (pointed out by Victor Wren) @@ -3576,7 +3577,7 @@ Changes for U-Boot 1.0.0: * Make 5200 reset command _really_ reset the board, without running any other code after it -* Fix errors with flash erase when range spans across banks +* Fix errors with flash erase when range spans across banks that are mapped in reverse order * Fix flash mapping and display on P3G4 board @@ -3820,7 +3821,7 @@ Changes for U-Boot 0.4.8: or 1 x AM29LV652 (two LV065 in one chip = 16 MB); Run IPB at 133 Mhz; adjust the MII clock frequency accordingly -* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16 MHz) +* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16 MHz) to allow for more accurate baudrate settings (error now 0.7% at 115 kbps, instead of 3.5% before) @@ -4307,7 +4308,7 @@ Changes for U-Boot 0.4.0: Update for MPC8266ADS board * Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length - instead CFG_MONITOR_LEN is now only used to determine _at_compile_ + instead CFG_MONITOR_LEN is now only used to determine _at_compile_ _time_ (!) if the environment is embedded within the U-Boot image, or in a separate flash sector. @@ -4357,7 +4358,7 @@ Changes for U-Boot 0.4.0: * Patch by Thomas Schäfer, 28 Apr 2003: Fix SPD handling for 256 ECC DIMM on Walnut -* Add support for arbitrary bitmaps for TRAB's VFD command; +* Add support for arbitrary bitmaps for TRAB's VFD command; allow to pass boot bitmap addresses in environment variables; allow for zero boot delay @@ -4700,7 +4701,7 @@ Changes for U-Boot 0.3.0: * Add VFD type detection to trab board -* extend drivers/cs8900.c driver to synchronize ethaddr environment +* extend drivers/cs8900.c driver to synchronize ethaddr environment variable with value in the EEPROM * Patch by Stefan Roese, 10 Feb 2003: @@ -4860,7 +4861,7 @@ Changes for U-Boot 0.2.0: * Patch by Pierre Aubert, 05 Nov 2002 Add support for slave serial Spartan 2 FPGAs -* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet +* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet drivers * Add support for log buffer which can be passed to Linux kernel's diff --git a/README b/README index ae9e10f..3ae9cfc 100644 --- a/README +++ b/README @@ -307,7 +307,7 @@ The following options need to be configured: CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250, CONFIG_CSB637, CONFIG_DELTA, CONFIG_DNP1110, CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, - CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, + CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, CONFIG_KB9202, CONFIG_LART, CONFIG_LPD7A400, CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON, CONFIG_P2_OMAP730, CONFIG_SMDK2400, @@ -388,12 +388,12 @@ The following options need to be configured: frequency is this value multiplied by 13 MHz. CFG_MONAHANS_TURBO_RUN_MODE_RATIO - + Defines the Monahans turbo mode to oscillator ratio. Valid values are 1 (default if undefined) and - 2. The core frequency as calculated above is multiplied + 2. The core frequency as calculated above is multiplied by this value. - + - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 4197a7c..4f056b2 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -187,17 +187,17 @@ long int initdram (int board_type) #endif /* CFG_RAMBOOT */ /* - * On MPC5200B we need to set the special configuration delay in the - * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM + * On MPC5200B we need to set the special configuration delay in the + * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190: * - * "The SDelay should be written to a value of 0x00000004. It is - * required to account for changes caused by normal wafer processing + * "The SDelay should be written to a value of 0x00000004. It is + * required to account for changes caused by normal wafer processing * parameters." - */ + */ svr = get_svr(); pvr = get_pvr(); - if ((SVR_MJREV(svr) >= 2) && + if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) { *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c index 73a33f6..7ece7db 100644 --- a/board/mpc8349emds/mpc8349emds.c +++ b/board/mpc8349emds/mpc8349emds.c @@ -116,14 +116,14 @@ int fixed_sdram(void) im->ddr.csbnds[2].csbnds = 0x0000000f; im->ddr.cs_config[2] = CFG_DDR_CONFIG; - /* currently we use only one CS, so disable the other banks */ + /* currently we use only one CS, so disable the other banks */ im->ddr.cs_config[0] = 0; im->ddr.cs_config[1] = 0; im->ddr.cs_config[3] = 0; im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2; - + im->ddr.sdram_cfg = SDRAM_CFG_SREN #if defined(CONFIG_DDR_2T_TIMING) @@ -136,7 +136,7 @@ int fixed_sdram(void) #endif im->ddr.sdram_mode = CFG_DDR_MODE; - im->ddr.sdram_interval = CFG_DDR_INTERVAL; + im->ddr.sdram_interval = CFG_DDR_INTERVAL; udelay(200); /* enable DDR controller */ @@ -361,12 +361,12 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) volatile u32 val; u64 *addr, count, val64; register u64 *i; - + if (argc > 4) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } - + if (argc == 2) { if (strcmp(argv[1], "status") == 0) { ecc_print_status(); @@ -379,8 +379,8 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ddr->capture_attributes = 0; return 0; } - } - + } + if (argc == 3) { if (strcmp(argv[1], "sbecnt") == 0) { val = simple_strtoul(argv[2], NULL, 10); @@ -416,8 +416,8 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } else if (strcmp(argv[2], "+mse") == 0) { val |= ECC_ERROR_DISABLE_MSED; } else if (strcmp(argv[2], "+all") == 0) { - val |= (ECC_ERROR_DISABLE_SBED | - ECC_ERROR_DISABLE_MBED | + val |= (ECC_ERROR_DISABLE_SBED | + ECC_ERROR_DISABLE_MBED | ECC_ERROR_DISABLE_MSED); } else if (strcmp(argv[2], "-sbe") == 0) { val &= ~ECC_ERROR_DISABLE_SBED; @@ -426,8 +426,8 @@ int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } else if (strcmp(argv[2], "-mse") == 0) { val &= ~ECC_ERROR_DISABLE_MSED; } else if (strcmp(argv[2], "-all") == 0) { - val &= ~(ECC_ERROR_DISABLE_SBED | - ECC_ERROR_DISABLE_MBED | + val &= ~(ECC_ERROR_DISABLE_SBED | + ECC_ERROR_DISABLE_MBED | ECC_ERROR_DISABLE_MSED); } else { printf("Incorrect err_disable field\n"); diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c index 913f95c..abf2fd5 100644 --- a/board/mx1ads/mx1ads.c +++ b/board/mx1ads/mx1ads.c @@ -85,7 +85,7 @@ int board_init (void) GPCR = 0x000003AB; /* I/O pad driving strength */ - /* MX1_CS1U = 0x00000A00; *//* SRAM initialization */ + /* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */ /* MX1_CS1L = 0x11110601; */ MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ diff --git a/common/cmd_load.c b/common/cmd_load.c index 31fef81..2432ee2 100644 --- a/common/cmd_load.c +++ b/common/cmd_load.c @@ -973,7 +973,7 @@ START: } static int getcxmodem(void) { - if (tstc()) + if (tstc()) return (getc()); return -1; } @@ -984,49 +984,51 @@ static ulong load_serial_ymodem (ulong offset) int err; int res; connection_info_t info; - char ymodemBuf[1024]; - ulong store_addr = ~0; - ulong addr = 0; + char ymodemBuf[1024]; + ulong store_addr = ~0; + ulong addr = 0; - size=0; - info.mode=xyzModem_ymodem; - res=xyzModem_stream_open(&info, &err); + size = 0; + info.mode = xyzModem_ymodem; + res = xyzModem_stream_open (&info, &err); if (!res) { - - while ((res=xyzModem_stream_read(ymodemBuf, 1024, &err)) > 0 ){ - store_addr = addr + offset; - size+=res; - addr+=res; -#ifndef CFG_NO_FLASH - if (addr2info(store_addr)) { - int rc; - rc = flash_write((char *)ymodemBuf,store_addr,res); - if (rc != 0) { - flash_perror (rc); - return (~0); - } - } else + while ((res = + xyzModem_stream_read (ymodemBuf, 1024, &err)) > 0) { + store_addr = addr + offset; + size += res; + addr += res; +#ifndef CFG_NO_FLASH + if (addr2info (store_addr)) { + int rc; + + rc = flash_write ((char *) ymodemBuf, + store_addr, res); + if (rc != 0) { + flash_perror (rc); + return (~0); + } + } else #endif - { - memcpy ((char *)(store_addr), ymodemBuf, res); - } - - } - } - else { - printf ("%s\n",xyzModem_error(err)); + { + memcpy ((char *) (store_addr), ymodemBuf, + res); + } + + } + } else { + printf ("%s\n", xyzModem_error (err)); } - - xyzModem_stream_close(&err); - xyzModem_stream_terminate(false,&getcxmodem); + + xyzModem_stream_close (&err); + xyzModem_stream_terminate (false, &getcxmodem); flush_cache (offset, size); - printf("## Total Size = 0x%08x = %d Bytes\n", size, size); - sprintf(buf, "%X", size); - setenv("filesize", buf); + printf ("## Total Size = 0x%08x = %d Bytes\n", size, size); + sprintf (buf, "%X", size); + setenv ("filesize", buf); return offset; } diff --git a/common/crc16.c b/common/crc16.c index d571405..3cef106 100644 --- a/common/crc16.c +++ b/common/crc16.c @@ -1,94 +1,96 @@ -//========================================================================== -// -// crc16.c -// -// 16 bit CRC with polynomial x^16+x^12+x^5+1 -// -//========================================================================== -//####ECOSGPLCOPYRIGHTBEGIN#### -// ------------------------------------------- -// This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. -// Copyright (C) 2002 Gary Thomas -// -// eCos is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free -// Software Foundation; either version 2 or (at your option) any later version. -// -// eCos is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or -// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -// for more details. -// -// You should have received a copy of the GNU General Public License along -// with eCos; if not, write to the Free Software Foundation, Inc., -// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. -// -// As a special exception, if other files instantiate templates or use macros -// or inline functions from this file, or you compile this file and link it -// with other works to produce a work based on this file, this file does not -// by itself cause the resulting work to be covered by the GNU General Public -// License. However the source code for this file must still be made available -// in accordance with section (3) of the GNU General Public License. -// -// This exception does not invalidate any other reasons why a work based on -// this file might be covered by the GNU General Public License. -// -// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. -// at http://sources.redhat.com/ecos/ecos-license/ -// ------------------------------------------- -//####ECOSGPLCOPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas,asl -// Date: 2001-01-31 -// Purpose: -// Description: -// -// This code is part of eCos (tm). -// -//####DESCRIPTIONEND#### -// -//========================================================================== +/* + *========================================================================== + * + * crc16.c + * + * 16 bit CRC with polynomial x^16+x^12+x^5+1 + * + *========================================================================== + *####ECOSGPLCOPYRIGHTBEGIN#### + * ------------------------------------------- + * This file is part of eCos, the Embedded Configurable Operating System. + * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + * Copyright (C) 2002 Gary Thomas + * + * eCos is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 or (at your option) any later version. + * + * eCos is distributed in the hope that it will be useful, but WITHOUT ANY + * WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with eCos; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + * + * As a special exception, if other files instantiate templates or use macros + * or inline functions from this file, or you compile this file and link it + * with other works to produce a work based on this file, this file does not + * by itself cause the resulting work to be covered by the GNU General Public + * License. However the source code for this file must still be made available + * in accordance with section (3) of the GNU General Public License. + * + * This exception does not invalidate any other reasons why a work based on + * this file might be covered by the GNU General Public License. + * + * Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. + * at http: *sources.redhat.com/ecos/ecos-license/ + * ------------------------------------------- + *####ECOSGPLCOPYRIGHTEND#### + *========================================================================== + *#####DESCRIPTIONBEGIN#### + * + * Author(s): gthomas + * Contributors: gthomas,asl + * Date: 2001-01-31 + * Purpose: + * Description: + * + * This code is part of eCos (tm). + * + *####DESCRIPTIONEND#### + * + *========================================================================== + */ #include "crc.h" -// Table of CRC constants - implements x^16+x^12+x^5+1 +/* Table of CRC constants - implements x^16+x^12+x^5+1 */ static const uint16_t crc16_tab[] = { - 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, - 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, - 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, - 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, - 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, - 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, - 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, - 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, - 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, - 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, - 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, - 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, - 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, - 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, - 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, - 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, - 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, - 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, - 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, - 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, - 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, - 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, - 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, - 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, - 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, - 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, - 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, - 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, - 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, - 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, - 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, - 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, }; uint16_t @@ -103,4 +105,3 @@ cyg_crc16(unsigned char *buf, int len) } return cksum; } - diff --git a/common/xyzModem.c b/common/xyzModem.c index 3c86b13..4a137bf 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -1,65 +1,67 @@ -//========================================================================== -// -// xyzModem.c -// -// RedBoot stream handler for xyzModem protocol -// -//========================================================================== -//####ECOSGPLCOPYRIGHTBEGIN#### -// ------------------------------------------- -// This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. -// Copyright (C) 2002 Gary Thomas -// -// eCos is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free -// Software Foundation; either version 2 or (at your option) any later version. -// -// eCos is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or -// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -// for more details. -// -// You should have received a copy of the GNU General Public License along -// with eCos; if not, write to the Free Software Foundation, Inc., -// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. -// -// As a special exception, if other files instantiate templates or use macros -// or inline functions from this file, or you compile this file and link it -// with other works to produce a work based on this file, this file does not -// by itself cause the resulting work to be covered by the GNU General Public -// License. However the source code for this file must still be made available -// in accordance with section (3) of the GNU General Public License. -// -// This exception does not invalidate any other reasons why a work based on -// this file might be covered by the GNU General Public License. -// -// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. -// at http://sources.redhat.com/ecos/ecos-license/ -// ------------------------------------------- -//####ECOSGPLCOPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas, tsmith, Yoshinori Sato -// Date: 2000-07-14 -// Purpose: -// Description: -// -// This code is part of RedBoot (tm). -// -//####DESCRIPTIONEND#### -// -//========================================================================== +/* + *========================================================================== + * + * xyzModem.c + * + * RedBoot stream handler for xyzModem protocol + * + *========================================================================== + *####ECOSGPLCOPYRIGHTBEGIN#### + * ------------------------------------------- + * This file is part of eCos, the Embedded Configurable Operating System. + * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + * Copyright (C) 2002 Gary Thomas + * + * eCos is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 or (at your option) any later version. + * + * eCos is distributed in the hope that it will be useful, but WITHOUT ANY + * WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with eCos; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + * + * As a special exception, if other files instantiate templates or use macros + * or inline functions from this file, or you compile this file and link it + * with other works to produce a work based on this file, this file does not + * by itself cause the resulting work to be covered by the GNU General Public + * License. However the source code for this file must still be made available + * in accordance with section (3) of the GNU General Public License. + * + * This exception does not invalidate any other reasons why a work based on + * this file might be covered by the GNU General Public License. + * + * Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. + * at http: *sources.redhat.com/ecos/ecos-license/ + * ------------------------------------------- + *####ECOSGPLCOPYRIGHTEND#### + *========================================================================== + *#####DESCRIPTIONBEGIN#### + * + * Author(s): gthomas + * Contributors: gthomas, tsmith, Yoshinori Sato + * Date: 2000-07-14 + * Purpose: + * Description: + * + * This code is part of RedBoot (tm). + * + *####DESCRIPTIONEND#### + * + *========================================================================== + */ #include #include #include #include -// Assumption - run xyzModem protocol over the console port +/* Assumption - run xyzModem protocol over the console port */ -// Values magic to the protocol +/* Values magic to the protocol */ #define SOH 0x01 #define STX 0x02 #define EOT 0x04 @@ -67,11 +69,11 @@ #define BSP 0x08 #define NAK 0x15 #define CAN 0x18 -#define EOF 0x1A // ^Z for DOS officionados +#define EOF 0x1A /* ^Z for DOS officionados */ #define USE_YMODEM_LENGTH -// Data & state local to the protocol +/* Data & state local to the protocol */ static struct { #ifdef REDBOOT hal_virtual_comm_table_t* __chan; @@ -80,7 +82,7 @@ static struct { #endif unsigned char pkt[1024], *bufp; unsigned char blk,cblk,crc1,crc2; - unsigned char next_blk; // Expected block + unsigned char next_blk; /* Expected block */ int len, mode, total_retries; int total_SOH, total_STX, total_CAN; bool crc_mode, at_eof, tx_ack; @@ -89,13 +91,13 @@ static struct { #endif } xyz; -#define xyzModem_CHAR_TIMEOUT 2000 // 2 seconds +#define xyzModem_CHAR_TIMEOUT 2000 /* 2 seconds */ #define xyzModem_MAX_RETRIES 20 #define xyzModem_MAX_RETRIES_WITH_CRC 10 -#define xyzModem_CAN_COUNT 3 // Wait for 3 CAN before quitting +#define xyzModem_CAN_COUNT 3 /* Wait for 3 CAN before quitting */ -#ifndef REDBOOT //SB +#ifndef REDBOOT /*SB */ typedef int cyg_int32; int CYGACC_COMM_IF_GETC_TIMEOUT (char chan,char *c) { #define DELAY 20 @@ -115,7 +117,7 @@ void CYGACC_COMM_IF_PUTC(char x,char y) { putc(y); } -// Validate a hex character +/* Validate a hex character */ __inline__ static bool _is_hex(char c) { @@ -124,7 +126,7 @@ _is_hex(char c) ((c >= 'a') && (c <= 'f'))); } -// Convert a single hex nibble +/* Convert a single hex nibble */ __inline__ static int _from_hex(char c) { @@ -140,7 +142,7 @@ _from_hex(char c) return ret; } -// Convert a character to lower case +/* Convert a character to lower case */ __inline__ static char _tolower(char c) { @@ -150,11 +152,7 @@ _tolower(char c) return c; } - - -// -// Parse (scan) a number -// +/* Parse (scan) a number */ bool parse_num(char *s, unsigned long *val, char **es, char *delim) { @@ -173,10 +171,10 @@ parse_num(char *s, unsigned long *val, char **es, char *delim) first = false; c = *s++; if (_is_hex(c) && ((digit = _from_hex(c)) < radix)) { - // Valid digit + /* Valid digit */ #ifdef CYGPKG_HAL_MIPS - // FIXME: tx49 compiler generates 0x2539018 for MUL which - // isn't any good. + /* FIXME: tx49 compiler generates 0x2539018 for MUL which */ + /* isn't any good. */ if (16 == radix) result = result << 4; else @@ -187,12 +185,12 @@ parse_num(char *s, unsigned long *val, char **es, char *delim) #endif } else { if (delim != (char *)0) { - // See if this character is one of the delimiters + /* See if this character is one of the delimiters */ char *dp = delim; while (*dp && (c != *dp)) dp++; - if (*dp) break; // Found a good delimiter + if (*dp) break; /* Found a good delimiter */ } - return false; // Malformatted number + return false; /* Malformatted number */ } } *val = result; @@ -207,11 +205,11 @@ parse_num(char *s, unsigned long *val, char **es, char *delim) #define USE_SPRINTF #ifdef DEBUG #ifndef USE_SPRINTF -// -// Note: this debug setup only works if the target platform has two serial ports -// available so that the other one (currently only port 1) can be used for debug -// messages. -// +/* + * Note: this debug setup only works if the target platform has two serial ports + * available so that the other one (currently only port 1) can be used for debug + * messages. + */ static int zm_dprintf(char *fmt, ...) { @@ -235,9 +233,9 @@ zm_flush(void) } #else -// -// Note: this debug setup works by storing the strings in a fixed buffer -// +/* + * Note: this debug setup works by storing the strings in a fixed buffer + */ #define FINAL #ifdef FINAL static char *zm_out = (char *)0x00380000; @@ -308,7 +306,7 @@ zm_dump(int line) #define ZM_DEBUG(x) #endif -// Wait for the line to go idle +/* Wait for the line to go idle */ static void xyzModem_flush(void) { @@ -330,7 +328,7 @@ xyzModem_get_hdr(void) unsigned short cksum; ZM_DEBUG(zm_new()); - // Find the start of a header + /* Find the start of a header */ can_total = 0; hdr_chars = 0; @@ -356,11 +354,11 @@ xyzModem_get_hdr(void) if (++can_total == xyzModem_CAN_COUNT) { return xyzModem_cancel; } else { - // Wait for multiple CAN to avoid early quits + /* Wait for multiple CAN to avoid early quits */ break; } case EOT: - // EOT only supported if no noise + /* EOT only supported if no noise */ if (hdr_chars == 1) { CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); ZM_DEBUG(zm_dprintf("ACK on EOT #%d\n", __LINE__)); @@ -368,19 +366,19 @@ xyzModem_get_hdr(void) return xyzModem_eof; } default: - // Ignore, waiting for start of header + /* Ignore, waiting for start of header */ ; } } else { - // Data stream timed out - xyzModem_flush(); // Toss any current input + /* Data stream timed out */ + xyzModem_flush(); /* Toss any current input */ ZM_DEBUG(zm_dump(__LINE__)); CYGACC_CALL_IF_DELAY_US((cyg_int32)250000); return xyzModem_timeout; } } - // Header found, now read the data + /* Header found, now read the data */ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &xyz.blk); ZM_DEBUG(zm_save(xyz.blk)); if (!res) { @@ -420,18 +418,18 @@ xyzModem_get_hdr(void) } } ZM_DEBUG(zm_dump(__LINE__)); - // Validate the message + /* Validate the message */ if ((xyz.blk ^ xyz.cblk) != (unsigned char)0xFF) { ZM_DEBUG(zm_dprintf("Framing error - blk: %x/%x/%x\n", xyz.blk, xyz.cblk, (xyz.blk ^ xyz.cblk))); ZM_DEBUG(zm_dump_buf(xyz.pkt, xyz.len)); xyzModem_flush(); return xyzModem_frame; } - // Verify checksum/CRC + /* Verify checksum/CRC */ if (xyz.crc_mode) { cksum = cyg_crc16(xyz.pkt, xyz.len); if (cksum != ((xyz.crc1 << 8) | xyz.crc2)) { - ZM_DEBUG(zm_dprintf("CRC error - recvd: %02x%02x, computed: %x\n", + ZM_DEBUG(zm_dprintf("CRC error - recvd: %02x%02x, computed: %x\n", xyz.crc1, xyz.crc2, cksum & 0xFFFF)); return xyzModem_cksum; } @@ -445,18 +443,18 @@ xyzModem_get_hdr(void) return xyzModem_cksum; } } - // If we get here, the message passes [structural] muster + /* If we get here, the message passes [structural] muster */ return 0; } -int +int xyzModem_stream_open(connection_info_t *info, int *err) { int console_chan, stat=0; int retries = xyzModem_MAX_RETRIES; int crc_retries = xyzModem_MAX_RETRIES_WITH_CRC; -// ZM_DEBUG(zm_out = zm_out_start); +/* ZM_DEBUG(zm_out = zm_out_start); */ #ifdef xyzModem_zmodem if (info->mode == xyzModem_zmodem) { *err = xyzModem_noZmodem; @@ -465,7 +463,7 @@ xyzModem_stream_open(connection_info_t *info, int *err) #endif #ifdef REDBOOT - // Set up the I/O channel. Note: this allows for using a different port in the future + /* Set up the I/O channel. Note: this allows for using a different port in the future */ console_chan = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); if (info->chan >= 0) { CYGACC_CALL_IF_SET_CONSOLE_COMM(info->chan); @@ -477,9 +475,9 @@ xyzModem_stream_open(connection_info_t *info, int *err) CYGACC_CALL_IF_SET_CONSOLE_COMM(console_chan); CYGACC_COMM_IF_CONTROL(*xyz.__chan, __COMMCTL_SET_TIMEOUT, xyzModem_CHAR_TIMEOUT); #else -// TODO: CHECK ! +/* TODO: CHECK ! */ int dummy; - xyz.__chan=&dummy; + xyz.__chan=&dummy; #endif xyz.len = 0; xyz.crc_mode = true; @@ -494,11 +492,11 @@ xyzModem_stream_open(connection_info_t *info, int *err) xyz.read_length = 0; xyz.file_length = 0; #endif - + CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); if (xyz.mode == xyzModem_xmodem) { - // X-modem doesn't have an information header - exit here + /* X-modem doesn't have an information header - exit here */ xyz.next_blk = 1; return 0; } @@ -506,24 +504,24 @@ xyzModem_stream_open(connection_info_t *info, int *err) while (retries-- > 0) { stat = xyzModem_get_hdr(); if (stat == 0) { - // Y-modem file information header + /* Y-modem file information header */ if (xyz.blk == 0) { #ifdef USE_YMODEM_LENGTH - // skip filename + /* skip filename */ while (*xyz.bufp++); - // get the length + /* get the length */ parse_num(xyz.bufp, &xyz.file_length, NULL, " "); #endif - // The rest of the file name data block quietly discarded + /* The rest of the file name data block quietly discarded */ xyz.tx_ack = true; } xyz.next_blk = 1; xyz.len = 0; return 0; - } else + } else if (stat == xyzModem_timeout) { if (--crc_retries <= 0) xyz.crc_mode = false; - CYGACC_CALL_IF_DELAY_US(5*100000); // Extra delay for startup + CYGACC_CALL_IF_DELAY_US(5*100000); /* Extra delay for startup */ CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); xyz.total_retries++; ZM_DEBUG(zm_dprintf("NAK (%d)\n", __LINE__)); @@ -537,7 +535,7 @@ xyzModem_stream_open(connection_info_t *info, int *err) return -1; } -int +int xyzModem_stream_read(char *buf, int size, int *err) { int stat, total, len; @@ -545,7 +543,7 @@ xyzModem_stream_read(char *buf, int size, int *err) total = 0; stat = xyzModem_cancel; - // Try and get 'size' bytes into the buffer + /* Try and get 'size' bytes into the buffer */ while (!xyz.at_eof && (size > 0)) { if (xyz.len == 0) { retries = xyzModem_MAX_RETRIES; @@ -562,8 +560,8 @@ xyzModem_stream_read(char *buf, int size, int *err) #else if (1) { #endif - // Data blocks can be padded with ^Z (EOF) characters - // This code tries to detect and remove them + /* Data blocks can be padded with ^Z (EOF) characters */ + /* This code tries to detect and remove them */ if ((xyz.bufp[xyz.len-1] == EOF) && (xyz.bufp[xyz.len-2] == EOF) && (xyz.bufp[xyz.len-3] == EOF)) { @@ -574,10 +572,12 @@ xyzModem_stream_read(char *buf, int size, int *err) } #ifdef USE_YMODEM_LENGTH - // See if accumulated length exceeds that of the file. - // If so, reduce size (i.e., cut out pad bytes) - // Only do this for Y-modem (and Z-modem should it ever - // be supported since it can fall back to Y-modem mode). + /* + * See if accumulated length exceeds that of the file. + * If so, reduce size (i.e., cut out pad bytes) + * Only do this for Y-modem (and Z-modem should it ever + * be supported since it can fall back to Y-modem mode). + */ if (xyz.mode != xyzModem_xmodem && 0 != xyz.file_length) { xyz.read_length += xyz.len; if (xyz.read_length > xyz.file_length) { @@ -587,9 +587,9 @@ xyzModem_stream_read(char *buf, int size, int *err) #endif break; } else if (xyz.blk == ((xyz.next_blk - 1) & 0xFF)) { - // Just re-ACK this so sender will get on with it + /* Just re-ACK this so sender will get on with it */ CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); - continue; // Need new header + continue; /* Need new header */ } else { stat = xyzModem_sequence; } @@ -604,7 +604,7 @@ xyzModem_stream_read(char *buf, int size, int *err) CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); xyz.total_retries++; ZM_DEBUG(zm_dprintf("Reading Final Header\n")); - stat = xyzModem_get_hdr(); + stat = xyzModem_get_hdr(); CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK); ZM_DEBUG(zm_dprintf("FINAL ACK (%d)\n", __LINE__)); } @@ -621,7 +621,7 @@ xyzModem_stream_read(char *buf, int size, int *err) return total; } } - // Don't "read" data from the EOF protocol package + /* Don't "read" data from the EOF protocol package */ if (!xyz.at_eof) { len = xyz.len; if (size < len) len = size; @@ -639,15 +639,15 @@ xyzModem_stream_read(char *buf, int size, int *err) void xyzModem_stream_close(int *err) { - diag_printf("xyzModem - %s mode, %d(SOH)/%d(STX)/%d(CAN) packets, %d retries\n", + diag_printf("xyzModem - %s mode, %d(SOH)/%d(STX)/%d(CAN) packets, %d retries\n", xyz.crc_mode ? "CRC" : "Cksum", xyz.total_SOH, xyz.total_STX, xyz.total_CAN, xyz.total_retries); ZM_DEBUG(zm_flush()); } -// Need to be able to clean out the input buffer, so have to take the -// getc +/* Need to be able to clean out the input buffer, so have to take the */ +/* getc */ void xyzModem_stream_terminate(bool abort, int (*getc)(void)) { int c; @@ -657,8 +657,8 @@ void xyzModem_stream_terminate(bool abort, int (*getc)(void)) switch (xyz.mode) { case xyzModem_xmodem: case xyzModem_ymodem: - // The X/YMODEM Spec seems to suggest that multiple CAN followed by an equal - // number of Backspaces is a friendly way to get the other end to abort. + /* The X/YMODEM Spec seems to suggest that multiple CAN followed by an equal */ + /* number of Backspaces is a friendly way to get the other end to abort. */ CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN); @@ -667,29 +667,33 @@ void xyzModem_stream_terminate(bool abort, int (*getc)(void)) CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP); - // Now consume the rest of what's waiting on the line. + /* Now consume the rest of what's waiting on the line. */ ZM_DEBUG(zm_dprintf("Flushing serial line.\n")); xyzModem_flush(); xyz.at_eof = true; break; #ifdef xyzModem_zmodem case xyzModem_zmodem: - // Might support it some day I suppose. + /* Might support it some day I suppose. */ #endif break; } } else { ZM_DEBUG(zm_dprintf("Engaging cleanup mode...\n")); - // Consume any trailing crap left in the inbuffer from - // previous recieved blocks. Since very few files are an exact multiple - // of the transfer block size, there will almost always be some gunk here. - // If we don't eat it now, RedBoot will think the user typed it. + /* + * Consume any trailing crap left in the inbuffer from + * previous recieved blocks. Since very few files are an exact multiple + * of the transfer block size, there will almost always be some gunk here. + * If we don't eat it now, RedBoot will think the user typed it. + */ ZM_DEBUG(zm_dprintf("Trailing gunk:\n")); while ((c = (*getc)()) > -1) ; ZM_DEBUG(zm_dprintf("\n")); - // Make a small delay to give terminal programs like minicom - // time to get control again after their file transfer program - // exits. + /* + * Make a small delay to give terminal programs like minicom + * time to get control again after their file transfer program + * exits. + */ CYGACC_CALL_IF_DELAY_US((cyg_int32)250000); } } @@ -728,12 +732,12 @@ xyzModem_error(int err) } } -// -// RedBoot interface -// -#if 0 // SB +/* + * RedBoot interface + */ +#if 0 /* SB */ GETC_IO_FUNCS(xyzModem_io, xyzModem_stream_open, xyzModem_stream_close, xyzModem_stream_terminate, xyzModem_stream_read, xyzModem_error); RedBoot_load(xmodem, xyzModem_io, false, false, xyzModem_xmodem); RedBoot_load(ymodem, xyzModem_io, false, false, xyzModem_ymodem); -#endif +#endif diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 5ad4baa..6b6f828 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -58,7 +58,7 @@ int checkcpu (void) break; } - printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr), + printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr), PVR_MAJ(pvr), PVR_MIN(pvr)); #endif printf (" at %s MHz\n", strmhz (buf, clock)); diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 7ca1ceb..20bba6c 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -260,7 +260,7 @@ int dma_xfer(void *dest, u32 count, void *src) dmamr0 = (DMA_CHANNEL_TRANSFER_MODE_DIRECT | DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B | DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN); - + dma->dmamr0 = swab32(dmamr0); __asm__ __volatile__ ("sync"); diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index b4012a8..48624fe 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * + * * Copyright 2004 Freescale Semiconductor. * (C) Copyright 2003 Motorola Inc. * Xianghua Xiao (X.Xiao@motorola.com) @@ -426,7 +426,7 @@ static __inline__ unsigned long get_tbms (void) /* * Initialize all of memory for ECC, then enable errors. */ -//#define CONFIG_DDR_ECC_INIT_VIA_DMA +/* #define CONFIG_DDR_ECC_INIT_VIA_DMA */ void ddr_enable_ecc(unsigned int dram_size) { uint *p; diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c index c5ab017..e31d59d 100644 --- a/cpu/ppc4xx/sdram.c +++ b/cpu/ppc4xx/sdram.c @@ -18,7 +18,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -38,17 +38,17 @@ #ifndef CFG_SDRAM_TABLE sdram_conf_t mb0cf[] = { - {(128 << 20), 13, 0x000A4001}, /* (0-128MB) Address Mode 3, 13x10(4) */ - {(64 << 20), 13, 0x00084001}, /* (0-64MB) Address Mode 3, 13x9(4) */ - {(32 << 20), 12, 0x00062001}, /* (0-32MB) Address Mode 2, 12x9(4) */ - {(16 << 20), 12, 0x00046001}, /* (0-16MB) Address Mode 4, 12x8(4) */ - {(4 << 20), 11, 0x00008001}, /* (0-4MB) Address Mode 5, 11x8(2) */ + {(128 << 20), 13, 0x000A4001}, /* (0-128MB) Address Mode 3, 13x10(4) */ + {(64 << 20), 13, 0x00084001}, /* (0-64MB) Address Mode 3, 13x9(4) */ + {(32 << 20), 12, 0x00062001}, /* (0-32MB) Address Mode 2, 12x9(4) */ + {(16 << 20), 12, 0x00046001}, /* (0-16MB) Address Mode 4, 12x8(4) */ + {(4 << 20), 11, 0x00008001}, /* (0-4MB) Address Mode 5, 11x8(2) */ }; #else sdram_conf_t mb0cf[] = CFG_SDRAM_TABLE; #endif -#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0])) +#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0])) #ifndef CONFIG_440 @@ -65,76 +65,76 @@ static ulong ns2clks(ulong ns) static ulong compute_sdtr1(ulong speed) { #ifdef CFG_SDRAM_CASL - ulong tmp; - ulong sdtr1 = 0; - - /* CASL */ - if (CFG_SDRAM_CASL < 2) - sdtr1 |= (1 << SDRAM0_TR_CASL); - else - if (CFG_SDRAM_CASL > 4) - sdtr1 |= (3 << SDRAM0_TR_CASL); - else - sdtr1 |= ((CFG_SDRAM_CASL-1) << SDRAM0_TR_CASL); - - /* PTA */ - tmp = ns2clks(CFG_SDRAM_PTA); - if ((tmp >= 2) && (tmp <= 4)) - sdtr1 |= ((tmp-1) << SDRAM0_TR_PTA); - else - sdtr1 |= ((4-1) << SDRAM0_TR_PTA); - - /* CTP */ - tmp = ns2clks(CFG_SDRAM_CTP); - if ((tmp >= 2) && (tmp <= 4)) - sdtr1 |= ((tmp-1) << SDRAM0_TR_CTP); - else - sdtr1 |= ((4-1) << SDRAM0_TR_CTP); - - /* LDF */ - tmp = ns2clks(CFG_SDRAM_LDF); - if ((tmp >= 2) && (tmp <= 4)) - sdtr1 |= ((tmp-1) << SDRAM0_TR_LDF); - else - sdtr1 |= ((2-1) << SDRAM0_TR_LDF); - - /* RFTA */ - tmp = ns2clks(CFG_SDRAM_RFTA); - if ((tmp >= 4) && (tmp <= 10)) - sdtr1 |= ((tmp-4) << SDRAM0_TR_RFTA); - else - sdtr1 |= ((10-4) << SDRAM0_TR_RFTA); - - /* RCD */ - tmp = ns2clks(CFG_SDRAM_RCD); - if ((tmp >= 2) && (tmp <= 4)) - sdtr1 |= ((tmp-1) << SDRAM0_TR_RCD); - else - sdtr1 |= ((4-1) << SDRAM0_TR_RCD); - - return sdtr1; + ulong tmp; + ulong sdtr1 = 0; + + /* CASL */ + if (CFG_SDRAM_CASL < 2) + sdtr1 |= (1 << SDRAM0_TR_CASL); + else + if (CFG_SDRAM_CASL > 4) + sdtr1 |= (3 << SDRAM0_TR_CASL); + else + sdtr1 |= ((CFG_SDRAM_CASL-1) << SDRAM0_TR_CASL); + + /* PTA */ + tmp = ns2clks(CFG_SDRAM_PTA); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_PTA); + else + sdtr1 |= ((4-1) << SDRAM0_TR_PTA); + + /* CTP */ + tmp = ns2clks(CFG_SDRAM_CTP); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_CTP); + else + sdtr1 |= ((4-1) << SDRAM0_TR_CTP); + + /* LDF */ + tmp = ns2clks(CFG_SDRAM_LDF); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_LDF); + else + sdtr1 |= ((2-1) << SDRAM0_TR_LDF); + + /* RFTA */ + tmp = ns2clks(CFG_SDRAM_RFTA); + if ((tmp >= 4) && (tmp <= 10)) + sdtr1 |= ((tmp-4) << SDRAM0_TR_RFTA); + else + sdtr1 |= ((10-4) << SDRAM0_TR_RFTA); + + /* RCD */ + tmp = ns2clks(CFG_SDRAM_RCD); + if ((tmp >= 2) && (tmp <= 4)) + sdtr1 |= ((tmp-1) << SDRAM0_TR_RCD); + else + sdtr1 |= ((4-1) << SDRAM0_TR_RCD); + + return sdtr1; #else /* CFG_SDRAM_CASL */ - /* - * If no values are configured in the board config file - * use the default values, which seem to be ok for most - * boards. - * - * REMARK: - * For new board ports we strongly recommend to define the - * correct values for the used SDRAM chips in your board - * config file (see PPChameleonEVB.h) - */ - if (speed > 100000000) { - /* - * 133 MHz SDRAM - */ - return 0x01074015; - } else { - /* - * default: 100 MHz SDRAM - */ - return 0x0086400d; - } + /* + * If no values are configured in the board config file + * use the default values, which seem to be ok for most + * boards. + * + * REMARK: + * For new board ports we strongly recommend to define the + * correct values for the used SDRAM chips in your board + * config file (see PPChameleonEVB.h) + */ + if (speed > 100000000) { + /* + * 133 MHz SDRAM + */ + return 0x01074015; + } else { + /* + * default: 100 MHz SDRAM + */ + return 0x0086400d; + } #endif /* CFG_SDRAM_CASL */ } @@ -142,24 +142,24 @@ static ulong compute_sdtr1(ulong speed) static ulong compute_rtr(ulong speed, ulong rows, ulong refresh) { #ifdef CFG_SDRAM_CASL - ulong tmp; + ulong tmp; - tmp = ((refresh*1000*1000) / (1 << rows)) * (speed / 1000); - tmp /= 1000000; + tmp = ((refresh*1000*1000) / (1 << rows)) * (speed / 1000); + tmp /= 1000000; - return ((tmp & 0x00003FF8) << 16); + return ((tmp & 0x00003FF8) << 16); #else /* CFG_SDRAM_CASL */ - if (speed > 100000000) { - /* - * 133 MHz SDRAM - */ + if (speed > 100000000) { + /* + * 133 MHz SDRAM + */ return 0x07f00000; - } else { - /* - * default: 100 MHz SDRAM - */ + } else { + /* + * default: 100 MHz SDRAM + */ return 0x05f00000; - } + } #endif /* CFG_SDRAM_CASL */ } @@ -172,19 +172,19 @@ void sdram_init(void) ulong sdtr1; int i; - /* - * Determine SDRAM speed - */ - speed = get_bus_freq(0); /* parameter not used on ppc4xx */ + /* + * Determine SDRAM speed + */ + speed = get_bus_freq(0); /* parameter not used on ppc4xx */ - /* - * sdtr1 (register SDRAM0_TR) must take into account timings listed - * in SDRAM chip datasheet. rtr (register SDRAM0_RTR) must take into - * account actual SDRAM size. So we can set up sdtr1 according to what - * is specified in board configuration file while rtr dependds on SDRAM - * size we are assuming before detection. - */ - sdtr1 = compute_sdtr1(speed); + /* + * sdtr1 (register SDRAM0_TR) must take into account timings listed + * in SDRAM chip datasheet. rtr (register SDRAM0_RTR) must take into + * account actual SDRAM size. So we can set up sdtr1 according to what + * is specified in board configuration file while rtr dependds on SDRAM + * size we are assuming before detection. + */ + sdtr1 = compute_sdtr1(speed); for (i=0; i Date: Tue, 18 Apr 2006 11:05:03 +0200 Subject: MPC5200: enable snooping of DMA transactions on XLB even if no PCI is configured; othrwise DMA accesses aren't cache coherent which causes for example USB to fail. diff --git a/CHANGELOG b/CHANGELOG index becc55c..cbc18d9 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Changes since U-Boot 1.1.4: ====================================================================== +* MPC5200: enable snooping of DMA transactions on XLB even if no PCI + is configured; othrwise DMA accesses aren't cache coherent which + causes for example USB to fail. + * Some code cleanup * Fix dbau1x00 boards broken by dbau1550 patch diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index 4a370ff..b7e00b3 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -152,6 +152,10 @@ void cpu_init_f (void) /* enable timebase */ *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13); + /* Enable snooping for RAM */ + *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15); + *(vu_long *)(MPC5XXX_XLBARB + 0x70) = CFG_SDRAM_BASE | 0x1d; + # if defined(CFG_IPBSPEED_133) /* Motorola reports IPB should better run at 133 MHz. */ *(vu_long *)MPC5XXX_ADDECR |= 1; diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c index 1d90345..2f01d5c 100644 --- a/cpu/mpc5xxx/pci_mpc5200.c +++ b/cpu/mpc5xxx/pci_mpc5200.c @@ -135,10 +135,6 @@ void pci_mpc5xxx_init (struct pci_controller *hose) *(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3); *(vu_long *)MPC5XXX_PCI_TBATR1 = CONFIG_PCI_MEMORY_PHYS | 1; - /* Enable snooping for RAM */ - *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15); - *(vu_long *)(MPC5XXX_XLBARB + 0x70) = CONFIG_PCI_MEMORY_PHYS | 0x1d; - /* Park XLB on PCI */ *(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~((7 << 8) | (3 << 5)); *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (3 << 8) | (3 << 5); -- cgit v0.10.2 From a367d42640e3cb10afeb4950bd5beb1c7f6cf107 Mon Sep 17 00:00:00 2001 From: "dzu@denx.de" Date: Wed, 19 Apr 2006 11:52:46 +0200 Subject: Update for NC650 board. Add NC650 based CP850 configuration. Signed-off-by: dzu@denx.de diff --git a/CHANGELOG b/CHANGELOG index cbc18d9..6edcd25 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,11 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Update for NC650 board: + - Support rev1 and rev2 hardware + - adapt to new NAND layer + - add CP850 configuration based on NC650 + * MPC5200: enable snooping of DMA transactions on XLB even if no PCI is configured; othrwise DMA accesses aren't cache coherent which causes for example USB to fail. diff --git a/Makefile b/Makefile index 9b93463..249c9f0 100644 --- a/Makefile +++ b/Makefile @@ -633,8 +633,21 @@ NETTA2_config: unconfig } @./mkconfig -a $(call xtract_NETTA2,$@) ppc mpc8xx netta2 -NC650_config: unconfig - @./mkconfig $(@:_config=) ppc mpc8xx nc650 +NC650_Rev1_config \ +NC650_Rev2_config \ +CP850_config: unconfig + @ >include/config.h + @[ -z "$(findstring CP850,$@)" ] || \ + { echo "#define CONFIG_CP850 1" >>include/config.h ; \ + echo "#define CONFIG_IDS852_REV2 1" >>include/config.h ; \ + } + @[ -z "$(findstring Rev1,$@)" ] || \ + { echo "#define CONFIG_IDS852_REV1 1" >>include/config.h ; \ + } + @[ -z "$(findstring Rev2,$@)" ] || \ + { echo "#define CONFIG_IDS852_REV2 1" >>include/config.h ; \ + } + @./mkconfig -a NC650 ppc mpc8xx nc650 NX823_config: unconfig @./mkconfig $(@:_config=) ppc mpc8xx nx823 diff --git a/board/nc650/Makefile b/board/nc650/Makefile index a4dd85f..8dc4934 100644 --- a/board/nc650/Makefile +++ b/board/nc650/Makefile @@ -1,4 +1,5 @@ # +# (C) Copyright 2006 Detlev Zundel, dzu@denx.de # (C) Copyright 2004 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # @@ -25,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS = $(BOARD).o flash.o +OBJS = $(BOARD).o nand.o flash.o $(LIB): .depend $(OBJS) $(AR) crv $@ $(OBJS) diff --git a/board/nc650/config.mk b/board/nc650/config.mk index fa8ba31..5b2284a 100644 --- a/board/nc650/config.mk +++ b/board/nc650/config.mk @@ -1,4 +1,5 @@ # +# (C) Copyright 2006 Detlev Zundel, dzu@denx.de # (C) Copyright 2004 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # @@ -26,3 +27,4 @@ # TEXT_BASE = 0x40700000 +BOARDLIBS = drivers/nand/libnand.a diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c index fe96b93..c90ac9c 100644 --- a/board/nc650/nc650.c +++ b/board/nc650/nc650.c @@ -1,4 +1,5 @@ /* + * (C) Copyright 2006 Detlev Zundel, dzu@denx.de * (C) Copyright 2001 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * @@ -108,7 +109,16 @@ const uint nand_flash_table[] = { int checkboard (void) { - puts ("Board: NC650\n"); +#if !defined(CONFIG_CP850) + puts ("Board: NC650"); +#else + puts ("Board: CP850"); +#endif +#if defined(CONFIG_IDS852_REV1) + puts (" with IDS852 rev 1 module\n"); +#elif defined(CONFIG_IDS852_REV2) + puts (" with IDS852 rev 2 module\n"); +#endif return 0; } @@ -241,13 +251,61 @@ static long int dram_size (long int mamr_value, long int *base, long int maxsize return (get_ram_size(base, maxsize)); } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) -void nand_init(void) -{ - extern unsigned long nand_probe(unsigned long physadr); - unsigned long totlen = nand_probe(CFG_NAND_BASE); +#if defined(CONFIG_CP850) + +#define DPRAM_VARNAME "KP850DIP" +#define PARAM_ADDR 0x7C0 +#define NAME_ADDR 0x7F8 +#define BOARD_NAME "KP01" +#define DEFAULT_LB "241111" - printf ("%4lu MB\n", totlen >> 20); +int misc_init_r(void) +{ + int iCompatMode = 0; + char *pParam = NULL; + char *envlb; + + /* + First byte in CPLD read address space signals compatibility mode + 0 - cp850 + 1 - kp852 + */ + pParam = (char*)(CFG_CPLD_BASE); + if( *pParam != 0) + iCompatMode = 1; + + if ( iCompatMode != 0) { + /* + In KP852 compatibility mode we have to write to + DPRAM as early as possible the binary coded + line config and board name. + The line config is derived from the environment + variable DPRAM_VARNAME by converting from ASCII + to binary per character. + */ + if ( (envlb = getenv ( DPRAM_VARNAME )) == 0) { + setenv( DPRAM_VARNAME, DEFAULT_LB); + envlb = DEFAULT_LB; + } + + /* Status string */ + printf("Mode: KP852(LB=%s)\n", envlb); + + /* copy appl init */ + pParam = (char*)(DPRAM_BASE_ADDR + PARAM_ADDR); + while (*envlb) { + *(pParam++) = *(envlb++) - '0'; + } + *pParam = '\0'; + + /* copy board id */ + pParam = (char*)(DPRAM_BASE_ADDR + NAME_ADDR); + strcpy( pParam, BOARD_NAME); + } else { + puts("Mode: CP850\n"); + } + + return 0; } #endif diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 3c59df4..8da29c4 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -1,4 +1,5 @@ /* + * (C) Copyright 2006 Detlev Zundel, dzu@denx.de * (C) Copyright 2005 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * @@ -65,6 +66,11 @@ #define CFG_8XX_XIN CONFIG_8xx_OSCLK #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d seconds...\n" +#define CONFIG_AUTOBOOT_DELAY_STR "ids" +#define CONFIG_BOOT_RETRY_TIME 900 +#define CONFIG_BOOT_RETRY_MIN 30 #define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" @@ -75,7 +81,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \ "bootm" -#undef CONFIG_WATCHDOG /* watchdog disabled */ +#define CONFIG_WATCHDOG /* watchdog enabled */ #undef CONFIG_STATUS_LED /* Status LED disabled */ @@ -96,12 +102,26 @@ /* * Software (bit-bang) I2C driver configuration */ +#if defined(CONFIG_IDS852_REV1) + #define SCL 0x1000 /* PA 3 */ #define SDA 0x2000 /* PA 2 */ #define __I2C_DIR immr->im_ioport.iop_padir #define __I2C_DAT immr->im_ioport.iop_padat #define __I2C_PAR immr->im_ioport.iop_papar + +#elif defined(CONFIG_IDS852_REV2) + +#define SCL 0x0002 /* PB 30 */ +#define SDA 0x0001 /* PB 31 */ + +#define __I2C_PAR immr->im_cpm.cp_pbpar +#define __I2C_DIR immr->im_cpm.cp_pbdir +#define __I2C_DAT immr->im_cpm.cp_pbdat + +#endif + #define I2C_INIT { __I2C_PAR &= ~(SDA|SCL); \ __I2C_DIR |= (SDA|SCL); } #define I2C_READ ((__I2C_DAT & SDA) ? 1 : 0) @@ -229,17 +249,6 @@ #define ADDR_COLUMN 1 #define NAND_NO_RB -#define NAND_WAIT_READY(nand) udelay(12) -#define WRITE_NAND_COMMAND(d, adr) WRITE_NAND(d, adr + 2) -#define WRITE_NAND_ADDRESS(d, adr) WRITE_NAND(d, adr + 1) -#define WRITE_NAND(d, adr) (*(volatile uint8_t *)(adr) = (uint8_t)(d)) -#define READ_NAND(adr) (*(volatile uint8_t *)(adr)) -#define NAND_DISABLE_CE(nand) /* nop */ -#define NAND_ENABLE_CE(nand) /* nop */ -#define NAND_CTL_CLRALE(nandptr) /* nop */ -#define NAND_CTL_SETALE(nandptr) /* nop */ -#define NAND_CTL_CLRCLE(nandptr) /* nop */ -#define NAND_CTL_SETCLE(nandptr) /* nop */ /*----------------------------------------------------------------------- * SYPCR - System Protection Control 11-9 @@ -312,7 +321,8 @@ #define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V) /* - * BR2 and OR2 (NAND Flash) - now addressed through UPMB + * BR2 and OR2 (NAND Flash) - addressed through UPMB on rev 1 + * rev2 only uses the chipselect */ #define CFG_NAND_BASE 0x50000000 #define CFG_NAND_SIZE 0x04000000 @@ -338,6 +348,18 @@ #define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V) /* + * BR4 and OR4 (CPLD) + */ +#define CFG_CPLD_BASE 0x80000000 /* CPLD */ +#define CFG_CPLD_SIZE 0x10000 /* only 16 used */ + +#define CFG_OR_TIMING_CPLD (OR_CSNT_SAM | OR_ACS_DIV1 | OR_BI | \ + OR_SCY_1_CLK) + +#define CFG_BR4_PRELIM ((CFG_CPLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V ) +#define CFG_OR4_PRELIM (((-CFG_CPLD_SIZE) & OR_AM_MSK) | CFG_OR_TIMING_CPLD) + +/* * BR5 and OR5 (SRAM) */ #define CFG_SRAM_BASE 0x60000000 @@ -349,6 +371,16 @@ #define CFG_BR5_PRELIM ((CFG_SRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V ) #define CFG_OR5_PRELIM (((-CFG_SRAM_SIZE) & OR_AM_MSK) | CFG_OR_TIMING_SRAM) +#if defined(CONFIG_CP850) +/* + * BR6 and OR6 (DPRAM) - only on CP850 + */ +#define CFG_OR6_PRELIM 0xffff8170 +#define CFG_BR6_PRELIM 0xa0000401 +#define DPRAM_BASE_ADDR 0xa0000000 + +#define CONFIG_MISC_INIT_R 1 +#endif /* * 4096 Rows from SDRAM example configuration @@ -413,14 +445,12 @@ #define CONFIG_JFFS2_PART_OFFSET 0x00000000 /* mtdparts command line support */ -/* #define CONFIG_JFFS2_CMDLINE #define MTDIDS_DEFAULT "nor0=nc650-0,nand0=nc650-nand" #define MTDPARTS_DEFAULT "mtdparts=nc650-0:1m(kernel1),1m(kernel2)," \ - "2560k(cramfs1),2560k(cramfs2)," \ - "256k(u-boot),256k(env);" \ - "nc650-nand:4m(nand1),28m(nand2)" -*/ + "4m(cramfs1),1m(cramfs2)," \ + "256k(u-boot),128k(env);" \ + "nc650-nand:4m(jffs1),28m(jffs2)" #endif /* __CONFIG_H */ -- cgit v0.10.2 From 56a4a63c106cc317fc0fe42686a99416fc469f5b Mon Sep 17 00:00:00 2001 From: "dzu@denx.de" Date: Wed, 19 Apr 2006 15:27:11 +0200 Subject: Added missing nand.c for NC650 board Signed-off-by: dzu@denx.de diff --git a/board/nc650/nand.c b/board/nc650/nand.c new file mode 100644 index 0000000..f27e536 --- /dev/null +++ b/board/nc650/nand.c @@ -0,0 +1,117 @@ +/* + * (C) Copyright 2006 Detlev Zundel, dzu@denx.de + * (C) Copyright 2006 DENX Software Engineering + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include + +#if defined(CONFIG_IDS852_REV1) +/* + * hardware specific access to control-lines + */ +static void nc650_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + + switch(cmd) { + case NAND_CTL_SETCLE: + this->IO_ADDR_W += 2; + break; + case NAND_CTL_CLRCLE: + this->IO_ADDR_W -= 2; + break; + case NAND_CTL_SETALE: + this->IO_ADDR_W += 1; + break; + case NAND_CTL_CLRALE: + this->IO_ADDR_W -= 1; + break; + case NAND_CTL_SETNCE: + case NAND_CTL_CLRNCE: + /* nop */ + break; + } +} +#elif defined(CONFIG_IDS852_REV2) +/* + * hardware specific access to control-lines + */ +static void nc650_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + + switch(cmd) { + case NAND_CTL_SETCLE: + *(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; + break; + case NAND_CTL_CLRCLE: + *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; + break; + case NAND_CTL_SETALE: + *(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; + break; + case NAND_CTL_CLRALE: + *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; + break; + case NAND_CTL_SETNCE: + *(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; + break; + case NAND_CTL_CLRNCE: + *(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; + break; + } +} +#else +#error Unknown IDS852 module revision +#endif + +/* + * Board-specific NAND initialization. The following members of the + * argument are board-specific (per include/linux/mtd/nand.h): + * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device + * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device + * - hwcontrol: hardwarespecific function for accesing control-lines + * - dev_ready: hardwarespecific function for accesing device ready/busy line + * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must + * only be provided if a hardware ECC is available + * - eccmode: mode of ecc, see defines + * - chip_delay: chip dependent delay for transfering data from array to + * read regs (tR) + * - options: various chip options. They can partly be set to inform + * nand_scan about special functionality. See the defines for further + * explanation + * Members with a "?" were not set in the merged testing-NAND branch, + * so they are not set here either. + */ +void board_nand_init(struct nand_chip *nand) +{ + + nand->hwcontrol = nc650_hwcontrol; + nand->eccmode = NAND_ECC_SOFT; + nand->chip_delay = 12; +/* nand->options = NAND_SAMSUNG_LP_OPTIONS;*/ +} +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ -- cgit v0.10.2