From d15a244b059e361475302bccd471e65a48ee2b1f Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 3 May 2016 11:13:04 +0800 Subject: imx: correct speed grading info for i.MX6UL Correct speed grading info for i.MX6UL Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index d4b22ad..aaa1adb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -108,6 +108,12 @@ u32 get_cpu_rev(void) #define OCOTP_CFG3_SPEED_1GHZ 2 #define OCOTP_CFG3_SPEED_1P2GHZ 3 +/* + * For i.MX6UL + */ +#define OCOTP_CFG3_SPEED_528MHZ 1 +#define OCOTP_CFG3_SPEED_696MHZ 2 + u32 get_cpu_speed_grade_hz(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -120,6 +126,15 @@ u32 get_cpu_speed_grade_hz(void) val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; + if (is_cpu_type(MXC_CPU_MX6UL)) { + if (val == OCOTP_CFG3_SPEED_528MHZ) + return 528000000; + else if (val == OCOTP_CFG3_SPEED_696MHZ) + return 69600000; + else + return 0; + } + switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ: -- cgit v0.10.2 From 32ff58bb2e1f66aa0fc9d0e9913cdca54eb819a9 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:52 +0800 Subject: imx-common: introduce simpler macros for runtime dection Introduce simpler macros for runtime cpu dection. Signed-off-by: Peng Fan Cc: Stefano Babic Acked-by: Stefano Babic diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 386c2dc..32f95b3 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -24,7 +24,15 @@ #define is_cpu_type(cpu) (get_cpu_type() == cpu) #define is_soc_type(soc) (get_soc_type() == soc) +#define is_mx6() (is_soc_type(MXC_SOC_MX6)) +#define is_mx7() (is_soc_type(MXC_SOC_MX7)) + #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)) +#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) +#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL)) +#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX)) +#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL)) +#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL)) u32 get_nr_cpus(void); u32 get_cpu_rev(void); -- cgit v0.10.2 From dea572379e267780d7388f1ff28fca79537215c6 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:53 +0800 Subject: imx: mx6: support i.MX6SOLO when enable/disable_ldb_di_clock_sources i.MX6DL and i.MX6SOLO work the same, add i.MX6SOLO support when enable/disable_ldb_di_clock_sources. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index e6f2275..a850d1a 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -1228,7 +1228,7 @@ static void disable_ldb_di_clock_sources(void) /* Make sure PFDs are disabled at boot. */ reg = readl(&mxc_ccm->analog_pfd_528); /* Cannot disable pll2_pfd2_396M, as it is the MMDC clock in iMX6DL */ - if (is_cpu_type(MXC_CPU_MX6DL)) + if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) reg |= 0x80008080; else reg |= 0x80808080; @@ -1251,7 +1251,7 @@ static void enable_ldb_di_clock_sources(void) int reg; reg = readl(&mxc_ccm->analog_pfd_528); - if (is_cpu_type(MXC_CPU_MX6DL)) + if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) reg &= ~(0x80008080); else reg &= ~(0x80808080); -- cgit v0.10.2 From b949fd2ccbd1d9877d85e1febdfe2e96b5c150c2 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:54 +0800 Subject: imx: mx6: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. i.MX6DL and i.MX6SOLO work the same, so use is_mx6sdl. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index a850d1a..ff932aa 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -97,7 +97,7 @@ void enable_enet_clk(unsigned char enable) { u32 mask, *addr; - if (is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6ul()) { mask = MXC_CCM_CCGR3_ENET_MASK; addr = &imx_ccm->CCGR3; } else { @@ -117,7 +117,7 @@ void enable_uart_clk(unsigned char enable) { u32 mask; - if (is_cpu_type(MXC_CPU_MX6UL)) + if (is_mx6ul()) mask = MXC_CCM_CCGR5_UART_MASK; else mask = MXC_CCM_CCGR5_UART_MASK | MXC_CCM_CCGR5_UART_SERIAL_MASK; @@ -168,7 +168,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) reg &= ~mask; __raw_writel(reg, &imx_ccm->CCGR2); } else { - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6sx() || is_mx6ul()) { mask = MXC_CCM_CCGR6_I2C4_MASK; addr = &imx_ccm->CCGR6; } else { @@ -279,7 +279,7 @@ static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num) switch (pll) { case PLL_BUS: - if (!is_cpu_type(MXC_CPU_MX6UL)) { + if (!is_mx6ul()) { if (pfd_num == 3) { /* No PFD3 on PPL2 */ return 0; @@ -379,8 +379,8 @@ static u32 get_ipg_per_clk(void) u32 reg, perclk_podf; reg = __raw_readl(&imx_ccm->cscmr1); - if (is_cpu_type(MXC_CPU_MX6SL) || is_cpu_type(MXC_CPU_MX6SX) || - is_mx6dqp() || is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6sl() || is_mx6sx() || + is_mx6dqp() || is_mx6ul()) { if (reg & MXC_CCM_CSCMR1_PER_CLK_SEL_MASK) return MXC_HCLK; /* OSC 24Mhz */ } @@ -396,8 +396,7 @@ static u32 get_uart_clk(void) u32 freq = decode_pll(PLL_USBOTG, MXC_HCLK) / 6; /* static divider */ reg = __raw_readl(&imx_ccm->cscdr1); - if (is_cpu_type(MXC_CPU_MX6SL) || is_cpu_type(MXC_CPU_MX6SX) || - is_mx6dqp() || is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6sl() || is_mx6sx() || is_mx6dqp() || is_mx6ul()) { if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL) freq = MXC_HCLK; } @@ -416,8 +415,7 @@ static u32 get_cspi_clk(void) cspi_podf = (reg & MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK) >> MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET; - if (is_mx6dqp() || is_cpu_type(MXC_CPU_MX6SL) || - is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6dqp() || is_mx6sl() || is_mx6sx() || is_mx6ul()) { if (reg & MXC_CCM_CSCDR2_ECSPI_CLK_SEL_MASK) return MXC_HCLK / (cspi_podf + 1); } @@ -479,14 +477,13 @@ static u32 get_mmdc_ch0_clk(void) u32 freq, podf, per2_clk2_podf, pmu_misc2_audio_div; - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || - is_cpu_type(MXC_CPU_MX6SL)) { + if (is_mx6sx() || is_mx6ul() || is_mx6sl()) { podf = (cbcdr & MXC_CCM_CBCDR_MMDC_CH1_PODF_MASK) >> MXC_CCM_CBCDR_MMDC_CH1_PODF_OFFSET; if (cbcdr & MXC_CCM_CBCDR_PERIPH2_CLK_SEL) { per2_clk2_podf = (cbcdr & MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_MASK) >> MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_OFFSET; - if (is_cpu_type(MXC_CPU_MX6SL)) { + if (is_mx6sl()) { if (cbcmr & MXC_CCM_CBCMR_PERIPH2_CLK2_SEL) freq = MXC_HCLK; else @@ -618,7 +615,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq) debug("mxs_set_lcdclk, freq = %dKHz\n", freq); - if ((!is_cpu_type(MXC_CPU_MX6SX)) && !is_cpu_type(MXC_CPU_MX6UL)) { + if (!is_mx6sx() && !is_mx6ul()) { debug("This chip not support lcd!\n"); return; } @@ -630,7 +627,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq) return; } - if (is_cpu_type(MXC_CPU_MX6SX)) { + if (is_mx6sx()) { reg = readl(&imx_ccm->cscdr2); /* Can't change clocks when clock not from pre-mux */ if ((reg & MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_MASK) != 0) @@ -711,7 +708,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq) MXC_CCM_CBCMR_LCDIF1_PODF_MASK, ((postd - 1) << MXC_CCM_CBCMR_LCDIF1_PODF_OFFSET)); - } else if (is_cpu_type(MXC_CPU_MX6SX)) { + } else if (is_mx6sx()) { /* Setting LCDIF2 for i.MX6SX */ if (enable_pll_video(pll_div, pll_num, pll_denom, post_div)) return; @@ -737,7 +734,7 @@ int enable_lcdif_clock(u32 base_addr) u32 reg = 0; u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask; - if (is_cpu_type(MXC_CPU_MX6SX)) { + if (is_mx6sx()) { if ((base_addr != LCDIF1_BASE_ADDR) && (base_addr != LCDIF2_BASE_ADDR)) { puts("Wrong LCD interface!\n"); @@ -752,7 +749,7 @@ int enable_lcdif_clock(u32 base_addr) MXC_CCM_CCGR3_DISP_AXI_MASK) : (MXC_CCM_CCGR3_LCDIF1_PIX_MASK | MXC_CCM_CCGR3_DISP_AXI_MASK); - } else if (is_cpu_type(MXC_CPU_MX6UL)) { + } else if (is_mx6ul()) { if (base_addr != LCDIF1_BASE_ADDR) { puts("Wrong LCD interface!\n"); return -EINVAL; @@ -850,8 +847,7 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq) reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq); } else if (fec_id == 1) { /* Only i.MX6SX/UL support ENET2 */ - if (!(is_cpu_type(MXC_CPU_MX6SX) || - is_cpu_type(MXC_CPU_MX6UL))) + if (!(is_mx6sx() || is_mx6ul())) return -EINVAL; reg &= ~BM_ANADIG_PLL_ENET2_DIV_SELECT; reg |= BF_ANADIG_PLL_ENET2_DIV_SELECT(freq); @@ -1044,7 +1040,7 @@ int enable_pcie_clock(void) #define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF 0xa #define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF 0xb - if (is_cpu_type(MXC_CPU_MX6SX)) + if (is_mx6sx()) lvds1_clk_sel = ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF; else lvds1_clk_sel = ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF; @@ -1228,7 +1224,7 @@ static void disable_ldb_di_clock_sources(void) /* Make sure PFDs are disabled at boot. */ reg = readl(&mxc_ccm->analog_pfd_528); /* Cannot disable pll2_pfd2_396M, as it is the MMDC clock in iMX6DL */ - if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) + if (is_mx6sdl()) reg |= 0x80008080; else reg |= 0x80808080; @@ -1251,7 +1247,7 @@ static void enable_ldb_di_clock_sources(void) int reg; reg = readl(&mxc_ccm->analog_pfd_528); - if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) + if (is_mx6sdl()) reg &= ~(0x80008080); else reg &= ~(0x80808080); diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 1e7ae28..3cc8666 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -888,8 +888,7 @@ void mx6sdl_dram_iocfg(unsigned width, #define MR(val, ba, cmd, cs1) \ ((val << 16) | (1 << 15) | (cmd << 4) | (cs1 << 3) | ba) #define MMDC1(entry, value) do { \ - if (!is_cpu_type(MXC_CPU_MX6SX) && !is_cpu_type(MXC_CPU_MX6UL) && \ - !is_cpu_type(MXC_CPU_MX6SL)) \ + if (!is_mx6sx() && !is_mx6ul() && !is_mx6sl()) \ mmdc1->entry = value; \ } while (0) @@ -1197,12 +1196,11 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, u16 mem_speed = ddr3_cfg->mem_speed; mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; - if (!is_cpu_type(MXC_CPU_MX6SX) && !is_cpu_type(MXC_CPU_MX6UL) && - !is_cpu_type(MXC_CPU_MX6SL)) + if (!is_mx6sx() && !is_mx6ul() && !is_mx6sl()) mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR; /* Limit mem_speed for MX6D/MX6Q */ - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) { + if (is_mx6dq()) { if (mem_speed > 1066) mem_speed = 1066; /* 1066 MT/s */ @@ -1221,7 +1219,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, * Data rate of 1066 MT/s requires 533 MHz DDR3 clock, but MX6D/Q supports * up to 528 MHz, so reduce the clock to fit chip specs */ - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) { + if (is_mx6dq()) { if (clock > 528) clock = 528; /* 528 MHz */ } diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index aaa1adb..407f316 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -126,7 +126,7 @@ u32 get_cpu_speed_grade_hz(void) val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; - if (is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6ul()) { if (val == OCOTP_CFG3_SPEED_528MHZ) return 528000000; else if (val == OCOTP_CFG3_SPEED_696MHZ) @@ -138,14 +138,14 @@ u32 get_cpu_speed_grade_hz(void) switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ: - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + if (is_mx6dq()) return 1200000000; /* Valid for IMX6SX/IMX6SDL/IMX6DQ */ case OCOTP_CFG3_SPEED_1GHZ: return 996000000; /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_850MHZ: - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + if (is_mx6dq()) return 852000000; /* Valid for IMX6SX/IMX6SDL/IMX6DQ */ case OCOTP_CFG3_SPEED_800MHZ: @@ -293,7 +293,7 @@ static void clear_mmdc_ch_mask(void) reg = readl(&mxc_ccm->ccdr); /* Clear MMDC channel mask */ - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || is_cpu_type(MXC_CPU_MX6SL)) + if (is_mx6sx() || is_mx6ul() || is_mx6sl()) reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK); else reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK); @@ -459,8 +459,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) struct fuse_bank4_regs *fuse = (struct fuse_bank4_regs *)bank->fuse_regs; - if ((is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) && - dev_id == 1) { + if ((is_mx6sx() || is_mx6ul()) && dev_id == 1) { u32 value = readl(&fuse->mac_addr2); mac[0] = value >> 24 ; mac[1] = value >> 16 ; @@ -524,7 +523,7 @@ void s_init(void) u32 mask528; u32 reg, periph1, periph2; - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) + if (is_mx6sx() || is_mx6ul()) return; /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs -- cgit v0.10.2 From 003f0c7eb2f257eddc5173def53fcb5a137045c2 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:55 +0800 Subject: imx-common: hab: support i.MX6SOLO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add i.MX6SOLO support for hab function. The difference between i.MX6SOLO and i.MX6DL is the number of CPU cores. Besides this, they work the same. Signed-off-by: Peng Fan Cc: Bhuvanchandra DV Cc: "Benoît Thébaudeau" Cc: Stefano Babic diff --git a/arch/arm/imx-common/hab.c b/arch/arm/imx-common/hab.c index 8bbcc22..1e4ed7e 100644 --- a/arch/arm/imx-common/hab.c +++ b/arch/arm/imx-common/hab.c @@ -21,7 +21,8 @@ is_cpu_type(MXC_CPU_MX6D)) && \ (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ - (is_cpu_type(MXC_CPU_MX6DL) && \ + ((is_cpu_type(MXC_CPU_MX6DL) || \ + is_cpu_type(MXC_CPU_MX6SOLO)) && \ (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \ @@ -33,7 +34,8 @@ is_cpu_type(MXC_CPU_MX6D)) && \ (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ - (is_cpu_type(MXC_CPU_MX6DL) && \ + ((is_cpu_type(MXC_CPU_MX6DL) || \ + is_cpu_type(MXC_CPU_MX6SOLO)) && \ (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \ @@ -45,7 +47,8 @@ is_cpu_type(MXC_CPU_MX6D)) && \ (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ - (is_cpu_type(MXC_CPU_MX6DL) && \ + ((is_cpu_type(MXC_CPU_MX6DL) || \ + is_cpu_type(MXC_CPU_MX6SOLO)) && \ (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \ @@ -57,7 +60,8 @@ is_cpu_type(MXC_CPU_MX6D)) && \ (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ - (is_cpu_type(MXC_CPU_MX6DL) && \ + ((is_cpu_type(MXC_CPU_MX6DL) || \ + is_cpu_type(MXC_CPU_MX6SOLO)) && \ (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \ @@ -69,7 +73,8 @@ is_cpu_type(MXC_CPU_MX6D)) && \ (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ - (is_cpu_type(MXC_CPU_MX6DL) && \ + ((is_cpu_type(MXC_CPU_MX6DL) || \ + is_cpu_type(MXC_CPU_MX6SOLO)) && \ (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ ((hab_rvt_exit_t *)HAB_RVT_EXIT) \ -- cgit v0.10.2 From 27cd0da41e7c2f10d754efba0d178a5715d12bc2 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:56 +0800 Subject: imx-common: use simpler runtime cpu dection macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Bhuvanchandra DV Cc: "Benoît Thébaudeau" diff --git a/arch/arm/imx-common/hab.c b/arch/arm/imx-common/hab.c index 1e4ed7e..a980688 100644 --- a/arch/arm/imx-common/hab.c +++ b/arch/arm/imx-common/hab.c @@ -17,65 +17,45 @@ #define hab_rvt_report_event_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \ ) #define hab_rvt_report_status_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \ ) #define hab_rvt_authenticate_image_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \ ) #define hab_rvt_entry_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \ ) #define hab_rvt_exit_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ ((hab_rvt_exit_t *)HAB_RVT_EXIT) \ ) @@ -429,8 +409,7 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size) */ /* Check MMU enabled */ if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) { - if (is_cpu_type(MXC_CPU_MX6Q) || - is_cpu_type(MXC_CPU_MX6D)) { + if (is_mx6dq()) { /* * This won't work on Rev 1.0.0 of * i.MX6Q/D, since their ROM doesn't @@ -439,10 +418,9 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size) */ if (!is_mx6dqp()) writel(1, MX6DQ_PU_IROM_MMU_EN_VAR); - } else if (is_cpu_type(MXC_CPU_MX6DL) || - is_cpu_type(MXC_CPU_MX6SOLO)) { + } else if (is_mx6sdl()) { writel(1, MX6DLS_PU_IROM_MMU_EN_VAR); - } else if (is_cpu_type(MXC_CPU_MX6SL)) { + } else if (is_mx6sl()) { writel(1, MX6SL_PU_IROM_MMU_EN_VAR); } } diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index 15dab1d..3d2ce3a 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -44,7 +44,7 @@ void init_aips(void) writel(0x00000000, &aips2->opacr3); writel(0x00000000, &aips2->opacr4); - if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7)) { + if (is_mx6sx() || is_mx7()) { /* * Set all MPROTx to be non-bufferable, trusted for R/W, * not forced to user-mode. @@ -78,8 +78,7 @@ void imx_set_wdog_powerdown(bool enable) writew(enable, &wdog1->wmcr); writew(enable, &wdog2->wmcr); - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || - is_soc_type(MXC_SOC_MX7)) + if (is_mx6sx() || is_mx6ul() || is_mx7()) writew(enable, &wdog3->wmcr); #ifdef CONFIG_MX7D writew(enable, &wdog4->wmcr); diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index 228d5f8..66137d1 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -83,7 +83,7 @@ void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, #if defined(CONFIG_MX6QDL) stride = 2; - if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D)) + if (!is_mx6dq()) p += 1; #else stride = 1; diff --git a/arch/arm/imx-common/sata.c b/arch/arm/imx-common/sata.c index d174a46..dd9698d 100644 --- a/arch/arm/imx-common/sata.c +++ b/arch/arm/imx-common/sata.c @@ -15,7 +15,7 @@ int setup_sata(void) struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; int ret; - if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D)) + if (!is_mx6dq()) return 1; ret = enable_sata_clock(); diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index 92c7218..bea17f2 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -43,10 +43,8 @@ DECLARE_GLOBAL_DATA_PTR; static inline int gpt_has_clk_source_osc(void) { #if defined(CONFIG_MX6) - if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) && - (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) || - is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) || - is_cpu_type(MXC_CPU_MX6UL)) + if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) || + is_mx6sdl() || is_mx6sx() || is_mx6ul()) return 1; return 0; @@ -86,10 +84,7 @@ int timer_init(void) i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN; /* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */ - if (is_cpu_type(MXC_CPU_MX6DL) || - is_cpu_type(MXC_CPU_MX6SOLO) || - is_cpu_type(MXC_CPU_MX6SX) || - is_cpu_type(MXC_CPU_MX6UL)) { + if (is_mx6sdl() || is_mx6sx() || is_mx6ul()) { i |= GPTCR_24MEN; /* Produce 3Mhz clock */ -- cgit v0.10.2 From e4d79dcaa41a20dfeba602ce9384af5851268825 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:57 +0800 Subject: imx: mx6: ddr: support i.MX6D/QPlus Support i.MX6D/QPlus. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 3cc8666..f151eec 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -1200,7 +1200,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR; /* Limit mem_speed for MX6D/MX6Q */ - if (is_mx6dq()) { + if (is_mx6dq() || is_mx6dqp()) { if (mem_speed > 1066) mem_speed = 1066; /* 1066 MT/s */ @@ -1219,7 +1219,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, * Data rate of 1066 MT/s requires 533 MHz DDR3 clock, but MX6D/Q supports * up to 528 MHz, so reduce the clock to fit chip specs */ - if (is_mx6dq()) { + if (is_mx6dq() || is_mx6dqp()) { if (clock > 528) clock = 528; /* 528 MHz */ } -- cgit v0.10.2 From 04cb3c0b0e11cd50593af2330e5ba8f1f11068b3 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:58 +0800 Subject: imx: mx6: correct get_cpu_speed_grade_hz for i.MX6DQP Correct get_cpu_speed_grade_hz for i.MX6DQP, otherwise we will get wrong speed grade info i.MX6DQP. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 407f316..88fcfdc 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -138,14 +138,14 @@ u32 get_cpu_speed_grade_hz(void) switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ: - if (is_mx6dq()) + if (is_mx6dq() || is_mx6dqp()) return 1200000000; /* Valid for IMX6SX/IMX6SDL/IMX6DQ */ case OCOTP_CFG3_SPEED_1GHZ: return 996000000; /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_850MHZ: - if (is_mx6dq()) + if (is_mx6dq() || is_mx6dqp()) return 852000000; /* Valid for IMX6SX/IMX6SDL/IMX6DQ */ case OCOTP_CFG3_SPEED_800MHZ: -- cgit v0.10.2 From b5437a8082b7385f0d2db90e37c2342b1c0fc59f Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:35:59 +0800 Subject: imx-common: hab: support i.MX6DQPlus Support i.MX6DQPlus, otherwise wrong hab address will be used for i.MX6QDPlus. Signed-off-by: Peng Fan Cc: Ulises Cardenas Cc: Stefano Babic diff --git a/arch/arm/imx-common/hab.c b/arch/arm/imx-common/hab.c index a980688..6731825 100644 --- a/arch/arm/imx-common/hab.c +++ b/arch/arm/imx-common/hab.c @@ -17,6 +17,8 @@ #define hab_rvt_report_event_p \ ( \ + (is_mx6dqp()) ? \ + ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ @@ -26,6 +28,8 @@ #define hab_rvt_report_status_p \ ( \ + (is_mx6dqp()) ? \ + ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ @@ -35,6 +39,8 @@ #define hab_rvt_authenticate_image_p \ ( \ + (is_mx6dqp()) ? \ + ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ @@ -44,6 +50,8 @@ #define hab_rvt_entry_p \ ( \ + (is_mx6dqp()) ? \ + ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ @@ -53,6 +61,8 @@ #define hab_rvt_exit_p \ ( \ + (is_mx6dqp()) ? \ + ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ -- cgit v0.10.2 From aff3756104544ed1bb45835db4a7824fece8709e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:00 +0800 Subject: imx-common: sata: return failure if not i.MX6DQPlus The i.MX6DQPlus support sata interface, we should not return failure when CPU is i.MX6DQPlus. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/imx-common/sata.c b/arch/arm/imx-common/sata.c index dd9698d..acf9831 100644 --- a/arch/arm/imx-common/sata.c +++ b/arch/arm/imx-common/sata.c @@ -15,7 +15,7 @@ int setup_sata(void) struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; int ret; - if (!is_mx6dq()) + if (!is_mx6dq() && !is_mx6dqp()) return 1; ret = enable_sata_clock(); -- cgit v0.10.2 From 492d60ac79aba67e8b9e98b251e3996746e58d60 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:01 +0800 Subject: imx-common: timer: support i.MX6DQPlus To i.MX6DQPlus, osc can be choosed as the source of gpt, so add i.MX6DQPlus support in gpt_has_clk_source_osc. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index bea17f2..a01590c 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -44,7 +44,7 @@ static inline int gpt_has_clk_source_osc(void) { #if defined(CONFIG_MX6) if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) || - is_mx6sdl() || is_mx6sx() || is_mx6ul()) + is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul()) return 1; return 0; -- cgit v0.10.2 From 9aa550d2e8e9c6c2a149528d3d2b33870608a860 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:02 +0800 Subject: mtd: nand: mxs: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Scott Wood diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index b5bbd88..5528d4b 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -152,7 +152,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size, int max_ecc_strength_supported; /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */ - if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7)) + if (is_mx6sx() || is_mx7()) max_ecc_strength_supported = 62; else max_ecc_strength_supported = 40; -- cgit v0.10.2 From bff755033133b49eaea38a68fe3284c1a25f2695 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:03 +0800 Subject: ocotp: mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c index 65ff815..38344e8 100644 --- a/drivers/misc/mxc_ocotp.c +++ b/drivers/misc/mxc_ocotp.c @@ -95,9 +95,9 @@ u32 fuse_bank_physical(int index) { u32 phy_index; - if (is_cpu_type(MXC_CPU_MX6SL)) { + if (is_mx6sl()) { phy_index = index; - } else if (is_cpu_type(MXC_CPU_MX6UL)) { + } else if (is_mx6ul()) { if (index >= 6) phy_index = fuse_bank_physical(5) + (index - 6) + 3; else -- cgit v0.10.2 From 87f9989502763f36b1df94c909cbf05f65633fc4 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:04 +0800 Subject: net: fec_mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Joe Hershberger diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 3340dd2..360f8e4 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -566,7 +566,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd) /* Do not access reserved register for i.MX6UL */ - if (!is_cpu_type(MXC_CPU_MX6UL)) { + if (!is_mx6ul()) { /* clear MIB RAM */ for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) writel(0, i); -- cgit v0.10.2 From 3fd9eb66896768aaa73c26bc5686abac7e058652 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:05 +0800 Subject: block: dwc_ahsata: support i.MX6DQPlus i.MX6DQPlus support sata interface, so not return failure when CPU is i.MX6DQPlus. In this patch, also use simpler runtime cpu dections macros to replace is_cpu_type. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Simon Glass Cc: Tang Yuantian Cc: Shaohui Xie Cc: Bin Meng diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c index 6ec52a9..6056fe5 100644 --- a/drivers/block/dwc_ahsata.c +++ b/drivers/block/dwc_ahsata.c @@ -563,7 +563,7 @@ int init_sata(int dev) struct ahci_probe_ent *probe_ent = NULL; #if defined(CONFIG_MX6) - if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D)) + if (!is_mx6dq() && !is_mx6dqp()) return 1; #endif if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { -- cgit v0.10.2 From 83e1394242180f683ce6ba4840f4a5f6a14d2fa0 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 23 May 2016 18:36:06 +0800 Subject: board: mx6sabresd/auto: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan Cc: Fabio Estevam Cc: Stefano Babic diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index c2e9c57..0712f08 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -625,9 +625,9 @@ int board_late_init(void) if (is_mx6dqp()) setenv("board_rev", "MX6QP"); - else if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + else if (is_mx6dq()) setenv("board_rev", "MX6Q"); - else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) + else if (is_mx6sdl()) setenv("board_rev", "MX6DL"); #endif diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 2319354..54ba36b 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -649,9 +649,9 @@ int board_late_init(void) if (is_mx6dqp()) setenv("board_rev", "MX6QP"); - else if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + else if (is_mx6dq()) setenv("board_rev", "MX6Q"); - else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) + else if (is_mx6sdl()) setenv("board_rev", "MX6DL"); #endif -- cgit v0.10.2 From 3061a5766ac34111929bec81b23e59ddf8a8b1e2 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 23 May 2016 08:25:26 -0700 Subject: imx: ventana: config: remove redundant config remove redundant define that exists in mx6_common.h Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index e11629c..8d689f1 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -52,9 +52,6 @@ #define CONFIG_DM_THERMAL #endif -/* GPIO */ -#define CONFIG_MXC_GPIO - /* Thermal */ #define CONFIG_IMX_THERMAL -- cgit v0.10.2 From a419352daf7a3dd29306d458fd3924e394d3cdc0 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 23 May 2016 08:25:27 -0700 Subject: imx: ventana: gsc: remove dependence on env remove dependence on getenv() by using global board info struct for model. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 3febd12..4f26bfd 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -11,6 +11,7 @@ #include #include +#include "ventana_eeprom.h" #include "gsc.h" /* @@ -79,7 +80,6 @@ static void read_hwmon(const char *name, uint reg, uint size) int gsc_info(int verbose) { - const char *model = getenv("model"); unsigned char buf[16]; i2c_set_bus_num(0); @@ -112,7 +112,7 @@ int gsc_info(int verbose) read_hwmon("VDD_2P5", GSC_HWMON_VDD_2P5, 3); read_hwmon("VDD_1P8", GSC_HWMON_VDD_1P8, 3); read_hwmon("VDD_IO2", GSC_HWMON_VDD_IO2, 3); - switch (model[3]) { + switch (ventana_info.model[3]) { case '1': /* GW51xx */ read_hwmon("VDD_IO3", GSC_HWMON_VDD_IO4, 3); /* -C rev */ break; -- cgit v0.10.2 From 3c0fd17f61060f3077b0601e0d8353e2b1b6a3df Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 23 May 2016 08:25:28 -0700 Subject: imx: ventana: use EEPROM register for falcon boot mode NAND+MMC env support costs 12KB in the SPL which is fairly expensive just for the ability to specify whether or not to boot to uboot or directly to linux. The Ventana boards have plenty of EEPROM storage so we will use a byte there to signify if we should boot to the bootloader or to the OS. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/README b/board/gateworks/gw_ventana/README index 9418907..f3f8998 100644 --- a/board/gateworks/gw_ventana/README +++ b/board/gateworks/gw_ventana/README @@ -173,13 +173,8 @@ OS load time which defeats the purpose of Falcon mode in the first place. The SPL decides to boot either U-Boot (u-boot.img) or the OS (args + kernel) based on the return value of the spl_start_uboot() function. While often this can simply be the state of a GPIO based pushbutton or DIP switch, for -Gateworks Ventana, we use the U-Boot environment 'boot_os' variable which if -set to '1' will choose to boot the OS rather than U-Boot. While the choice -of adding env support to the SPL adds a little bit of time to the boot -process as well as (significant really) SPL code space this was deemed most -flexible as within the large variety of Gateworks Ventana boards not all of -them have a user pushbutton and that pushbutton may be configured as a hard -reset per user configuration. +Gateworks Ventana, we use an EEPROM register on i2c-0 at 0x50:0x00: +set to '0' will choose to boot to U-Boot and otherwise it will boot to OS. To use Falcon mode it is required that you first 'prepare' the 'args' data that is stored on your boot medium along with the kernel (which can be any @@ -235,8 +230,8 @@ using rootfs (ubi), kernel (uImage), and dtb from the network: # flash args (at 17MB) Ventana > nand erase.part args && nand write 18000000 args 100000 - # set boot_os env var to enable booting to Linux - Ventana > setenv boot_os 1 && saveenv + # set i2c register 0x50:0x00=0 to boot to Linux + Ventana > i2c dev 0 && i2c mw 0x50 0x00.0 0 1 Be sure to adjust 'bootargs' above to your OS needs (this will be different for various distros such as OpenWrt, Yocto, Android, etc). You can use the @@ -309,8 +304,8 @@ out in U-Boot and use the following to enable Falcon mode: # write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors) Ventana > mmc write 18000000 0x800 0x800 - # set boot_os to enable falcon mode - Ventana > setenv boot_os 1 && saveenv + # set i2c register 0x50:0x00=0 to boot to Linux + Ventana > i2c dev 0 && i2c mw 0x50 0x00.0 0 1 Be sure to adjust 'bootargs' above to your OS needs (this will be different for various distros such as OpenWrt, Yocto, Android, etc). You can use the diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 0a6ad47..ed42b86 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include "gsc.h" @@ -560,7 +561,7 @@ void spl_board_init(void) /* return 1 if we wish to boot to uboot vs os (falcon mode) */ int spl_start_uboot(void) { - int ret = 1; + unsigned char ret = 1; debug("%s\n", __func__); #ifdef CONFIG_SPL_ENV_SUPPORT @@ -569,6 +570,10 @@ int spl_start_uboot(void) debug("boot_os=%s\n", getenv("boot_os")); if (getenv_yesno("boot_os") == 1) ret = 0; +#else + /* use i2c-0:0x50:0x00 for falcon boot mode (0=linux, else uboot) */ + i2c_set_bus_num(0); + gsc_i2c_read(0x50, 0x0, 1, &ret, 1); #endif debug("%s booting %s\n", __func__, ret ? "uboot" : "linux"); return ret; diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 8d689f1..c8d3cb8 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -18,7 +18,6 @@ /* Falcon Mode */ #define CONFIG_CMD_SPL #define CONFIG_SPL_OS_BOOT -#define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) -- cgit v0.10.2 From a0eb8c9b91348966f7ae8748b4ab3febae792a76 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 23 May 2016 08:25:29 -0700 Subject: imx: ventana: remove SPL_EXT_SUPPORT Remove SPL_EXT_SUPPORT to resolve build issue. It may be useful to bring it back in the future after comparing its merits to storing the args/kernel in fixed raw locations. Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index c8d3cb8..874bb04 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -32,6 +32,7 @@ #include "imx6_spl.h" /* common IMX6 SPL configuration */ #include "mx6_common.h" +#undef CONFIG_SPL_EXT_SUPPORT #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ -- cgit v0.10.2 From e453794f87436c7788ba763f90e0e905ace8b7f7 Mon Sep 17 00:00:00 2001 From: Damien Riegel Date: Thu, 21 Apr 2016 17:34:02 -0400 Subject: ts4800: update environment to boot with device tree This commit updates the environment variables to be able to boot with a device tree. The expected partition layout on the SD card is: - partition 1: type 0xDA, contains u-boot.bin - partition 2: type 0xC (fat), contains zImage and device tree - partition 3: type 0x83, root filesystem. Signed-off-by: Damien Riegel diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index aa0605f..0392863 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -96,19 +96,28 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ - "image=uImage\0" \ + "image=zImage\0" \ + "fdt_file=imx51-ts4800.dtb\0" \ + "fdt_addr=0x90fe0000\0" \ "mmcdev=0\0" \ - "mmcpart=1\0" \ - "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcpart=2\0" \ + "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \ + "mmcargs=setenv bootargs root=${mmcroot}\0" \ "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs addtty; " \ - "bootm; " + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo ERR: cannot load FDT; " \ + "fi; " + #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev}; if mmc rescan; then " \ -- cgit v0.10.2 From e96b6ee7bd6ad29d47d50ca69a731afa3c66f174 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdelin Date: Thu, 21 Apr 2016 13:37:04 -0400 Subject: ts4800: add CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 This commit fixes the MMC data transactions timeout problem on the TS4800. The changes introduced in the commit e978a31 on the timeout calculation for the MMC data transactions has revealed there is something wrong with the timeout setting of the eSDHC controller used in the IMX51. The IMX51 seems to be concerned by this erratum and without this change the MMC driver is unable to do any transactions. Signed-off-by: Sebastien Bourdelin Reviewed-by: Fabio Estevam diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index 0392863..0db5ab5 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -62,6 +62,8 @@ #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR +#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 + #define CONFIG_MMC #define CONFIG_GENERIC_MMC -- cgit v0.10.2 From 7698cdfddd1563bb7c625166a132f2d3c9526579 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:42 -0700 Subject: imx: ventana: config: add env vars for disk and part In order to make the default boot scripts more flexible, use the variable 'disk' to specify the disk device number and the variable 'part' to specify the partition number. Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 874bb04..3aeb0df 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -281,6 +281,8 @@ \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "mtdids=" MTDIDS_DEFAULT "\0" \ + "disk=0\0" \ + "part=1\0" \ \ "fdt_high=0xffffffff\0" \ "fdt_addr=0x18000000\0" \ @@ -304,8 +306,8 @@ "uimage=uImage\0" \ "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ "mmc_boot=" \ - "setenv fsload 'ext2load mmc 0:1'; " \ - "mmc dev 0 && mmc rescan && " \ + "setenv fsload \"ext2load mmc ${disk}:${part}\"; " \ + "mmc dev ${disk} && mmc rescan && " \ "setenv dtype mmc; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ @@ -319,7 +321,8 @@ "fi\0" \ \ "sata_boot=" \ - "setenv fsload 'ext2load sata 0:1'; sata init && " \ + "setenv fsload \"ext2load sata ${disk}:${part}\"; " \ + "sata init && " \ "setenv dtype sata; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ @@ -332,7 +335,8 @@ "fi; " \ "fi\0" \ "usb_boot=" \ - "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ + "setenv fsload \"ext2load usb ${disk}:${part}\"; " \ + "usb start && usb dev ${disk} && " \ "setenv dtype usb; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ -- cgit v0.10.2 From 4df0bff3ce5c37ac27faed1fe90bf0cc0a741750 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:43 -0700 Subject: imx: ventana: config: add fixfdt script to apply manual fdt fixups Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 3aeb0df..e57b120 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -287,14 +287,19 @@ "fdt_high=0xffffffff\0" \ "fdt_addr=0x18000000\0" \ "initrd_high=0xffffffff\0" \ + "fixfdt=" \ + "fdt addr ${fdt_addr}\0" \ "bootdir=boot\0" \ "loadfdt=" \ - "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ - "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ - "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ - "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ - "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ - "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ + "if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \ + "echo Loaded DTB from boot/${fdt_file}; " \ + "run fixfdt; " \ + "elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \ + "echo Loaded DTB from boot/${fdt_file1}; " \ + "run fixfdt; " \ + "elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \ + "echo Loaded DTB from boot/${fdt_file2}; " \ + "run fixfdt; " \ "fi\0" \ \ "script=6x_bootscript-ventana\0" \ @@ -313,7 +318,7 @@ "setenv bootargs console=${console},${baudrate} " \ "root=/dev/mmcblk0p1 rootfstype=ext4 " \ "rootwait rw ${video} ${extra}; " \ - "if run loadfdt && fdt addr ${fdt_addr}; then " \ + "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ "else " \ "bootm; " \ @@ -328,7 +333,7 @@ "setenv bootargs console=${console},${baudrate} " \ "root=/dev/sda1 rootfstype=ext4 " \ "rootwait rw ${video} ${extra}; " \ - "if run loadfdt && fdt addr ${fdt_addr}; then " \ + "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ "else " \ "bootm; " \ @@ -342,7 +347,7 @@ "setenv bootargs console=${console},${baudrate} " \ "root=/dev/sda1 rootfstype=ext4 " \ "rootwait rw ${video} ${extra}; " \ - "if run loadfdt && fdt addr ${fdt_addr}; then " \ + "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ "else " \ "bootm; " \ @@ -405,7 +410,7 @@ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ "root=${root} ${video} ${extra}; " \ - "if run loadfdt && fdt addr ${fdt_addr}; then " \ + "if run loadfdt; then " \ "ubifsumount; " \ "bootm ${loadaddr} - ${fdt_addr}; " \ "else " \ -- cgit v0.10.2 From 1b7400011e62188734814df6b28e8d55f2bf752d Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:44 -0700 Subject: imx: ventana: config: use bootdir env var for directory of fdt files In order to make the default boot scripts more flexible, use the variable 'bootdir' to specify the filesystem directory to look for fdt files in. Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index e57b120..dff4303 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -291,14 +291,14 @@ "fdt addr ${fdt_addr}\0" \ "bootdir=boot\0" \ "loadfdt=" \ - "if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \ - "echo Loaded DTB from boot/${fdt_file}; " \ + "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ + "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ "run fixfdt; " \ - "elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \ - "echo Loaded DTB from boot/${fdt_file1}; " \ + "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ + "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ "run fixfdt; " \ - "elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \ - "echo Loaded DTB from boot/${fdt_file2}; " \ + "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ + "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ "run fixfdt; " \ "fi\0" \ \ -- cgit v0.10.2 From 543a4aba7fa88452e7749af5aad7e4b676901f57 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:45 -0700 Subject: imx: ventana: config: use fs env var for block dev filesystem type In order to make the default boot scripts more flexible, use the variable 'fs' to specify the filesystem type to use for block storage devices (USB/MMC/SATA) when loading files. Additionally default this to ext4 and enable ext4 filesystem support (which encompasses ext2 support) instead of just ext2 support. Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index dff4303..fe81cbd 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -302,6 +302,7 @@ "run fixfdt; " \ "fi\0" \ \ + "fs=ext4\0" \ "script=6x_bootscript-ventana\0" \ "loadscript=" \ "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ @@ -309,14 +310,14 @@ "fi\0" \ \ "uimage=uImage\0" \ - "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ + "mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \ "mmc_boot=" \ - "setenv fsload \"ext2load mmc ${disk}:${part}\"; " \ + "setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \ "mmc dev ${disk} && mmc rescan && " \ "setenv dtype mmc; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p1 rootfstype=ext4 " \ + "root=/dev/mmcblk0p1 rootfstype=${fs} " \ "rootwait rw ${video} ${extra}; " \ "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ @@ -326,12 +327,12 @@ "fi\0" \ \ "sata_boot=" \ - "setenv fsload \"ext2load sata ${disk}:${part}\"; " \ + "setenv fsload \"${fs}load sata ${disk}:${part}\"; " \ "sata init && " \ "setenv dtype sata; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/sda1 rootfstype=ext4 " \ + "root=/dev/sda1 rootfstype=${fs} " \ "rootwait rw ${video} ${extra}; " \ "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ @@ -340,12 +341,12 @@ "fi; " \ "fi\0" \ "usb_boot=" \ - "setenv fsload \"ext2load usb ${disk}:${part}\"; " \ + "setenv fsload \"${fs}load usb ${disk}:${part}\"; " \ "usb start && usb dev ${disk} && " \ "setenv dtype usb; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ - "root=/dev/sda1 rootfstype=ext4 " \ + "root=/dev/sda1 rootfstype=${fs} " \ "rootwait rw ${video} ${extra}; " \ "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ -- cgit v0.10.2 From 509870958dd18b18fd3d45dd69afb9c350964131 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:46 -0700 Subject: imx: ventana: config: use explicit addr in loadscript If we are loading a script to ${loadaddr} then we need to use that address explicitly when calling the source command in case user has changed loadaddr Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index fe81cbd..435ca0a 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -306,7 +306,7 @@ "script=6x_bootscript-ventana\0" \ "loadscript=" \ "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ - "source; " \ + "source ${loadaddr}; " \ "fi\0" \ \ "uimage=uImage\0" \ -- cgit v0.10.2 From 899f589bcd3e0f97efa07b112f0d1d5c419b72b5 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:47 -0700 Subject: imx: ventana: config: add PREBOOT support This allows the 'preboot' env variable to be executed prior to bootcmd if defined. Signed-off-by: Tim Harvey diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 435ca0a..982ddba 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -201,6 +201,7 @@ /* Miscellaneous configurable options */ #define CONFIG_HWCONFIG +#define CONFIG_PREBOOT /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -- cgit v0.10.2 From 1b99103fba8f75337d36701f05bb0f656d2ff729 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:48 -0700 Subject: imx: ventana: SPL: only disable boot watchdog if Falcon mode If not booting Falcon mode, leave the boot watchdog enabled as a work-around for other non-resolved bootloader hangs. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index ed42b86..c045d74 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -527,9 +527,6 @@ void board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); - - /* disable boot watchdog */ - gsc_boot_wd_disable(); } /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */ @@ -575,6 +572,9 @@ int spl_start_uboot(void) i2c_set_bus_num(0); gsc_i2c_read(0x50, 0x0, 1, &ret, 1); #endif + if (!ret) + gsc_boot_wd_disable(); + debug("%s booting %s\n", __func__, ret ? "uboot" : "linux"); return ret; } -- cgit v0.10.2 From 6052b1c6f4fadee751dd7c90a4148943f65ab7b0 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:49 -0700 Subject: imx: ventana: SPL: added support for 32bit IMX6DQ 8Gb density DRAM config Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index c045d74..e7f699a 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -190,6 +190,20 @@ static struct mx6_ddr3_cfg mt41k256m16ha_125 = { .trasmin = 3500, }; +/* MT41K512M16HA-125 (8Gb density) */ +static struct mx6_ddr3_cfg mt41k512m16ha_125 = { + .mem_speed = 1600, + .density = 8, + .width = 16, + .banks = 8, + .rowaddr = 16, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + /* * calibration - these are the various CPU/DDR3 combinations we support */ @@ -341,6 +355,19 @@ static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = { .p1_mpwrdlctl = 0X40304239, }; +static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = { + /* write leveling calibration determine */ + .p0_mpwldectrl0 = 0x002A0025, + .p0_mpwldectrl1 = 0x003A002A, + /* Read DQS Gating calibration */ + .p0_mpdgctrl0 = 0x43430356, + .p0_mpdgctrl1 = 0x033C0335, + /* Read Calibration: DQS delay relative to DQ read access */ + .p0_mprddlctl = 0x4B373F42, + /* Write Calibration: DQ/DM delay relative to DQS write access */ + .p0_mpwrdlctl = 0x303E3C36, +}; + static void spl_dram_init(int width, int size_mb, int board_model) { struct mx6_ddr3_cfg *mem = NULL; @@ -420,6 +447,11 @@ static void spl_dram_init(int width, int size_mb, int board_model) else calib = &mx6sdl_256x32_mmdc_calib; debug("4gB density\n"); + } else if (width == 32 && size_mb == 2048) { + mem = &mt41k512m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_512x32_mmdc_calib; + debug("8gB density\n"); } else if (width == 64 && size_mb == 512) { mem = &mt41k64m16jt_125; debug("1gB density\n"); -- cgit v0.10.2 From efa7ed7236ee5bfab871f35ce70f3e3e1d39b4f6 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:50 -0700 Subject: imx: ventana: gsc: add gsc sleep command The Gateworks System Controller on Ventana boards has the ability to disable the board's primary power supply until the RTC hits a specific time. When sleeping a button-down event on the GSC user pushbutton will wake the board before it's wake time has been reached. This feature is referred to as GSC sleep. Add a command to invoke sleep mode for a specified number of seconds. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 4f26bfd..2555824 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -160,6 +160,48 @@ int gsc_boot_wd_disable(void) } #ifdef CONFIG_CMD_GSC +static int do_gsc_sleep(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + unsigned char reg; + unsigned long secs = 0; + + if (argc < 2) + return CMD_RET_USAGE; + + secs = simple_strtoul(argv[1], NULL, 10); + printf("GSC Sleeping for %ld seconds\n", secs); + + i2c_set_bus_num(0); + reg = (secs >> 24) & 0xff; + if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, ®, 1)) + goto error; + reg = (secs >> 16) & 0xff; + if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, ®, 1)) + goto error; + reg = (secs >> 8) & 0xff; + if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, ®, 1)) + goto error; + reg = secs & 0xff; + if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, ®, 1)) + goto error; + if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) + goto error; + reg |= (1 << 2); + if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) + goto error; + reg &= ~(1 << 2); + reg |= 0x3; + if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) + goto error; + + return CMD_RET_SUCCESS; + +error: + printf("i2c error\n"); + return CMD_RET_FAILURE; +} + static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned char reg; @@ -206,13 +248,15 @@ static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (strcasecmp(argv[1], "wd") == 0) return do_gsc_wd(cmdtp, flag, --argc, ++argv); + else if (strcasecmp(argv[1], "sleep") == 0) + return do_gsc_sleep(cmdtp, flag, --argc, ++argv); return CMD_RET_USAGE; } U_BOOT_CMD( gsc, 4, 1, do_gsc, "GSC configuration", - "[wd enable [30|60]]|[wd disable]\n" + "[wd enable [30|60]]|[wd disable]|[sleep ]\n" ); #endif /* CONFIG_CMD_GSC */ -- cgit v0.10.2 From 82a17e75da0d812c2e583e733efd1e67e7488933 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:51 -0700 Subject: imx: ventana: gsc: fix negative temperature readings The GSC Temperature sensor is a 2's complement value - adjust accordingly for negative temperatures. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 2555824..c626ba2 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -71,6 +71,8 @@ static void read_hwmon(const char *name, uint reg, uint size) puts("fRD\n"); } else { ui = buf[0] | (buf[1]<<8) | (buf[2]<<16); + if (reg == GSC_HWMON_TEMP && ui > 0x8000) + ui -= 0xffff; if (ui == 0xffffff) puts("invalid\n"); else -- cgit v0.10.2 From ca628b74c97f3a6620e6f18aad5f917d51c2cdda Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:52 -0700 Subject: imx: ventana: gsc: show board temp on boot Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index c626ba2..042f55a 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -98,6 +98,12 @@ int gsc_info(int verbose) gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1, &buf[GSC_SC_STATUS], 1); } + if (!gsc_i2c_read(GSC_HWMON_ADDR, GSC_HWMON_TEMP, 1, buf, 2)) { + int ui = buf[0] | buf[1]<<8; + if (ui > 0x8000) + ui -= 0xffff; + printf(" board temp at %dC", ui / 10); + } puts("\n"); if (!verbose) return CMD_RET_SUCCESS; -- cgit v0.10.2 From 78532623303e089e7d36b3a11d293e618b927655 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:53 -0700 Subject: imx: ventana: export backlight gpio after gpio driver is available Calling request_gpio to register bklt_gpio with the GPIO driver had no effect in setup_display called from early board init (although pinmuxing it and configuring it as output-low does do what it should). Therefore move the request_gpio later in enable_lvds so that its registered for use by the gpio command if LVDS is actually enabled. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 3b7c82b..7a3d96a 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -317,6 +317,8 @@ static void enable_lvds(struct display_info_t const *dev) writel(reg, &iomux->gpr[2]); /* Enable Backlight */ + gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio"); + gpio_direction_output(IMX_GPIO_NR(1, 10), 0); gpio_request(IMX_GPIO_NR(1, 18), "bklt_en"); SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 18), 1); @@ -456,8 +458,7 @@ static void setup_display(void) <gpr[3]); - /* Backlight CABEN on LVDS connector */ - gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio"); + /* LVDS Backlight GPIO on LVDS connector - output low */ SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 10), 0); } -- cgit v0.10.2 From 83e00f193e766337254c490c2b28118b75cc575a Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:54 -0700 Subject: imx: ventana: fix invalid dio configuration for pwm mode Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index a20190e..7610381 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -760,7 +760,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info) ctrl); gpio_requestf(cfg->gpio_param, "dio%d", i); gpio_direction_input(cfg->gpio_param); - } else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") && + } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_padmux) { if (!quiet) printf("DIO%d: pwm%d\n", i, cfg->pwm_param); -- cgit v0.10.2 From f17a9af84645f5b820da2e7d017b014923ce1b88 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:55 -0700 Subject: imx: ventana: enable pwm device-tree property based on hwconfig Most Ventana boards have a connector with off-board digital-I/O signals including some that can be pinmuxed as either a PWM or a GPIO. The hwconfig env variable is used to configure these and they will be pinmuxed according to this configuration in the bootloader. This patch adds a device-tree fixup that will enable the pwm controller nodes appropriately for digital-I/O's that are configured as pwm via hwconfig so that the pin can be used with the Linux kernel /sys/class/pwm API. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 7610381..44ee73f 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -762,6 +762,11 @@ void setup_board_gpio(int board, struct ventana_board_info *info) gpio_direction_input(cfg->gpio_param); } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_padmux) { + if (!cfg->pwm_param) { + printf("DIO%d: Error: pwm config invalid\n", + i); + continue; + } if (!quiet) printf("DIO%d: pwm%d\n", i, cfg->pwm_param); imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] | diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 7a3d96a..feb2df8 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -777,6 +778,16 @@ static int ft_sethdmiinfmt(void *blob, char *mode) return 0; } +/* enable a property of a node if the node is found */ +static inline void ft_enable_path(void *blob, const char *path) +{ + int i = fdt_path_offset(blob, path); + if (i >= 0) { + debug("enabling %s\n", path); + fdt_status_okay(blob, i); + } +} + /* * called prior to booting kernel or by 'fdt boardsetup' command * @@ -920,6 +931,25 @@ int ft_board_setup(void *blob, bd_t *bd) ft_sethdmiinfmt(blob, "yuv422bt656"); } + /* Configure DIO */ + for (i = 0; i < gpio_cfg[board_type].num_gpios; i++) { + struct dio_cfg *cfg = &gpio_cfg[board_type].dio_cfg[i]; + char arg[10]; + + sprintf(arg, "dio%d", i); + if (!hwconfig(arg)) + continue; + if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_param) + { + char path[48]; + sprintf(path, "/soc/aips-bus@02000000/pwm@%08x", + 0x02080000 + (0x4000 * (cfg->pwm_param - 1))); + printf(" Enabling pwm%d for DIO%d\n", + cfg->pwm_param, i); + ft_enable_path(blob, path); + } + } + /* * Peripheral Config: * remove nodes by alias path if EEPROM config tells us the -- cgit v0.10.2 From 5c55572ff70d71b707e68b0fb811de27814626c0 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:56 -0700 Subject: imx: ventana: remove dependence on EECONFIG_SATA eeprom feature bit The MSATA feature is a board-specific feature on Gateworks Ventana boards. In most cases a 2:1 mux will steer either PCIe or SATA to a miniPCIe socket through an MSATA_EN gpio. In these such cases assign the gpio in the board specific struct and use its presence to determine if we default the GPIO to PCIe and if we later steer it according to hwconfig. Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 44ee73f..5a8bacd 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -132,8 +132,6 @@ void setup_ventana_i2c(void) /* common to add baseboards */ static iomux_v3_cfg_t const gw_gpio_pads[] = { - /* MSATA_EN */ - IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* RS232_EN# */ IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG), }; @@ -183,6 +181,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { }; static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { + /* MSATA_EN */ + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* PANLEDG# */ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ @@ -212,6 +212,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { }; static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { + /* MSATA_EN */ + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* CAN_STBY */ IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* USB_HUBRST# */ @@ -241,6 +243,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { }; static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { + /* MSATA_EN */ + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* CAN_STBY */ IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* PANLEDG# */ @@ -283,6 +287,8 @@ static iomux_v3_cfg_t const gw551x_gpio_pads[] = { }; static iomux_v3_cfg_t const gw552x_gpio_pads[] = { + /* MSATA_EN */ + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* USBOTG_SEL */ IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG), /* USB_HUBRST# */ @@ -445,6 +451,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .vidin_en = IMX_GPIO_NR(3, 31), .usb_sel = IMX_GPIO_NR(1, 2), .wdis = IMX_GPIO_NR(7, 12), + .msata_en = GP_MSATA_SEL, }, /* GW53xx */ @@ -489,6 +496,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .gps_shdn = IMX_GPIO_NR(1, 27), .vidin_en = IMX_GPIO_NR(3, 31), .wdis = IMX_GPIO_NR(7, 12), + .msata_en = GP_MSATA_SEL, }, /* GW54xx */ @@ -535,6 +543,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .dioi2c_en = IMX_GPIO_NR(4, 5), .pcie_sson = IMX_GPIO_NR(1, 20), .wdis = IMX_GPIO_NR(5, 17), + .msata_en = GP_MSATA_SEL, }, /* GW551x */ @@ -602,6 +611,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .pcie_rst = IMX_GPIO_NR(1, 29), .usb_sel = IMX_GPIO_NR(1, 7), .wdis = IMX_GPIO_NR(7, 12), + .msata_en = GP_MSATA_SEL, }, }; @@ -616,10 +626,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) gpio_request(GP_USB_OTG_PWR, "usbotg_pwr"); gpio_direction_output(GP_USB_OTG_PWR, 0); - /* MSATA Enable - default to PCI */ - gpio_request(GP_MSATA_SEL, "msata_en"); - gpio_direction_output(GP_MSATA_SEL, 0); - /* RS232_EN# */ gpio_request(GP_RS232_EN, "rs232_en"); gpio_direction_output(GP_RS232_EN, 0); @@ -649,6 +655,12 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) } } + /* MSATA Enable - default to PCI */ + if (gpio_cfg[board].msata_en) { + gpio_request(gpio_cfg[board].msata_en, "msata_en"); + gpio_direction_output(gpio_cfg[board].msata_en, 0); + } + /* Expansion Mezzanine IO */ if (gpio_cfg[board].mezz_pwren) { gpio_request(gpio_cfg[board].mezz_pwren, "mezz_pwr"); @@ -718,10 +730,9 @@ void setup_board_gpio(int board, struct ventana_board_info *info) gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1); /* MSATA Enable */ - if (is_cpu_type(MXC_CPU_MX6Q) && - test_bit(EECONFIG_SATA, info->config)) { + if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { gpio_direction_output(GP_MSATA_SEL, - (hwconfig("msata")) ? 1 : 0); + (hwconfig("msata")) ? 1 : 0); } /* USBOTG Select (PCISKT or FrontPanel) */ @@ -775,8 +786,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info) } if (!quiet) { - if (is_cpu_type(MXC_CPU_MX6Q) && - (test_bit(EECONFIG_SATA, info->config))) { + if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { printf("MSATA: %s\n", (hwconfig("msata") ? "enabled" : "disabled")); } diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index 28f5816..58ad5ff 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -76,6 +76,7 @@ struct ventana { int pcie_sson; int usb_sel; int wdis; + int msata_en; }; extern struct ventana gpio_cfg[GW_UNKNOWN]; -- cgit v0.10.2 From fe63fcb6cafc1d5597b747dd673bf092f116b6d6 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:57 -0700 Subject: imx: ventana: remove several EEPROM config bit dependence Removed several EEPROM bit dependencies: - for dt aliases that don't exist and thus don't ever do anything (pcie,lvds1,uart*,vpu,csi*,hdmi_in,hdmi_out,cvbs_in,cvbs_out,gps) - for features that don't effect bus ordering or have no detrimental affect if erroneously enabled when not present (ahci,nand,i2c*) - for features that have little to no impact on being erroneously enabled but high impact if erroneously disabled (can*, spi*) - for features that have an high adverse affect of not being set when they should and no adverse affect of being set when they shouldn't (ipu*). Removing these means the following: - these no longer are supported with the econfig command - these no longer affect the device-tree in any way Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index ba15969..e86c98e 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -100,43 +100,12 @@ read_eeprom(int bus, struct ventana_board_info *info) /* list of config bits that the bootloader will remove from dtb if not set */ struct ventana_eeprom_config econfig[] = { { "eth0", "ethernet0", EECONFIG_ETH0 }, - { "eth1", "ethernet1", EECONFIG_ETH1 }, - { "sata", "ahci0", EECONFIG_SATA }, - { "pcie", NULL, EECONFIG_PCIE}, - { "lvds0", NULL, EECONFIG_LVDS0 }, - { "lvds1", NULL, EECONFIG_LVDS1 }, { "usb0", NULL, EECONFIG_USB0 }, { "usb1", NULL, EECONFIG_USB1 }, { "mmc0", NULL, EECONFIG_SD0 }, { "mmc1", NULL, EECONFIG_SD1 }, { "mmc2", NULL, EECONFIG_SD2 }, { "mmc3", NULL, EECONFIG_SD3 }, - { "uart0", NULL, EECONFIG_UART0 }, - { "uart1", NULL, EECONFIG_UART1 }, - { "uart2", NULL, EECONFIG_UART2 }, - { "uart3", NULL, EECONFIG_UART3 }, - { "uart4", NULL, EECONFIG_UART4 }, - { "ipu0", NULL, EECONFIG_IPU0 }, - { "ipu1", NULL, EECONFIG_IPU1 }, - { "can0", NULL, EECONFIG_FLEXCAN }, - { "i2c0", NULL, EECONFIG_I2C0 }, - { "i2c1", NULL, EECONFIG_I2C1 }, - { "i2c2", NULL, EECONFIG_I2C2 }, - { "vpu", NULL, EECONFIG_VPU }, - { "csi0", NULL, EECONFIG_CSI0 }, - { "csi1", NULL, EECONFIG_CSI1 }, - { "spi0", NULL, EECONFIG_ESPCI0 }, - { "spi1", NULL, EECONFIG_ESPCI1 }, - { "spi2", NULL, EECONFIG_ESPCI2 }, - { "spi3", NULL, EECONFIG_ESPCI3 }, - { "spi4", NULL, EECONFIG_ESPCI4 }, - { "spi5", NULL, EECONFIG_ESPCI5 }, - { "gps", "pps", EECONFIG_GPS }, - { "hdmi_in", NULL, EECONFIG_HDMI_IN }, - { "hdmi_out", NULL, EECONFIG_HDMI_OUT }, - { "cvbs_in", NULL, EECONFIG_VID_IN }, - { "cvbs_out", NULL, EECONFIG_VID_OUT }, - { "nand", NULL, EECONFIG_NAND }, { /* Sentinel */ } }; -- cgit v0.10.2 From 385575bcb6013e8151fd98d80b8dc2b5bd732cfb Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:58 -0700 Subject: imx: ventana: add GW553x support Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 5a8bacd..2c3ac93 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -316,6 +316,20 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = { IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), }; +static iomux_v3_cfg_t const gw553x_gpio_pads[] = { + /* PANLEDG# */ + IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG), + /* PANLEDR# */ + IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG), + + /* VID_PWR */ + IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG), + /* PCI_RST# */ + IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG), + /* PCIESKT_WDIS# */ + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), +}; + /* * Board Specific GPIO @@ -613,6 +627,46 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { .wdis = IMX_GPIO_NR(7, 12), .msata_en = GP_MSATA_SEL, }, + + /* GW553x */ + { + .gpio_pads = gw553x_gpio_pads, + .num_pads = ARRAY_SIZE(gw553x_gpio_pads)/2, + .dio_cfg = { + { + { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) }, + IMX_GPIO_NR(1, 16), + { 0, 0 }, + 0 + }, + { + { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) }, + IMX_GPIO_NR(1, 19), + { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) }, + 2 + }, + { + { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) }, + IMX_GPIO_NR(1, 17), + { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) }, + 3 + }, + { + { IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) }, + IMX_GPIO_NR(1, 18), + { IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) }, + 4 + }, + }, + .num_gpios = 4, + .leds = { + IMX_GPIO_NR(4, 10), + IMX_GPIO_NR(4, 11), + }, + .pcie_rst = IMX_GPIO_NR(1, 0), + .vidin_en = IMX_GPIO_NR(5, 20), + .wdis = IMX_GPIO_NR(7, 12), + }, }; void setup_iomux_gpio(int board, struct ventana_board_info *info) diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index e86c98e..1382e5d 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -87,6 +87,9 @@ read_eeprom(int bus, struct ventana_board_info *info) } else if (info->model[4] == '2') { type = GW552x; break; + } else if (info->model[4] == '3') { + type = GW553x; + break; } /* fall through */ default: diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 042f55a..2ca6d5c 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -117,7 +117,8 @@ int gsc_info(int verbose) read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3); read_hwmon("VDD_DDR", GSC_HWMON_VDD_DDR, 3); read_hwmon("VDD_5P0", GSC_HWMON_VDD_5P0, 3); - read_hwmon("VDD_2P5", GSC_HWMON_VDD_2P5, 3); + if (strncasecmp((const char*) ventana_info.model, "GW553", 5)) + read_hwmon("VDD_2P5", GSC_HWMON_VDD_2P5, 3); read_hwmon("VDD_1P8", GSC_HWMON_VDD_1P8, 3); read_hwmon("VDD_IO2", GSC_HWMON_VDD_IO2, 3); switch (ventana_info.model[3]) { diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index feb2df8..15e4bf1 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -267,7 +267,9 @@ int board_phy_config(struct phy_device *phydev) int board_eth_init(bd_t *bis) { #ifdef CONFIG_FEC_MXC - if (board_type != GW551x && board_type != GW552x) { + struct ventana_board_info *info = &ventana_info; + + if (test_bit(EECONFIG_ETH0, info->config)) { setup_iomux_enet(GP_PHY_RST); cpu_eth_init(bis); } @@ -699,7 +701,9 @@ int misc_init_r(void) setenv("model_base", str); sprintf(fdt, "%s-%s.dtb", cputype, str); setenv("fdt_file1", fdt); - if (board_type != GW551x && board_type != GW552x) + if (board_type != GW551x && + board_type != GW552x && + board_type != GW553x) str[4] = 'x'; str[5] = 'x'; str[6] = 0; diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h index daff375..9ffad58 100644 --- a/board/gateworks/gw_ventana/ventana_eeprom.h +++ b/board/gateworks/gw_ventana/ventana_eeprom.h @@ -111,6 +111,7 @@ enum { GW54xx, GW551x, GW552x, + GW553x, GW_UNKNOWN, GW_BADCRC, }; -- cgit v0.10.2 From 34b080b79ccb59e144619179b4cd57a2f146f8d3 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 24 May 2016 11:03:59 -0700 Subject: imx: ventana: add fdt fixup to enable UHS-I support on selected boards UHS-I support is available on Ventana boards with micro-SD sockets depending on the board revision. For backwards compatibility to not break users who have old bootloaders and newer kernels the device-tree on boards with microSD disables UHS-I support by default by defining the no-1-8-v property in the esdhc controller node. For models/revisions that support switchable 1.8V/3.3V I/O which is detectable by the presence of a pull-down on the SD3_VSELECT pin we remove that property to enable support in the kernel. Additionally we add SD3_VSELECT to the pinmux for clarity (even though U-Boot does not currently support UHS-I modes requiring 1.8V I/O). Signed-off-by: Tim Harvey diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 2c3ac93..929dde9 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -134,6 +134,8 @@ void setup_ventana_i2c(void) static iomux_v3_cfg_t const gw_gpio_pads[] = { /* RS232_EN# */ IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG), + /* SD3_VSELECT */ + IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG), }; /* prototype */ @@ -766,6 +768,11 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) gpio_request(gpio_cfg[board].wdis, "wlan_dis"); gpio_direction_output(gpio_cfg[board].wdis, 1); } + + /* sense vselect pin to see if we support uhs-i */ + gpio_request(GP_SD3_VSELECT, "sd3_vselect"); + gpio_direction_input(GP_SD3_VSELECT); + gpio_cfg[board].usd_vsel = !gpio_get_value(GP_SD3_VSELECT); } /* setup GPIO pinmux and default configuration per baseboard and env */ diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index 58ad5ff..d037767 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -17,6 +17,7 @@ #define GP_SD3_CD IMX_GPIO_NR(7, 0) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8) +#define GP_SD3_VSELECT IMX_GPIO_NR(6, 14) #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ @@ -77,6 +78,7 @@ struct ventana { int usb_sel; int wdis; int msata_en; + bool usd_vsel; }; extern struct ventana gpio_cfg[GW_UNKNOWN]; diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 15e4bf1..82313e8 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -60,8 +60,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* CD */ - IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), }; /* ENET */ @@ -792,6 +791,17 @@ static inline void ft_enable_path(void *blob, const char *path) } } +/* remove a property of a node if the node is found */ +static inline void ft_delprop_path(void *blob, const char *path, + const char *name) +{ + int i = fdt_path_offset(blob, path); + if (i) { + debug("removing %s/%s\n", path, name); + fdt_delprop(blob, i, name); + } +} + /* * called prior to booting kernel or by 'fdt boardsetup' command * @@ -895,6 +905,11 @@ int ft_board_setup(void *blob, bd_t *bd) range[1] = cpu_to_fdt32(23); } } + + /* these have broken usd_vsel */ + if (strstr((const char *)info->model, "SP318-B") || + strstr((const char *)info->model, "SP331-B")) + gpio_cfg[board_type].usd_vsel = 0; } /* @@ -954,6 +969,13 @@ int ft_board_setup(void *blob, bd_t *bd) } } + /* remove no-1-8-v if UHS-I support is present */ + if (gpio_cfg[board_type].usd_vsel) { + debug("Enabling UHS-I support\n"); + ft_delprop_path(blob, "/soc/aips-bus@02100000/usdhc@02198000", + "no-1-8-v"); + } + /* * Peripheral Config: * remove nodes by alias path if EEPROM config tells us the -- cgit v0.10.2 From 73f366bb5bec7c728dcfed51110818fa412dd878 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 24 May 2016 20:28:47 +0800 Subject: imx: mx6qsabreauto: drop duplicated net phy configuration In 'commit d584c68ce0f5bf2f430ccfb2ba00bd506206fb91', ar8031 is changed to use ar8035_config. ar8035_config actually does the same thing as mx6_rgmii_rework, so drop mx6_rgmii_rework and board_phy_config. Signed-off-by: Peng Fan Cc: Fabio Estevam Cc: Stefano Babic Reviewed-by: Fabio Estevam Acked-by: Stefano Babic diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 0712f08..d63a979 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -321,39 +321,6 @@ static void setup_gpmi_nand(void) } #endif -int mx6_rgmii_rework(struct phy_device *phydev) -{ - unsigned short val; - - /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); - - val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); - val &= 0xffe3; - val |= 0x18; - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); - - /* introduce tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); - val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); - val |= 0x0100; - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - mx6_rgmii_rework(phydev); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - static void setup_fec(void) { if (is_mx6dqp()) { -- cgit v0.10.2 From cb82c38eff193d6b0685e26020109ca5cac9f0ea Mon Sep 17 00:00:00 2001 From: Sebastien Bourdelin Date: Fri, 20 May 2016 14:19:52 -0400 Subject: cosmetic: mx6slevk: Minor coding-style fix Fix the brace indentation in board_mmc_init(). Signed-off-by: Sebastien Bourdelin diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index f1915a8..256d602 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -230,14 +230,14 @@ int board_mmc_init(bd_t *bis) printf("Warning: you configured more USDHC controllers" "(%d) than supported by the board\n", i + 1); return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize " - "mmc dev %d\n", i); - return ret; - } + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize " + "mmc dev %d\n", i); + return ret; + } } return 0; -- cgit v0.10.2 From 9f8fa184fc1acb6fe8e15e3bbbfcb916e6bc4cc1 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 19 May 2016 13:02:16 +0800 Subject: imx: mx7: implement reset_misc We need to power down lcdif to make 'reset' can pass stress test. Signed-off-by: Peng Fan Cc: Stefano Babic diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index 073bbc6..ef46c92 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -441,3 +441,11 @@ void s_init(void) return; } + +void reset_misc(void) +{ +#ifdef CONFIG_VIDEO_MXS + lcdif_power_down(); +#endif +} + -- cgit v0.10.2 From 0c344e6e7a05a83556bbd291c39f8456b287abca Mon Sep 17 00:00:00 2001 From: Andrew Shadura Date: Tue, 24 May 2016 15:56:17 +0200 Subject: board: ge: bx50v3: don't configure the backlight when there's no display Don't try to configure the backlight when CONFIG_VIDEO_IPUV3 isn't set. Signed-off-by: Andrew Shadura diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index ff8f4d7..d45ed44 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -601,6 +601,8 @@ int board_late_init(void) #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif + +#ifdef CONFIG_VIDEO_IPUV3 /* We need at least 200ms between power on and backlight on * as per specifications from CHI MEI */ mdelay(250); @@ -615,6 +617,7 @@ int board_late_init(void) gpio_direction_output(LVDS_BACKLIGHT_GP, 1); pwm_enable(0); +#endif return 0; } -- cgit v0.10.2 From 07aa030a18552bcb1e9de30e348c6b59f4ffb6a5 Mon Sep 17 00:00:00 2001 From: Andrew Shadura Date: Tue, 24 May 2016 15:56:18 +0200 Subject: board: ge: bx50v3: make CONFIG_VIDEO optional and disabled by default The kernel already knows how to initialise the display, and initialising the display from U-boot is only useful for debugging and isn't necessary in production, so no need to have it enabled in U-boot by default. Signed-off-by: Andrew Shadura diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 1304879..53f8689 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -293,13 +293,14 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE + /* Framebuffer */ -#define CONFIG_VIDEO +#ifdef CONFIG_VIDEO #define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN @@ -309,6 +310,7 @@ #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP +#endif #define CONFIG_PWM_IMX #define CONFIG_IMX6_PWM_PER_CLK 66000000 -- cgit v0.10.2 From fc44902a0d447d561a6a30c8d3e3e1ecf535ff9d Mon Sep 17 00:00:00 2001 From: Andrew Shadura Date: Tue, 24 May 2016 15:56:19 +0200 Subject: board: ge: bx50v3: make USB support optional and disabled by default The USB support is only useful for development and shouldn't be enabled in production, so it has to be disabled in U-boot by default. Signed-off-by: Andrew Shadura diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig index ffa0440..98bf52e 100644 --- a/configs/ge_b450v3_defconfig +++ b/configs/ge_b450v3_defconfig @@ -8,8 +8,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_GPIO=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig index b039c24..b66c98b 100644 --- a/configs/ge_b650v3_defconfig +++ b/configs/ge_b650v3_defconfig @@ -8,8 +8,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_GPIO=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig index d9c8acd..1cd126a 100644 --- a/configs/ge_b850v3_defconfig +++ b/configs/ge_b850v3_defconfig @@ -8,8 +8,6 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_GPIO=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 53f8689..602763f 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -78,6 +78,7 @@ #define CONFIG_DOS_PARTITION /* USB Configs */ +#ifdef CONFIG_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 #define CONFIG_USB_STORAGE @@ -99,6 +100,7 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "Advantech" +#endif /* Networking Configs */ #define CONFIG_FEC_MXC @@ -221,13 +223,7 @@ "bootm; " \ "fi;\0" \ -#define CONFIG_BOOTCOMMAND \ - "usb start; " \ - "setenv dev usb; " \ - "setenv devnum 0; " \ - "setenv rootdev sda1; " \ - "run tryboot; " \ - \ +#define CONFIG_MMCBOOTCOMMAND \ "setenv dev mmc; " \ "setenv rootdev mmcblk0p1; " \ \ @@ -241,9 +237,23 @@ "if mmc dev ${devnum}; then " \ "run tryboot; " \ "fi; " \ + +#define CONFIG_USBBOOTCOMMAND \ + "usb start; " \ + "setenv dev usb; " \ + "setenv devnum 0; " \ + "setenv rootdev sda1; " \ + "run tryboot; " \ \ + CONFIG_MMCBOOTCOMMAND \ "bmode usb; " \ +#ifdef CONFIG_CMD_USB +#define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND +#else +#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND +#endif + #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -- cgit v0.10.2 From c26ffd9b3cc20143058bb8917a137f8a25249d9a Mon Sep 17 00:00:00 2001 From: Andrew Shadura Date: Tue, 24 May 2016 15:56:20 +0200 Subject: board: ge: bx50v3: make network support optional and disabled by default The network support is only useful for development and shouldn't be enabled in production, so it has to be disabled in U-boot by default. Signed-off-by: Andrew Shadura diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig index 98bf52e..a8628d2 100644 --- a/configs/ge_b450v3_defconfig +++ b/configs/ge_b450v3_defconfig @@ -9,9 +9,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y +CONFIG_CMD_NET=n CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig index b66c98b..ce39521 100644 --- a/configs/ge_b650v3_defconfig +++ b/configs/ge_b650v3_defconfig @@ -9,9 +9,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y +CONFIG_CMD_NET=n CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig index 1cd126a..d2f6f86 100644 --- a/configs/ge_b850v3_defconfig +++ b/configs/ge_b850v3_defconfig @@ -9,9 +9,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y +CONFIG_CMD_NET=n CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 602763f..ccaa2b4 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -103,6 +103,7 @@ #endif /* Networking Configs */ +#ifdef CONFIG_NET #define CONFIG_FEC_MXC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR @@ -111,6 +112,7 @@ #define CONFIG_FEC_MXC_PHYADDR 4 #define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS +#endif /* Serial Flash */ #ifdef CONFIG_CMD_SF -- cgit v0.10.2 From aacc10c5be41dabdc7d8ad567b3bfff888ad4037 Mon Sep 17 00:00:00 2001 From: Andrew Shadura Date: Tue, 24 May 2016 15:56:21 +0200 Subject: board: ge: bx50v3: make SATA optional and disabled by default The SATA support is only useful for development and shouldn't be enabled in production, so it has to be disabled in U-boot by default. Signed-off-by: Andrew Shadura diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index ccaa2b4..98f20c6 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -60,13 +60,14 @@ #define CONFIG_MXC_OCOTP /* SATA Configs */ -#define CONFIG_CMD_SATA +#ifdef CONFIG_CMD_SATA #define CONFIG_DWC_AHSATA #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #define CONFIG_LIBATA +#endif /* MMC Configs */ #define CONFIG_FSL_ESDHC -- cgit v0.10.2 From f1249119bfc2e11f6c65f21d62e85f70aca46887 Mon Sep 17 00:00:00 2001 From: Andrew Shadura Date: Tue, 24 May 2016 15:56:22 +0200 Subject: board: ge: bx50v3: disable unused features to improve size and boot speed Disable unused FPGA, NFS, FAT and EFI support to reduce the bootloader size. Don't clear memory reserved for malloc to improve boot speed. Signed-off-by: Andrew Shadura diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig index a8628d2..0ef418d 100644 --- a/configs/ge_b450v3_defconfig +++ b/configs/ge_b450v3_defconfig @@ -8,14 +8,18 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y +CONFIG_CMD_FPGA=n CONFIG_CMD_GPIO=y CONFIG_CMD_NET=n +CONFIG_CMD_NFS=n CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y +CONFIG_CMD_FAT=n CONFIG_CMD_FS_GENERIC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_OF_LIBFDT=y +CONFIG_SYS_MALLOC_CLEAR_ON_INIT=n +CONFIG_EFI_LOADER=n diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig index ce39521..2af4b11 100644 --- a/configs/ge_b650v3_defconfig +++ b/configs/ge_b650v3_defconfig @@ -8,14 +8,18 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y +CONFIG_CMD_FPGA=n CONFIG_CMD_GPIO=y CONFIG_CMD_NET=n +CONFIG_CMD_NFS=n CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y +CONFIG_CMD_FAT=n CONFIG_CMD_FS_GENERIC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_OF_LIBFDT=y +CONFIG_SYS_MALLOC_CLEAR_ON_INIT=n +CONFIG_EFI_LOADER=n diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig index d2f6f86..9e0c5eb 100644 --- a/configs/ge_b850v3_defconfig +++ b/configs/ge_b850v3_defconfig @@ -8,14 +8,18 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y +CONFIG_CMD_FPGA=n CONFIG_CMD_GPIO=y CONFIG_CMD_NET=n +CONFIG_CMD_NFS=n CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y +CONFIG_CMD_FAT=n CONFIG_CMD_FS_GENERIC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_OF_LIBFDT=y +CONFIG_SYS_MALLOC_CLEAR_ON_INIT=n +CONFIG_EFI_LOADER=n -- cgit v0.10.2 From f6825e4a449f83517742de00c56ef6ce4fda8f5a Mon Sep 17 00:00:00 2001 From: Kimmo Surakka Date: Tue, 24 May 2016 15:56:23 +0200 Subject: board: ge: bx50v3: add missing partnum variable Add missing ${partnum} to set rootdev correctly when booting from USB or MMC. Signed-off-by: Kimmo Surakka [Rebased against v2016.05 and adjusted the variable name] Signed-off-by: Andrew Shadura diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 98f20c6..4033460 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -228,12 +228,12 @@ #define CONFIG_MMCBOOTCOMMAND \ "setenv dev mmc; " \ - "setenv rootdev mmcblk0p1; " \ + "setenv rootdev mmcblk0p${partnum}; " \ \ "setenv devnum ${sddev}; " \ "if mmc dev ${devnum}; then " \ "run tryboot; " \ - "setenv rootdev mmcblk1p1; " \ + "setenv rootdev mmcblk1p${partnum}; " \ "fi; " \ \ "setenv devnum ${emmcdev}; " \ @@ -245,7 +245,7 @@ "usb start; " \ "setenv dev usb; " \ "setenv devnum 0; " \ - "setenv rootdev sda1; " \ + "setenv rootdev sda${partnum}; " \ "run tryboot; " \ \ CONFIG_MMCBOOTCOMMAND \ -- cgit v0.10.2 From d2ba7a6adcef6e6f8c4418c7b0caf9d7ab98a6d4 Mon Sep 17 00:00:00 2001 From: Michael Heimpold Date: Mon, 6 Jun 2016 14:26:39 +0200 Subject: arm: mxs: Remove misleading comments Both comments look like being copy & paste errors. Signed-off-by: Michael Heimpold Cc: Peng Fan Cc: Stefano Babic Reviewed-by: Peng Fan diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index a6af0fc..2298620 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -167,9 +167,9 @@ const char *get_imx_type(u32 imxtype) { switch (imxtype) { case MXC_CPU_MX23: - return "23"; /* Quad-Plus version of the mx6 */ + return "23"; case MXC_CPU_MX28: - return "28"; /* Dual-Plus version of the mx6 */ + return "28"; default: return "??"; } -- cgit v0.10.2