From a676cca41d52a89d9e3841170880e1234ec45606 Mon Sep 17 00:00:00 2001 From: Jason Liu Date: Wed, 17 Nov 2010 16:01:18 +0800 Subject: mx51evk: savenv or env save command does not work fix saveenv or env save command not work on mx51evk board. with this patch, we can use savenv or env save to store enviroments to mmc card slot 0 Signed-off-by: Jason Liu diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index f98438d..b4e5738 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -216,8 +216,9 @@ */ #define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 #endif -- cgit v0.10.2 From 565e39c57769a45a5eaed5e4c86357e817cf64e1 Mon Sep 17 00:00:00 2001 From: Liu Hui-R64343 Date: Thu, 18 Nov 2010 23:45:55 +0000 Subject: imx: Get fec mac address from fuse The patch is to support getting FEC MAC address from fuse bank. Signed-off-by: Jason Liu Tested-by: Stefano Babic diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index b80a389..c6e1146 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -260,4 +260,16 @@ void mx25_fec_init_pins (void) writel (outpadctl, &padctl->pad_fec_tdata1); } + +void imx_get_mac_from_fuse(unsigned char *mac) +{ + int i; + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + for (i = 0; i < 6; i++) + mac[i] = readl(&fuse->mac_addr[i]) & 0xff; +} #endif /* CONFIG_FEC_MXC */ diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index ae2ce58..27642bf 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -313,6 +313,18 @@ void mx27_fec_init_pins(void) for (i = 0; i < ARRAY_SIZE(mode); i++) imx_gpio_mode(mode[i]); } + +void imx_get_mac_from_fuse(unsigned char *mac) +{ + int i; + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + for (i = 0; i < 6; i++) + mac[6 - 1 - i] = readl(&fuse->mac_addr[i]) & 0xff; +} #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 7c7a565..2900119 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -100,6 +100,20 @@ int cpu_eth_init(bd_t *bis) return rc; } +#if defined(CONFIG_FEC_MXC) +void imx_get_mac_from_fuse(unsigned char *mac) +{ + int i; + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + + for (i = 0; i < 6; i++) + mac[i] = readl(&fuse->mac_addr[i]) & 0xff; +} +#endif + /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h index f5a2929..55ad115 100644 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -36,6 +36,7 @@ #ifndef __ASSEMBLY__ #ifdef CONFIG_FEC_MXC extern void mx25_fec_init_pins(void); +extern void imx_get_mac_from_fuse(unsigned char *mac); #endif /* Clock Control Module (CCM) registers */ @@ -129,12 +130,17 @@ struct iim_regs { u32 iim_srev; u32 iim_prog_p; u32 res1[0x1f5]; - u32 iim_bank_area0[0x20]; - u32 res2[0xe0]; - u32 iim_bank_area1[0x20]; - u32 res3[0xe0]; - u32 iim_bank_area2[0x20]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; }; + +struct fuse_bank0_regs { + u32 fuse0_25[0x1a]; + u32 mac_addr[6]; +}; + #endif /* AIPS 1 */ @@ -312,7 +318,4 @@ struct iim_regs { #define WSR_UNLOCK1 0x5555 #define WSR_UNLOCK2 0xAAAA -/* FUSE bank offsets */ -#define IIM0_MAC 0x1a - #endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 6ecddaa..8f40aa7 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -34,6 +34,7 @@ extern void mx27_uart_init_pins(void); #ifdef CONFIG_FEC_MXC extern void mx27_fec_init_pins(void); +extern void imx_get_mac_from_fuse(unsigned char *mac); #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC @@ -202,9 +203,19 @@ struct iim_regs { u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; - u32 res[0x1F0]; - u32 iim_bank_area0[0x100]; + u32 res[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[1]; }; + +struct fuse_bank0_regs { + u32 fuse0_3[5]; + u32 mac_addr[6]; + u32 fuse10_31[0x16]; +}; + #endif #define IMX_IO_BASE 0x10000000 @@ -512,9 +523,4 @@ struct iim_regs { #define IIM_ERR_SNSE (1 << 2) #define IIM_ERR_PARITYE (1 << 1) -/* Definitions for i.MX27 TO2 */ -#define IIM0_MAC 5 -#define IIM0_SCC_KEY 11 -#define IIM1_SUID 1 - #endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 0b6249a..b45026d 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -205,9 +205,13 @@ #define BOARD_REV_1_0 0x0 #define BOARD_REV_2_0 0x1 +#define IMX_IIM_BASE (IIM_BASE_ADDR) + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include +extern void imx_get_mac_from_fuse(unsigned char *mac); + #define __REG(x) (*((volatile u32 *)(x))) #define __REG16(x) (*((volatile u16 *)(x))) #define __REG8(x) (*((volatile u8 *)(x))) @@ -275,6 +279,36 @@ struct src { u32 sisr; u32 simr; }; + +struct iim_regs { + u32 stat; + u32 statm; + u32 err; + u32 emask; + u32 fctl; + u32 ua; + u32 la; + u32 sdat; + u32 prev; + u32 srev; + u32 preg_p; + u32 scs0; + u32 scs1; + u32 scs2; + u32 scs3; + u32 res0[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[4]; +}; + +struct fuse_bank1_regs { + u32 fuse0_8[9]; + u32 mac_addr[6]; + u32 fuse15_31[0x11]; +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MXC_MX51_H__ */ diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index c17f937..0d0f392 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -312,21 +312,8 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd) static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac) { -/* - * The MX27 can store the mac address in internal eeprom - * This mechanism is not supported now by MX51 or MX25 - */ -#if defined(CONFIG_MX51) || defined(CONFIG_MX25) - return -1; -#else - struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; - int i; - - for (i = 0; i < 6; i++) - mac[6-1-i] = readl(&iim->iim_bank_area0[IIM0_MAC + i]); - + imx_get_mac_from_fuse(mac); return !is_valid_ether_addr(mac); -#endif } static int fec_set_hwaddr(struct eth_device *dev) @@ -754,7 +741,7 @@ static int fec_probe(bd_t *bd) eth_register(edev); if (fec_get_hwaddr(edev, ethaddr) == 0) { - printf("got MAC address from EEPROM: %pM\n", ethaddr); + printf("got MAC address from fuse: %pM\n", ethaddr); memcpy(edev->enetaddr, ethaddr, 6); } -- cgit v0.10.2 From de9b5b12a7524d466c9f75b2dd7fb7f43b3ed2ea Mon Sep 17 00:00:00 2001 From: Semih Hazar Date: Thu, 17 Dec 2009 15:07:22 +0200 Subject: Remove duplicate #defines in atngw100.h and mimc200.h Two configuration include files had duplicate CONFIG_DOS_PARTITION definitions with the same value. This patch does not effect anything, just trims unnecessary text. Signed-off-by: Semih Hazar diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 83056b6..92491ca 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -104,8 +104,6 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY -#define CONFIG_DOS_PARTITION 1 - /* * Command line configuration. */ diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index 6ed9e75..16e2ec6 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -109,8 +109,6 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY -#define CONFIG_DOS_PARTITION 1 - /* * Command line configuration. */ -- cgit v0.10.2 From bb7fc5744dd696552092cee571041d7df3128dbe Mon Sep 17 00:00:00 2001 From: Horst Kronstorfer Date: Tue, 4 May 2010 12:37:36 +0200 Subject: Added PCI_DEVICE_ID_PLX_9030. Added PCI device ID for the PLXTech PCI 9030 bridge. Signed-off-by: Horst Kronstorfer diff --git a/include/pci_ids.h b/include/pci_ids.h index dcc381d..cb8398d 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -882,6 +882,7 @@ #define PCI_DEVICE_ID_PLX_SPCOM200 0x1103 #define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 #define PCI_DEVICE_ID_PLX_R753 0x1152 +#define PCI_DEVICE_ID_PLX_9030 0x9030 #define PCI_DEVICE_ID_PLX_9050 0x9050 #define PCI_DEVICE_ID_PLX_9060 0x9060 #define PCI_DEVICE_ID_PLX_9060ES 0x906E -- cgit v0.10.2 From 35cf884de2557461df0042f35d3bcc187e629545 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Sun, 28 Nov 2010 20:00:12 -0500 Subject: OMAP4: SDP4430: Disable CMD_NFS This patch fixes the SDB4430 build after commit 6d8962e814c15807dd6ac5757904be2a02d187b8 by explicitly disabling CMD_NFS. >From the commit message for "Switch from archive libraries to partial linking": This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index ed0bd41..d288333 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -139,6 +139,7 @@ /* Disabled commands */ #undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMLS /* List all found images */ -- cgit v0.10.2 From 84c611d33bebd4c37ee0dd8cd1e9468c75a9798b Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Mon, 29 Nov 2010 16:30:47 -0500 Subject: ARMV7: OMAP3: Fix build failure for igep0030 machine Seems that if CONFIG_CMD_NET is undefined we should also undefine CONFIG_CMD_NFS, otherwise build fails with various undefined reference like: net/libnet.o: In function `rpc_req': u-boot/net/nfs.c:193: undefined reference to `NetEthHdrSize' u-boot/net/nfs.c:202: undefined reference to `NetSendUDPPacket' u-boot/net/nfs.c:203: undefined reference to `NetTxPacket' u-boot/net/nfs.c:203: undefined reference to `NetServerEther' This patch adds the undef CONFIG_CMD_NFS in configuration file. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Sandeep Paulraj diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h index d61793c..1325bfa 100644 --- a/include/configs/igep0030.h +++ b/include/configs/igep0030.h @@ -110,6 +110,7 @@ #define CONFIG_MTD_DEVICE #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* nfs */ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_IMLS /* List all found images */ -- cgit v0.10.2 From f899198a7f7bff6e6b1ec9c3478c35fcede9a588 Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Mon, 29 Nov 2010 16:32:47 -0500 Subject: omap3evm: Use GENERATED_GBL_DATA_SIZE The macro CONFIG_SYS_GBL_DATA_SIZE has been replaced with GENERATED_GBL_DATA_SIZE. Also define macros: CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE. Based on changes for omap3_beagle in the commit: 31bfcf1c5776df3d90286aa15104c45096d53dc6 Signed-off-by: Sanjeev Premi Signed-off-by: Sandeep Paulraj diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 84b2986..5bdb3fd 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -330,7 +330,11 @@ extern unsigned int boot_flash_type; * Support for relocation */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * Define the board revision statically -- cgit v0.10.2 From 13acfc6f7f8e61494d8b216e35e52da83cf13236 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 29 Nov 2010 16:36:04 -0500 Subject: AM3517:Fix for ARM Relocation support Also change the CONFIG_SYS_TEXT_BASE to 0x80008000, required with relocation support. This is the load address for primary boot loader (x-loader). Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj diff --git a/board/logicpd/am3517evm/config.mk b/board/logicpd/am3517evm/config.mk index 102d32b..71ec5d0 100644 --- a/board/logicpd/am3517evm/config.mk +++ b/board/logicpd/am3517evm/config.mk @@ -27,4 +27,4 @@ # (mem base + reserved) # For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 9a9ba88..3dda1e9 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -330,4 +330,10 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) #endif /* __CONFIG_H */ -- cgit v0.10.2 From aa82d5f2a6cf373463270ad5e3160ef906d99175 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 29 Nov 2010 16:36:07 -0500 Subject: AM3517:Build FIX: undef CONFIG_CMD_NFS support Without CONFIG_CMD_NET support CONFIG_CMD_NFS leads to linking error, so disable CONFIG_CMD_NFS option. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 3dda1e9..70e8f07 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -163,6 +163,7 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1 #undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS /* * Board NAND Info. */ -- cgit v0.10.2 From 279c8283db09b1168fce83fc9851ca8b36ea07f8 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 29 Nov 2010 16:36:10 -0500 Subject: AM3517:EMIF4: fix SDRAM size to 256Mb With addition of "dram_init_banksize()" function from Heiko,Schocher (commit ID: 561142af20f1fd7b425d9425730014e656defb91), the DRAM size is getting configured wrongly to 512Mb (CS0 & CS1). So fix it to 256Mb. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj diff --git a/arch/arm/cpu/armv7/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c index 0870857..2227576 100644 --- a/arch/arm/cpu/armv7/omap3/emif4.c +++ b/arch/arm/cpu/armv7/omap3/emif4.c @@ -48,10 +48,11 @@ u32 is_mem_sdr(void) */ u32 get_sdr_cs_size(u32 cs) { - u32 size; + u32 size = 0; /* TODO: Calculate the size based on EMIF4 configuration */ - size = CONFIG_SYS_CS0_SIZE; + if (cs == CS0) + size = CONFIG_SYS_CS0_SIZE; return size; } -- cgit v0.10.2 From 98877c3c0efacb5c61068280b6441a61e2dc3a24 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 22 Nov 2010 20:26:46 +0900 Subject: S5P: smdkc100: fix for relocation Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 31e8d9e..d3189f6 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -65,13 +65,17 @@ int board_init(void) int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, - PHYS_SDRAM_1_SIZE); + gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); return 0; } +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +} + #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) { diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index e36b262..fb8b43c 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -231,6 +231,8 @@ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) + /* * Ethernet Contoller driver */ -- cgit v0.10.2 From 177feff303538c6cf8caaeb34e5243ca95563e1c Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 22 Nov 2010 20:27:44 +0900 Subject: S5P: goni: fix for relocation Signed-off-by: Minkyu Kang Signed-off-by: Kyungmin Park diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 0b09eba..581935d 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -43,14 +43,20 @@ int board_init(void) int dram_init(void) { + gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE + + PHYS_SDRAM_3_SIZE; + + return 0; +} + +void dram_init_banksize(void) +{ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; gd->bd->bi_dram[2].start = PHYS_SDRAM_3; gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; - - return 0; } #ifdef CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 541aec0..f53e798 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -217,4 +217,6 @@ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) + #endif /* __CONFIG_H */ -- cgit v0.10.2 From d3b0d628b08ab999a99c4ee30eaac1406a5d7056 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Fri, 19 Nov 2010 17:00:26 +0900 Subject: ARMV7: S5P: timer: get the count_value from register when call udelay Because of count_value is set to tcnb4 register, should be get from this register when call udelay function. Signed-off-by: Minkyu Kang diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 0490650..651fd5d 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -65,15 +65,12 @@ int timer_init(void) writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); - if (count_value == 0) { - /* reset initial value */ - /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * - (MUX_DIV_2 + 1)); - - /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; - } + /* count_value = 2085937.5(HZ) (per 1 sec)*/ + count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * + (MUX_DIV_2 + 1)); + + /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ + count_value = count_value / 100; /* set count value */ writel(count_value, &timer->tcntb4); @@ -114,8 +111,11 @@ void set_timer(unsigned long t) /* delay x useconds */ void __udelay(unsigned long usec) { + struct s5p_timer *const timer = s5p_get_base_timer(); unsigned long tmo, tmp; + count_value = readl(&timer->tcntb4); + if (usec >= 1000) { /* * if "big" number, spread normalization -- cgit v0.10.2 From 2024b968ee9476bb7809e472a693120e775bbbbb Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 24 Nov 2010 13:12:17 +0900 Subject: sh: Fix build in start.S By commit 6d8962e814c15807dd6ac5757904be2a02d187b8, label of _start was not usable in start.S and build fail. This change label from _start to _sh_start. ---- arch/sh/cpu/sh4/libsh4.o: In function `_start': (.text+0x204): multiple definition of `_start' arch/sh/cpu/sh4/start.o:(.text+0x0): first defined here ---- Signed-off-by: Nobuhiro Iwamatsu diff --git a/arch/sh/cpu/sh2/start.S b/arch/sh/cpu/sh2/start.S index 77043f6..8e0e640 100644 --- a/arch/sh/cpu/sh2/start.S +++ b/arch/sh/cpu/sh2/start.S @@ -26,7 +26,7 @@ .align 2 .global _start -_start: +_sh_start: .long 0x00000010 /* Ppower ON reset PC*/ .long 0x00000000 .long 0x00000010 /* Manual reset PC */ @@ -39,7 +39,7 @@ _init: nop 1: sts pr, r5 mov.l ._reloc_dst, r4 - add #(_start-1b), r5 + add #(_sh_start-1b), r5 mov.l ._reloc_dst_end, r6 2: mov.l @r5+, r1 @@ -74,6 +74,6 @@ loop: ._reloc_dst_end: .long reloc_dst_end ._bss_start: .long bss_start ._bss_end: .long bss_end -._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE) -._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) +._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE) +._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) ._sh_generic_init: .long sh_generic_init diff --git a/arch/sh/cpu/sh3/start.S b/arch/sh/cpu/sh3/start.S index 9dd2303..d96ca91 100644 --- a/arch/sh/cpu/sh3/start.S +++ b/arch/sh/cpu/sh3/start.S @@ -29,7 +29,7 @@ .align 2 .global _start -_start: +_sh_start: mov.l ._lowlevel_init, r0 100: bsrf r0 nop @@ -38,7 +38,7 @@ _start: nop 1: sts pr, r5 mov.l ._reloc_dst, r4 - add #(_start-1b), r5 + add #(_sh_start-1b), r5 mov.l ._reloc_dst_end, r6 2: mov.l @r5+, r1 @@ -73,6 +73,6 @@ loop: ._reloc_dst_end: .long reloc_dst_end ._bss_start: .long bss_start ._bss_end: .long bss_end -._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE) -._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) +._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE) +._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) ._sh_generic_init: .long sh_generic_init diff --git a/arch/sh/cpu/sh4/start.S b/arch/sh/cpu/sh4/start.S index 4b5f606..a1d5ee4 100644 --- a/arch/sh/cpu/sh4/start.S +++ b/arch/sh/cpu/sh4/start.S @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 + * (C) Copyright 2007, 2010 * Nobuhiro Iwamatsu * * This program is free software; you can redistribute it and/or @@ -26,7 +26,7 @@ .align 2 .global _start -_start: +_sh_start: mov.l ._lowlevel_init, r0 100: bsrf r0 nop @@ -35,7 +35,7 @@ _start: nop 1: sts pr, r5 mov.l ._reloc_dst, r4 - add #(_start-1b), r5 + add #(_sh_start-1b), r5 mov.l ._reloc_dst_end, r6 2: mov.l @r5+, r1 @@ -70,6 +70,6 @@ loop: ._reloc_dst_end: .long reloc_dst_end ._bss_start: .long bss_start ._bss_end: .long bss_end -._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE) -._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) +._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE) +._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16) ._sh_generic_init: .long sh_generic_init -- cgit v0.10.2 From e2b5afc1bfa15a2f8a70d454612007755418f534 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 24 Nov 2010 14:16:47 +0900 Subject: sh: r7780mp: Remove CONFIG_DRIVER_NE2000 from config Signed-off-by: Nobuhiro Iwamatsu diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 3416cb8..802416f 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -154,7 +154,6 @@ #define CONFIG_RTL8169 */ /* AX88796L Support(NE2000 base chip) */ -#define CONFIG_DRIVER_NE2000 #define CONFIG_DRIVER_AX88796L #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 #endif -- cgit v0.10.2 From 5ec789f6cbdf30fccb8355dd78e98712789903db Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 30 Nov 2010 11:10:40 -0500 Subject: OMAP3: SDP3430: Fix ARM relocation support Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj diff --git a/board/ti/sdp3430/config.mk b/board/ti/sdp3430/config.mk index 2ca03dd..be46298 100644 --- a/board/ti/sdp3430/config.mk +++ b/board/ti/sdp3430/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index a5eb648..4708981 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -309,6 +309,12 @@ #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ #endif +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * SDRAM Memory Map */ -- cgit v0.10.2 From 25435c6cce5148469e2b8745b5139c8da6eebdbe Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 30 Nov 2010 11:10:45 -0500 Subject: OMAP3: Zoom1: Fix ARM relocation support Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj diff --git a/board/logicpd/zoom1/config.mk b/board/logicpd/zoom1/config.mk index 39a94dc..e89de31 100644 --- a/board/logicpd/zoom1/config.mk +++ b/board/logicpd/zoom1/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index d9e8ea0..f7d0652 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -236,6 +236,12 @@ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * OMAP3 has 12 GP timers, they can be driven by the system clock * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). -- cgit v0.10.2 From 998f4caf6fd63fdaa86ab0f91a1a3ed5b9cdfb22 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 30 Nov 2010 11:10:48 -0500 Subject: OMAP3: Zoom2: Fix ARM relocation support Signed-off-by: Dirk Behme Signed-off-by: Sandeep Paulraj diff --git a/board/logicpd/zoom2/config.mk b/board/logicpd/zoom2/config.mk index 8a8adc7..9f3f57d 100644 --- a/board/logicpd/zoom2/config.mk +++ b/board/logicpd/zoom2/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index 41abe04..7377933 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -188,6 +188,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "usbtty=cdc_acm\0" \ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* * Miscellaneous configurable options */ -- cgit v0.10.2 From 0b72585796d6e08abba56965644ea51748c4b1d2 Mon Sep 17 00:00:00 2001 From: Stefan Popa Date: Fri, 26 Nov 2010 17:09:40 +0000 Subject: mpc83xx: Fix for MPC8360 ATM Quad OC3 External Phys Changed the CS4 and CS5 addresses on Local Bus for matching the PMC0 and PMC1 addresses. Signed-off-by: Stefan Popa Signed-off-by: Kim Phillips diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 7b82c43..a959940 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -296,13 +296,13 @@ /* * CS4 on Local Bus, to PIB */ -#define CONFIG_SYS_BR4_PRELIM 0xf8010801 /* CS4 base address at 0xf8010000 */ +#define CONFIG_SYS_BR4_PRELIM 0xf8008801 /* CS4 base address at 0xf8008000 */ #define CONFIG_SYS_OR4_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */ /* * CS5 on Local Bus, to PIB */ -#define CONFIG_SYS_BR5_PRELIM 0xf8008801 /* CS5 base address at 0xf8008000 */ +#define CONFIG_SYS_BR5_PRELIM 0xf8010801 /* CS5 base address at 0xf8010000 */ #define CONFIG_SYS_OR5_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */ /* -- cgit v0.10.2 From e45c98ad35ca600e25e9264528e7b6be17969f8c Mon Sep 17 00:00:00 2001 From: Joakim Tjernlund Date: Fri, 19 Nov 2010 14:15:33 +0100 Subject: mpc83xx: Make it boot again After the removal of COLD/WARM start flags my mpc8321 board didn't boot anymore. Trial and error suggests that map/remap_flash_by_xxx needs to wait after updating LBLAWAR1 to make sure the the change has reached the HW before continuing with the code that depends on it. Final fix suggested by Scott Wood. Signed-off-by: Joakim Tjernlund Acked-by: Scott Wood Signed-off-by: Kim Phillips diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 515be4c..460ac9a 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -1158,6 +1158,10 @@ map_flash_by_law1: bne 1b stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */ + /* Wait for HW to catch up */ + lwz r4, LBLAWAR1(r3) + twi 0,r4,0 + isync blr /* Though all the LBIU Local Access Windows and LBC Banks will be @@ -1196,5 +1200,9 @@ remap_flash_by_law0: xor r4, r4, r4 stw r4, LBLAWBAR1(r3) stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */ + /* Wait for HW to catch up */ + lwz r4, LBLAWAR1(r3) + twi 0,r4,0 + isync blr #endif /* CONFIG_SYS_FLASHBOOT */ -- cgit v0.10.2 From a55bb8340ba8682782f816f0b9b3de13e5512e28 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 29 Nov 2010 14:32:11 -0600 Subject: powerpc/85xx: Introduce CONFIG_SYS_EXTRA_ENV_RELOC Some systems need to relocate the env_addr pointer early because the location it points to will get invalidated before env_relocate is called. One example is on systems that might use a L2 or L3 cache in SRAM mode and initialize that cache from SRAM mode back to being a cache in cpu_init_r. We set this on the 85xx boards that have support for NAND, SPI, or SDHC/MMC boot support as they use a secondary cache in SRAM mode and need the env_addr pointer relocated since we change from SRAM to normal cache mode in cpu_init_r. Also removed CONFIG_SYS_SPL as its not used anywhere. Signed-off-by: Kumar Gala diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index b21c1d6..9759e23 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -645,6 +645,17 @@ void board_init_r (gd_t *id, ulong dest_addr) gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE; #endif +#ifdef CONFIG_SYS_EXTRA_ENV_RELOC + /* + * Some systems need to relocate the env_addr pointer early because the + * location it points to will get invalidated before env_relocate is + * called. One example is on systems that might use a L2 or L3 cache + * in SRAM mode and initialize that cache from SRAM mode back to being + * a cache in cpu_init_r. + */ + gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE; +#endif + #ifdef CONFIG_SERIAL_MULTI serial_initialize(); #endif diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 850665a..5c5be0c 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -242,9 +242,10 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ - || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ + defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC #else #undef CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index c7973b4..9620fd0 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -203,8 +203,9 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_RAMBOOT_NAND) #define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC #else #undef CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 610f3ed..a21afb7 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -201,9 +201,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ - || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ + defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC #else #undef CONFIG_SYS_RAMBOOT #endif -- cgit v0.10.2 From b194577b2995eacbd2a3769269f0af1bc5e22530 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 30 Nov 2010 15:01:28 -0600 Subject: hwconfig: Fix dummy initialization of {board, cpu}_hwconfig Since board_hwconfig & cpu_hwconfig are defined as weak and dont have a default value they will get put into the BSS if they aren't defined elsewhere. This is problematic as we try to utilize hwconfig before we've relocated and thus BSS isn't setup. Instead of giving dummy values in the board files that utilize this feature, we can just initialize the variables to an empty string and thus move them out of the BSS if they aren't defined elsewhere. Also made board_hwconfig & cpu_hwconfig arrays to reduce size associated with string pointers vs arrays. Signed-off-by: Kumar Gala diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 812111d..882ff0b 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -60,9 +60,6 @@ int checkboard(void) return 0; } -const char *board_hwconfig = "foo:bar=baz"; -const char *cpu_hwconfig = "foo:bar=baz"; - phys_size_t initdram(int board_type) { diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index b507677..b05ef98 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -69,9 +69,6 @@ int checkboard(void) return 0; } -const char *board_hwconfig = "foo:bar=baz"; -const char *cpu_hwconfig = "foo:bar=baz"; - phys_size_t initdram(int board_type) { phys_size_t dram_size = 0; diff --git a/common/hwconfig.c b/common/hwconfig.c index 3c9759f..da8d3ed 100644 --- a/common/hwconfig.c +++ b/common/hwconfig.c @@ -68,8 +68,8 @@ next: return NULL; } -const char *cpu_hwconfig __attribute__((weak)); -const char *board_hwconfig __attribute__((weak)); +const char cpu_hwconfig[] __attribute__((weak)) = ""; +const char board_hwconfig[] __attribute__((weak)) = ""; #define HWCONFIG_PRE_RELOC_BUF_SIZE 128 @@ -96,13 +96,11 @@ static const char *__hwconfig(const char *opt, size_t *arglen) return hwconfig_parse(env_hwconfig, strlen(env_hwconfig), opt, ";", ':', arglen); - if (board_hwconfig) - return hwconfig_parse(board_hwconfig, strlen(board_hwconfig), - opt, ";", ':', arglen); + return hwconfig_parse(board_hwconfig, strlen(board_hwconfig), + opt, ";", ':', arglen); - if (cpu_hwconfig) - return hwconfig_parse(cpu_hwconfig, strlen(cpu_hwconfig), - opt, ";", ':', arglen); + return hwconfig_parse(cpu_hwconfig, strlen(cpu_hwconfig), + opt, ";", ':', arglen); return NULL; } -- cgit v0.10.2 From 9de0aa74471c0bd7f8b3b0e6f400df5e6c3b92c9 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 1 Dec 2010 06:42:04 -0600 Subject: powerpc/8xxx: Fix _POST_WORD_ADDR on 85xx & 86xx systems We intended to use the PIC TFRR register however we where missing adding in the PIC register base offset from IMMR when we defined _POST_WORD_ADDR. Signed-off-by: Kumar Gala diff --git a/include/post.h b/include/post.h index 957ce3b..519cef1 100644 --- a/include/post.h +++ b/include/post.h @@ -58,11 +58,13 @@ #elif defined (CONFIG_MPC85xx) #include -#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr)) +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET + \ + offsetof(ccsr_pic_t, tfrr)) #elif defined (CONFIG_MPC86xx) #include -#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr)) +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PIC_OFFSET + \ + offsetof(ccsr_pic_t, tfrr)) #elif defined (CONFIG_4xx) #define _POST_WORD_ADDR \ -- cgit v0.10.2 From 558710b98bd71bc31a0447a28fab79cf4649aa69 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 19 Nov 2010 08:53:25 -0600 Subject: powerpc/85xx: Enable HWCONFIG on MPC8572DS We need HWCONFIG to allow configuration of DDR params Signed-off-by: Kumar Gala diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 692c811..1ee95ae 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -202,6 +202,7 @@ #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_HWCONFIG /* enable hwconfig */ #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ #ifdef CONFIG_PHYS_64BIT -- cgit v0.10.2 From 888279b5ed8a6243eda81af84a98adc64c5e4453 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Wed, 1 Dec 2010 10:35:30 -0500 Subject: powerpc/85xx: do not reloc l2srbar if CONFIG_FLASH_BASE is not defined This fixes the compiling error for the board which doesn't have NOR flash (so CONFIG_FLASH_BASE is not defined) Signed-off-by: Haiying Wang Signed-off-by: Kumar Gala diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 27236a0..4b8faa5 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -327,7 +327,7 @@ int cpu_init_r(void) if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { puts("already enabled"); l2srbar = l2cache->l2srbar0; -#ifdef CONFIG_SYS_INIT_L2_ADDR +#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE && l2srbar >= CONFIG_SYS_FLASH_BASE) { l2srbar = CONFIG_SYS_INIT_L2_ADDR; -- cgit v0.10.2 From 14f88c43fcb7cee954648daeaba08b8e881ec01b Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 29 Nov 2010 21:17:37 +0100 Subject: video: move fsl_diu_fb driver to drivers/video Since the driver is used not only on Freescale boards, we move it to a common place for video drivers as suggested by Wolfgang. The patch also cleans up the top level Makefile. Signed-off-by: Anatolij Gustschin diff --git a/Makefile b/Makefile index 87a383d..0685ef9 100644 --- a/Makefile +++ b/Makefile @@ -185,9 +185,6 @@ LIBS += lib/lzma/liblzma.o LIBS += lib/lzo/liblzo.o LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \ "board/$(VENDOR)/common/lib$(VENDOR).o"; fi) -ifdef CONFIG_FSL_DIU_FB -LIBS += board/freescale/common/libfreescale.o -endif LIBS += $(CPUDIR)/lib$(CPU).o ifdef SOC LIBS += $(CPUDIR)/$(SOC)/lib$(SOC).o diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 905dd7a..1abd3e5 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -31,7 +31,6 @@ LIB = $(obj)libfreescale.o COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o COBJS-$(CONFIG_FSL_VIA) += cds_via.o -COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o COBJS-$(CONFIG_FSL_PIXIS) += pixis.o COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c deleted file mode 100644 index 35ed938..0000000 --- a/board/freescale/common/fsl_diu_fb.c +++ /dev/null @@ -1,513 +0,0 @@ -/* - * Copyright 2007, 2010 Freescale Semiconductor, Inc. - * York Sun - * - * FSL DIU Framebuffer driver - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -#include - -struct fb_videomode { - const char *name; /* optional */ - unsigned int refresh; /* optional */ - unsigned int xres; - unsigned int yres; - unsigned int pixclock; - unsigned int left_margin; - unsigned int right_margin; - unsigned int upper_margin; - unsigned int lower_margin; - unsigned int hsync_len; - unsigned int vsync_len; - unsigned int sync; - unsigned int vmode; - unsigned int flag; -}; - -#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */ -#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ -#define FB_VMODE_NONINTERLACED 0 /* non interlaced */ - -/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ -static struct fb_videomode fsl_diu_mode_800 = { - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 31250, - .left_margin = 86, - .right_margin = 42, - .upper_margin = 33, - .lower_margin = 10, - .hsync_len = 128, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * These parameters give default parameters - * for video output 1024x768, - * FIXME - change timing to proper amounts - * hsync 31.5kHz, vsync 60Hz - */ -static struct fb_videomode fsl_diu_mode_1024 = { - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 160, - .right_margin = 24, - .upper_margin = 29, - .lower_margin = 3, - .hsync_len = 136, - .vsync_len = 6, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode fsl_diu_mode_1280 = { - .name = "1280x1024-60", - .refresh = 60, - .xres = 1280, - .yres = 1024, - .pixclock = 9375, - .left_margin = 38, - .right_margin = 128, - .upper_margin = 2, - .lower_margin = 7, - .hsync_len = 216, - .vsync_len = 37, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * These are the fields of area descriptor(in DDR memory) for every plane - */ -struct diu_ad { - /* Word 0(32-bit) in DDR memory */ - unsigned int pix_fmt; /* hard coding pixel format */ - /* Word 1(32-bit) in DDR memory */ - unsigned int addr; - /* Word 2(32-bit) in DDR memory */ - unsigned int src_size_g_alpha; - /* Word 3(32-bit) in DDR memory */ - unsigned int aoi_size; - /* Word 4(32-bit) in DDR memory */ - unsigned int offset_xyi; - /* Word 5(32-bit) in DDR memory */ - unsigned int offset_xyd; - /* Word 6(32-bit) in DDR memory */ - unsigned int ckmax_r:8; - unsigned int ckmax_g:8; - unsigned int ckmax_b:8; - unsigned int res9:8; - /* Word 7(32-bit) in DDR memory */ - unsigned int ckmin_r:8; - unsigned int ckmin_g:8; - unsigned int ckmin_b:8; - unsigned int res10:8; - /* Word 8(32-bit) in DDR memory */ - unsigned int next_ad; - /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ - unsigned int res1; - unsigned int res2; - unsigned int res3; -}__attribute__ ((packed)); - -/* - * DIU register map - */ -struct diu { - unsigned int desc[3]; - unsigned int gamma; - unsigned int pallete; - unsigned int cursor; - unsigned int curs_pos; - unsigned int diu_mode; - unsigned int bgnd; - unsigned int bgnd_wb; - unsigned int disp_size; - unsigned int wb_size; - unsigned int wb_mem_addr; - unsigned int hsyn_para; - unsigned int vsyn_para; - unsigned int syn_pol; - unsigned int thresholds; - unsigned int int_status; - unsigned int int_mask; - unsigned int colorbar[8]; - unsigned int filling; - unsigned int plut; -} __attribute__ ((packed)); - -struct diu_hw { - struct diu *diu_reg; - volatile unsigned int mode; /* DIU operation mode */ -}; - -struct diu_addr { - unsigned char * paddr; /* Virtual address */ - unsigned int offset; -}; - -/* - * Modes of operation of DIU - */ -#define MFB_MODE0 0 /* DIU off */ -#define MFB_MODE1 1 /* All three planes output to display */ -#define MFB_MODE2 2 /* Plane 1 to display, - * planes 2+3 written back to memory */ -#define MFB_MODE3 3 /* All three planes written back to memory */ -#define MFB_MODE4 4 /* Color bar generation */ - -#define MAX_CURS 32 - -static struct fb_info fsl_fb_info; -static struct diu_addr gamma, cursor; -static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32))); -static struct diu_ad dummy_ad __attribute__ ((aligned(32))); -static unsigned char *dummy_fb; -static struct diu_hw dr = { - .mode = MFB_MODE1, -}; - -int fb_enabled = 0; -int fb_initialized = 0; -const int default_xres = 1280; -const int default_pixel_format = 0x88882317; - -static int map_video_memory(struct fb_info *info, unsigned long bytes_align); -static void enable_lcdc(void); -static void disable_lcdc(void); -static int fsl_diu_enable_panel(struct fb_info *info); -static int fsl_diu_disable_panel(struct fb_info *info); -static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align); -void diu_set_pixel_clock(unsigned int pixclock); - -int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix) -{ - struct fb_videomode *fsl_diu_mode_db; - struct diu_ad *ad = &fsl_diu_fb_ad; - struct diu *hw; - struct fb_info *info = &fsl_fb_info; - struct fb_var_screeninfo *var = &info->var; - unsigned char *gamma_table_base; - unsigned int i, j; - - debug("Enter fsl_diu_init\n"); - dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR); - hw = (struct diu *) dr.diu_reg; - - disable_lcdc(); - - switch (xres) { - case 800: - fsl_diu_mode_db = &fsl_diu_mode_800; - break; - case 1280: - fsl_diu_mode_db = &fsl_diu_mode_1280; - break; - default: - fsl_diu_mode_db = &fsl_diu_mode_1024; - } - - if (0 == fb_initialized) { - allocate_buf(&gamma, 768, 32); - debug("gamma is allocated @ 0x%x\n", - (unsigned int)gamma.paddr); - allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32); - debug("curosr is allocated @ 0x%x\n", - (unsigned int)cursor.paddr); - - /* create a dummy fb and dummy ad */ - dummy_fb = malloc(64); - if (NULL == dummy_fb) { - printf("Cannot allocate dummy fb\n"); - return -1; - } - dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb); - dummy_ad.pix_fmt = 0x88882317; - dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */ - dummy_ad.aoi_size = 0x02000400; - dummy_ad.offset_xyi = 0; - dummy_ad.offset_xyd = 0; - dummy_ad.next_ad = 0; - /* Memory allocation for framebuffer */ - if (map_video_memory(info, 32)) { - printf("Unable to allocate fb memory 1\n"); - return -1; - } - } - - memset(info->screen_base, 0, info->smem_len); - - out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad); - out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad); - out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad); - debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]); - debug("dummy desc[0] = 0x%x\n", hw->desc[0]); - - /* read mode info */ - var->xres = fsl_diu_mode_db->xres; - var->yres = fsl_diu_mode_db->yres; - var->bits_per_pixel = 32; - var->pixclock = fsl_diu_mode_db->pixclock; - var->left_margin = fsl_diu_mode_db->left_margin; - var->right_margin = fsl_diu_mode_db->right_margin; - var->upper_margin = fsl_diu_mode_db->upper_margin; - var->lower_margin = fsl_diu_mode_db->lower_margin; - var->hsync_len = fsl_diu_mode_db->hsync_len; - var->vsync_len = fsl_diu_mode_db->vsync_len; - var->sync = fsl_diu_mode_db->sync; - var->vmode = fsl_diu_mode_db->vmode; - info->line_length = var->xres * var->bits_per_pixel / 8; - - ad->pix_fmt = pixel_format; - ad->addr = cpu_to_le32((unsigned int)info->screen_base); - ad->src_size_g_alpha - = cpu_to_le32((var->yres << 12) | var->xres); - /* fix me. AOI should not be greater than display size */ - ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres); - ad->offset_xyi = 0; - ad->offset_xyd = 0; - - /* Disable chroma keying function */ - ad->ckmax_r = 0; - ad->ckmax_g = 0; - ad->ckmax_b = 0; - - ad->ckmin_r = 255; - ad->ckmin_g = 255; - ad->ckmin_b = 255; - - gamma_table_base = gamma.paddr; - debug("gamma_table_base is allocated @ 0x%x\n", - (unsigned int)gamma_table_base); - - /* Prep for DIU init - gamma table */ - - for (i = 0; i <= 2; i++) - for (j = 0; j <= 255; j++) - *gamma_table_base++ = j; - - if (gamma_fix == 1) { /* fix the gamma */ - debug("Fix gamma table\n"); - gamma_table_base = gamma.paddr; - for (i = 0; i < 256*3; i++) { - gamma_table_base[i] = (gamma_table_base[i] << 2) - | ((gamma_table_base[i] >> 6) & 0x03); - } - } - - debug("update-lcdc: HW - %p\n Disabling DIU\n", hw); - - /* Program DIU registers */ - - out_be32(&hw->gamma, (int)gamma.paddr); - out_be32(&hw->cursor, (int)cursor.paddr); - out_be32(&hw->bgnd, 0x007F7F7F); - out_be32(&hw->bgnd_wb, 0); /* BGND_WB */ - out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */ - out_be32(&hw->wb_size, 0); /* WB SIZE */ - out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */ - out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */ - var->hsync_len << 11 | /* PW_H */ - var->right_margin); /* FP_H */ - - out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */ - var->vsync_len << 11 | /* PW_V */ - var->lower_margin); /* FP_V */ - - out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */ - out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */ - out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */ - out_be32(&hw->int_mask, 0); /* INT MASK */ - out_be32(&hw->plut, 0x01F5F666); - /* Pixel Clock configuration */ - debug("DIU pixclock in ps - %d\n", var->pixclock); - diu_set_pixel_clock(var->pixclock); - - fb_initialized = 1; - - /* Enable the DIU */ - fsl_diu_enable_panel(info); - enable_lcdc(); - - return 0; -} - -char *fsl_fb_open(struct fb_info **info) -{ - *info = &fsl_fb_info; - return fsl_fb_info.screen_base; -} - -void fsl_diu_close(void) -{ - struct fb_info *info = &fsl_fb_info; - fsl_diu_disable_panel(info); -} - -static int fsl_diu_enable_panel(struct fb_info *info) -{ - struct diu *hw = dr.diu_reg; - struct diu_ad *ad = &fsl_diu_fb_ad; - - debug("Entered: enable_panel\n"); - if (in_be32(&hw->desc[0]) != (unsigned)ad) - out_be32(&hw->desc[0], (unsigned)ad); - debug("desc[0] = 0x%x\n", hw->desc[0]); - return 0; -} - -static int fsl_diu_disable_panel(struct fb_info *info) -{ - struct diu *hw = dr.diu_reg; - - debug("Entered: disable_panel\n"); - if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad) - out_be32(&hw->desc[0], (unsigned)&dummy_ad); - return 0; -} - -static int map_video_memory(struct fb_info *info, unsigned long bytes_align) -{ - unsigned long offset; - unsigned long mask; - - debug("Entered: map_video_memory\n"); - /* allocate maximum 1280*1024 with 32bpp */ - info->smem_len = 1280 * 4 *1024 + bytes_align; - debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len); - info->screen_base = malloc(info->smem_len); - if (info->screen_base == NULL) { - printf("Unable to allocate fb memory\n"); - return -1; - } - info->smem_start = (unsigned int) info->screen_base; - mask = bytes_align - 1; - offset = (unsigned long)info->screen_base & mask; - if (offset) { - info->screen_base += (bytes_align - offset); - info->smem_len = info->smem_len - (bytes_align - offset); - } else - info->smem_len = info->smem_len - bytes_align; - - info->screen_size = info->smem_len; - - debug("Allocated fb @ 0x%08lx, size=%d.\n", - info->smem_start, info->smem_len); - - return 0; -} - -static void enable_lcdc(void) -{ - struct diu *hw = dr.diu_reg; - - debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled); - if (!fb_enabled) { - out_be32(&hw->diu_mode, dr.mode); - fb_enabled++; - } - debug("diu_mode = %d\n", hw->diu_mode); -} - -static void disable_lcdc(void) -{ - struct diu *hw = dr.diu_reg; - - debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled); - if (fb_enabled) { - out_be32(&hw->diu_mode, 0); - fb_enabled = 0; - } -} - -/* - * Align to 64-bit(8-byte), 32-byte, etc. - */ -static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) -{ - u32 offset, ssize; - u32 mask; - - debug("Entered: allocate_buf\n"); - ssize = size + bytes_align; - buf->paddr = malloc(ssize); - if (!buf->paddr) - return -1; - - memset(buf->paddr, 0, ssize); - mask = bytes_align - 1; - offset = (u32)buf->paddr & mask; - if (offset) { - buf->offset = bytes_align - offset; - buf->paddr = (unsigned char *) ((u32)buf->paddr + offset); - } else - buf->offset = 0; - return 0; -} - -#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -#include -#include -/* - * The Graphic Device - */ -static GraphicDevice ctfb; - -void *video_hw_init(void) -{ - struct fb_info *info; - - if (platform_diu_init(&ctfb.winSizeX, &ctfb.winSizeY) < 0) - return NULL; - - /* fill in Graphic device struct */ - sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", - ctfb.winSizeX, ctfb.winSizeY, 32, 64, 60); - - ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info); - ctfb.plnSizeX = ctfb.winSizeX; - ctfb.plnSizeY = ctfb.winSizeY; - - ctfb.gdfBytesPP = 4; - ctfb.gdfIndex = GDF_32BIT_X888RGB; - - ctfb.isaBase = 0; - ctfb.pciBase = 0; - ctfb.memSize = info->screen_size; - - /* Cursor Start Address */ - ctfb.dprBase = 0; - ctfb.vprBase = 0; - ctfb.cprBase = 0; - - return &ctfb; -} -#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 83274c3..2c53a6f 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -28,6 +28,7 @@ LIB := $(obj)libvideo.o COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o +COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o COBJS-$(CONFIG_S6E63D6) += s6e63d6.o COBJS-$(CONFIG_VIDEO_AMBA) += amba.o COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o diff --git a/drivers/video/fsl_diu_fb.c b/drivers/video/fsl_diu_fb.c new file mode 100644 index 0000000..35ed938 --- /dev/null +++ b/drivers/video/fsl_diu_fb.c @@ -0,0 +1,513 @@ +/* + * Copyright 2007, 2010 Freescale Semiconductor, Inc. + * York Sun + * + * FSL DIU Framebuffer driver + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +#include + +struct fb_videomode { + const char *name; /* optional */ + unsigned int refresh; /* optional */ + unsigned int xres; + unsigned int yres; + unsigned int pixclock; + unsigned int left_margin; + unsigned int right_margin; + unsigned int upper_margin; + unsigned int lower_margin; + unsigned int hsync_len; + unsigned int vsync_len; + unsigned int sync; + unsigned int vmode; + unsigned int flag; +}; + +#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */ +#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ +#define FB_VMODE_NONINTERLACED 0 /* non interlaced */ + +/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ +static struct fb_videomode fsl_diu_mode_800 = { + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 31250, + .left_margin = 86, + .right_margin = 42, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 128, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +}; + +/* + * These parameters give default parameters + * for video output 1024x768, + * FIXME - change timing to proper amounts + * hsync 31.5kHz, vsync 60Hz + */ +static struct fb_videomode fsl_diu_mode_1024 = { + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 160, + .right_margin = 24, + .upper_margin = 29, + .lower_margin = 3, + .hsync_len = 136, + .vsync_len = 6, + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED +}; + +static struct fb_videomode fsl_diu_mode_1280 = { + .name = "1280x1024-60", + .refresh = 60, + .xres = 1280, + .yres = 1024, + .pixclock = 9375, + .left_margin = 38, + .right_margin = 128, + .upper_margin = 2, + .lower_margin = 7, + .hsync_len = 216, + .vsync_len = 37, + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED +}; + +/* + * These are the fields of area descriptor(in DDR memory) for every plane + */ +struct diu_ad { + /* Word 0(32-bit) in DDR memory */ + unsigned int pix_fmt; /* hard coding pixel format */ + /* Word 1(32-bit) in DDR memory */ + unsigned int addr; + /* Word 2(32-bit) in DDR memory */ + unsigned int src_size_g_alpha; + /* Word 3(32-bit) in DDR memory */ + unsigned int aoi_size; + /* Word 4(32-bit) in DDR memory */ + unsigned int offset_xyi; + /* Word 5(32-bit) in DDR memory */ + unsigned int offset_xyd; + /* Word 6(32-bit) in DDR memory */ + unsigned int ckmax_r:8; + unsigned int ckmax_g:8; + unsigned int ckmax_b:8; + unsigned int res9:8; + /* Word 7(32-bit) in DDR memory */ + unsigned int ckmin_r:8; + unsigned int ckmin_g:8; + unsigned int ckmin_b:8; + unsigned int res10:8; + /* Word 8(32-bit) in DDR memory */ + unsigned int next_ad; + /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ + unsigned int res1; + unsigned int res2; + unsigned int res3; +}__attribute__ ((packed)); + +/* + * DIU register map + */ +struct diu { + unsigned int desc[3]; + unsigned int gamma; + unsigned int pallete; + unsigned int cursor; + unsigned int curs_pos; + unsigned int diu_mode; + unsigned int bgnd; + unsigned int bgnd_wb; + unsigned int disp_size; + unsigned int wb_size; + unsigned int wb_mem_addr; + unsigned int hsyn_para; + unsigned int vsyn_para; + unsigned int syn_pol; + unsigned int thresholds; + unsigned int int_status; + unsigned int int_mask; + unsigned int colorbar[8]; + unsigned int filling; + unsigned int plut; +} __attribute__ ((packed)); + +struct diu_hw { + struct diu *diu_reg; + volatile unsigned int mode; /* DIU operation mode */ +}; + +struct diu_addr { + unsigned char * paddr; /* Virtual address */ + unsigned int offset; +}; + +/* + * Modes of operation of DIU + */ +#define MFB_MODE0 0 /* DIU off */ +#define MFB_MODE1 1 /* All three planes output to display */ +#define MFB_MODE2 2 /* Plane 1 to display, + * planes 2+3 written back to memory */ +#define MFB_MODE3 3 /* All three planes written back to memory */ +#define MFB_MODE4 4 /* Color bar generation */ + +#define MAX_CURS 32 + +static struct fb_info fsl_fb_info; +static struct diu_addr gamma, cursor; +static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32))); +static struct diu_ad dummy_ad __attribute__ ((aligned(32))); +static unsigned char *dummy_fb; +static struct diu_hw dr = { + .mode = MFB_MODE1, +}; + +int fb_enabled = 0; +int fb_initialized = 0; +const int default_xres = 1280; +const int default_pixel_format = 0x88882317; + +static int map_video_memory(struct fb_info *info, unsigned long bytes_align); +static void enable_lcdc(void); +static void disable_lcdc(void); +static int fsl_diu_enable_panel(struct fb_info *info); +static int fsl_diu_disable_panel(struct fb_info *info); +static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align); +void diu_set_pixel_clock(unsigned int pixclock); + +int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix) +{ + struct fb_videomode *fsl_diu_mode_db; + struct diu_ad *ad = &fsl_diu_fb_ad; + struct diu *hw; + struct fb_info *info = &fsl_fb_info; + struct fb_var_screeninfo *var = &info->var; + unsigned char *gamma_table_base; + unsigned int i, j; + + debug("Enter fsl_diu_init\n"); + dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR); + hw = (struct diu *) dr.diu_reg; + + disable_lcdc(); + + switch (xres) { + case 800: + fsl_diu_mode_db = &fsl_diu_mode_800; + break; + case 1280: + fsl_diu_mode_db = &fsl_diu_mode_1280; + break; + default: + fsl_diu_mode_db = &fsl_diu_mode_1024; + } + + if (0 == fb_initialized) { + allocate_buf(&gamma, 768, 32); + debug("gamma is allocated @ 0x%x\n", + (unsigned int)gamma.paddr); + allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32); + debug("curosr is allocated @ 0x%x\n", + (unsigned int)cursor.paddr); + + /* create a dummy fb and dummy ad */ + dummy_fb = malloc(64); + if (NULL == dummy_fb) { + printf("Cannot allocate dummy fb\n"); + return -1; + } + dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb); + dummy_ad.pix_fmt = 0x88882317; + dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */ + dummy_ad.aoi_size = 0x02000400; + dummy_ad.offset_xyi = 0; + dummy_ad.offset_xyd = 0; + dummy_ad.next_ad = 0; + /* Memory allocation for framebuffer */ + if (map_video_memory(info, 32)) { + printf("Unable to allocate fb memory 1\n"); + return -1; + } + } + + memset(info->screen_base, 0, info->smem_len); + + out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad); + out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad); + out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad); + debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]); + debug("dummy desc[0] = 0x%x\n", hw->desc[0]); + + /* read mode info */ + var->xres = fsl_diu_mode_db->xres; + var->yres = fsl_diu_mode_db->yres; + var->bits_per_pixel = 32; + var->pixclock = fsl_diu_mode_db->pixclock; + var->left_margin = fsl_diu_mode_db->left_margin; + var->right_margin = fsl_diu_mode_db->right_margin; + var->upper_margin = fsl_diu_mode_db->upper_margin; + var->lower_margin = fsl_diu_mode_db->lower_margin; + var->hsync_len = fsl_diu_mode_db->hsync_len; + var->vsync_len = fsl_diu_mode_db->vsync_len; + var->sync = fsl_diu_mode_db->sync; + var->vmode = fsl_diu_mode_db->vmode; + info->line_length = var->xres * var->bits_per_pixel / 8; + + ad->pix_fmt = pixel_format; + ad->addr = cpu_to_le32((unsigned int)info->screen_base); + ad->src_size_g_alpha + = cpu_to_le32((var->yres << 12) | var->xres); + /* fix me. AOI should not be greater than display size */ + ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres); + ad->offset_xyi = 0; + ad->offset_xyd = 0; + + /* Disable chroma keying function */ + ad->ckmax_r = 0; + ad->ckmax_g = 0; + ad->ckmax_b = 0; + + ad->ckmin_r = 255; + ad->ckmin_g = 255; + ad->ckmin_b = 255; + + gamma_table_base = gamma.paddr; + debug("gamma_table_base is allocated @ 0x%x\n", + (unsigned int)gamma_table_base); + + /* Prep for DIU init - gamma table */ + + for (i = 0; i <= 2; i++) + for (j = 0; j <= 255; j++) + *gamma_table_base++ = j; + + if (gamma_fix == 1) { /* fix the gamma */ + debug("Fix gamma table\n"); + gamma_table_base = gamma.paddr; + for (i = 0; i < 256*3; i++) { + gamma_table_base[i] = (gamma_table_base[i] << 2) + | ((gamma_table_base[i] >> 6) & 0x03); + } + } + + debug("update-lcdc: HW - %p\n Disabling DIU\n", hw); + + /* Program DIU registers */ + + out_be32(&hw->gamma, (int)gamma.paddr); + out_be32(&hw->cursor, (int)cursor.paddr); + out_be32(&hw->bgnd, 0x007F7F7F); + out_be32(&hw->bgnd_wb, 0); /* BGND_WB */ + out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */ + out_be32(&hw->wb_size, 0); /* WB SIZE */ + out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */ + out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */ + var->hsync_len << 11 | /* PW_H */ + var->right_margin); /* FP_H */ + + out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */ + var->vsync_len << 11 | /* PW_V */ + var->lower_margin); /* FP_V */ + + out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */ + out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */ + out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */ + out_be32(&hw->int_mask, 0); /* INT MASK */ + out_be32(&hw->plut, 0x01F5F666); + /* Pixel Clock configuration */ + debug("DIU pixclock in ps - %d\n", var->pixclock); + diu_set_pixel_clock(var->pixclock); + + fb_initialized = 1; + + /* Enable the DIU */ + fsl_diu_enable_panel(info); + enable_lcdc(); + + return 0; +} + +char *fsl_fb_open(struct fb_info **info) +{ + *info = &fsl_fb_info; + return fsl_fb_info.screen_base; +} + +void fsl_diu_close(void) +{ + struct fb_info *info = &fsl_fb_info; + fsl_diu_disable_panel(info); +} + +static int fsl_diu_enable_panel(struct fb_info *info) +{ + struct diu *hw = dr.diu_reg; + struct diu_ad *ad = &fsl_diu_fb_ad; + + debug("Entered: enable_panel\n"); + if (in_be32(&hw->desc[0]) != (unsigned)ad) + out_be32(&hw->desc[0], (unsigned)ad); + debug("desc[0] = 0x%x\n", hw->desc[0]); + return 0; +} + +static int fsl_diu_disable_panel(struct fb_info *info) +{ + struct diu *hw = dr.diu_reg; + + debug("Entered: disable_panel\n"); + if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad) + out_be32(&hw->desc[0], (unsigned)&dummy_ad); + return 0; +} + +static int map_video_memory(struct fb_info *info, unsigned long bytes_align) +{ + unsigned long offset; + unsigned long mask; + + debug("Entered: map_video_memory\n"); + /* allocate maximum 1280*1024 with 32bpp */ + info->smem_len = 1280 * 4 *1024 + bytes_align; + debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len); + info->screen_base = malloc(info->smem_len); + if (info->screen_base == NULL) { + printf("Unable to allocate fb memory\n"); + return -1; + } + info->smem_start = (unsigned int) info->screen_base; + mask = bytes_align - 1; + offset = (unsigned long)info->screen_base & mask; + if (offset) { + info->screen_base += (bytes_align - offset); + info->smem_len = info->smem_len - (bytes_align - offset); + } else + info->smem_len = info->smem_len - bytes_align; + + info->screen_size = info->smem_len; + + debug("Allocated fb @ 0x%08lx, size=%d.\n", + info->smem_start, info->smem_len); + + return 0; +} + +static void enable_lcdc(void) +{ + struct diu *hw = dr.diu_reg; + + debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled); + if (!fb_enabled) { + out_be32(&hw->diu_mode, dr.mode); + fb_enabled++; + } + debug("diu_mode = %d\n", hw->diu_mode); +} + +static void disable_lcdc(void) +{ + struct diu *hw = dr.diu_reg; + + debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled); + if (fb_enabled) { + out_be32(&hw->diu_mode, 0); + fb_enabled = 0; + } +} + +/* + * Align to 64-bit(8-byte), 32-byte, etc. + */ +static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) +{ + u32 offset, ssize; + u32 mask; + + debug("Entered: allocate_buf\n"); + ssize = size + bytes_align; + buf->paddr = malloc(ssize); + if (!buf->paddr) + return -1; + + memset(buf->paddr, 0, ssize); + mask = bytes_align - 1; + offset = (u32)buf->paddr & mask; + if (offset) { + buf->offset = bytes_align - offset; + buf->paddr = (unsigned char *) ((u32)buf->paddr + offset); + } else + buf->offset = 0; + return 0; +} + +#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) +#include +#include +/* + * The Graphic Device + */ +static GraphicDevice ctfb; + +void *video_hw_init(void) +{ + struct fb_info *info; + + if (platform_diu_init(&ctfb.winSizeX, &ctfb.winSizeY) < 0) + return NULL; + + /* fill in Graphic device struct */ + sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", + ctfb.winSizeX, ctfb.winSizeY, 32, 64, 60); + + ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info); + ctfb.plnSizeX = ctfb.winSizeX; + ctfb.plnSizeY = ctfb.winSizeY; + + ctfb.gdfBytesPP = 4; + ctfb.gdfIndex = GDF_32BIT_X888RGB; + + ctfb.isaBase = 0; + ctfb.pciBase = 0; + ctfb.memSize = info->screen_size; + + /* Cursor Start Address */ + ctfb.dprBase = 0; + ctfb.vprBase = 0; + ctfb.cprBase = 0; + + return &ctfb; +} +#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ -- cgit v0.10.2 From f550c521e123f2c35d742599f19f4aea2db85951 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 29 Nov 2010 22:36:39 +0100 Subject: mpc512x: aria: cleanup board config file CONFIG_FSL_DIU_LOGO_BMP has been removed while refactoring MPC8610 and MPC5121 DIU code, so remove it. Signed-off-by: Anatolij Gustschin diff --git a/include/configs/aria.h b/include/configs/aria.h index b3ca8d2..3a60de0 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -49,7 +49,6 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ -#define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */ #define CONFIG_SYS_TEXT_BASE 0xFFF00000 -- cgit v0.10.2 From cb9c09d4871015be5710c7bae29b06218ddc3509 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 28 Oct 2010 14:09:22 +0200 Subject: UBIFS: Add ubifsumount command to unmount an active volume This new ubifsumount command allows the user to unmount a previously mounted UBIFS volume. Signed-off-by: Stefan Roese diff --git a/common/cmd_ubifs.c b/common/cmd_ubifs.c index a0ec184..30b23d3 100644 --- a/common/cmd_ubifs.c +++ b/common/cmd_ubifs.c @@ -33,12 +33,17 @@ #include #include +#include "../fs/ubifs/ubifs.h" + static int ubifs_initialized; static int ubifs_mounted; +extern struct super_block *ubifs_sb; + /* Prototypes */ int ubifs_init(void); int ubifs_mount(char *vol_name); +void ubifs_umount(struct ubifs_info *c); int ubifs_ls(char *dir_name); int ubifs_load(char *filename, u32 addr, u32 size); @@ -67,6 +72,26 @@ int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + if (argc != 1) + return cmd_usage(cmdtp); + + if (ubifs_initialized == 0) { + printf("No UBIFS volume mounted!\n"); + return -1; + } + + if (ubifs_sb) + ubifs_umount(ubifs_sb->s_fs_info); + + ubifs_sb = NULL; + ubifs_mounted = 0; + ubifs_initialized = 0; + + return 0; +} + int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { char *filename = "/"; @@ -132,6 +157,12 @@ U_BOOT_CMD( ); U_BOOT_CMD( + ubifsumount, 1, 0, do_ubifs_umount, + "unmount UBIFS volume", + " - unmount current volume" +); + +U_BOOT_CMD( ubifsls, 2, 0, do_ubifs_ls, "list files in a directory", "[directory]\n" diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index 39e3efe..63b2164 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -824,7 +824,7 @@ out_free: * through mounting (error path cleanup function). So it has to make sure the * resource was actually allocated before freeing it. */ -static void ubifs_umount(struct ubifs_info *c) +void ubifs_umount(struct ubifs_info *c) { dbg_gen("un-mounting UBI device %d, volume %d", c->vi.ubi_num, c->vi.vol_id); -- cgit v0.10.2 From 9a2ea578bc2f556fd92a3bcb9127d3fc9c6ee1bd Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 28 Oct 2010 14:09:29 +0200 Subject: UBIFS: Change "ubifs mount" to "ubifsmount" in ubifsls output Signed-off-by: Stefan Roese diff --git a/common/cmd_ubifs.c b/common/cmd_ubifs.c index 30b23d3..9526780 100644 --- a/common/cmd_ubifs.c +++ b/common/cmd_ubifs.c @@ -98,7 +98,7 @@ int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int ret; if (!ubifs_mounted) { - printf("UBIFS not mounted, use ubifs mount to mount volume first!\n"); + printf("UBIFS not mounted, use ubifsmount to mount volume first!\n"); return -1; } -- cgit v0.10.2 From b1a14f8a1c2e72d5c58269d0200f722d8eec19c4 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 1 Nov 2010 17:28:00 +0100 Subject: UBIFS: Change ubifsload to not read beyond the requested size Until now ubifsload pads the destination with 0 up to a multiple of UBIFS_BLOCK_SIZE (4KiB) while reading a file to memory. This patch changes this behaviour to only read to the requested length. This is either the file length or the length/size provided as parameter to the ubifsload command. Signed-off-by: Stefan Roese diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index 1cc31a9..d16d2b0 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -3,7 +3,7 @@ * * Copyright (C) 2006-2008 Nokia Corporation. * - * (C) Copyright 2008-2009 + * (C) Copyright 2008-2010 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * This program is free software; you can redistribute it and/or modify it @@ -567,7 +567,8 @@ dump: return -EINVAL; } -static int do_readpage(struct ubifs_info *c, struct inode *inode, struct page *page) +static int do_readpage(struct ubifs_info *c, struct inode *inode, + struct page *page, int last_block_size) { void *addr; int err = 0, i; @@ -601,17 +602,54 @@ static int do_readpage(struct ubifs_info *c, struct inode *inode, struct page *p err = -ENOENT; memset(addr, 0, UBIFS_BLOCK_SIZE); } else { - ret = read_block(inode, addr, block, dn); - if (ret) { - err = ret; - if (err != -ENOENT) + /* + * Reading last block? Make sure to not write beyond + * the requested size in the destination buffer. + */ + if (((block + 1) == beyond) || last_block_size) { + void *buff; + int dlen; + + /* + * We need to buffer the data locally for the + * last block. This is to not pad the + * destination area to a multiple of + * UBIFS_BLOCK_SIZE. + */ + buff = malloc(UBIFS_BLOCK_SIZE); + if (!buff) { + printf("%s: Error, malloc fails!\n", + __func__); + err = -ENOMEM; break; - } else if (block + 1 == beyond) { - int dlen = le32_to_cpu(dn->size); - int ilen = i_size & (UBIFS_BLOCK_SIZE - 1); - - if (ilen && ilen < dlen) - memset(addr + ilen, 0, dlen - ilen); + } + + /* Read block-size into temp buffer */ + ret = read_block(inode, buff, block, dn); + if (ret) { + err = ret; + if (err != -ENOENT) { + free(buff); + break; + } + } + + if (last_block_size) + dlen = last_block_size; + else + dlen = le32_to_cpu(dn->size); + + /* Now copy required size back to dest */ + memcpy(addr, buff, dlen); + + free(buff); + } else { + ret = read_block(inode, addr, block, dn); + if (ret) { + err = ret; + if (err != -ENOENT) + break; + } } } if (++i >= UBIFS_BLOCKS_PER_PAGE) @@ -649,6 +687,7 @@ int ubifs_load(char *filename, u32 addr, u32 size) int err = 0; int i; int count; + int last_block_size = 0; c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY); /* ubifs_findfile will resolve symlinks, so we know that we get @@ -684,7 +723,13 @@ int ubifs_load(char *filename, u32 addr, u32 size) page.index = 0; page.inode = inode; for (i = 0; i < count; i++) { - err = do_readpage(c, inode, &page); + /* + * Make sure to not read beyond the requested size + */ + if (((i + 1) == count) && (size < inode->i_size)) + last_block_size = size - (i * PAGE_SIZE); + + err = do_readpage(c, inode, &page, last_block_size); if (err) break; -- cgit v0.10.2 From 2f15cfd187f1cf7a0606a1ec3e637954311a735a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 1 Nov 2010 17:28:22 +0100 Subject: UBI/UBIFS: Automatically unmount UBIFS volume upon UBI partition change Automatically unmount UBIFS partition when user changes the UBI device. Otherwise the following UBIFS commands will crash. Signed-off-by: Stefan Roese diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 7692ac7..b486ca8 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -42,6 +42,11 @@ struct selected_dev { static struct selected_dev ubi_dev; +#ifdef CONFIG_CMD_UBIFS +int ubifs_is_mounted(void); +void cmd_ubifs_umount(void); +#endif + static void ubi_dump_vol_info(const struct ubi_volume *vol) { ubi_msg("volume information dump:"); @@ -472,6 +477,16 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) if (argc < 3) return cmd_usage(cmdtp); +#ifdef CONFIG_CMD_UBIFS + /* + * Automatically unmount UBIFS partition when user + * changes the UBI device. Otherwise the following + * UBIFS commands will crash. + */ + if (ubifs_is_mounted()) + cmd_ubifs_umount(); +#endif + /* todo: get dev number for NAND... */ ubi_dev.nr = 0; diff --git a/common/cmd_ubifs.c b/common/cmd_ubifs.c index 9526780..3cd2d8f 100644 --- a/common/cmd_ubifs.c +++ b/common/cmd_ubifs.c @@ -72,6 +72,25 @@ int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +int ubifs_is_mounted(void) +{ + return ubifs_mounted; +} + +void cmd_ubifs_umount(void) +{ + + if (ubifs_sb) { + printf("Unmounting UBIFS volume %s!\n", + ((struct ubifs_info *)(ubifs_sb->s_fs_info))->vi.name); + ubifs_umount(ubifs_sb->s_fs_info); + } + + ubifs_sb = NULL; + ubifs_mounted = 0; + ubifs_initialized = 0; +} + int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { if (argc != 1) @@ -82,12 +101,7 @@ int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return -1; } - if (ubifs_sb) - ubifs_umount(ubifs_sb->s_fs_info); - - ubifs_sb = NULL; - ubifs_mounted = 0; - ubifs_initialized = 0; + cmd_ubifs_umount(); return 0; } -- cgit v0.10.2 From 64b68178489b6845bcf460e9c6e618cb81740faf Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Thu, 2 Dec 2010 15:02:35 +0100 Subject: ubifs.c: BUG: Error following links The link_name variable is declared inside the if block and it is used outside it through the name pointer. Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Stefan Roese diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index d16d2b0..5a5c739 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -384,6 +384,7 @@ static unsigned long ubifs_findfile(struct super_block *sb, char *filename) unsigned long root_inum = 1; unsigned long inum; int symlink_count = 0; /* Don't allow symlink recursion */ + char link_name[64]; strcpy(fpath, filename); @@ -420,7 +421,6 @@ static unsigned long ubifs_findfile(struct super_block *sb, char *filename) ui = ubifs_inode(inode); if ((inode->i_mode & S_IFMT) == S_IFLNK) { - char link_name[64]; char buf[128]; /* We have some sort of symlink recursion, bail out */ -- cgit v0.10.2 From 068a208b4a3e1e0dfc8dea6ebbd80b62ae280732 Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Fri, 3 Dec 2010 13:25:43 +0000 Subject: env_nand: Use nand_read_skip_bad instead of nand_read The nand-read function returns an error code if correctable errors have occurred. This is not desirable, since the errors have been corrected! This patch switches to the nand_read_skip_bad function which does not return an error code if the errors are correctable. Signed-off-by: Steve Sakoman Acked-by: Scott Wood diff --git a/common/env_nand.c b/common/env_nand.c index 4e8307a..7f6c917 100644 --- a/common/env_nand.c +++ b/common/env_nand.c @@ -297,7 +297,7 @@ int readenv(size_t offset, u_char * buf) offset += blocksize; } else { char_ptr = &buf[amount_loaded]; - if (nand_read(&nand_info[0], offset, &len, char_ptr)) + if (nand_read_skip_bad(&nand_info[0], offset, &len, char_ptr)) return 1; offset += blocksize; amount_loaded += len; -- cgit v0.10.2 From 2111cb44a7937bf8ea5168dd65963f68f8bf3345 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20M=C3=BCller=20=28ELSOFT=20AG=29?= Date: Mon, 29 Nov 2010 05:49:19 +0000 Subject: fix s3c2410_nand timing default values The attached patch fixes wrong timing default values and adds the possibility to specify board specific timing value in the board config file. Signed-off-by: David Mueller diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c index f70daef..27351fb 100644 --- a/drivers/mtd/nand/s3c2410_nand.c +++ b/drivers/mtd/nand/s3c2410_nand.c @@ -133,9 +133,15 @@ int board_nand_init(struct nand_chip *nand) writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon); /* initialize hardware */ - twrph0 = 3; - twrph1 = 0; - tacls = 0; +#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING) + tacls = CONFIG_S3C24XX_TACLS; + twrph0 = CONFIG_S3C24XX_TWRPH0; + twrph1 = CONFIG_S3C24XX_TWRPH1; +#else + tacls = 4; + twrph0 = 8; + twrph1 = 8; +#endif cfg = S3C2410_NFCONF_EN; cfg |= S3C2410_NFCONF_TACLS(tacls - 1); -- cgit v0.10.2 From 59bbb3a8ceea7557338e80302c112ce3b4859537 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Mon, 6 Dec 2010 18:42:02 -0600 Subject: 83xx NAND boot: fix boards.cfg This patch http://patchwork.ozlabs.org/patch/72962/ included a boards.cfg change, but it was omitted when applied as f1c574d4006d81301792e70fafc31ff39259e793 This fixes the NAND SPL build on MPC8315ERDB. Signed-off-by: Scott Wood diff --git a/boards.cfg b/boards.cfg index 2209676..8994e41 100644 --- a/boards.cfg +++ b/boards.cfg @@ -402,10 +402,10 @@ vme8349 powerpc mpc83xx vme8349 esd MPC8308RDB powerpc mpc83xx mpc8308rdb freescale MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ -MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT,SYS_TEXT_BASE=0x00100000 -MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT,SYS_TEXT_BASE=0x00100000 +MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT +MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB -MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND +MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND_U_BOOT MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS: MPC832XEMDS_ATM powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 -- cgit v0.10.2 From 2aed9d14cc167385c158f78a3d12b46fd226b499 Mon Sep 17 00:00:00 2001 From: Reinhard Meyer Date: Tue, 16 Nov 2010 09:24:41 +0100 Subject: AT91: gen_atmel_mci.c: fix bug when Slot B is used Signed-off-by: Reinhard Meyer diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index fa4df99..2984d64 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -308,6 +308,7 @@ static int mci_init(struct mmc *mmc) writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */ writel(MMCI_BIT(PWSDIS), &mci->cr); /* disable power save */ writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */ + writel(MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); /* select port */ /* Initial Time-outs */ writel(0x5f, &mci->dtor); -- cgit v0.10.2 From accef43145a63535fa38714af469f22d912d6c64 Mon Sep 17 00:00:00 2001 From: Reinhard Meyer Date: Wed, 1 Dec 2010 05:49:53 +0100 Subject: AT91: fix EMAC gpio init in at91sam9260_devices.c The AT91SAM9G20 BOOT ROM apparently initializes PA23 and PA24 to multi drive (open drain). Revert this, if those pins are going to be used for MII. Signed-off-by: Reinhard Meyer diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c index f699f4d..c1822b7 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c @@ -204,6 +204,11 @@ void at91_macb_hw_init(void) #else at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* ETX2 */ at91_set_b_periph(AT91_PIO_PORTA, 24, 0); /* ETX3 */ +#if defined(CONFIG_AT91SAM9G20) + /* 9G20 BOOT ROM initializes those pins to multi-drive, undo that */ + at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 0); + at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 0); +#endif #endif at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* ETXER */ #endif -- cgit v0.10.2 From d55c5c3f81bf93a411529d8266bc271c8e06b4f1 Mon Sep 17 00:00:00 2001 From: Reinhard Meyer Date: Sat, 30 Oct 2010 23:09:58 +0000 Subject: AT91: add TOP9000 support Adds support for the EMK TOP9000 CPU Module which is based on ATMELs ARM926EJS AT91SAM9XE SoC. Signed-off-by: Reinhard Meyer diff --git a/MAINTAINERS b/MAINTAINERS index f47fca5..0590ad9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -310,10 +310,11 @@ Tirumala Marri bluestone APM821XX -Reinhard Meyer +Reinhard Meyer TOP860 MPC860T TOP5200 MPC5200 + TOP9000 ARM926EJS (AT91SAM9xxx SoC) Tolunay Orkun diff --git a/board/emk/top9000/Makefile b/board/emk/top9000/Makefile new file mode 100644 index 0000000..9b28048 --- /dev/null +++ b/board/emk/top9000/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2010 +# Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += top9000.o +COBJS-$(CONFIG_ATMEL_SPI) += spi.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/emk/top9000/spi.c b/board/emk/top9000/spi.c new file mode 100644 index 0000000..b468948 --- /dev/null +++ b/board/emk/top9000/spi.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include + +static const struct { + u32 port; + u32 bit; +} cs_to_portbit[2][4] = { + {{AT91_PIO_PORTA, 3}, {AT91_PIO_PORTC, 11}, + {AT91_PIO_PORTC, 16}, {AT91_PIO_PORTC, 17} }, + {{AT91_PIO_PORTB, 3}, {AT91_PIO_PORTC, 5}, + {AT91_PIO_PORTC, 4}, {AT91_PIO_PORTC, 3} } +}; + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + debug("spi_cs_is_valid: bus=%u cs=%u\n", bus, cs); + if (bus < 2 && cs < 4) + return 1; + return 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + debug("spi_cs_activate: bus=%u cs=%u\n", slave->bus, slave->cs); + at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port, + cs_to_portbit[slave->bus][slave->cs].bit, 0); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + debug("spi_cs_deactivate: bus=%u cs=%u\n", slave->bus, slave->cs); + at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port, + cs_to_portbit[slave->bus][slave->cs].bit, 1); +} + diff --git a/board/emk/top9000/top9000.c b/board/emk/top9000/top9000.c new file mode 100644 index 0000000..b0fe2d6 --- /dev/null +++ b/board/emk/top9000/top9000.c @@ -0,0 +1,290 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop + * Lead Tech Design + * + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_CMD_NAND +static void nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | + AT91_SMC_DBW_8 | + AT91_SMC_TDF_(2)); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif + +#ifdef CONFIG_MACB +static void macb_hw_init(void) +{ + /* Enable EMAC clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); + + /* Initialize EMAC=MACB hardware */ + at91_macb_hw_init(); +} +#endif + +#ifdef CONFIG_GENERIC_ATMEL_MCI +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + /* Enable MCI clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI); + + /* Initialize MCI hardware */ + at91_mci_hw_init(); + + /* This calls the atmel_mmc_init in gen_atmel_mci.c */ + return atmel_mci_init((void *)AT91_BASE_MCI); +} + +/* this is a weak define that we are overriding */ +int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{ + /* + * the only currently existing use of this function + * (fsl_esdhc.c) suggests this function must return + * *cs = TRUE if a card is NOT detected -> in most + * cases the value of the pin when the detect switch + * closes to GND + */ + *cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0; + return 0; +} + +#endif + +int board_early_init_f(void) +{ + at91_shdwn_t *shdwn = (at91_shdwn_t *)AT91_SHDWN_BASE; + + /* + * make sure the board can be powered on by + * any transition on WKUP + */ + writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H, + &shdwn->mr); + + /* Enable clocks for all PIOs */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB); + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); + + /* set SCL0 and SDA0 to open drain */ + at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1); + at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1); + at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1); + at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1); + at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1); + at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1); + + /* set SCL1 and SDA1 to open drain */ + at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1); + at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1); + at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1); + at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1); + at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1); + at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1); + return 0; +} + +int board_init(void) +{ + /* arch number of TOP9000 Board */ + gd->bd->bi_arch_number = MACH_TYPE_TOP9000; + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + nand_hw_init(); +#endif +#ifdef CONFIG_MACB + macb_hw_init(); +#endif +#ifdef CONFIG_ATMEL_SPI0 + /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */ + at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4)); +#endif +#ifdef CONFIG_ATMEL_SPI1 + at91_spi1_hw_init(1 << (ENC_CS_NUM + 4)); +#endif + return 0; +} + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + /* read 'factory' part of EEPROM */ + read_factory_r(); + return 0; +} +#endif + +int dram_init(void) +{ + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ + /* + * Initialize ethernet HW addresses prior to starting Linux, + * needed for nfsroot. + * TODO: We need to investigate if that is really necessary. + */ + eth_init(gd->bd); +} +#endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; + int num = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, + (void *)AT91_EMAC_BASE, + CONFIG_SYS_PHY_ID); + if (!rc) + num++; +#endif +#ifdef CONFIG_ENC28J60 + rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM, + ENC_SPI_CLOCK, SPI_MODE_0); + if (!rc) + num++; +# ifdef CONFIG_ENC28J60_2 + rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1, + ENC_SPI_CLOCK, SPI_MODE_0); + if (!rc) + num++; +# ifdef CONFIG_ENC28J60_3 + rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2, + ENC_SPI_CLOCK, SPI_MODE_0); + if (!rc) + num++; +# endif +# endif +#endif + return num; +} + +/* + * I2C access functions + * + * Note: + * We need to access Bus 0 before relocation to access the + * environment settings. + * However i2c_get_bus_num() cannot be called before + * relocation. + */ +#ifdef CONFIG_SOFT_I2C +void iic_init(void) +{ + /* ports are now initialized in board_early_init_f() */ +} + +int iic_read(void) +{ + switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { + case 0: + return at91_get_pio_value(I2C0_PORT, SDA0_PIN); + case 1: + return at91_get_pio_value(I2C1_PORT, SDA1_PIN); + } + return 1; +} + +void iic_sda(int bit) +{ + switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { + case 0: + at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit); + break; + case 1: + at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit); + break; + } +} + +void iic_scl(int bit) +{ + switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { + case 0: + at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit); + break; + case 1: + at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit); + break; + } +} + +#endif diff --git a/boards.cfg b/boards.cfg index 2209676..319c812 100644 --- a/boards.cfg +++ b/boards.cfg @@ -70,6 +70,8 @@ voiceblue arm arm925t omap1510inn arm arm925t - ti afeb9260 arm arm926ejs - - at91 at91cap9adk arm arm926ejs - atmel at91 +top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 +top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 meesc arm arm926ejs - esd at91 otc570 arm arm926ejs - esd at91 pm9261 arm arm926ejs - ronetix at91 diff --git a/include/configs/top9000.h b/include/configs/top9000.h new file mode 100644 index 0000000..ff3933b --- /dev/null +++ b/include/configs/top9000.h @@ -0,0 +1,314 @@ +/* + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * Configuation settings for the TOP9000 CPU module with AT91SAM9XE. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +/* + * top9000 with at91sam9xe256 or at91sam9xe512 + * + * Initial Bootloader is in embedded flash. + * Vital Product Data, U-Boot Environment are in I2C-EEPROM. + * U-Boot is in embedded flash, a backup U-Boot can be in NAND flash. + * kernel and file system are either in NAND flash or on a micro SD card. + * NAND flash is optional. + * I2C EEPROM is never optional. + * SPI FRAM is optional. + * SPI ENC28J60 is optional. + * 16 or 32 bit wide SDRAM. + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires + * adapting the initial boot program + */ +#define CONFIG_SYS_TEXT_BASE 0x21f00000 /* 31 MB into RAM */ + +/* Command line configuration */ +#include +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG +#define CONFIG_CMD_ASKENV +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_PROMPT "TOP9000> " +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_CMD_BDI +#define CONFIG_CMD_CACHE + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz xtal */ +#define CONFIG_SYS_HZ 1000 + +/* SoC */ +#define CONFIG_ARM926EJS /* ARM926EJS Core */ +#define CONFIG_AT91FAMILY /* it's a member of AT91 */ +#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 based SoC */ +#define CONFIG_AT91SAM9XE + +/* Misc CPU related */ +#define CONFIG_AT91_LEGACY +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_AT91RESET_EXTRST /* assert external reset */ + +/* general purpose I/O */ +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART3 /* USART 3 is DBGU !!! */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +/* SD/MMC card */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9 +#define CONFIG_CMD_MMC + +/* Ethernet */ +#define CONFIG_MACB +#define CONFIG_SYS_PHY_ID 1 +#define CONFIG_RMII +#define CONFIG_NET_MULTI +#define CONFIG_NET_RETRY_COUNT 20 + +/* real time clock */ +#define CONFIG_RTC_AT91SAM9_RTT +#define CONFIG_CMD_DATE + +#if defined(CONFIG_AT91SAM9XE) +/* + * NOR flash - use embedded flash of SAM9XE256/512 + * U-Boot will not fit into 128K ! + * 2010.09 will not fit into 256K with all options enabled ! + * + * Layout: + * 16kB 1st Bootloader + * Rest U-Boot + * the first sector (16kB) of EFLASH cannot be unprotected + * with u-boot commands + */ +# define CONFIG_AT91_EFLASH +# define CONFIG_SYS_FLASH_BASE 0x200000 +# define CONFIG_SYS_MAX_FLASH_SECT 32 +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +# define CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_EFLASH_PROTSECTORS 1 /* protect first sector */ +#endif + +/* SPI */ +#define CONFIG_ATMEL_SPI +#define CONFIG_CMD_SPI + +/* RAMTRON FRAM */ +#define CONFIG_CMD_SF +#define CONFIG_ATMEL_SPI0 /* SPI used for FRAM is SPI0 */ +#define FRAM_SPI_BUS 0 +#define FRAM_CS_NUM 0 +#define CONFIG_SPI_FLASH /* RAMTRON FRAM on SPI bus */ +#define CONFIG_SPI_FRAM_RAMTRON +#define CONFIG_SF_DEFAULT_SPEED 1000000 /* be conservative here... */ +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "FM25H20" + +/* Microchip ENC28J60 (second LAN) */ +#if defined(CONFIG_EVAL9000) +# define CONFIG_ENC28J60 +# define CONFIG_ATMEL_SPI1 /* SPI used for ENC28J60 is SPI1 */ +# define ENC_SPI_BUS 1 +# define ENC_CS_NUM 0 +# define ENC_SPI_CLOCK 1000000 +#endif /* CONFIG_EVAL9000 */ + +/* + * SDRAM: 1 bank, min 32, max 128 MB + * Initialized before u-boot gets started. + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END 0x21e00000 +#define CONFIG_SYS_LOAD_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x01000000) +/* + * Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM, + * leaving the correct space for initial global data structure above + * that address while providing maximum stack area below. + */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (0x00300000 + 0x4000 - GENERATED_GBL_DATA_SIZE) + +/* + * NAND flash: 256 MB (optional) + * + * Layout: + * 640kB: u-boot (includes space for spare sectors, handled by + * initial loader) + * 2MB: kernel + * rest: file system + */ +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 +#define CONFIG_CMD_NAND + +/* USB */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_CPU_INIT +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "top9000" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* I2C support must always be enabled */ +#define CONFIG_SOFT_I2C +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_I2C_MULTI_BUS +#define I2C0_PORT AT91_PIO_PORTA +#define SDA0_PIN 23 +#define SCL0_PIN 24 +#define I2C1_PORT AT91_PIO_PORTB +#define SDA1_PIN 12 +#define SCL1_PIN 13 +#define I2C_SOFT_DECLARATIONS void iic_init(void);\ + int iic_read(void);\ + void iic_sda(int);\ + void iic_scl(int); +#define I2C_ACTIVE +#define I2C_TRISTATE +#define I2C_INIT iic_init() +#define I2C_READ iic_read() +#define I2C_SDA(bit) iic_sda(bit) +#define I2C_SCL(bit) iic_scl(bit) +#define I2C_DELAY udelay(3) +/* EEPROM configuration */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_SIZE 0x2000 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +/* later: #define CONFIG_I2C_ENV_EEPROM_BUS 0 */ +/* ENV is always in I2C-EEPROM */ +#define CONFIG_ENV_IS_IN_EEPROM +#define CONFIG_ENV_OFFSET 0x1000 +#define CONFIG_ENV_SIZE 0x0f00 +/* VPD settings */ +#define CONFIG_SYS_I2C_FACT_ADDR 0x57 +#define CONFIG_SYS_FACT_OFFSET 0x1F00 +#define CONFIG_SYS_FACT_SIZE 0x0100 +/* later: #define CONFIG_MISC_INIT_R */ +/* define the next only if you want to allow users to enter VPD data */ +#define CONFIG_SYS_FACT_ENTRY +#ifndef __ASSEMBLY__ +extern void read_factory_r(void); +#endif + +/* + * Only interrupt autoboot if is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * add filesystem commands if we have at least 1 storage + * media with filesystem + */ +#if defined(CONFIG_NAND_ATMEL) \ + || defined(CONFIG_USB_ATMEL) \ + || defined(CONFIG_MMC) +# define CONFIG_DOS_PARTITION +# define CONFIG_CMD_FAT +# define CONFIG_CMD_EXT2 +/* later: #define CONFIG_CMD_JFFS2 */ +#endif + +/* add NET commands if we have at least 1 LAN */ +#if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60) +# define CONFIG_CMD_PING +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_MII +/* is this really needed ? */ +# define CONFIG_RESET_PHY_R +/* BOOTP options */ +# define CONFIG_BOOTP_BOOTFILESIZE +# define CONFIG_BOOTP_BOOTPATH +# define CONFIG_BOOTP_GATEWAY +# define CONFIG_BOOTP_HOSTNAME +#endif + +/* linux in NAND flash */ +#define CONFIG_BOOTCOUNT_LIMIT 1 +#define CONFIG_BOOTCOMMAND \ + "nand read 0x21000000 0xA0000 0x200000; bootm" +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 " \ + "root=/dev/mtdblock2 " \ + "mtdparts=atmel_nand:" \ + "640k(uboot)ro," \ + "2M(linux)," \ + "16M(root)," \ + "-(rest) " \ + "rw "\ + "rootfstype=jffs2" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN \ + ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_STACKSIZE (32*1024) +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif + -- cgit v0.10.2 From 066df1a5d6b889f85aa1dcba0efb012073c5d98f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Sat, 4 Dec 2010 11:31:46 +0000 Subject: at91rm9200ek: fix SDRAM initialistation values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 14559f5..337dafc 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -90,7 +90,7 @@ #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ -#define CONFIG_SYS_SDRAM1 CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ +#define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80) #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ -- cgit v0.10.2 From 3a4ff8b3cd719372cb3b3a8432e68015d84f1fc2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Tue, 30 Nov 2010 09:45:03 +0000 Subject: at91rm9200ek: add configure target for RAM boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch also removes now unnecessary config.mk in board directory and make usage of new features in boards.cfg. Signed-off-by: Andreas Bießmann diff --git a/board/atmel/at91rm9200ek/config.mk b/board/atmel/at91rm9200ek/config.mk deleted file mode 100644 index c7323fe..0000000 --- a/board/atmel/at91rm9200ek/config.mk +++ /dev/null @@ -1,2 +0,0 @@ -# currently only NOR flash booting is supported -CONFIG_SYS_TEXT_BASE = 0x10000000 diff --git a/boards.cfg b/boards.cfg index 319c812..b04ba40 100644 --- a/boards.cfg +++ b/boards.cfg @@ -48,7 +48,8 @@ lpc2292sodimm arm arm720t - - SMN42 arm arm720t - siemens lpc2292 evb4510 arm arm720t - - s3c4510b a320evb arm arm920t - faraday a320 -at91rm9200ek arm arm920t - atmel at91 +at91rm9200ek arm arm920t at91rm9200ek atmel at91 at91rm9200ek +at91rm9200ek_ram arm arm920t at91rm9200ek atmel at91 at91rm9200ek:RAMBOOT eb_cpux9k2 arm arm920t - BuS at91 cmc_pu2 arm arm920t - - at91rm9200 csb637 arm arm920t - - at91rm9200 diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 337dafc..df4413d 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -33,6 +33,20 @@ #include /* + * set some initial configurations depending on configure target + * + * at91rm9200ek_config -> boot from 0x0 in NOR Flash at CS0 + * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel + * initialisation was done by some preloader + */ +#ifdef CONFIG_RAMBOOT +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x20100000 +#else +#define CONFIG_SYS_TEXT_BASE 0x10000000 +#endif + +/* * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz * AT91C_MAIN_CLOCK is the frequency of PLLA output * AT91C_MASTER_CLOCK is the peripherial clock -- cgit v0.10.2 From 0a41edaabb74f2ccfde62a232165088098763e3e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Tue, 30 Nov 2010 09:45:04 +0000 Subject: MAKEALL: fix AT91 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * add boards_by_soc() * remove boards already in boards.cfg from LIST_AT91 Signed-off-by: Andreas Bießmann diff --git a/MAKEALL b/MAKEALL index 767d561..4254565 100755 --- a/MAKEALL +++ b/MAKEALL @@ -187,6 +187,7 @@ boards_by_field() } boards_by_arch() { boards_by_field 2 "$@" ; } boards_by_cpu() { boards_by_field 3 "$@" ; } +boards_by_soc() { boards_by_field 6 "$@" ; } ######################################################################### ## MPC5xx Systems @@ -439,11 +440,8 @@ LIST_ARMV7=" \ ## AT91 Systems ######################################################################### -LIST_at91=" \ - afeb9260 \ - at91cap9adk \ - at91rm9200dk \ - at91rm9200ek \ +LIST_at91="$(boards_by_soc at91)\ + $(boards_by_soc at91rm9200)\ at91sam9260ek \ at91sam9261ek \ at91sam9263ek \ @@ -451,19 +449,9 @@ LIST_at91=" \ at91sam9g20ek \ at91sam9m10g45ek \ at91sam9rlek \ - cmc_pu2 \ CPUAT91 \ CPU9260 \ CPU9G20 \ - csb637 \ - eb_cpux9k2 \ - kb9202 \ - meesc \ - mp2usb \ - m501sk \ - otc570 \ - pm9261 \ - pm9263 \ pm9g45 \ SBC35_A9G20 \ TNY_A9260 \ -- cgit v0.10.2 From 305bf489d1e7dd70f45720720ae0066fcce3acb1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Tue, 30 Nov 2010 09:45:05 +0000 Subject: arm920t/at91/reset: board_reset: define weak symbol MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann diff --git a/arch/arm/cpu/arm920t/at91/reset.c b/arch/arm/cpu/arm920t/at91/reset.c index ce9c156..51043ec 100644 --- a/arch/arm/cpu/arm920t/at91/reset.c +++ b/arch/arm/cpu/arm920t/at91/reset.c @@ -35,7 +35,10 @@ #include #include -void board_reset(void) __attribute__((__weak__)); +void __attribute__((weak)) board_reset(void) +{ + /* true empty function for defining weak symbol */ +} void reset_cpu(ulong ignored) { @@ -45,8 +48,7 @@ void reset_cpu(ulong ignored) serial_exit(); #endif - if (board_reset) - board_reset(); + board_reset(); /* Reset the cpu by setting up the watchdog timer */ writel(AT91_ST_WDMR_RSTEN | AT91_ST_WDMR_EXTEN | AT91_ST_WDMR_WDV(2), -- cgit v0.10.2 From a429db7e3ce6136f80f22584588247926ba60b05 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Tue, 30 Nov 2010 09:45:06 +0000 Subject: arm920t/at91/timer: replace bss variables by gd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in arm920t/at91/timer driver. The usage of bss values in driver before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted by the arm920t/at91/timer driver. Signed-off-by: Andreas Bießmann diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c index 91377d4..d9a024f 100644 --- a/arch/arm/cpu/arm920t/at91/timer.c +++ b/arch/arm/cpu/arm920t/at91/timer.c @@ -32,17 +32,16 @@ #include -#include -#include +#include +#include #include #include +DECLARE_GLOBAL_DATA_PTR; + /* the number of clocks per CONFIG_SYS_HZ */ #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ) -static u32 timestamp; -static u32 lastinc; - int timer_init(void) { at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE; @@ -64,8 +63,8 @@ int timer_init(void) writel(TIMER_LOAD_VAL, &tc->tc[0].rc); writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); - lastinc = 0; - timestamp = 0; + gd->lastinc = 0; + gd->tbl = 0; return 0; } @@ -86,7 +85,7 @@ ulong get_timer(ulong base) void set_timer(ulong t) { - timestamp = t; + gd->tbl = t; } void __udelay(unsigned long usec) @@ -98,8 +97,8 @@ void reset_timer_masked(void) { /* reset time */ at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE; - lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; - timestamp = 0; + gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; + gd->tbl = 0; } ulong get_timer_raw(void) @@ -109,16 +108,16 @@ ulong get_timer_raw(void) now = readl(&tc->tc[0].cv) & 0x0000ffff; - if (now >= lastinc) { + if (now >= gd->lastinc) { /* normal mode */ - timestamp += now - lastinc; + gd->tbl += now - gd->lastinc; } else { /* we have an overflow ... */ - timestamp += now + TIMER_LOAD_VAL - lastinc; + gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc; } - lastinc = now; + gd->lastinc = now; - return timestamp; + return gd->tbl; } ulong get_timer_masked(void) diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index ada3fbb..e459a5d 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -60,6 +60,7 @@ typedef struct global_data { unsigned long tbl; unsigned long tbu; unsigned long long timer_reset_value; + unsigned long lastinc; #endif unsigned long relocaddr; /* Start address of U-Boot in RAM */ phys_size_t ram_size; /* RAM size */ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index df4413d..810023a 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -71,6 +71,8 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_AT91FAMILY + /* * Memory Configuration */ -- cgit v0.10.2 From a430b137eb578cf73be476ff05a43baa2aba1ad8 Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Tue, 7 Dec 2010 09:38:18 +0800 Subject: onenand: fix oob print out issue Seems original implementation forget to set the pointer to point to the oobbuf, so when we want to see oob buf, we see nothing... Fix it by get pointer as the oobbuf set. Signed-off-by: Lei Wen diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c index 33108f1..cb2ba70 100644 --- a/common/cmd_onenand.c +++ b/common/cmd_onenand.c @@ -293,7 +293,7 @@ static int onenand_dump(struct mtd_info *mtd, ulong off, int only_oob) addr = (loff_t) off; memset(&ops, 0, sizeof(ops)); ops.datbuf = datbuf; - ops.oobbuf = oobbuf; /* must exist, but oob data will be appended to ops.datbuf */ + ops.oobbuf = oobbuf; ops.len = mtd->writesize; ops.ooblen = mtd->oobsize; ops.retlen = 0; @@ -319,6 +319,8 @@ static int onenand_dump(struct mtd_info *mtd, ulong off, int only_oob) } puts("OOB:\n"); i = mtd->oobsize >> 3; + p = oobbuf; + while (i--) { printf("\t%02x %02x %02x %02x %02x %02x %02x %02x\n", p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]); -- cgit v0.10.2 From 7d38f8747466abb427b8cac8e7a2f9687cd97294 Mon Sep 17 00:00:00 2001 From: Matt Waddel Date: Thu, 2 Dec 2010 12:43:14 -0700 Subject: ARMV7: Vexpress: fix build errors This patch fixes build errors in the vexpress system: - Removed sys_proto.h requirement from syslib.c. - Switched vexpress to the default armv7 linker script. - Renamed TEXT_BASE to CONFIG_SYS_TEXT_BASE. Signed-off-by: Matt Waddel diff --git a/arch/arm/cpu/armv7/syslib.c b/arch/arm/cpu/armv7/syslib.c index f9ed9a3..84d17f0 100644 --- a/arch/arm/cpu/armv7/syslib.c +++ b/arch/arm/cpu/armv7/syslib.c @@ -23,7 +23,6 @@ #include #include -#include /************************************************************ * sdelay() - simple spin loop. Will be constant time as diff --git a/board/armltd/vexpress/config.mk b/board/armltd/vexpress/config.mk index 2d797d7..36395f2 100644 --- a/board/armltd/vexpress/config.mk +++ b/board/armltd/vexpress/config.mk @@ -19,5 +19,4 @@ # # Linux-Kernel is expected to be at 0x60008000 # -TEXT_BASE = 0x60800000 -LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds +CONFIG_SYS_TEXT_BASE = 0x60800000 diff --git a/board/armltd/vexpress/u-boot.lds b/board/armltd/vexpress/u-boot.lds deleted file mode 100644 index 5ac62f2..0000000 --- a/board/armltd/vexpress/u-boot.lds +++ /dev/null @@ -1,65 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - . = ALIGN(4); - .text : - { - arch/arm/cpu/armv7/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata))) } - - . = ALIGN(4); - .data : { *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) - } - - __got_start = .; - . = ALIGN(4); - .got : { *(.got) } - __got_end = .; - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; -} -- cgit v0.10.2 From 9d37cf310af1b9a6583396c98255fc86f9aab433 Mon Sep 17 00:00:00 2001 From: Matt Waddel Date: Tue, 2 Nov 2010 17:25:21 -0600 Subject: ARMV7: Vexpress: fix compile warnings Fixed "pointer from integer without a cast" warnings in Vexpress. Signed-off-by: Matt Waddel diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/ca9x4_ct_vxp.c index 48dfc8c..c1c4ea1 100644 --- a/board/armltd/vexpress/ca9x4_ct_vxp.c +++ b/board/armltd/vexpress/ca9x4_ct_vxp.c @@ -95,16 +95,19 @@ static void flash__init(void) int dram_init(void) { - gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); + gd->ram_size = + get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + gd->bd->bi_dram[0].size = + get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = get_ram_size(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + gd->bd->bi_dram[1].size = + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); } int timer_init(void) -- cgit v0.10.2 From 44b0a386bc435d2b51e1b088a0e2610226000c3c Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Mon, 29 Nov 2010 19:56:59 +0100 Subject: ARMV7: Vexpress: Fix build error Fix ca9x4_ct_vxp build error Configuring for ca9x4_ct_vxp board... board/armltd/vexpress/libvexpress.o: In function `udelay': u-boot.git/board/armltd/vexpress/ca9x4_ct_vxp.c:161: multiple definition of `udelay' lib/libgeneric.o:u-boot.git/lib/time.c:34: first defined here lib/libgeneric.o: In function `udelay': zlib.c:(.text+0x1ee8): undefined reference to `__udelay' Signed-of-by: Dirk Behme diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/ca9x4_ct_vxp.c index c1c4ea1..ce1be1e 100644 --- a/board/armltd/vexpress/ca9x4_ct_vxp.c +++ b/board/armltd/vexpress/ca9x4_ct_vxp.c @@ -157,7 +157,7 @@ void reset_cpu(ulong addr) * Delay x useconds AND perserve advance timstamp value * assumes timer is ticking at 1 msec */ -void udelay(ulong usec) +void __udelay(ulong usec) { ulong tmo, tmp; -- cgit v0.10.2 From 296cae732b0dbe374abc9b26fed6f73588b9d1e2 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 12 Nov 2010 07:53:55 +0100 Subject: arm: add 8-byte alignment for ABI compliance before board_init_f suggested from Daniel Hobi Tested on following boards: arm1136: qong armv7: omap3_beagle arm926ejs: magnesium, tx25 Signed-off-by: Heiko Schocher cc: Daniel Hobi cc: Albert ARIBAUD diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index eec8bee..7b59619 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -160,6 +160,7 @@ next: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 #ifdef CONFIG_NAND_SPL diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index cd8f016..ddfefd4 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -223,6 +223,7 @@ skip_tcmdisable: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 46050da..da0e61e 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -138,6 +138,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 01edb9b..69a54cb 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -184,6 +184,7 @@ copyex: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index ce590a7..a9b5e48 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -175,6 +175,7 @@ poll1: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6dcc9b4..bf4988d 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -174,6 +174,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index f4950f7..80fee31 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -146,6 +146,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index fcaba30..0e8a21b 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -142,6 +142,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 2dfdafe..de9d1e2 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -142,6 +142,7 @@ next: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index d1ab19b..75ee677 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -268,6 +268,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 5cf477b..2fa3614 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -155,6 +155,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index ae358a5..66479cb 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -220,6 +220,7 @@ zerojmp: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 8c7100c..5559431 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -127,6 +127,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 36d44da..4fb0b8b 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -131,6 +131,7 @@ reset: /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ ldr r0,=0x00000000 bl board_init_f diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 1fd5f83..96c0e30 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -276,7 +276,7 @@ void board_init_f (ulong bootflag) ulong addr, addr_sp; /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_SP_ADDR); + gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07); /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory"); -- cgit v0.10.2 From bb141079d34bebb073c5b0566313e1441973ec01 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 30 Nov 2010 15:58:27 -0600 Subject: hwconfig: Fix handling of env_hwconfig, board_hwconfig, and cpu_hwconfig The handling of env_hwconfig, board_hwconfig, and cpu_hwconfig got broken when we removed the boards defining dummy board_hwconfig & cpu_hwconfig values. We fix this by handling the various strings in priority order. If hwconfig_parse returns NULL for a given string we check the next one in order (env_hwconfig, board_hwconfig, followed by cpu_hwconfig). Signed-off-by: Kumar Gala diff --git a/common/hwconfig.c b/common/hwconfig.c index da8d3ed..193863a 100644 --- a/common/hwconfig.c +++ b/common/hwconfig.c @@ -75,7 +75,7 @@ const char board_hwconfig[] __attribute__((weak)) = ""; static const char *__hwconfig(const char *opt, size_t *arglen) { - const char *env_hwconfig = NULL; + const char *env_hwconfig = NULL, *ret; char buf[HWCONFIG_PRE_RELOC_BUF_SIZE]; if (gd->flags & GD_FLG_ENV_READY) { @@ -92,17 +92,20 @@ static const char *__hwconfig(const char *opt, size_t *arglen) env_hwconfig = buf; } - if (env_hwconfig) - return hwconfig_parse(env_hwconfig, strlen(env_hwconfig), + if (env_hwconfig) { + ret = hwconfig_parse(env_hwconfig, strlen(env_hwconfig), opt, ";", ':', arglen); + if (ret) + return ret; + } - return hwconfig_parse(board_hwconfig, strlen(board_hwconfig), + ret = hwconfig_parse(board_hwconfig, strlen(board_hwconfig), opt, ";", ':', arglen); + if (ret) + return ret; return hwconfig_parse(cpu_hwconfig, strlen(cpu_hwconfig), opt, ";", ':', arglen); - - return NULL; } /* -- cgit v0.10.2 From a78fb68f718383ba7eea410340be66e94cd3540d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Wed, 1 Dec 2010 00:58:33 +0100 Subject: arm: copy_loop(): use scratch register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch uses r1 as scratch register for copy_loop(). Therefore we do not longer need r7 for the storage of relocate_code()'s 'addr_moni' (the destination address of relocation). Therefore r7 can be used later on for other purposes. Signed-off-by: Andreas Bießmann diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 7b59619..7e3b310 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -187,13 +187,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -202,7 +202,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -211,7 +211,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -252,7 +252,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -281,7 +281,7 @@ jump_2_ram: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index ddfefd4..5c18993 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -241,13 +241,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -256,7 +256,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -265,7 +265,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -344,7 +344,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -373,7 +373,7 @@ _nand_boot: .word nand_boot add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index da0e61e..e3d8159 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -156,13 +156,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -171,7 +171,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -180,7 +180,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -221,7 +221,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -245,7 +245,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 69a54cb..b8d20d3 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -202,13 +202,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -217,7 +217,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -226,7 +226,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -267,7 +267,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -298,7 +298,7 @@ _nand_boot_ofs: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index a9b5e48..6d6d8f8 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -193,13 +193,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -208,7 +208,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -217,7 +217,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -258,7 +258,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -289,7 +289,7 @@ _nand_boot_ofs: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index bf4988d..d3f5630 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -192,13 +192,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -207,7 +207,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -216,7 +216,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -257,7 +257,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -288,7 +288,7 @@ _nand_boot_ofs: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 80fee31..e3a84a1 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -164,13 +164,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -179,7 +179,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -188,7 +188,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -229,7 +229,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -255,7 +255,7 @@ _nand_boot: .word nand_boot add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 0e8a21b..752c2a5 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -160,13 +160,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -175,7 +175,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -184,7 +184,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -225,7 +225,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -256,7 +256,7 @@ _nand_boot_ofs: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index de9d1e2..fe98235 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -160,7 +160,6 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: @@ -170,6 +169,7 @@ stack_setup: ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ + mov r1, r6 /* r1 <- scratch for copy_loop */ cmp r0, r6 #ifndef CONFIG_PRELOADER beq jump_2_ram @@ -177,7 +177,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -186,7 +186,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -225,7 +225,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -247,7 +247,7 @@ jump_2_ram: add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 75ee677..6126400 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -286,13 +286,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -301,7 +301,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -310,7 +310,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -351,7 +351,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -375,7 +375,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 2fa3614..e9af263 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -173,13 +173,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -188,7 +188,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -197,7 +197,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -238,7 +238,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -259,7 +259,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 66479cb..7e1c6e6 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -238,13 +238,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -254,7 +254,7 @@ stack_setup: stmfd sp!, {r0-r12} copy_loop: ldmia r0!, {r3-r5, r7-r11} /* copy from source address [r0] */ - stmia r6!, {r3-r5, r7-r11} /* copy to target address [r1] */ + stmia r1!, {r3-r5, r7-r11} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop ldmfd sp!, {r0-r12} @@ -264,7 +264,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -305,7 +305,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -333,7 +333,7 @@ _start_oneboot_ofs add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 5559431..89e42b1 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -145,13 +145,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -160,7 +160,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -169,7 +169,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -210,7 +210,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -234,7 +234,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 4fb0b8b..a769687 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -149,13 +149,13 @@ relocate_code: mov r4, r0 /* save addr_sp */ mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - mov r7, r2 /* save addr of destination */ /* Set up the stack */ stack_setup: mov sp, r4 adr r0, _start + mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -164,7 +164,7 @@ stack_setup: copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ - stmia r6!, {r9-r10} /* copy to target address [r1] */ + stmia r1!, {r9-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blo copy_loop @@ -173,7 +173,7 @@ copy_loop: * fix .rel.dyn relocations */ ldr r0, _TEXT_BASE /* r0 <- Text base */ - sub r9, r7, r0 /* r9 <- relocation offset */ + sub r9, r6, r0 /* r9 <- relocation offset */ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ add r10, r10, r0 /* r10 <- sym table in FLASH */ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ @@ -214,7 +214,7 @@ clear_bss: ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ - mov r4, r7 /* reloc addr */ + mov r4, r6 /* reloc addr */ add r0, r0, r4 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -235,7 +235,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add lr, lr, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ - mov r1, r7 /* dest_addr */ + mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr -- cgit v0.10.2 From a1a47d3c57e3bc3c49bc1eca94c00eba4880d2c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Wed, 1 Dec 2010 00:58:34 +0100 Subject: arm: relocate_code(): do not set register useless MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In case we are still at relocation target address before relocation we do not need to load the registers needed for relocation. We should instead skip the whole relocation part and jump over to clear_bss immediately. Signed-off-by: Andreas Bießmann diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 7e3b310..df17fe3 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -193,12 +193,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 5c18993..ab75109 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -247,12 +247,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index e3d8159..84ccaf3 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -162,12 +162,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index b8d20d3..97ceb7a 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -208,12 +208,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 6d6d8f8..0e6d413 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -199,12 +199,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index d3f5630..32001e8 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -198,12 +198,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index e3a84a1..0794777 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -170,12 +170,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 752c2a5..8091252 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -166,12 +166,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index fe98235..0cb5f34 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -166,14 +166,14 @@ stack_setup: mov sp, r4 adr r0, _start - ldr r2, _TEXT_BASE - ldr r3, _bss_start_ofs - add r2, r0, r3 /* r2 <- source end address */ - mov r1, r6 /* r1 <- scratch for copy_loop */ cmp r0, r6 #ifndef CONFIG_PRELOADER beq jump_2_ram #endif + mov r1, r6 /* r1 <- scratch for copy_loop */ + ldr r2, _TEXT_BASE + ldr r3, _bss_start_ofs + add r2, r0, r3 /* r2 <- source end address */ copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 6126400..087f594 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -292,12 +292,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index e9af263..94eb00e 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -179,12 +179,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 7e1c6e6..53391ec 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -244,12 +244,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss stmfd sp!, {r0-r12} copy_loop: diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 89e42b1..e992c38 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -151,12 +151,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index a769687..1246b78 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -155,12 +155,12 @@ stack_setup: mov sp, r4 adr r0, _start + cmp r0, r6 + beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ - cmp r0, r6 - beq clear_bss copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ -- cgit v0.10.2 From 1f52d89f2b4b5ca8dde7aa1be02bb1c658e0aa13 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Wed, 1 Dec 2010 00:58:35 +0100 Subject: arm: fixloop(): do not use r8 for relocation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit r8 is used for global_data and should therefore be left alone! For C code the compiler flag --fixed-r8 does the job, but in assembler we need to be aware of that fact. Signed-off-by: Andreas Bießmann diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index df17fe3..d14a7bb 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -222,10 +222,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index ab75109..dc692ed 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -276,10 +276,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 84ccaf3..f048bad 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -191,10 +191,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 97ceb7a..aa014d0 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -237,10 +237,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 0e6d413..67e706b 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -228,10 +228,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 32001e8..6c49c83 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -227,10 +227,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 0794777..4e75109 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -199,10 +199,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 8091252..cbbc612 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -195,10 +195,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 0cb5f34..02fdfc7 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -197,10 +197,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 087f594..87942cd 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -321,10 +321,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 94eb00e..499b632 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -208,10 +208,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 53391ec..0580adc 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -275,10 +275,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index e992c38..50e3f21 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -180,10 +180,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 1246b78..b34e946 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -184,10 +184,10 @@ fixloop: ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] - and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + and r7, r1, #0xff + cmp r7, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r7, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext -- cgit v0.10.2 From b9c5081d7d6ebc3290813675ca8771f4471edb85 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Wed, 1 Dec 2010 00:58:36 +0100 Subject: armv7: fix relocation skip MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I doubt the stack_setup() was defective before: we load the current location of _start and compare against destination of relocate_code(). If we are already there we shoud skip the relocation and jump over to clear_bss. Before the clear_bss was also skipped. Signed-off-by: Andreas Bießmann diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 02fdfc7..c71ef6c 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -166,9 +166,9 @@ stack_setup: mov sp, r4 adr r0, _start - cmp r0, r6 #ifndef CONFIG_PRELOADER - beq jump_2_ram + cmp r0, r6 + beq clear_bss /* skip relocation */ #endif mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r2, _TEXT_BASE -- cgit v0.10.2 From f9de0997d773699fb4bda1c1ad7462aa2fcd00e9 Mon Sep 17 00:00:00 2001 From: Prafulla Wadaskar Date: Wed, 1 Dec 2010 17:46:52 +0530 Subject: ARM: make timer variables in gt_t available for all ARM platforms All code that attemots to access variables in BSS before relocation (for example directly or indirectly by board_init_f()) needs to be fixed. Especially timer.c needs to fix on most of the ARM platforms. This patch makes timer related variables in gd_t available for all ARM implementations. Signed-off-by: Prafulla Wadaskar Edited commit message. Signed-off-by: Wolfgang Denk diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index e459a5d..2a84d27 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -55,7 +55,9 @@ typedef struct global_data { unsigned long plla_rate_hz; unsigned long pllb_rate_hz; unsigned long at91_pllb_usb_init; - /* "static data" needed by at91's timer.c */ +#endif +#ifdef CONFIG_ARM + /* "static data" needed by most of timer.c on ARM platforms */ unsigned long timer_rate_hz; unsigned long tbl; unsigned long tbu; -- cgit v0.10.2 From 7ea23555f5d59457f5998b9f61d7b943b2ea6422 Mon Sep 17 00:00:00 2001 From: Macpaul Lin Date: Fri, 3 Dec 2010 13:52:34 +0800 Subject: include/linux/mii.h: update for supporting GE This file has been synced (copy) from Linux source code. This commit was based on kernel 2.6.32. It updates gigabit related phy registers and basic definitions. Signed-off-by: Macpaul Lin diff --git a/include/linux/mii.h b/include/linux/mii.h index 7c63095..6e7ffab 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -10,98 +10,132 @@ /* Generic MII registers. */ -#define MII_BMCR 0x00 /* Basic mode control register */ -#define MII_BMSR 0x01 /* Basic mode status register */ -#define MII_PHYSID1 0x02 /* PHYS ID 1 */ -#define MII_PHYSID2 0x03 /* PHYS ID 2 */ -#define MII_ADVERTISE 0x04 /* Advertisement control reg */ -#define MII_LPA 0x05 /* Link partner ability reg */ -#define MII_EXPANSION 0x06 /* Expansion register */ -#define MII_DCOUNTER 0x12 /* Disconnect counter */ -#define MII_FCSCOUNTER 0x13 /* False carrier counter */ -#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ -#define MII_RERRCOUNTER 0x15 /* Receive error counter */ -#define MII_SREVISION 0x16 /* Silicon revision */ -#define MII_RESV1 0x17 /* Reserved... */ -#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ -#define MII_PHYADDR 0x19 /* PHY address */ -#define MII_RESV2 0x1a /* Reserved... */ -#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ -#define MII_NCONFIG 0x1c /* Network interface config */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_ESTATUS 0x0f /* Extended Status */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ /* Basic mode control register. */ -#define BMCR_RESV 0x003f /* Unused... */ -#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -#define BMCR_CTST 0x0080 /* Collision test */ -#define BMCR_FULLDPLX 0x0100 /* Full duplex */ -#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ -#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -#define BMCR_RESET 0x8000 /* Reset the DP83840 */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ +#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ +#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset the DP83840 */ /* Basic mode status register. */ -#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -#define BMSR_JCD 0x0002 /* Jabber detected */ -#define BMSR_LSTATUS 0x0004 /* Link status */ -#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ -#define BMSR_RFAULT 0x0010 /* Remote fault detected */ -#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -#define BMSR_RESV 0x07c0 /* Unused... */ -#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ -#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ -#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ -#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ -#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ +#define BMSR_RFAULT 0x0010 /* Remote fault detected */ +#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ +#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ +#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ +#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ +#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ +#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ /* Advertisement control register. */ -#define ADVERTISE_SLCT 0x001f /* Selector bits */ -#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ -#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ -#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ -#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ -#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -#define ADVERTISE_RESV 0x1c00 /* Unused... */ -#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ -#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ +#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ +#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ +#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ +#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ +#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ +#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ +#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ +#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ ADVERTISE_CSMA) #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ - ADVERTISE_100HALF | ADVERTISE_100FULL) + ADVERTISE_100HALF | ADVERTISE_100FULL) /* Link partner ability register. */ -#define LPA_SLCT 0x001f /* Same as advertise selector */ -#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ -#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ -#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ -#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ -#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -#define LPA_RESV 0x1c00 /* Unused... */ -#define LPA_RFAULT 0x2000 /* Link partner faulted */ -#define LPA_LPACK 0x4000 /* Link partner acked us */ -#define LPA_NPAGE 0x8000 /* Next page bit */ +#define LPA_SLCT 0x001f /* Same as advertise selector */ +#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ +#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ +#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ +#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ +#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ +#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ +#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ +#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ +#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ +#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RFAULT 0x2000 /* Link partner faulted */ +#define LPA_LPACK 0x4000 /* Link partner acked us */ +#define LPA_NPAGE 0x8000 /* Next page bit */ #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) /* Expansion register for auto-negotiation. */ -#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ -#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ -#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ -#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ -#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ -#define EXPANSION_RESV 0xffe0 /* Unused... */ +#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ +#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ +#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ +#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ +#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ + +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ /* N-way test register. */ -#define NWAYTEST_RESV1 0x00ff /* Unused... */ -#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ -#define NWAYTEST_RESV2 0xfe00 /* Unused... */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ + +/* 1000BASE-T Control register */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +/* 1000BASE-T Status register */ +#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ +#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ +#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ +#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ + +/* Flow control flags */ +#define FLOW_CTRL_TX 0x01 +#define FLOW_CTRL_RX 0x02 /** * mii_nway_result @@ -114,7 +148,7 @@ * * The one exception to IEEE 802.3u is that 100baseT4 is placed * between 100T-full and 100T-half. If your phy does not support - * 100T4 this is fine. If your phy places 100T4 elsewhere in the + * 100T4 this is fine. If your phy places 100T4 elsewhere in the * priority order, you will need to roll your own function. */ static inline unsigned int mii_nway_result (unsigned int negotiated) @@ -154,5 +188,4 @@ static inline unsigned int mii_duplex (unsigned int duplex_lock, return 0; } - #endif /* __LINUX_MII_H__ */ -- cgit v0.10.2 From e465cf2377d15f1ca1fa22079c766e89ad0aaf29 Mon Sep 17 00:00:00 2001 From: Nick Thompson Date: Sat, 11 Dec 2010 10:46:46 -0500 Subject: davinci: Rewrite timer.c to use tbl/tbu emulation variables in gd This change allows the davinci timer functions to be used before relocation since it avoids using static variables prior to BSS being made available. The code is based on that used in the at91 timers, modified to use a davinci specific hardware timer. It also maintains reset_timer() to allow deprecated timer usage to continue to work (for example, in nand_base.c) Signed-off-by: Nick Thompson Tested-by: Ben Gardiner Tested-by: Sudhakar Rajashekhara Tested-by: Sandeep Paulraj Signed-off-by: Sandeep Paulraj diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c index 9da7443..1c6fa4a 100644 --- a/arch/arm/cpu/arm926ejs/davinci/timer.c +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c @@ -40,6 +40,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + struct davinci_timer { u_int32_t pid12; u_int32_t emumgt; @@ -57,11 +59,9 @@ struct davinci_timer { static struct davinci_timer * const timer = (struct davinci_timer *)CONFIG_SYS_TIMERBASE; -#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) -#define TIM_CLK_DIV 16 +#define TIMER_LOAD_VAL 0xffffffff -static ulong timestamp; -static ulong lastinc; +#define TIM_CLK_DIV 16 int timer_init(void) { @@ -71,72 +71,51 @@ int timer_init(void) writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr); writel(0x0, &timer->tim34); writel(TIMER_LOAD_VAL, &timer->prd34); - lastinc = 0; - timestamp = 0; writel(2 << 22, &timer->tcr); + gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV; + gd->timer_reset_value = 0; return(0); } void reset_timer(void) { - writel(0x0, &timer->tcr); - writel(0x0, &timer->tim34); - lastinc = 0; - timestamp = 0; - writel(2 << 22, &timer->tcr); + gd->timer_reset_value = get_ticks(); } -static ulong get_timer_raw(void) +/* + * Get the current 64 bit timer tick count + */ +unsigned long long get_ticks(void) { - ulong now = readl(&timer->tim34); - - if (now >= lastinc) { - /* normal mode */ - timestamp += now - lastinc; - } else { - /* overflow ... */ - timestamp += now + TIMER_LOAD_VAL - lastinc; - } - lastinc = now; - return timestamp; + unsigned long now = readl(&timer->tim34); + + /* increment tbu if tbl has rolled over */ + if (now < gd->tbl) + gd->tbu++; + gd->tbl = now; + + return (((unsigned long long)gd->tbu) << 32) | gd->tbl; } ulong get_timer(ulong base) { - return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base); -} + unsigned long long timer_diff; -void set_timer(ulong t) -{ - timestamp = t; + timer_diff = get_ticks() - gd->timer_reset_value; + + return (timer_diff / (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base; } void __udelay(unsigned long usec) { - ulong tmo; - ulong endtime; - signed long diff; - - tmo = CONFIG_SYS_HZ_CLOCK / 1000; - tmo *= usec; - tmo /= (1000 * TIM_CLK_DIV); - - endtime = get_timer_raw() + tmo; + unsigned long long endtime; - do { - ulong now = get_timer_raw(); - diff = endtime - now; - } while (diff >= 0); -} + endtime = ((unsigned long long)usec * gd->timer_rate_hz) / 1000000UL; + endtime += get_ticks(); -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return(get_timer(0)); + while (get_ticks() < endtime) + ; } /* -- cgit v0.10.2 From aac0b4b6c153c413b4541a61d9c4296eef689e07 Mon Sep 17 00:00:00 2001 From: Sandeep Paulraj Date: Sat, 11 Dec 2010 10:47:30 -0500 Subject: DaVinci DM6446: Config Update The DM6446 does not build due to the ARM relocation patch. Also the board does not build in the NOR mode. Changed default to NAND to ensure no build failure. While at it removed CONFIG_CMD_KGDB Signed-off-by: Sandeep Paulraj diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index e1b1db1..45214fa 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -50,7 +50,7 @@ /*=======*/ #define DV_EVM #define CONFIG_SYS_NAND_SMALLPAGE -#define CONFIG_SYS_USE_NOR +#define CONFIG_SYS_USE_NAND #define CONFIG_DISPLAY_CPUINFO /*===================*/ /* SoC Configuration */ @@ -78,6 +78,7 @@ #define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ + #define DDR_8BANKS /* 8-bank DDR2 (256MB) */ /*====================*/ /* Serial Driver info */ @@ -228,11 +229,13 @@ #define CONFIG_PREBOOT "usb start" #endif #endif -/*=======================*/ -/* KGDB support (if any) */ -/*=======================*/ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ -- cgit v0.10.2 From b03c8403cd770332778eec9142f136a9c870aaeb Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Sat, 11 Dec 2010 10:50:48 -0500 Subject: OMAP: Timer: Replace bss variable by gd Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the OMAP timer driver. The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. Signed-off-by: Dirk Behme Tested-by: Steve Sakoman Tested-by: John Rigby Tested-by: Nishanth Menon Acked-by: Nishanth Menon Tested-by: Heiko Schocher Tested-by: Sandeep Paulraj Signed-off-by: Sandeep Paulraj diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 6b8cf7b..9beebb1 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -35,8 +35,8 @@ #include #include -static ulong timestamp; -static ulong lastinc; +DECLARE_GLOBAL_DATA_PTR; + static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; /* @@ -74,7 +74,7 @@ ulong get_timer(ulong base) void set_timer(ulong t) { - timestamp = t; + gd->tbl = t; } /* delay x useconds */ @@ -96,8 +96,8 @@ void __udelay(unsigned long usec) void reset_timer_masked(void) { /* reset time, capture current incrementer value time */ - lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - timestamp = 0; /* start "advancing" time stamp from 0 */ + gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + gd->tbl = 0; /* start "advancing" time stamp from 0 */ } ulong get_timer_masked(void) @@ -105,14 +105,14 @@ ulong get_timer_masked(void) /* current tick value */ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - if (now >= lastinc) /* normal mode (non roll) */ + if (now >= gd->lastinc) /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ - timestamp += (now - lastinc); + gd->tbl += (now - gd->lastinc); else /* we have rollover of incrementer */ - timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) - - lastinc) + now; - lastinc = now; - return timestamp; + gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) + - gd->lastinc) + now; + gd->lastinc = now; + return gd->tbl; } /* -- cgit v0.10.2 From ee3894c681e3d8e6ef0f5cfe71f0b7143d864b39 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Sat, 11 Dec 2010 11:41:42 -0500 Subject: omap3: emif|sdrc: use a single global data define DECLARE_GLOBAL_DATA_PTR declarations in functions are inherently troublesome with various compilers (e.g. gcc 4.5) Signed-off-by: Nishanth Menon Signed-off-by: Sandeep Paulraj diff --git a/arch/arm/cpu/armv7/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c index 2227576..3085637 100644 --- a/arch/arm/cpu/armv7/omap3/emif4.c +++ b/arch/arm/cpu/armv7/omap3/emif4.c @@ -29,6 +29,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; extern omap3_sysinfo sysinfo; static emif4_t *emif4_base = (emif4_t *)OMAP34XX_SDRC_BASE; @@ -139,7 +140,6 @@ void do_emif4_init(void) */ int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; unsigned int size0 = 0, size1 = 0; size0 = get_sdr_cs_size(CS0); @@ -157,7 +157,6 @@ int dram_init(void) void dram_init_banksize (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned int size0 = 0, size1 = 0; size0 = get_sdr_cs_size(CS0); diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index a4979ce..2a7970b 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -37,6 +37,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; extern omap3_sysinfo sysinfo; static struct sdrc *sdrc_base = (struct sdrc *)OMAP34XX_SDRC_BASE; @@ -172,7 +173,6 @@ void do_sdrc_init(u32 cs, u32 early) */ int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; unsigned int size0 = 0, size1 = 0; size0 = get_sdr_cs_size(CS0); @@ -194,7 +194,6 @@ int dram_init(void) void dram_init_banksize (void) { - DECLARE_GLOBAL_DATA_PTR; unsigned int size0 = 0, size1 = 0; size0 = get_sdr_cs_size(CS0); -- cgit v0.10.2 From 72c96a6802d9b1c949785d1d152f8bc8666c753d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 1 Dec 2010 22:55:54 -0600 Subject: tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMII The following commit: commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4 Author: Peter Tyser Date: Tue Nov 3 17:52:07 2009 -0600 tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode Removed setting Auto-Neg by default, however this is believed to be proper default configuration for initialization of the TBI interface. Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require Auto-Neg to be disabled to function properly. This addresses a breakage on the P2020 DS & MPC8572 DS boards when used with an SGMII riser card. We also remove setting CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the default setting is sufficient for them. Additionally, we clean up the code a bit to remove an unnecessary second define. Signed-off-by: Kumar Gala Acked-by: Peter Tyser Tested-by: Peter Tyser diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 9b5dd92..77908d1 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -5,7 +5,7 @@ * terms of the GNU Public License, Version 2, incorporated * herein by reference. * - * Copyright 2004-2009 Freescale Semiconductor, Inc. + * Copyright 2004-2010 Freescale Semiconductor, Inc. * (C) Copyright 2003, Motorola, Inc. * author Andy Fleming * @@ -292,13 +292,12 @@ static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, /* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */ #ifndef CONFIG_TSEC_TBICR_SETTINGS -#define TBICR_SETTINGS ( \ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ TBICR_PHY_RESET \ + | TBICR_ANEG_ENABLE \ | TBICR_FULL_DUPLEX \ | TBICR_SPEED1_SET \ ) -#else -#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS #endif /* CONFIG_TSEC_TBICR_SETTINGS */ /* Configure the TBI for SGMII operation */ @@ -311,7 +310,7 @@ static void tsec_configure_serdes(struct tsec_private *priv) tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON, TBICON_CLK_SELECT); tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR, - TBICR_SETTINGS); + CONFIG_TSEC_TBICR_SETTINGS); } /* Discover which PHY is attached to the device, and configure it diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index a21afb7..2dfee3d 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -437,14 +437,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -/* TBI PHY configuration for SGMII mode */ -#define CONFIG_TSEC_TBICR_SETTINGS ( \ - TBICR_PHY_RESET \ - | TBICR_ANEG_ENABLE \ - | TBICR_FULL_DUPLEX \ - | TBICR_SPEED1_SET \ - ) - #endif /* CONFIG_TSEC_ENET */ /* diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index e0a1fa4..a74766d 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -375,6 +375,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" +/* + * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force + * 1000mbps SGMII link + */ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 42d1f69..a051913 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -345,6 +345,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" +/* + * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force + * 1000mbps SGMII link + */ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -- cgit v0.10.2 From 9fd84915a92058b775fcc8fad4ab4e59fe51cf17 Mon Sep 17 00:00:00 2001 From: John Schmoller Date: Thu, 2 Dec 2010 11:43:10 -0600 Subject: fsl_upm: Add MxMR/MDR synchronization According to Freescale reference manuals (eg section "13.4.4.2 Programming the UPMs" of the P4080 Reference Manual): "Since the result of any update to the MxMR/MDR register must be in effect before the dummy read or write to the UPM region, a write to MxMR/MDR should be followed immediately by a read of MxMR/MDR." The UPM on a custom P4080-based board did not work without performing a read of MxMR/MDR after a write. Signed-off-by: John Schmoller Signed-off-by: Peter Tyser Acked-by: Scott Wood Signed-off-by: Kumar Gala diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 7cb99cb..c33e278 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -21,6 +21,7 @@ static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset) { clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset); + (void)in_be32(upm->mxmr); } static void fsl_upm_end_pattern(struct fsl_upm *upm) @@ -35,6 +36,7 @@ static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, void __iomem *io_addr, u32 mar) { out_be32(upm->mar, mar); + (void)in_be32(upm->mar); switch (width) { case 8: out_8(io_addr, 0x0); -- cgit v0.10.2 From 2c1764efc2872fc944d0d580e911168c0a231f8c Mon Sep 17 00:00:00 2001 From: "P.V.Suresh" Date: Sat, 4 Dec 2010 10:37:23 +0530 Subject: fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controller eSDHC host controller reset results in clearing of snoop bit also. This patch sets the SNOOP bit after the completion of host controller reset. Without this patch mmc reads are not consistent. Signed-off-by: P.V.Suresh Signed-off-by: Kumar Gala diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index a368fe6..57cd4ee 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -384,10 +384,6 @@ static int esdhc_init(struct mmc *mmc) int ret = 0; u8 card_absent; - /* Enable cache snooping */ - if (cfg && !cfg->no_snoop) - esdhc_write32(®s->scr, 0x00000040); - /* Reset the entire host controller */ esdhc_write32(®s->sysctl, SYSCTL_RSTA); @@ -395,6 +391,10 @@ static int esdhc_init(struct mmc *mmc) while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout) udelay(1000); + /* Enable cache snooping */ + if (cfg && !cfg->no_snoop) + esdhc_write32(®s->scr, 0x00000040); + esdhc_write32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); /* Set the initial clock speed */ -- cgit v0.10.2 From fdb9482b42c28d314317ea0118181b1f32a7c689 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Fri, 3 Dec 2010 13:03:45 -0600 Subject: p1022ds: fix switching of DIU/LBC signals On the P1022, the pins which drive the video display (DIU) are muxed with the local bus controller (LBC), so if the DIU is active, the pins need to be temporarily muxed to LBC whenever accessing NOR flash. The code which handled this transition is checking and changing the wrong bits in PMUXCR. Also add a follow-up read after a write to NOR flash if we're going to mux back to DIU after the write, as described in the P1022 RM. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c index 12b40a0..8f5305c 100644 --- a/board/freescale/p1022ds/diu.c +++ b/board/freescale/p1022ds/diu.c @@ -32,6 +32,7 @@ #define PMUXCR_ELBCDIU_MASK 0xc0000000 #define PMUXCR_ELBCDIU_NOR16 0x80000000 +#define PMUXCR_ELBCDIU_DIU 0x40000000 /* * DIU Area Descriptor @@ -131,9 +132,8 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres) px_brdcfg0 = in_8(lbc_lcs1_ba); out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU); - /* Setting PMUXCR to switch to DVI from ELBC */ - clrsetbits_be32(&gur->pmuxcr, - PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_NOR16); + /* Set PMUXCR to switch the muxed pins from the LBC to the DIU */ + clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU); pmuxcr = in_be32(&gur->pmuxcr); return fsl_diu_init(*xres, pixel_format, 0); @@ -161,7 +161,7 @@ static int set_mux_to_lbc(void) ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; /* Switch the muxes only if they're currently set to DIU mode */ - if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) == + if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) != PMUXCR_ELBCDIU_NOR16) { /* * In DIU mode, the PIXIS can only be accessed indirectly @@ -216,8 +216,17 @@ void flash_write8(u8 value, void *addr) int sw = set_mux_to_lbc(); __raw_writeb(value, addr); - if (sw) + if (sw) { + /* + * To ensure the post-write is completed to eLBC, software must + * perform a dummy read from one valid address from eLBC space + * before changing the eLBC_DIU from NOR mode to DIU mode. + * set_mux_to_diu() includes a sync that will ensure the + * __raw_readb() completes before it switches the mux. + */ + __raw_readb(addr); set_mux_to_diu(); + } } void flash_write16(u16 value, void *addr) @@ -225,8 +234,17 @@ void flash_write16(u16 value, void *addr) int sw = set_mux_to_lbc(); __raw_writew(value, addr); - if (sw) + if (sw) { + /* + * To ensure the post-write is completed to eLBC, software must + * perform a dummy read from one valid address from eLBC space + * before changing the eLBC_DIU from NOR mode to DIU mode. + * set_mux_to_diu() includes a sync that will ensure the + * __raw_readb() completes before it switches the mux. + */ + __raw_readb(addr); set_mux_to_diu(); + } } void flash_write32(u32 value, void *addr) @@ -234,18 +252,47 @@ void flash_write32(u32 value, void *addr) int sw = set_mux_to_lbc(); __raw_writel(value, addr); - if (sw) + if (sw) { + /* + * To ensure the post-write is completed to eLBC, software must + * perform a dummy read from one valid address from eLBC space + * before changing the eLBC_DIU from NOR mode to DIU mode. + * set_mux_to_diu() includes a sync that will ensure the + * __raw_readb() completes before it switches the mux. + */ + __raw_readb(addr); set_mux_to_diu(); + } } void flash_write64(u64 value, void *addr) { int sw = set_mux_to_lbc(); + uint32_t *p = addr; - /* There is no __raw_writeq(), so do the write manually */ - *(volatile u64 *)addr = value; - if (sw) + /* + * There is no __raw_writeq(), so do the write manually. We don't trust + * the compiler, so we use inline assembly. + */ + __asm__ __volatile__( + "stw%U0%X0 %2,%0;\n" + "stw%U1%X1 %3,%1;\n" + : "=m" (*p), "=m" (*(p + 1)) + : "r" ((uint32_t) (value >> 32)), "r" ((uint32_t) (value))); + + if (sw) { + /* + * To ensure the post-write is completed to eLBC, software must + * perform a dummy read from one valid address from eLBC space + * before changing the eLBC_DIU from NOR mode to DIU mode. We + * read addr+4 because we just wrote to addr+4, so that's how we + * maintain execution order. set_mux_to_diu() includes a sync + * that will ensure the __raw_readb() completes before it + * switches the mux. + */ + __raw_readb(addr + 4); set_mux_to_diu(); + } } u8 flash_read8(void *addr) -- cgit v0.10.2 From 054289f752371533285ae709003a683e6964f88f Mon Sep 17 00:00:00 2001 From: Baidu Boy Date: Mon, 29 Nov 2010 21:10:45 +0800 Subject: mpc83xx: fix pcie enumeration This patch fix a problem for the pcie enumeration for mpc83xx cpus. Without this we will not get correct value in hose->regions[...]. The pointer *reg in function mpc83xx_pcie_init_bus() shall not be changed. Because we will use this pointer as a parameter to call function mpc83xx_pcie_register_hose(). Signed-off-by: Baidu Boy Signed-off-by: Kim Phillips diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 1771c48..46a706d 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -201,18 +201,18 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg) out_le32(&out_win->tarl, 0); out_le32(&out_win->tarh, 0); - for (i = 0; i < 2; i++, reg++) { + for (i = 0; i < 2; i++) { u32 ar; - if (reg->size == 0) + if (reg[i].size == 0) break; out_win = &pex->bridge.pex_outbound_win[i + 1]; - out_le32(&out_win->bar, reg->phys_start); - out_le32(&out_win->tarl, reg->bus_start); + out_le32(&out_win->bar, reg[i].phys_start); + out_le32(&out_win->tarl, reg[i].bus_start); out_le32(&out_win->tarh, 0); - ar = PEX_OWAR_EN | (reg->size & PEX_OWAR_SIZE); - if (reg->flags & PCI_REGION_IO) + ar = PEX_OWAR_EN | (reg[i].size & PEX_OWAR_SIZE); + if (reg[i].flags & PCI_REGION_IO) ar |= PEX_OWAR_TYPE_IO; else ar |= PEX_OWAR_TYPE_MEM; -- cgit v0.10.2 From 3600945b5aebb2d029c97c48a38d8dc960ad6935 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 9 Dec 2010 11:26:24 +0100 Subject: ARM: */start.S: use canonical asm syntax Make code build with older tool chains. Signed-off-by: Wolfgang Denk diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index d14a7bb..9a6f6cb 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -234,7 +234,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index dc692ed..237dcfe 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -288,7 +288,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index f048bad..abfa124 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -203,7 +203,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index aa014d0..08f178d 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -249,7 +249,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 67e706b..2c0c869 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -240,7 +240,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6c49c83..5519252 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -239,7 +239,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 4e75109..f9c9470 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -211,7 +211,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index cbbc612..d28e745 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -207,7 +207,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index c71ef6c..684f2d2 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -209,7 +209,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 87942cd..9f8c15b 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -333,7 +333,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 499b632..32dfe8b 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -220,7 +220,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 0580adc..fbd0def 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -287,7 +287,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 50e3f21..9379af6 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -192,7 +192,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index b34e946..7c2db4f 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -196,7 +196,7 @@ fixabs: mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ add r1, r10, r1 /* r1 <- address of symbol in table */ ldr r1, [r1, #4] /* r1 <- symbol value */ - add r1, r9 /* r1 <- relocated sym addr */ + add r1, r1, r9 /* r1 <- relocated sym addr */ b fixnext fixrel: /* relative fix: increase location by offset */ -- cgit v0.10.2 From 37805cf1db0adbc01f181ec806f0732999764099 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 14 Dec 2010 17:49:52 +0100 Subject: ppc4xx: Fix missing linker scripts for partial linking This patch fixes the acadia_nand and kilauea_nand linker scripts which have been missing in commit ee8028b7 [ppc4xx: Cleanup for partial linking and --gc-sections] Signed-off-by: Stefan Roese Cc: Bernhard Weirich diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds index e256b19..c2a04c7 100644 --- a/board/amcc/acadia/u-boot-nand.lds +++ b/board/amcc/acadia/u-boot-nand.lds @@ -26,34 +26,12 @@ SECTIONS { /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } .text : { /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/powerpc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text*) /* Align to next NAND block */ . = ALIGN(0x4000); @@ -61,8 +39,7 @@ SECTIONS /* Keep some space here for redundant env and potential bad env blocks */ . = ALIGN(0x10000); - *(.text) - *(.got1) + *(.text*) } _etext = .; PROVIDE (etext = .); @@ -70,9 +47,6 @@ SECTIONS { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ . = (. + 0x00FF) & 0xFFFFFF00; @@ -80,23 +54,19 @@ SECTIONS PROVIDE (erotext = .); .reloc : { - *(.got) + KEEP(*(.got)) _GOT2_TABLE_ = .; - *(.got2) + KEEP(*(.got2)) _FIXUP_TABLE_ = .; - *(.fixup) + KEEP(*(.fixup)) } __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; __fixup_entries = (. - _FIXUP_TABLE_)>>2; .data : { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS + *(.data*) + *(.sdata*) } _edata = .; PROVIDE (edata = .); @@ -122,9 +92,8 @@ SECTIONS __bss_start = .; .bss (NOLOAD) : { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) + *(.bss*) + *(.sbss*) *(COMMON) . = ALIGN(4); } diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds index e256b19..c2a04c7 100644 --- a/board/amcc/kilauea/u-boot-nand.lds +++ b/board/amcc/kilauea/u-boot-nand.lds @@ -26,34 +26,12 @@ SECTIONS { /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } .text : { /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/powerpc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text*) /* Align to next NAND block */ . = ALIGN(0x4000); @@ -61,8 +39,7 @@ SECTIONS /* Keep some space here for redundant env and potential bad env blocks */ . = ALIGN(0x10000); - *(.text) - *(.got1) + *(.text*) } _etext = .; PROVIDE (etext = .); @@ -70,9 +47,6 @@ SECTIONS { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ . = (. + 0x00FF) & 0xFFFFFF00; @@ -80,23 +54,19 @@ SECTIONS PROVIDE (erotext = .); .reloc : { - *(.got) + KEEP(*(.got)) _GOT2_TABLE_ = .; - *(.got2) + KEEP(*(.got2)) _FIXUP_TABLE_ = .; - *(.fixup) + KEEP(*(.fixup)) } __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; __fixup_entries = (. - _FIXUP_TABLE_)>>2; .data : { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS + *(.data*) + *(.sdata*) } _edata = .; PROVIDE (edata = .); @@ -122,9 +92,8 @@ SECTIONS __bss_start = .; .bss (NOLOAD) : { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) + *(.bss*) + *(.sbss*) *(COMMON) . = ALIGN(4); } -- cgit v0.10.2 From 510f794c894321fe65e62bb6fd9f21fa2569dcec Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 00:42:28 +0000 Subject: pm9g45: ARM relocation support Signed-off-by: Asen Dimov diff --git a/board/ronetix/pm9g45/config.mk b/board/ronetix/pm9g45/config.mk deleted file mode 100644 index 9d3c5ae..0000000 --- a/board/ronetix/pm9g45/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x73f00000 diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index f3d48f2..79b7c9d 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -159,9 +159,16 @@ int board_init(void) int dram_init(void) { + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + PHYS_SDRAM_SIZE); + return 0; +} + +void dram_init_banksize(void) +{ gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; - return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 3ed6b56..8822012 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -39,6 +39,8 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_TEXT_BASE 0x73f00000 +#define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT @@ -175,6 +177,10 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\ 0x1000) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -- cgit v0.10.2 From 37ee3ccce77a5ff8b791d61b04931385af015f99 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:42:38 +0200 Subject: pm9g45: enable cache command Signed-off-by: Asen Dimov diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 8822012..ec51ccf 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -81,6 +81,7 @@ #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -- cgit v0.10.2 From 9a2a05a4a3674be55fe28b130112754395a43c7a Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:41:59 +0200 Subject: pm9263: ARM relocation support Signed-off-by: Asen Dimov diff --git a/board/ronetix/pm9263/config.mk b/board/ronetix/pm9263/config.mk deleted file mode 100644 index e554a45..0000000 --- a/board/ronetix/pm9263/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 4dc0237..ec9f865 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -378,9 +378,16 @@ int board_init(void) int dram_init(void) { + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + PHYS_SDRAM_SIZE); + return 0; +} + +void dram_init_banksize(void) +{ gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; - return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 619af2d..c9e7489 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -44,6 +44,8 @@ #define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_AT91FAMILY /* clocks */ #define CONFIG_SYS_MOR_VAL \ @@ -401,6 +403,10 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -- cgit v0.10.2 From 6e110d295f70cc0821eedcce2adc67dd0f15d5f6 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:42:09 +0200 Subject: pm9263: enable cache command Signed-off-by: Asen Dimov diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index c9e7489..96e12f2 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -214,6 +214,7 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -- cgit v0.10.2 From 4f81bf4368ced9b0469e1b387637d01cc510dba6 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:41:30 +0200 Subject: pm9261: ARM relocation support Signed-off-by: Asen Dimov diff --git a/board/ronetix/pm9261/config.mk b/board/ronetix/pm9261/config.mk deleted file mode 100644 index 975522a..0000000 --- a/board/ronetix/pm9261/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x23f00000 \ No newline at end of file diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 53d8c48..e0f44dd 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -281,9 +281,16 @@ int board_eth_init(bd_t *bis) int dram_init(void) { + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + PHYS_SDRAM_SIZE); + return 0; +} + +void dram_init_banksize(void) +{ gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; - return 0; } #ifdef CONFIG_RESET_PHY_R diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 7fcc9ba..c7f0be9 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -45,6 +45,8 @@ #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_AT91FAMILY /* clocks */ /* CKGR_MOR - enable main osc. */ @@ -370,6 +372,10 @@ #define CONFIG_SYS_MALLOC_LEN \ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -- cgit v0.10.2 From 6741b5310f81ae5ae0132ad85b09fb31d6377b6c Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Sun, 12 Dec 2010 12:41:36 +0200 Subject: pm9261: enable cache command Signed-off-by: Asen Dimov diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index c7f0be9..26e5049 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -203,6 +203,7 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -- cgit v0.10.2