From ad40610b48bc3e248f5e79d94084427aa6a0b9e2 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 23 Jan 2015 15:28:22 +0100 Subject: sunxi: Only enable i2c support in the SPL when needed We do not need i2c support in the SPL when there is no PMIC (some sun4i boards), or when the PMIC is not using i2c such as on sun6i and sun8i. This reduces the SPL size from (e.g.) 21812 to 19260 bytes. Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 4a5cab2..6cfd7e1 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -181,7 +181,10 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ /* I2C */ +#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER #define CONFIG_SPL_I2C_SUPPORT +#endif + #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_SPEED 400000 -- cgit v0.10.2 From 046664aedd1da0b964cdf678371b11cce3eb0468 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 23 Jan 2015 16:40:01 +0100 Subject: sunxi: Hyundai_A7HD_defconfig fix USB vbus pin config USB1_VBUS is not used, and USB2_VBUS uses the pin normally used to control USB1_VBUS. Signed-off-by: Hans de Goede diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 60eb03e..204640e 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" CONFIG_FDTFILE="sun4i-a10-hyundai-a7hd.dtb" CONFIG_USB_MUSB_SUNXI=y CONFIG_USB0_VBUS_PIN="PB09" -CONFIG_USB2_VBUS_PIN="" +CONFIG_USB1_VBUS_PIN="" +CONFIG_USB2_VBUS_PIN="PH6" CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:45,ri:274,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_DCLK_PHASE=1 CONFIG_VIDEO_LCD_POWER="PH2" -- cgit v0.10.2 From e1a0888ed224cc4c4e019a37b7b0331b11745e4d Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 25 Jan 2015 11:29:27 +0100 Subject: sunxi: Convert sun5i boards to use auto dram configuration Currently we've separate detailed dram settings for all sun5i boards, this moves them over to using auto dram configuration so that we can get rid of all the per board dram_foo.c files. This has been tested on a A10s-Olinuxino, A13-Olinuxino, A13-OlinuxinoM, mk802-a10s and r7-tv-dongle board. Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 738b55e..f48b8c0 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -39,16 +39,14 @@ config DRAM_CLK default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I ---help--- Set the dram clock speed, valid range 240 - 480, must be a multiple - of 24. Note on sun4i / sun5i / sun7i this is only used by boards - which use dram autoconfig. + of 24. config DRAM_ZQ int "sunxi dram zq value" default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I default 127 if MACH_SUN7I ---help--- - Set the dram zq value. Note on sun4i / sun5i / sun7i this is only - used by boards which use dram autoconfig. + Set the dram zq value. if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I config DRAM_EMR1 @@ -56,8 +54,7 @@ config DRAM_EMR1 default 0 if MACH_SUN4I default 4 if MACH_SUN5I || MACH_SUN7I ---help--- - Set the dram controller emr1 value. Note this is only used by boards - which use dram autoconfig. + Set the dram controller emr1 value. endif config SYS_CONFIG_NAME diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile index 71edb83..43766e0 100644 --- a/board/sunxi/Makefile +++ b/board/sunxi/Makefile @@ -12,11 +12,5 @@ obj-y += board.o obj-$(CONFIG_SUNXI_GMAC) += gmac.o obj-$(CONFIG_SUNXI_AHCI) += ahci.o obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o +obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o obj-$(CONFIG_MACH_SUN7I) += dram_sun5i_auto.o -obj-$(CONFIG_TARGET_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o -obj-$(CONFIG_TARGET_A13_OLINUXINO) += dram_a13_olinuxino.o -obj-$(CONFIG_TARGET_A13_OLINUXINOM) += dram_a13_oli_micro.o -# This is not a typo, uses the same mem settings as the a10s-olinuxino-m -obj-$(CONFIG_TARGET_AUXTEK_T004) += dram_a10s_olinuxino_m.o -obj-$(CONFIG_TARGET_MK802_A10S) += dram_sun5i_auto.o -obj-$(CONFIG_TARGET_R7DONGLE) += dram_r7dongle.o diff --git a/board/sunxi/dram_a10s_olinuxino_m.c b/board/sunxi/dram_a10s_olinuxino_m.c deleted file mode 100644 index 8900539..0000000 --- a/board/sunxi/dram_a10s_olinuxino_m.c +++ /dev/null @@ -1,31 +0,0 @@ -/* this file is generated, don't edit it yourself */ - -#include -#include - -static struct dram_para dram_para = { - .clock = 432, - .type = 3, - .rank_num = 1, - .density = 4096, - .io_width = 16, - .bus_width = 16, - .cas = 9, - .zq = 123, - .odt_en = 0, - .size = 512, - .tpr0 = 0x42d899b7, - .tpr1 = 0xa090, - .tpr2 = 0x22a00, - .tpr3 = 0, - .tpr4 = 0, - .tpr5 = 0, - .emr1 = 0x4, - .emr2 = 0x10, - .emr3 = 0, -}; - -unsigned long sunxi_dram_init(void) -{ - return dramc_init(&dram_para); -} diff --git a/board/sunxi/dram_a13_oli_micro.c b/board/sunxi/dram_a13_oli_micro.c deleted file mode 100644 index 8154ea2..0000000 --- a/board/sunxi/dram_a13_oli_micro.c +++ /dev/null @@ -1,32 +0,0 @@ -/* this file is generated, don't edit it yourself */ - -#include -#include - -static struct dram_para dram_para = { - .clock = 408, - .type = 3, - .rank_num = 1, - .density = 2048, - .io_width = 16, - .bus_width = 16, - .cas = 9, - .zq = 123, - .odt_en = 0, - .size = 256, - .tpr0 = 0x42d899b7, - .tpr1 = 0xa090, - .tpr2 = 0x22a00, - .tpr3 = 0, - .tpr4 = 0, - .tpr5 = 0, - .emr1 = 0, - .emr2 = 0x10, - .emr3 = 0, - -}; - -unsigned long sunxi_dram_init(void) -{ - return dramc_init(&dram_para); -} diff --git a/board/sunxi/dram_a13_olinuxino.c b/board/sunxi/dram_a13_olinuxino.c deleted file mode 100644 index ca96260..0000000 --- a/board/sunxi/dram_a13_olinuxino.c +++ /dev/null @@ -1,31 +0,0 @@ -/* this file is generated, don't edit it yourself */ - -#include -#include - -static struct dram_para dram_para = { - .clock = 408, - .type = 3, - .rank_num = 1, - .density = 2048, - .io_width = 8, - .bus_width = 16, - .cas = 9, - .zq = 123, - .odt_en = 0, - .size = 512, - .tpr0 = 0x42d899b7, - .tpr1 = 0xa090, - .tpr2 = 0x22a00, - .tpr3 = 0, - .tpr4 = 0, - .tpr5 = 0, - .emr1 = 0, - .emr2 = 0x10, - .emr3 = 0, -}; - -unsigned long sunxi_dram_init(void) -{ - return dramc_init(&dram_para); -} diff --git a/board/sunxi/dram_bananapi.c b/board/sunxi/dram_bananapi.c deleted file mode 100644 index 0ed7943..0000000 --- a/board/sunxi/dram_bananapi.c +++ /dev/null @@ -1,31 +0,0 @@ -/* this file is generated, don't edit it yourself */ - -#include -#include - -static struct dram_para dram_para = { - .clock = 432, - .type = 3, - .rank_num = 1, - .density = 4096, - .io_width = 16, - .bus_width = 32, - .cas = 9, - .zq = 0x7f, - .odt_en = 0, - .size = 1024, - .tpr0 = 0x42d899b7, - .tpr1 = 0xa090, - .tpr2 = 0x22a00, - .tpr3 = 0x0, - .tpr4 = 0x1, - .tpr5 = 0x0, - .emr1 = 0x4, - .emr2 = 0x10, - .emr3 = 0x0, -}; - -unsigned long sunxi_dram_init(void) -{ - return dramc_init(&dram_para); -} diff --git a/board/sunxi/dram_r7dongle.c b/board/sunxi/dram_r7dongle.c deleted file mode 100644 index 59343cb..0000000 --- a/board/sunxi/dram_r7dongle.c +++ /dev/null @@ -1,31 +0,0 @@ -/* this file is generated, don't edit it yourself */ - -#include -#include - -static struct dram_para dram_para = { - .clock = 384, - .type = 3, - .rank_num = 1, - .density = 2048, - .io_width = 8, - .bus_width = 32, - .cas = 9, - .zq = 123, - .odt_en = 0, - .size = 1024, - .tpr0 = 0x42d899b7, - .tpr1 = 0xa090, - .tpr2 = 0x22a00, - .tpr3 = 0, - .tpr4 = 0, - .tpr5 = 0, - .emr1 = 0x04, - .emr2 = 0x10, - .emr3 = 0, -}; - -unsigned long sunxi_dram_init(void) -{ - return dramc_init(&dram_para); -} diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 94fafa6..79a27db 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -9,3 +9,6 @@ CONFIG_USB1_VBUS_PIN="PB10" +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y +S:CONFIG_TARGET_A10S_OLINUXINO_M=y ++S:CONFIG_DRAM_CLK=432 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=4 diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 1a99418..d392ec4 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -13,3 +13,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y +S:CONFIG_TARGET_A13_OLINUXINOM=y ++S:CONFIG_DRAM_CLK=408 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=0 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 7df6951..cf205a7 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -13,3 +13,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y +S:CONFIG_TARGET_A13_OLINUXINO=y ++S:CONFIG_DRAM_CLK=408 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=0 diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 7fe9059..eb1d003 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -6,3 +6,6 @@ CONFIG_USB1_VBUS_PIN="PG13" +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y +S:CONFIG_TARGET_AUXTEK_T004=y ++S:CONFIG_DRAM_CLK=432 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=4 diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index b9fd59c..f467d6c 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -6,3 +6,6 @@ CONFIG_USB1_VBUS_PIN="PG13" +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y +S:CONFIG_TARGET_R7DONGLE=y ++S:CONFIG_DRAM_CLK=384 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=4 -- cgit v0.10.2 From c13f60d92a1c31c131a53ff8e994e4c8eebb8311 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 25 Jan 2015 12:10:48 +0100 Subject: sunxi: Add a GMAC Transmit Clock Delay Chain Kconfig option And use this to set the GMAC Transmit Clock Delay Chain value on Banana boards, rather then keying of CONFIG_TARGET_FOO. Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index 05fbad3..d297ed0 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -305,6 +305,8 @@ struct sunxi_ccm_reg { #define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII 0x2 #define CCM_GMAC_CTRL_GPIT_MII (0x0 << 2) #define CCM_GMAC_CTRL_GPIT_RGMII (0x1 << 2) +#define CCM_GMAC_CTRL_RX_CLK_DELAY(x) ((x) << 5) +#define CCM_GMAC_CTRL_TX_CLK_DELAY(x) ((x) << 10) #define CCM_USB_CTRL_PHY0_RST (0x1 << 0) #define CCM_USB_CTRL_PHY1_RST (0x1 << 1) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index e101c54..8a80385 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -243,6 +243,8 @@ struct sunxi_ccm_reg { #define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII 0x2 #define CCM_GMAC_CTRL_GPIT_MII (0x0 << 2) #define CCM_GMAC_CTRL_GPIT_RGMII (0x1 << 2) +#define CCM_GMAC_CTRL_RX_CLK_DELAY(x) ((x) << 5) +#define CCM_GMAC_CTRL_TX_CLK_DELAY(x) ((x) << 10) #define MDFS_CLK_DEFAULT 0x81000002 /* PLL6 / 3 */ diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index f48b8c0..15e3d46 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -380,4 +380,10 @@ config USB_KEYBOARD Say Y here to add support for using a USB keyboard (typically used in combination with a graphical console). +config GMAC_TX_DELAY + int "GMAC Transmit Clock Delay Chain" + default 0 + ---help--- + Set the GMAC Transmit Clock Delay Chain value. + endif diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 4e4615e..8849132 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -24,20 +24,13 @@ int sunxi_gmac_initialize(bd_t *bis) #ifdef CONFIG_RGMII setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | CCM_GMAC_CTRL_GPIT_RGMII); + setbits_le32(&ccm->gmac_clk_cfg, + CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY)); #else setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII | CCM_GMAC_CTRL_GPIT_MII); #endif - /* - * In order for the gmac nic to work reliable on the Bananapi, we - * need to set bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" - * of the GMAC clk register to 3. - */ -#if defined CONFIG_TARGET_BANANAPI || defined CONFIG_TARGET_BANANAPRO - setbits_le32(&ccm->gmac_clk_cfg, 0x3 << 10); -#endif - #ifndef CONFIG_MACH_SUN6I /* Configure pin mux settings for GMAC */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) { diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index d94e08e..4cff573 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -1,6 +1,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" CONFIG_FDTFILE="sun7i-a20-bananapi.dtb" +CONFIG_GMAC_TX_DELAY=3 +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 02e4f3e..0512019 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHC CONFIG_FDTFILE="sun7i-a20-bananapro.dtb" CONFIG_USB1_VBUS_PIN="PH0" CONFIG_USB2_VBUS_PIN="PH1" +CONFIG_GMAC_TX_DELAY=3 +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -- cgit v0.10.2 From 40d0cdda3e2667260100b75d79a9a53f206a0739 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 25 Jan 2015 12:15:14 +0100 Subject: sunxi: Remove CONFIG_TARGET_FOO for sun5i and sun7i boards CONFIG_TARGET_FOO was only used in board/sunxi/Makefile to select the dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some special handling of the bananapi/bananapro (both sun7i), all sun5i and sun7i boards have been moved over to using a single dram_sun5i_autoconfig file, and the tx clk delay handling for the Banana boards now has its own Kconfig. IOW nothing is using CONFIG_TARGET_FOO anymore, so remove it. Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 15e3d46..4b31dcc 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -64,88 +64,6 @@ config SYS_CONFIG_NAME default "sun7i" if MACH_SUN7I default "sun8i" if MACH_SUN8I -choice - prompt "Board" - -config TARGET_A10S_OLINUXINO_M - bool "A10S_OLINUXINO_M" - depends on MACH_SUN5I - -config TARGET_A13_OLINUXINOM - bool "A13_OLINUXINOM" - depends on MACH_SUN5I - -config TARGET_A13_OLINUXINO - bool "A13_OLINUXINO" - depends on MACH_SUN5I - -config TARGET_A20_OLINUXINO_L2 - bool "A20_OLINUXINO_L2" - depends on MACH_SUN7I - -config TARGET_A20_OLINUXINO_L - bool "A20_OLINUXINO_L" - depends on MACH_SUN7I - -config TARGET_A20_OLINUXINO_M - bool "A20_OLINUXINO_M" - depends on MACH_SUN7I - -config TARGET_AUXTEK_T004 - bool "AUXTEK_T004" - depends on MACH_SUN5I - -config TARGET_BANANAPI - bool "BANANAPI" - depends on MACH_SUN7I - -config TARGET_BANANAPRO - bool "BANANAPRO" - depends on MACH_SUN7I - -config TARGET_CUBIEBOARD2 - bool "CUBIEBOARD2" - depends on MACH_SUN7I - -config TARGET_CUBIETRUCK - bool "CUBIETRUCK" - depends on MACH_SUN7I - -config TARGET_PCDUINO3 - bool "PCDUINO3" - depends on MACH_SUN7I - -config TARGET_MELE_M3 - bool "MELE_M3" - depends on MACH_SUN7I - -config TARGET_MK802_A10S - bool "MK802_A10S" - depends on MACH_SUN5I - -config TARGET_MSI_PRIMO73 - bool "MSI Primo73 (7\" tablet)" - depends on MACH_SUN7I - ---help--- - The MSI Primo73 is an A20 based tablet, with 1G RAM, 16G NAND, - 1024x600 TN LCD display, mono speaker, 0.3 MP front camera, 2.0 MP - rear camera, 3000 mAh battery, gt911 touchscreen, mma8452 accelerometer - and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons - (both volume buttons are also connected to the UBOOT_SEL pin). The - external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB - OTG and 3.5mm headphone jack. More details are available at - http://linux-sunxi.org/MSI_Primo73 - -config TARGET_I12_TVBOX - bool "I12_TVBOX" - depends on MACH_SUN7I - -config TARGET_R7DONGLE - bool "R7DONGLE" - depends on MACH_SUN5I - -endchoice - config SYS_BOARD default "sunxi" diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 79a27db..b5f0a0f 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -8,7 +8,6 @@ CONFIG_USB1_VBUS_PIN="PB10" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y -+S:CONFIG_TARGET_A10S_OLINUXINO_M=y +S:CONFIG_DRAM_CLK=432 +S:CONFIG_DRAM_ZQ=123 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index d392ec4..1c3fc3a 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -12,7 +12,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y -+S:CONFIG_TARGET_A13_OLINUXINOM=y +S:CONFIG_DRAM_CLK=408 +S:CONFIG_DRAM_ZQ=123 +S:CONFIG_DRAM_EMR1=0 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index cf205a7..0daaaae 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -12,7 +12,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y -+S:CONFIG_TARGET_A13_OLINUXINO=y +S:CONFIG_DRAM_CLK=408 +S:CONFIG_DRAM_ZQ=123 +S:CONFIG_DRAM_EMR1=0 diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 17fd19d..ff94e77 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -4,7 +4,6 @@ CONFIG_FDTFILE="sun7i-a20-olinuxino-lime2.dtb" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_A20_OLINUXINO_L2=y +S:CONFIG_DRAM_CLK=480 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index c8243a4..5442f64 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -4,7 +4,6 @@ CONFIG_FDTFILE="sun7i-a20-olinuxino-lime.dtb" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_A20_OLINUXINO_L=y +S:CONFIG_DRAM_CLK=480 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index ac94c79..97a21ee 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -8,7 +8,6 @@ CONFIG_VIDEO_VGA=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_A20_OLINUXINO_M=y +S:CONFIG_DRAM_CLK=384 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index eb1d003..03ec3db 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -5,7 +5,6 @@ CONFIG_USB1_VBUS_PIN="PG13" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y -+S:CONFIG_TARGET_AUXTEK_T004=y +S:CONFIG_DRAM_CLK=432 +S:CONFIG_DRAM_ZQ=123 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 4cff573..5aba938 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -5,7 +5,6 @@ CONFIG_GMAC_TX_DELAY=3 +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_BANANAPI=y +S:CONFIG_DRAM_CLK=432 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 0512019..e501b5c 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -7,7 +7,6 @@ CONFIG_GMAC_TX_DELAY=3 +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_BANANAPRO=y +S:CONFIG_DRAM_CLK=432 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index ef5b43a..7704a0e 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -4,7 +4,6 @@ CONFIG_FDTFILE="sun7i-a20-cubieboard2.dtb" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_CUBIEBOARD2=y +S:CONFIG_DRAM_CLK=480 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index f51c491..b64f84f 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -5,7 +5,6 @@ CONFIG_VIDEO_VGA=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_CUBIETRUCK=y +S:CONFIG_DRAM_CLK=432 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Ippo_q8h_v5_defconfig b/configs/Ippo_q8h_v5_defconfig index c894948..4786202 100644 --- a/configs/Ippo_q8h_v5_defconfig +++ b/configs/Ippo_q8h_v5_defconfig @@ -11,7 +11,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN8I=y -+S:CONFIG_TARGET_IPPO_Q8H_V5=y +S:CONFIG_DRAM_CLK=480 # zq = 0xf777 +S:CONFIG_DRAM_ZQ=63351 diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 64e01c8..45d88f3 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -4,7 +4,6 @@ CONFIG_FDTFILE="sun7i-a20-pcduino3.dtb" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_PCDUINO3=y +S:CONFIG_DRAM_CLK=480 +S:CONFIG_DRAM_ZQ=122 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Linksprite_pcDuino3_fdt_defconfig b/configs/Linksprite_pcDuino3_fdt_defconfig index 49718c7..3b6dfa6 100644 --- a/configs/Linksprite_pcDuino3_fdt_defconfig +++ b/configs/Linksprite_pcDuino3_fdt_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_SEPARATE=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_PCDUINO3=y +S:CONFIG_DRAM_CLK=480 +S:CONFIG_DRAM_ZQ=122 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 6628184..c6fb7e6 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -1,3 +1,11 @@ +# The MSI Primo73 is an A20 based tablet, with 1G RAM, 16G NAND, +# 1024x600 TN LCD display, mono speaker, 0.3 MP front camera, 2.0 MP +# rear camera, 3000 mAh battery, gt911 touchscreen, mma8452 accelerometer +# and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons +# (both volume buttons are also connected to the UBOOT_SEL pin). The +# external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB +# OTG and 3.5mm headphone jack. More details are available at +# http://linux-sunxi.org/MSI_Primo73 CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" CONFIG_FDTFILE="sun7i-a20-primo73.dtb" @@ -10,7 +18,6 @@ CONFIG_USB_KEYBOARD=n +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_MSI_PRIMO73=y +S:CONFIG_DRAM_CLK=384 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 7f1710a..723a72a2 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -7,7 +7,6 @@ CONFIG_VIDEO_VGA=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_MELE_M3=y +S:CONFIG_DRAM_CLK=384 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 65791b7..41192fc 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -4,7 +4,6 @@ CONFIG_FDTFILE="sun7i-a20-i12-tvbox.dtb" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN7I=y -+S:CONFIG_TARGET_I12_TVBOX=y +S:CONFIG_DRAM_CLK=384 +S:CONFIG_DRAM_ZQ=127 +S:CONFIG_DRAM_EMR1=4 diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 086e1e4..cafcbaa 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -5,7 +5,6 @@ CONFIG_USB1_VBUS_PIN="PB10" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y -+S:CONFIG_TARGET_MK802_A10S=y +S:CONFIG_DRAM_CLK=432 +S:CONFIG_DRAM_ZQ=123 +S:CONFIG_DRAM_EMR1=0 diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index f467d6c..e99e57d 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -5,7 +5,6 @@ CONFIG_USB1_VBUS_PIN="PG13" +S:CONFIG_ARM=y +S:CONFIG_ARCH_SUNXI=y +S:CONFIG_MACH_SUN5I=y -+S:CONFIG_TARGET_R7DONGLE=y +S:CONFIG_DRAM_CLK=384 +S:CONFIG_DRAM_ZQ=123 +S:CONFIG_DRAM_EMR1=4 -- cgit v0.10.2 From d35488c7359ac5b6e20d9fe1895360aa7f3122f2 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 26 Jan 2015 16:46:43 +0100 Subject: sunxi: rsb: Add sun9i (A80 support) Add support for the A80 to the rsb code. Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 1c4b763..48db744 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -15,8 +15,10 @@ obj-y += pinmux.o obj-y += usbc.o obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I) += prcm.o +obj-$(CONFIG_MACH_SUN9I) += prcm.o obj-$(CONFIG_MACH_SUN6I) += p2wi.o obj-$(CONFIG_MACH_SUN8I) += rsb.o +obj-$(CONFIG_MACH_SUN9I) += rsb.o obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index b72bb9d..55e9433 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -18,12 +18,23 @@ static void rsb_cfg_io(void) { +#ifdef CONFIG_MACH_SUN8I sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL0_R_RSB_SCK); sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL1_R_RSB_SDA); sunxi_gpio_set_pull(SUNXI_GPL(0), 1); sunxi_gpio_set_pull(SUNXI_GPL(1), 1); sunxi_gpio_set_drv(SUNXI_GPL(0), 2); sunxi_gpio_set_drv(SUNXI_GPL(1), 2); +#elif defined CONFIG_MACH_SUN9I + sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN0_R_RSB_SCK); + sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN1_R_RSB_SDA); + sunxi_gpio_set_pull(SUNXI_GPN(0), 1); + sunxi_gpio_set_pull(SUNXI_GPN(1), 1); + sunxi_gpio_set_drv(SUNXI_GPN(0), 2); + sunxi_gpio_set_drv(SUNXI_GPN(1), 2); +#else +#error unsupported MACH_SUNXI +#endif } static void rsb_set_clk(void) diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h index a2a7839..04889c5 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h @@ -73,7 +73,6 @@ #define SUNXI_CCM_BASE (REGS_APB0_BASE + 0x0000) #define SUNXI_CCMMODULE_BASE (REGS_APB0_BASE + 0x0400) #define SUNXI_PIO_BASE (REGS_APB0_BASE + 0x0800) -#define SUNXI_R_PIO_BASE (0x08002C00) #define SUNXI_TIMER_BASE (REGS_APB0_BASE + 0x0C00) #define SUNXI_PWM_BASE (REGS_APB0_BASE + 0x1400) #define SUNXI_LRADC_BASE (REGS_APB0_BASE + 0x1800) @@ -92,8 +91,10 @@ #define SUNXI_TWI4_BASE (REGS_APB1_BASE + 0x3800) /* RCPUS Module */ -#define SUNXI_RPRCM_BASE (REGS_RCPUS_BASE + 0x1400) +#define SUNXI_PRCM_BASE (REGS_RCPUS_BASE + 0x1400) #define SUNXI_R_UART_BASE (REGS_RCPUS_BASE + 0x2800) +#define SUNXI_R_PIO_BASE (REGS_RCPUS_BASE + 0x2c00) +#define SUNXI_RSB_BASE (REGS_RCPUS_BASE + 0x3400) /* Misc. */ #define SUNXI_BROM_BASE 0xFFFF0000 /* 32K */ diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 71cc879..f2c247d 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -45,9 +45,13 @@ * * sun8i has 1 bank: * PL0 - PL11 + * + * sun9i has 3 banks: + * PL0 - PL9 | PM0 - PM15 | PN0 - PN1 */ #define SUNXI_GPIO_L 11 #define SUNXI_GPIO_M 12 +#define SUNXI_GPIO_N 13 struct sunxi_gpio { u32 cfg[4]; @@ -114,6 +118,7 @@ enum sunxi_gpio_number { SUNXI_GPIO_I_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_H), SUNXI_GPIO_L_START = 352, SUNXI_GPIO_M_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_L), + SUNXI_GPIO_N_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_M), SUNXI_GPIO_AXP0_START = 1024, }; @@ -129,6 +134,7 @@ enum sunxi_gpio_number { #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) #define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr)) +#define SUNXI_GPN(_nr) (SUNXI_GPIO_N_START + (_nr)) #define SUNXI_GPAXP0(_nr) (SUNXI_GPIO_AXP0_START + (_nr)) @@ -187,6 +193,9 @@ enum sunxi_gpio_number { #define SUN8I_GPL2_R_UART_TX 2 #define SUN8I_GPL3_R_UART_RX 2 +#define SUN9I_GPN0_R_RSB_SCK 3 +#define SUN9I_GPN1_R_RSB_SDA 3 + /* GPIO pin pull-up/down config */ #define SUNXI_GPIO_PULL_DISABLE 0 #define SUNXI_GPIO_PULL_UP 1 -- cgit v0.10.2 From 37d46dd3c4f3617b88a5797aab3600d3a4f32bd5 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 26 Jan 2015 16:59:12 +0100 Subject: sunxi: rsb: Move rsb_set_device_mode() call to rsb_init() It turns out that the device_mode_data is rsb specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init(). Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index 55e9433..b00befb 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -16,6 +16,8 @@ #include #include +static int rsb_set_device_mode(void); + static void rsb_cfg_io(void) { #ifdef CONFIG_MACH_SUN8I @@ -53,7 +55,7 @@ static void rsb_set_clk(void) writel((cd_odly << 8) | div, &rsb->ccr); } -void rsb_init(void) +int rsb_init(void) { struct sunxi_rsb_reg * const rsb = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; @@ -65,6 +67,8 @@ void rsb_init(void) writel(RSB_CTRL_SOFT_RST, &rsb->ctrl); rsb_set_clk(); + + return rsb_set_device_mode(); } static int rsb_await_trans(void) @@ -99,13 +103,14 @@ static int rsb_await_trans(void) return ret; } -int rsb_set_device_mode(u32 device_mode_data) +static int rsb_set_device_mode(void) { struct sunxi_rsb_reg * const rsb = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; unsigned long tmo = timer_get_us() + 1000000; - writel(RSB_DMCR_DEVICE_MODE_START | device_mode_data, &rsb->dmcr); + writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA, + &rsb->dmcr); while (readl(&rsb->dmcr) & RSB_DMCR_DEVICE_MODE_START) { if (timer_get_us() > tmo) diff --git a/arch/arm/include/asm/arch-sunxi/rsb.h b/arch/arm/include/asm/arch-sunxi/rsb.h index 95a595a..a893466 100644 --- a/arch/arm/include/asm/arch-sunxi/rsb.h +++ b/arch/arm/include/asm/arch-sunxi/rsb.h @@ -37,6 +37,7 @@ struct sunxi_rsb_reg { #define RSB_STAT_TERR_INT (1 << 1) #define RSB_STAT_LBSY_INT (1 << 2) +#define RSB_DMCR_DEVICE_MODE_DATA 0x7c3e00 #define RSB_DMCR_DEVICE_MODE_START (1 << 31) #define RSB_CMD_BYTE_WRITE 0x4e @@ -46,8 +47,7 @@ struct sunxi_rsb_reg { #define RSB_DEVADDR_RUNTIME_ADDR(x) ((x) << 16) #define RSB_DEVADDR_DEVICE_ADDR(x) ((x) << 0) -void rsb_init(void); -int rsb_set_device_mode(u32 device_mode_data); +int rsb_init(void); int rsb_set_device_address(u16 device_addr, u16 runtime_addr); int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data); int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data); diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c index 58bbd45..3e07f23 100644 --- a/drivers/power/axp221.c +++ b/drivers/power/axp221.c @@ -29,9 +29,7 @@ static int pmic_bus_init(void) #else int ret; - rsb_init(); - - ret = rsb_set_device_mode(AXP223_DEVICE_MODE_DATA); + ret = rsb_init(); if (ret) return ret; diff --git a/include/axp221.h b/include/axp221.h index 6f24a61..a20e25c 100644 --- a/include/axp221.h +++ b/include/axp221.h @@ -12,7 +12,6 @@ #define AXP223_DEVICE_ADDR 0x3a3 #define AXP223_RUNTIME_ADDR 0x2d -#define AXP223_DEVICE_MODE_DATA 0x7c3e00 /* Page 0 addresses */ #define AXP221_CHIP_ID 0x03 -- cgit v0.10.2 From 11dfef07d99b7148e8e2a9e742254b00846efe7b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 28 Jan 2015 09:31:52 +0100 Subject: sunxi: MAINTAINERS: sort entries alphabetically Keep all entries except for the monster entry at the top alphabetically sorted. Signed-off-by: Hans de Goede diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 743e7f5..9050059 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -34,16 +34,6 @@ F: configs/qt840a_defconfig F: include/configs/sun8i.h F: configs/Ippo_q8h_v1_2_defconfig -CUBIEBOARD2 BOARD -M: Ian Campbell -M: Hans de Goede -S: Maintained -F: include/configs/sun7i.h -F: configs/Cubieboard2_defconfig -F: configs/Cubieboard2_FEL_defconfig -F: configs/Cubietruck_defconfig -F: configs/Cubietruck_FEL_defconfig - A20-OLINUXINO-LIME BOARD M: FUKAUMI Naoki S: Maintained @@ -61,12 +51,22 @@ M: Maxime Ripard S: Maintained F: configs/Colombus_defconfig +CUBIEBOARD2 BOARD +M: Ian Campbell +M: Hans de Goede +S: Maintained +F: include/configs/sun7i.h +F: configs/Cubieboard2_defconfig +F: configs/Cubieboard2_FEL_defconfig +F: configs/Cubietruck_defconfig +F: configs/Cubietruck_FEL_defconfig + GEMEI-G9 TABLET -M: Priit Laes -S: Maintained -F: configs/sunxi_Gemei_G9_defconfig +M: Priit Laes +S: Maintained +F: configs/sunxi_Gemei_G9_defconfig -HUMMINIGBIRD-A31 BOARD +HUMMINGBIRD-A31 BOARD M: Chen-Yu Tsai S: Maintained F: configs/Hummingbird_A31_defconfig @@ -76,16 +76,6 @@ M: Chen-Yu Tsai S: Maintained F: configs/Ippo_q8h_v5_defconfig -MSI-PRIMO73 BOARD -M: Siarhei Siamashka -S: Maintained -F: configs/MSI_Primo73_defconfig - -MSI-PRIMO81 BOARD -M: Siarhei Siamashka -S: Maintained -F: configs/MSI_Primo81_defconfig - LINKSPRITE-PCDUINO BOARD M: Zoltan Herpai S: Maintained @@ -100,3 +90,13 @@ MELE M5 BOARD M: Ian Campbell S: Maintained F: configs/Mele_M5_defconfig + +MSI-PRIMO73 BOARD +M: Siarhei Siamashka +S: Maintained +F: configs/MSI_Primo73_defconfig + +MSI-PRIMO81 BOARD +M: Siarhei Siamashka +S: Maintained +F: configs/MSI_Primo81_defconfig -- cgit v0.10.2 From 00f120bd6154095eaddafe75297786874372e075 Mon Sep 17 00:00:00 2001 From: Adam Sampson Date: Sun, 1 Feb 2015 12:58:58 +0000 Subject: sunxi: Add Linksprite_pcDuino3_Nano board / defconfig This is a low-cost Allwinner A20 board with Arduino-style GPIO headers; it features 1G RAM, 4G NAND flash, 1 micro-SD, 2 USB sockets, 1 micro USB socket for OTG and another for power in, HDMI, SATA, 5V power for SATA devices, gigabit Ethernet, an IR receiver, 3.5mm audio out and a MIPI camera connector. Like the BananaPi, this board needs GMAC_TX_DELAY set to 3 in order for GMAC to work reliably at gigabit speeds. For more details, see: http://linux-sunxi.org/LinkSprite_pcDuino3_Nano Signed-off-by: Adam Sampson Acked-by: Hans de Goede Signed-off-by: Hans de Goede diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 9050059..44f57ad 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -81,6 +81,11 @@ M: Zoltan Herpai S: Maintained F: configs/Linksprite_pcDuino_defconfig +LINKSPRITE-PCDUINO3-NANO BOARD +M: Adam Sampson +S: Maintained +F: configs/Linksprite_pcDuino3_Nano_defconfig + MARSBOARD-A10 BOARD M: Aleksei Mamlin S: Maintained diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig new file mode 100644 index 0000000..4baba14 --- /dev/null +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -0,0 +1,11 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(2),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-pcduino3-nano.dtb" +CONFIG_GMAC_TX_DELAY=3 +CONFIG_USB1_VBUS_PIN="PH11" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN7I=y ++S:CONFIG_DRAM_CLK=408 ++S:CONFIG_DRAM_ZQ=122 ++S:CONFIG_DRAM_EMR1=4 -- cgit v0.10.2 From 29dd7d8c20e43af59a8108ca2c77f09d39e48cc3 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Tue, 27 Jan 2015 19:58:46 +0100 Subject: sunxi: TZX-Q8-713B7 support Signed-off-by: Paul Kocialkowski Acked-by: Hans de Goede Signed-off-by: Hans de Goede diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 44f57ad..47e2355 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -105,3 +105,8 @@ MSI-PRIMO81 BOARD M: Siarhei Siamashka S: Maintained F: configs/MSI_Primo81_defconfig + +TZX-Q8-713B7 BOARD +M: Paul Kocialkowski +S: Maintained +F: configs/TZX-Q8-713B7_defconfig diff --git a/configs/TZX-Q8-713B7_defconfig b/configs/TZX-Q8-713B7_defconfig new file mode 100644 index 0000000..7b7b9dd --- /dev/null +++ b/configs/TZX-Q8-713B7_defconfig @@ -0,0 +1,15 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" +CONFIG_FDTFILE="sun5i-a13-tzx-q8-713b7.dtb" +CONFIG_USB_MUSB_SUNXI=y +CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="AXP0-0" +CONFIG_VIDEO_LCD_BL_EN="AXP0-1" +CONFIG_VIDEO_LCD_BL_PWM="PB2" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN5I=y ++S:CONFIG_DRAM_CLK=408 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=4 -- cgit v0.10.2 From 8d0df9be927eff1be9aef29aa995f6b54900962e Mon Sep 17 00:00:00 2001 From: Michal Suchanek Date: Sun, 4 Jan 2015 21:06:21 +0100 Subject: sunxi: Add Inet 86VS support Signed-off-by: Michal Suchanek Acked-by: Hans de Goede Signed-off-by: Hans de Goede diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 47e2355..faa413c 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -71,6 +71,12 @@ M: Chen-Yu Tsai S: Maintained F: configs/Hummingbird_A31_defconfig +INET-86VS BOARD +M: Michal Suchanek +S: Maintained +F: board/sunxi/dram_inet_86vs.c +F: configs/Inet_86VS_defconfig + IPPO-Q8H-V5 BOARD M: Chen-Yu Tsai S: Maintained diff --git a/configs/Inet_86VS_defconfig b/configs/Inet_86VS_defconfig new file mode 100644 index 0000000..ce9985a --- /dev/null +++ b/configs/Inet_86VS_defconfig @@ -0,0 +1,15 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" +CONFIG_FDTFILE="sun5i-a13-inet-86vs.dtb" +CONFIG_USB_MUSB_SUNXI=y +CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="AXP0-0" +CONFIG_VIDEO_LCD_BL_EN="AXP0-1" +CONFIG_VIDEO_LCD_BL_PWM="PB2" ++S:CONFIG_ARM=y ++S:CONFIG_ARCH_SUNXI=y ++S:CONFIG_MACH_SUN5I=y ++S:CONFIG_DRAM_CLK=408 ++S:CONFIG_DRAM_ZQ=123 ++S:CONFIG_DRAM_EMR1=4 -- cgit v0.10.2 From fb75d972eaf5c887ada28e73d3e84d52931d4cb0 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 25 Jan 2015 15:33:07 +0100 Subject: sunxi: video: Force h/vsync active high when using ext. vga dac on some boards On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an unstable image when active low v or hsync is used. The problem seems to be specific to the OLinuxIno A13 (normal & micro) boards. I've just looked up the schematics and they use an opendrain driver for the vga sync lines, and with sync pulses it is the logical high->low edge of the pulse which counts for the timing, which with an active low sync is being driven by the pull-up, and that simply seems to not drive it hard enough to get a stable image. So force v and hsync active high on these boards. independent of what the modeline says. This fixes the unstable image. Signed-off-by: Hans de Goede Acked-by: Ian Campbell diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 4b31dcc..adbd2b5 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -185,6 +185,16 @@ config VIDEO_VGA_VIA_LCD LCD interface driving a VGA connector, such as found on the Olimex A13 boards. +config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH + boolean "Force sync active high for VGA via LCD controller support" + depends on VIDEO_VGA_VIA_LCD + default n + ---help--- + Say Y here if you've a board which uses opendrain drivers for the vga + hsync and vsync signals. Opendrain drivers cannot generate steep enough + positive edges for a stable video output, so on boards with opendrain + drivers the sync signals must always be active high. + config VIDEO_VGA_EXTERNAL_DAC_EN string "LCD panel power enable pin" depends on VIDEO_VGA_VIA_LCD diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 1c3fc3a..a04f2b3 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -4,6 +4,7 @@ CONFIG_FDTFILE="sun5i-a13-olinuxino-micro.dtb" CONFIG_USB1_VBUS_PIN="PG11" CONFIG_VIDEO_HDMI=n CONFIG_VIDEO_VGA_VIA_LCD=y +CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y # For use with the Olimex 7" LCD module, adjust timings for other displays # Set video-mode=sunxi:800x600-24@60,monitor=lcd in the env. to enable CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0" diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 0daaaae..806d5b7 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -4,6 +4,7 @@ CONFIG_FDTFILE="sun5i-a13-olinuxino.dtb" CONFIG_USB1_VBUS_PIN="PG11" CONFIG_VIDEO_HDMI=n CONFIG_VIDEO_VGA_VIA_LCD=y +CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y # For use with the Olimex 7" LCD module, adjust timings for other displays # Set video-mode=sunxi:800x600-24@60,monitor=lcd in the env. to enable CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0" diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index af728b5..f5f24fc 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -645,7 +645,8 @@ static int sunxi_lcdc_get_clk_delay(const struct ctfb_res_modes *mode) return (delay > 30) ? 30 : delay; } -static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode) +static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode, + bool for_ext_vga_dac) { struct sunxi_lcdc_reg * const lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; @@ -719,6 +720,11 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode) val |= SUNXI_LCDC_TCON_HSYNC_MASK; if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT)) val |= SUNXI_LCDC_TCON_VSYNC_MASK; + +#ifdef CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH + if (for_ext_vga_dac) + val = 0; +#endif writel(val, &lcdc->tcon0_io_polarity); writel(0, &lcdc->tcon0_io_tristate); @@ -1015,7 +1021,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode, hitachi_tx18d42vm_init(); } sunxi_composer_mode_set(mode, address); - sunxi_lcdc_tcon0_mode_set(mode); + sunxi_lcdc_tcon0_mode_set(mode, false); sunxi_composer_enable(); sunxi_lcdc_enable(); #ifdef CONFIG_VIDEO_LCD_SSD2828 @@ -1033,7 +1039,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode, sunxi_vga_enable(); #elif defined CONFIG_VIDEO_VGA_VIA_LCD sunxi_composer_mode_set(mode, address); - sunxi_lcdc_tcon0_mode_set(mode); + sunxi_lcdc_tcon0_mode_set(mode, true); sunxi_composer_enable(); sunxi_lcdc_enable(); sunxi_vga_external_dac_enable(); -- cgit v0.10.2 From d133647af4d4fdaaf2dfb6a9e757c7aebd00a29e Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sun, 1 Feb 2015 00:27:05 +0200 Subject: sunxi: dram: Optionally use standard JEDEC timings for sun[457]i In addition to the current Android magic settings, allow to optionally use DDR3 timing parameters, which are tailored for different clock frequencies and JEDEC speed bins. This should improve reliability and performance. Adding '+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y' to the board defconfig allows to use timings, which are calculated for the DDR3-1066F speed bin. A lot of DDR3 chips, which are used in real Allwinner based devices, support DDR3-1066F speed bin timings. And adding '+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y' should work with any DDR3 chips, because this targets the slowest JEDEC speed bins. The vendor magic values are still used by default for DRAM, but board maintainers now have more flexibility in DRAM timings selection. Signed-off-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index adbd2b5..da4e8ba 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -55,6 +55,38 @@ config DRAM_EMR1 default 4 if MACH_SUN5I || MACH_SUN7I ---help--- Set the dram controller emr1 value. + +choice + prompt "sunxi dram timings" + default DRAM_TIMINGS_VENDOR_MAGIC + ---help--- + Select the timings of the DDR3 chips. + +config DRAM_TIMINGS_VENDOR_MAGIC + bool "Magic vendor timings from Android" + ---help--- + The same DRAM timings as in the Allwinner boot0 bootloader. + +config DRAM_TIMINGS_DDR3_1066F_1333H + bool "JEDEC DDR3-1333H with down binning to DDR3-1066F" + ---help--- + Use the timings of the standard JEDEC DDR3-1066F speed bin for + DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin + for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips + used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333 + or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm + that down binning to DDR3-1066F is supported (because DDR3-1066F + uses a bit faster timings than DDR3-1333H). + +config DRAM_TIMINGS_DDR3_800E_1066G_1333J + bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J" + ---help--- + Use the timings of the slowest possible JEDEC speed bin for the + selected DRAM_CLK. Depending on the DRAM_CLK value, it may be + DDR3-800E, DDR3-1066G or DDR3-1333J. + +endchoice + endif config SYS_CONFIG_NAME diff --git a/board/sunxi/dram_sun4i_auto.c b/board/sunxi/dram_sun4i_auto.c index 826bacf..ed54150 100644 --- a/board/sunxi/dram_sun4i_auto.c +++ b/board/sunxi/dram_sun4i_auto.c @@ -8,18 +8,22 @@ static struct dram_para dram_para = { .density = 0, .io_width = 0, .bus_width = 0, - .cas = 6, .zq = CONFIG_DRAM_ZQ, .odt_en = 0, .size = 0, +#ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC + .cas = 6, .tpr0 = 0x30926692, .tpr1 = 0x1090, .tpr2 = 0x1a0c8, + .emr2 = 0, +#else +# include "dram_timings_sun4i.h" +#endif .tpr3 = 0, .tpr4 = 0, .tpr5 = 0, .emr1 = CONFIG_DRAM_EMR1, - .emr2 = 0, .emr3 = 0, }; diff --git a/board/sunxi/dram_sun5i_auto.c b/board/sunxi/dram_sun5i_auto.c index e86b08e..bd9fd4b 100644 --- a/board/sunxi/dram_sun5i_auto.c +++ b/board/sunxi/dram_sun5i_auto.c @@ -10,18 +10,22 @@ static struct dram_para dram_para = { .density = 0, .io_width = 0, .bus_width = 0, - .cas = 9, .zq = CONFIG_DRAM_ZQ, .odt_en = 0, .size = 0, +#ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC + .cas = 9, .tpr0 = 0x42d899b7, .tpr1 = 0xa090, .tpr2 = 0x22a00, + .emr2 = 0x10, +#else +# include "dram_timings_sun4i.h" +#endif .tpr3 = 0, .tpr4 = 0, .tpr5 = 0, .emr1 = CONFIG_DRAM_EMR1, - .emr2 = 0x10, .emr3 = 0, }; diff --git a/board/sunxi/dram_timings_sun4i.h b/board/sunxi/dram_timings_sun4i.h new file mode 100644 index 0000000..29b934d --- /dev/null +++ b/board/sunxi/dram_timings_sun4i.h @@ -0,0 +1,205 @@ +/* This file is automatically generated, do not edit */ + +#if defined(CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H) +# if CONFIG_DRAM_CLK <= 360 /* DDR3-1066F @360MHz, timings: 6-5-5-14 */ + .cas = 6, + .tpr0 = 0x268e5590, + .tpr1 = 0xa090, + .tpr2 = 0x22a00, + .emr2 = 0x0, +# elif CONFIG_DRAM_CLK <= 384 /* DDR3-1066F @384MHz, timings: 6-6-6-15 */ + .cas = 6, + .tpr0 = 0x288f6690, + .tpr1 = 0xa0a0, + .tpr2 = 0x22a00, + .emr2 = 0x0, +# elif CONFIG_DRAM_CLK <= 396 /* DDR3-1066F @396MHz, timings: 6-6-6-15 */ + .cas = 6, + .tpr0 = 0x2a8f6690, + .tpr1 = 0xa0a0, + .tpr2 = 0x22a00, + .emr2 = 0x0, +# elif CONFIG_DRAM_CLK <= 408 /* DDR3-1066F @408MHz, timings: 7-6-6-16 */ + .cas = 7, + .tpr0 = 0x2ab06690, + .tpr1 = 0xa0a8, + .tpr2 = 0x22a00, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 432 /* DDR3-1066F @432MHz, timings: 7-6-6-17 */ + .cas = 7, + .tpr0 = 0x2cb16690, + .tpr1 = 0xa0b0, + .tpr2 = 0x22e00, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 456 /* DDR3-1066F @456MHz, timings: 7-6-6-18 */ + .cas = 7, + .tpr0 = 0x30b26690, + .tpr1 = 0xa0b8, + .tpr2 = 0x22e00, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 468 /* DDR3-1066F @468MHz, timings: 7-7-7-18 */ + .cas = 7, + .tpr0 = 0x30b27790, + .tpr1 = 0xa0c0, + .tpr2 = 0x23200, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 480 /* DDR3-1066F @480MHz, timings: 7-7-7-18 */ + .cas = 7, + .tpr0 = 0x32b27790, + .tpr1 = 0xa0c0, + .tpr2 = 0x23200, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 504 /* DDR3-1066F @504MHz, timings: 7-7-7-19 */ + .cas = 7, + .tpr0 = 0x34d37790, + .tpr1 = 0xa0d0, + .tpr2 = 0x23600, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 528 /* DDR3-1066F @528MHz, timings: 7-7-7-20 */ + .cas = 7, + .tpr0 = 0x36d47790, + .tpr1 = 0xa0d8, + .tpr2 = 0x23600, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 540 /* DDR3-1333H @540MHz, timings: 9-8-8-20 */ + .cas = 9, + .tpr0 = 0x36b488b4, + .tpr1 = 0xa0c8, + .tpr2 = 0x2b600, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 552 /* DDR3-1333H @552MHz, timings: 9-8-8-20 */ + .cas = 9, + .tpr0 = 0x38b488b4, + .tpr1 = 0xa0c8, + .tpr2 = 0x2ba00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 576 /* DDR3-1333H @576MHz, timings: 9-8-8-21 */ + .cas = 9, + .tpr0 = 0x3ab588b4, + .tpr1 = 0xa0d0, + .tpr2 = 0x2ba00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 600 /* DDR3-1333H @600MHz, timings: 9-9-9-22 */ + .cas = 9, + .tpr0 = 0x3cb699b4, + .tpr1 = 0xa0d8, + .tpr2 = 0x2be00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 624 /* DDR3-1333H @624MHz, timings: 9-9-9-23 */ + .cas = 9, + .tpr0 = 0x3eb799b4, + .tpr1 = 0xa0e8, + .tpr2 = 0x2be00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 648 /* DDR3-1333H @648MHz, timings: 9-9-9-24 */ + .cas = 9, + .tpr0 = 0x42b899b4, + .tpr1 = 0xa0f0, + .tpr2 = 0x2c200, + .emr2 = 0x10, +# else +# error CONFIG_DRAM_CLK is set too high +# endif +#elif defined(CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J) +# if CONFIG_DRAM_CLK <= 360 /* DDR3-800E @360MHz, timings: 6-6-6-14 */ + .cas = 6, + .tpr0 = 0x268e6690, + .tpr1 = 0xa090, + .tpr2 = 0x22a00, + .emr2 = 0x0, +# elif CONFIG_DRAM_CLK <= 384 /* DDR3-800E @384MHz, timings: 6-6-6-15 */ + .cas = 6, + .tpr0 = 0x2a8f6690, + .tpr1 = 0xa0a0, + .tpr2 = 0x22a00, + .emr2 = 0x0, +# elif CONFIG_DRAM_CLK <= 396 /* DDR3-800E @396MHz, timings: 6-6-6-15 */ + .cas = 6, + .tpr0 = 0x2a8f6690, + .tpr1 = 0xa0a0, + .tpr2 = 0x22a00, + .emr2 = 0x0, +# elif CONFIG_DRAM_CLK <= 408 /* DDR3-1066G @408MHz, timings: 8-7-7-16 */ + .cas = 8, + .tpr0 = 0x2cb07790, + .tpr1 = 0xa0a8, + .tpr2 = 0x22a00, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 432 /* DDR3-1066G @432MHz, timings: 8-7-7-17 */ + .cas = 8, + .tpr0 = 0x2eb17790, + .tpr1 = 0xa0b0, + .tpr2 = 0x22e00, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 456 /* DDR3-1066G @456MHz, timings: 8-7-7-18 */ + .cas = 8, + .tpr0 = 0x30b27790, + .tpr1 = 0xa0b8, + .tpr2 = 0x22e00, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 468 /* DDR3-1066G @468MHz, timings: 8-8-8-18 */ + .cas = 8, + .tpr0 = 0x32b28890, + .tpr1 = 0xa0c0, + .tpr2 = 0x23200, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 480 /* DDR3-1066G @480MHz, timings: 8-8-8-18 */ + .cas = 8, + .tpr0 = 0x34b28890, + .tpr1 = 0xa0c0, + .tpr2 = 0x23200, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 504 /* DDR3-1066G @504MHz, timings: 8-8-8-19 */ + .cas = 8, + .tpr0 = 0x36d38890, + .tpr1 = 0xa0d0, + .tpr2 = 0x23600, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 528 /* DDR3-1066G @528MHz, timings: 8-8-8-20 */ + .cas = 8, + .tpr0 = 0x38d48890, + .tpr1 = 0xa0d8, + .tpr2 = 0x23600, + .emr2 = 0x8, +# elif CONFIG_DRAM_CLK <= 540 /* DDR3-1333J @540MHz, timings: 10-9-9-20 */ + .cas = 10, + .tpr0 = 0x38b499b4, + .tpr1 = 0xa0c8, + .tpr2 = 0x2b600, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 552 /* DDR3-1333J @552MHz, timings: 10-9-9-20 */ + .cas = 10, + .tpr0 = 0x3ab499b4, + .tpr1 = 0xa0c8, + .tpr2 = 0x2ba00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 576 /* DDR3-1333J @576MHz, timings: 10-9-9-21 */ + .cas = 10, + .tpr0 = 0x3cb599b4, + .tpr1 = 0xa0d0, + .tpr2 = 0x2ba00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 600 /* DDR3-1333J @600MHz, timings: 10-9-9-22 */ + .cas = 10, + .tpr0 = 0x3eb699b4, + .tpr1 = 0xa0d8, + .tpr2 = 0x2be00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 624 /* DDR3-1333J @624MHz, timings: 10-10-10-23 */ + .cas = 10, + .tpr0 = 0x40b7aab4, + .tpr1 = 0xa0e8, + .tpr2 = 0x2be00, + .emr2 = 0x10, +# elif CONFIG_DRAM_CLK <= 648 /* DDR3-1333J @648MHz, timings: 10-10-10-24 */ + .cas = 10, + .tpr0 = 0x44b8aab4, + .tpr1 = 0xa0f0, + .tpr2 = 0x2c200, + .emr2 = 0x10, +# else +# error CONFIG_DRAM_CLK is set too high +# endif +#else +# error CONFIG_DRAM_TIMINGS_* is not defined +#endif -- cgit v0.10.2 From 47e3501a76894f4ba08bc61f33774bd5d39ff464 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sun, 1 Feb 2015 00:27:06 +0200 Subject: sunxi: dram: Support more sun[457]i dram parameters in Kconfig This patch allows to configure all the important DRAM parameters in Kconfig. Signed-off-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index da4e8ba..4a21589 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -41,6 +41,15 @@ config DRAM_CLK Set the dram clock speed, valid range 240 - 480, must be a multiple of 24. +if MACH_SUN5I || MACH_SUN7I +config DRAM_MBUS_CLK + int "sunxi mbus clock speed" + default 300 + ---help--- + Set the mbus clock speed. The maximum on sun5i hardware is 300MHz. + +endif + config DRAM_ZQ int "sunxi dram zq value" default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I @@ -56,6 +65,40 @@ config DRAM_EMR1 ---help--- Set the dram controller emr1 value. +config DRAM_ODT_EN + int "sunxi dram odt_en value" + default 0 + ---help--- + Set the dram controller odt_en parameter. This can be used to + enable/disable the ODT feature. + +config DRAM_TPR3 + hex "sunxi dram tpr3 value" + default 0 + ---help--- + Set the dram controller tpr3 parameter. This parameter configures + the delay on the command lane and also phase shifts, which are + applied for sampling incoming read data. The default value 0 + means that no phase/delay adjustments are necessary. Properly + configuring this parameter increases reliability at high DRAM + clock speeds. + +config DRAM_DQS_GATING_DELAY + hex "sunxi dram dqs_gating_delay value" + default 0 + ---help--- + Set the dram controller dqs_gating_delay parmeter. Each byte + encodes the DQS gating delay for each byte lane. The delay + granularity is 1/4 cycle. For example, the value 0x05060606 + means that the delay is 5 quarter-cycles for one lane (1.25 + cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes. + The default value 0 means autodetection. The results of hardware + autodetection are not very reliable and depend on the chip + temperature (sometimes producing different results on cold start + and warm reboot). But the accuracy of hardware autodetection + is usually good enough, unless running at really high DRAM + clocks speeds (up to 600MHz). If unsure, keep as 0. + choice prompt "sunxi dram timings" default DRAM_TIMINGS_VENDOR_MAGIC diff --git a/board/sunxi/dram_sun4i_auto.c b/board/sunxi/dram_sun4i_auto.c index ed54150..09e0c9a 100644 --- a/board/sunxi/dram_sun4i_auto.c +++ b/board/sunxi/dram_sun4i_auto.c @@ -9,7 +9,7 @@ static struct dram_para dram_para = { .io_width = 0, .bus_width = 0, .zq = CONFIG_DRAM_ZQ, - .odt_en = 0, + .odt_en = CONFIG_DRAM_ODT_EN, .size = 0, #ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC .cas = 6, @@ -19,12 +19,14 @@ static struct dram_para dram_para = { .emr2 = 0, #else # include "dram_timings_sun4i.h" + .active_windowing = 1, #endif - .tpr3 = 0, + .tpr3 = CONFIG_DRAM_TPR3, .tpr4 = 0, .tpr5 = 0, .emr1 = CONFIG_DRAM_EMR1, .emr3 = 0, + .dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY, }; unsigned long sunxi_dram_init(void) diff --git a/board/sunxi/dram_sun5i_auto.c b/board/sunxi/dram_sun5i_auto.c index bd9fd4b..e52d54c 100644 --- a/board/sunxi/dram_sun5i_auto.c +++ b/board/sunxi/dram_sun5i_auto.c @@ -5,13 +5,14 @@ static struct dram_para dram_para = { .clock = CONFIG_DRAM_CLK, + .mbus_clock = CONFIG_DRAM_MBUS_CLK, .type = 3, .rank_num = 1, .density = 0, .io_width = 0, .bus_width = 0, .zq = CONFIG_DRAM_ZQ, - .odt_en = 0, + .odt_en = CONFIG_DRAM_ODT_EN, .size = 0, #ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC .cas = 9, @@ -21,12 +22,14 @@ static struct dram_para dram_para = { .emr2 = 0x10, #else # include "dram_timings_sun4i.h" + .active_windowing = 1, #endif .tpr3 = 0, .tpr4 = 0, .tpr5 = 0, .emr1 = CONFIG_DRAM_EMR1, .emr3 = 0, + .dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY, }; unsigned long sunxi_dram_init(void) -- cgit v0.10.2 From 5abdb156bb5c2685744be3620c4bdb1875bd81ce Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sun, 1 Feb 2015 00:42:14 +0200 Subject: sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka Acked-by: Hans de Goede Signed-off-by: Hans de Goede diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 5104795..ebfec7c 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -215,7 +215,7 @@ static int mmc_config_clock(struct mmc *mmc) return 0; } -static void mmc_set_ios(struct mmc *mmc) +static void sunxi_mmc_set_ios(struct mmc *mmc) { struct sunxi_mmc_host *mmchost = mmc->priv; @@ -237,7 +237,7 @@ static void mmc_set_ios(struct mmc *mmc) writel(0x0, &mmchost->reg->width); } -static int mmc_core_init(struct mmc *mmc) +static int sunxi_mmc_core_init(struct mmc *mmc) { struct sunxi_mmc_host *mmchost = mmc->priv; @@ -298,8 +298,8 @@ static int mmc_rint_wait(struct mmc *mmc, unsigned int timeout_msecs, return 0; } -static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) +static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) { struct sunxi_mmc_host *mmchost = mmc->priv; unsigned int cmdval = SUNXI_MMC_CMD_START; @@ -432,9 +432,9 @@ static int sunxi_mmc_getcd(struct mmc *mmc) } static const struct mmc_ops sunxi_mmc_ops = { - .send_cmd = mmc_send_cmd, - .set_ios = mmc_set_ios, - .init = mmc_core_init, + .send_cmd = sunxi_mmc_send_cmd, + .set_ios = sunxi_mmc_set_ios, + .init = sunxi_mmc_core_init, .getcd = sunxi_mmc_getcd, }; -- cgit v0.10.2