From 5df825d4902ba402c5bd53044a88ce039a724558 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 11:23:32 +0100 Subject: ARM: zynq: Remove PHYLIB from config to defconfig Move PHYLIB from board config to defconfig Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 3bf17cf..0608d8a 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 600ca8b..d6f0ce3 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -8,3 +8,4 @@ CONFIG_SPL=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index e3c1e23..8318b94 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -14,4 +14,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index eaf15f2..533aff9 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 381ace8..689d19e 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -17,5 +17,6 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 49dd025..c7125c3 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -12,3 +12,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index d505943..a8f28da 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -10,3 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index c2ae2ab..6b2fd8c 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -12,3 +12,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index f603bb3..4076c30 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 1227b7a..c51049e 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index fa83ac7..a9e6bf0 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -50,7 +50,6 @@ # define CONFIG_ZYNQ_GEM # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_PHYLIB # define CONFIG_PHY_MARVELL # define CONFIG_BOOTP_SERVERIP # define CONFIG_BOOTP_BOOTPATH -- cgit v0.10.2 From 3cbbc2574bd9440d4e2bda4addb8aae75cf72b2d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 15:46:12 +0100 Subject: ARM: zynq: Remove CONFIG_API CONFIG_API is causing compilation error when DM_ETH is enabled because eth_get_dev() is not available. Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index a9e6bf0..5db5011 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -297,7 +297,6 @@ /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) -# define CONFIG_API # define CONFIG_SYS_MMC_MAX_DEVICE 1 #endif -- cgit v0.10.2 From b904725a112f7b7a1b5d657541d77dc8fa1a1615 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 13:38:32 +0100 Subject: net: gem: Do not continue if phy is not found Add return value for phy detection algorithm to stop init function when phy is not found. Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 858093f..1a5a366 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -241,7 +241,7 @@ static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); } -static void phy_detection(struct eth_device *dev) +static int phy_detection(struct eth_device *dev) { int i; u16 phyreg; @@ -254,7 +254,7 @@ static void phy_detection(struct eth_device *dev) /* Found a valid PHY address */ debug("Default phy address %d is valid\n", priv->phyaddr); - return; + return 0; } else { debug("PHY address is not setup correctly %d\n", priv->phyaddr); @@ -272,11 +272,12 @@ static void phy_detection(struct eth_device *dev) /* Found a valid PHY address */ priv->phyaddr = i; debug("Found valid phy address, %d\n", i); - return; + return 0; } } } printf("PHY is not detected\n"); + return -1; } static int zynq_gem_setup_mac(struct eth_device *dev) @@ -310,6 +311,7 @@ static int zynq_gem_setup_mac(struct eth_device *dev) static int zynq_gem_init(struct eth_device *dev, bd_t * bis) { u32 i; + int ret; unsigned long clk_rate = 0; struct phy_device *phydev; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; @@ -384,7 +386,11 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) priv->init++; } - phy_detection(dev); + ret = phy_detection(dev); + if (ret) { + printf("GEM PHY init failed\n"); + return ret; + } /* interface - look at tsec */ phydev = phy_connect(priv->bus, priv->phyaddr, dev, -- cgit v0.10.2 From 3fac27243c1ee4bdf903bac031e522f97e27ef44 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 10:09:43 +0100 Subject: net: gem: Change mdio_wait prototype to pass regs Pass regs instead of dev because this will be chagned by driver model. Signed-off-by: Michal Simek diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 1a5a366..7f801d5 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -172,9 +172,8 @@ struct zynq_gem_priv { struct mii_dev *bus; }; -static inline int mdio_wait(struct eth_device *dev) +static inline int mdio_wait(struct zynq_gem_regs *regs) { - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; u32 timeout = 20000; /* Wait till MDIO interface is ready to accept a new transaction. */ @@ -198,7 +197,7 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, u32 mgtcr; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; - if (mdio_wait(dev)) + if (mdio_wait(regs)) return 1; /* Construct mgtcr mask for the operation */ @@ -209,7 +208,7 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, /* Write mgtcr and wait for completion */ writel(mgtcr, ®s->phymntnc); - if (mdio_wait(dev)) + if (mdio_wait(regs)) return 1; if (op == ZYNQ_GEM_PHYMNTNC_OP_R_MASK) -- cgit v0.10.2 From f2fc27684f4d1f4e0395fcb90a8e5451aeabc2b8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 10:24:15 +0100 Subject: net: gem: Change mii function not to use eth_device structure Next step to move driver to driver model. Do not use eth_device structure. Use private structure instead. Add iobase to private structure to store gem iobase. Signed-off-by: Michal Simek diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 7f801d5..65ea5de 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -167,6 +167,7 @@ struct zynq_gem_priv { int phyaddr; u32 emio; int init; + struct zynq_gem_regs *iobase; phy_interface_t interface; struct phy_device *phydev; struct mii_dev *bus; @@ -191,11 +192,11 @@ static inline int mdio_wait(struct zynq_gem_regs *regs) return 0; } -static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, - u32 op, u16 *data) +static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, + u32 op, u16 *data) { u32 mgtcr; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_regs *regs = priv->iobase; if (mdio_wait(regs)) return 1; @@ -217,12 +218,13 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, return 0; } -static u32 phyread(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 *val) +static u32 phyread(struct zynq_gem_priv *priv, u32 phy_addr, + u32 regnum, u16 *val) { u32 ret; - ret = phy_setup_op(dev, phy_addr, regnum, - ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val); + ret = phy_setup_op(priv, phy_addr, regnum, + ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val); if (!ret) debug("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__, @@ -231,13 +233,14 @@ static u32 phyread(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 *val) return ret; } -static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) +static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr, + u32 regnum, u16 data) { debug("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr, regnum, data); - return phy_setup_op(dev, phy_addr, regnum, - ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); + return phy_setup_op(priv, phy_addr, regnum, + ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); } static int phy_detection(struct eth_device *dev) @@ -247,7 +250,7 @@ static int phy_detection(struct eth_device *dev) struct zynq_gem_priv *priv = dev->priv; if (priv->phyaddr != -1) { - phyread(dev, priv->phyaddr, PHY_DETECT_REG, &phyreg); + phyread(priv, priv->phyaddr, PHY_DETECT_REG, &phyreg); if ((phyreg != 0xFFFF) && ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { /* Found a valid PHY address */ @@ -265,7 +268,7 @@ static int phy_detection(struct eth_device *dev) if (priv->phyaddr == -1) { /* detect the PHY address */ for (i = 31; i >= 0; i--) { - phyread(dev, i, PHY_DETECT_REG, &phyreg); + phyread(priv, i, PHY_DETECT_REG, &phyreg); if ((phyreg != 0xFFFF) && ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { /* Found a valid PHY address */ @@ -561,9 +564,10 @@ static int zynq_gem_miiphyread(const char *devname, uchar addr, uchar reg, ushort *val) { struct eth_device *dev = eth_get_dev(); + struct zynq_gem_priv *priv = dev->priv; int ret; - ret = phyread(dev, addr, reg, val); + ret = phyread(priv, addr, reg, val); debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, *val); return ret; } @@ -572,9 +576,10 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val) { struct eth_device *dev = eth_get_dev(); + struct zynq_gem_priv *priv = dev->priv; debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val); - return phywrite(dev, addr, reg, val); + return phywrite(priv, addr, reg, val); } int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, @@ -620,6 +625,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, sprintf(dev->name, "Gem.%lx", base_addr); dev->iobase = base_addr; + priv->iobase = (struct zynq_gem_regs *)base_addr; dev->init = zynq_gem_init; dev->halt = zynq_gem_halt; -- cgit v0.10.2 From 64a7ead64bdb965c648df1fc34143e203b1d979a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 13:44:49 +0100 Subject: net: gem: Remove phydev variable Resort code to use priv->phydev variable directly. It will simplify move to DM. Signed-off-by: Michal Simek diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 65ea5de..8f3fe91 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -315,7 +315,6 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) u32 i; int ret; unsigned long clk_rate = 0; - struct phy_device *phydev; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; struct zynq_gem_priv *priv = dev->priv; struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; @@ -394,23 +393,21 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) return ret; } - /* interface - look at tsec */ - phydev = phy_connect(priv->bus, priv->phyaddr, dev, - priv->interface); + priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, + priv->interface); - phydev->supported = supported | ADVERTISED_Pause | - ADVERTISED_Asym_Pause; - phydev->advertising = phydev->supported; - priv->phydev = phydev; - phy_config(phydev); - phy_startup(phydev); + priv->phydev->supported = supported | ADVERTISED_Pause | + ADVERTISED_Asym_Pause; + priv->phydev->advertising = priv->phydev->supported; + phy_config(priv->phydev); + phy_startup(priv->phydev); - if (!phydev->link) { - printf("%s: No link.\n", phydev->dev->name); + if (!priv->phydev->link) { + printf("%s: No link.\n", priv->phydev->dev->name); return -1; } - switch (phydev->speed) { + switch (priv->phydev->speed) { case SPEED_1000: writel(ZYNQ_GEM_NWCFG_INIT | ZYNQ_GEM_NWCFG_SPEED1000, ®s->nwcfg); -- cgit v0.10.2 From 68cc3bd8b2863667513008c975cc69187855317f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 13:54:43 +0100 Subject: net: gem: Extract phy init code Move phy init code out of zynq_gem_init. DM drivers are normally calling this code from probe function. Signed-off-by: Michal Simek diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 8f3fe91..86bb759 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -310,15 +310,10 @@ static int zynq_gem_setup_mac(struct eth_device *dev) return 0; } -static int zynq_gem_init(struct eth_device *dev, bd_t * bis) +static int zynq_phy_init(struct eth_device *dev) { - u32 i; int ret; - unsigned long clk_rate = 0; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; struct zynq_gem_priv *priv = dev->priv; - struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; - struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2]; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | @@ -326,6 +321,33 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; + ret = phy_detection(dev); + if (ret) { + printf("GEM PHY init failed\n"); + return ret; + } + + priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, + priv->interface); + + priv->phydev->supported = supported | ADVERTISED_Pause | + ADVERTISED_Asym_Pause; + priv->phydev->advertising = priv->phydev->supported; + phy_config(priv->phydev); + + return 0; +} + +static int zynq_gem_init(struct eth_device *dev, bd_t *bis) +{ + u32 i; + int ret; + unsigned long clk_rate = 0; + struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev->priv; + struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; + struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2]; + if (!priv->init) { /* Disable all interrupts */ writel(0xFFFFFFFF, ®s->idr); @@ -387,19 +409,10 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) priv->init++; } - ret = phy_detection(dev); - if (ret) { - printf("GEM PHY init failed\n"); + ret = zynq_phy_init(dev); + if (ret) return ret; - } - - priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, - priv->interface); - priv->phydev->supported = supported | ADVERTISED_Pause | - ADVERTISED_Asym_Pause; - priv->phydev->advertising = priv->phydev->supported; - phy_config(priv->phydev); phy_startup(priv->phydev); if (!priv->phydev->link) { -- cgit v0.10.2 From 90c6f2e21bb980e5544b1339e7ef7038bc872968 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 14:03:37 +0100 Subject: net: gem: Check if priv->phydev is valid Check return value. Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 86bb759..d5540ec 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -329,6 +329,8 @@ static int zynq_phy_init(struct eth_device *dev) priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); + if (!priv->phydev) + return -ENODEV; priv->phydev->supported = supported | ADVERTISED_Pause | ADVERTISED_Asym_Pause; -- cgit v0.10.2 From c8e29271b1a45ec87386857b506cfd918d9a4ad2 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 13:58:36 +0100 Subject: net: gem: Enable MDIO bus earlier Enable access to MDIO before zynq_gem_init is called. It enables read information about phy earlier. Signed-off-by: Michal Simek diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index d5540ec..9ce1221 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -314,6 +314,7 @@ static int zynq_phy_init(struct eth_device *dev) { int ret; struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | @@ -321,6 +322,9 @@ static int zynq_phy_init(struct eth_device *dev) SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; + /* Enable only MDIO bus */ + writel(ZYNQ_GEM_NWCTRL_MDEN_MASK, ®s->nwctrl); + ret = phy_detection(dev); if (ret) { printf("GEM PHY init failed\n"); @@ -343,7 +347,6 @@ static int zynq_phy_init(struct eth_device *dev) static int zynq_gem_init(struct eth_device *dev, bd_t *bis) { u32 i; - int ret; unsigned long clk_rate = 0; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; struct zynq_gem_priv *priv = dev->priv; @@ -411,10 +414,6 @@ static int zynq_gem_init(struct eth_device *dev, bd_t *bis) priv->init++; } - ret = zynq_phy_init(dev); - if (ret) - return ret; - phy_startup(priv->phydev); if (!priv->phydev->link) { @@ -597,6 +596,7 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr, int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, int phy_addr, u32 emio) { + int ret; struct eth_device *dev; struct zynq_gem_priv *priv; void *bd_space; @@ -650,6 +650,10 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, miiphy_register(dev->name, zynq_gem_miiphyread, zynq_gem_miiphy_write); priv->bus = miiphy_get_dev_by_name(dev->name); + ret = zynq_phy_init(dev); + if (ret) + return ret; + return 1; } -- cgit v0.10.2 From 687d73126361b45f77f977301d141771babd02c0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 14:00:20 +0100 Subject: net: gem: Remove zynq_gem_of_init() This function was used for OF init before DM. Remove this function as the part of move to DM. Signed-off-by: Michal Simek Reviewed-by: Simon Glass Reviewed-by: Jagan Teki diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 9ce1221..a569c77 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -13,8 +13,6 @@ #include #include #include -#include -#include #include #include #include @@ -656,43 +654,3 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, return 1; } - -#if CONFIG_IS_ENABLED(OF_CONTROL) -int zynq_gem_of_init(const void *blob) -{ - int offset = 0; - u32 ret = 0; - u32 reg, phy_reg; - - debug("ZYNQ GEM: Initialization\n"); - - do { - offset = fdt_node_offset_by_compatible(blob, offset, - "xlnx,ps7-ethernet-1.00.a"); - if (offset != -1) { - reg = fdtdec_get_addr(blob, offset, "reg"); - if (reg != FDT_ADDR_T_NONE) { - offset = fdtdec_lookup_phandle(blob, offset, - "phy-handle"); - if (offset != -1) - phy_reg = fdtdec_get_addr(blob, offset, - "reg"); - else - phy_reg = 0; - - debug("ZYNQ GEM: addr %x, phyaddr %x\n", - reg, phy_reg); - - ret |= zynq_gem_initialize(NULL, reg, - phy_reg, 0); - - } else { - debug("ZYNQ GEM: Can't get base address\n"); - return -1; - } - } - } while (offset != -1); - - return ret; -} -#endif diff --git a/include/netdev.h b/include/netdev.h index 28eab46..5c6ae5b 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -87,7 +87,6 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); -int zynq_gem_of_init(const void *blob); int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, int phy_addr, u32 emio); /* -- cgit v0.10.2 From 5a9284f7f503f21c0f231b96d62747662080050d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 14:14:37 +0100 Subject: net: gem: Fix miiphy_read name Sync it with write function. Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index a569c77..4e93707 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -569,7 +569,7 @@ static void zynq_gem_halt(struct eth_device *dev) ZYNQ_GEM_NWCTRL_TXEN_MASK, 0); } -static int zynq_gem_miiphyread(const char *devname, uchar addr, +static int zynq_gem_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val) { struct eth_device *dev = eth_get_dev(); @@ -645,7 +645,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, eth_register(dev); - miiphy_register(dev->name, zynq_gem_miiphyread, zynq_gem_miiphy_write); + miiphy_register(dev->name, zynq_gem_miiphy_read, zynq_gem_miiphy_write); priv->bus = miiphy_get_dev_by_name(dev->name); ret = zynq_phy_init(dev); -- cgit v0.10.2 From 6889ca7198f68691ddd7923268040eb7f4e6d3ff Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 14:14:56 +0100 Subject: net: gem: Move driver to DM - Enable DM_ETH by default for Zynq and ZynqMP - Remove board_eth_init code - Change miiphy_read function to return value instead of error code based on DM requirement - Do not enable EMIO DT support by default Signed-off-by: Michal Simek Reviewed-by: Jagan Teki Reviewed-by: Simon Glass Reviewed-by: Bin Meng diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 408e4ff..67d4fd5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -551,6 +551,7 @@ config ARCH_ZYNQ select OF_CONTROL select SPL_OF_CONTROL select DM + select DM_ETH select SPL_DM select DM_SPI select DM_SERIAL @@ -562,6 +563,7 @@ config ARCH_ZYNQMP select ARM64 select DM select OF_CONTROL + select DM_ETH select DM_SERIAL config TEGRA diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 237f2c2..572b146 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -119,19 +119,6 @@ int board_eth_init(bd_t *bis) ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, txpp, rxpp); #endif - -#if defined(CONFIG_ZYNQ_GEM) -# if defined(CONFIG_ZYNQ_GEM0) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0, - CONFIG_ZYNQ_GEM_PHY_ADDR0, - CONFIG_ZYNQ_GEM_EMIO0); -# endif -# if defined(CONFIG_ZYNQ_GEM1) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1, - CONFIG_ZYNQ_GEM_PHY_ADDR1, - CONFIG_ZYNQ_GEM_EMIO1); -# endif -#endif return ret; } diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index d105bb4..51dc30f 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -65,31 +65,6 @@ void scsi_init(void) } #endif -int board_eth_init(bd_t *bis) -{ - u32 ret = 0; - -#if defined(CONFIG_ZYNQ_GEM) -# if defined(CONFIG_ZYNQ_GEM0) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0, - CONFIG_ZYNQ_GEM_PHY_ADDR0, 0); -# endif -# if defined(CONFIG_ZYNQ_GEM1) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1, - CONFIG_ZYNQ_GEM_PHY_ADDR1, 0); -# endif -# if defined(CONFIG_ZYNQ_GEM2) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR2, - CONFIG_ZYNQ_GEM_PHY_ADDR2, 0); -# endif -# if defined(CONFIG_ZYNQ_GEM3) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR3, - CONFIG_ZYNQ_GEM_PHY_ADDR3, 0); -# endif -#endif - return ret; -} - #ifdef CONFIG_CMD_MMC int board_mmc_init(bd_t *bd) { diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 4e93707..9e8616e 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include @@ -23,6 +24,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_PHYLIB) # error XILINX_GEM_ETHERNET requires PHYLIB #endif @@ -241,7 +244,7 @@ static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr, ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); } -static int phy_detection(struct eth_device *dev) +static int phy_detection(struct udevice *dev) { int i; u16 phyreg; @@ -280,20 +283,22 @@ static int phy_detection(struct eth_device *dev) return -1; } -static int zynq_gem_setup_mac(struct eth_device *dev) +static int zynq_gem_setup_mac(struct udevice *dev) { u32 i, macaddrlow, macaddrhigh; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct eth_pdata *pdata = dev_get_platdata(dev); + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; /* Set the MAC bits [31:0] in BOT */ - macaddrlow = dev->enetaddr[0]; - macaddrlow |= dev->enetaddr[1] << 8; - macaddrlow |= dev->enetaddr[2] << 16; - macaddrlow |= dev->enetaddr[3] << 24; + macaddrlow = pdata->enetaddr[0]; + macaddrlow |= pdata->enetaddr[1] << 8; + macaddrlow |= pdata->enetaddr[2] << 16; + macaddrlow |= pdata->enetaddr[3] << 24; /* Set MAC bits [47:32] in TOP */ - macaddrhigh = dev->enetaddr[4]; - macaddrhigh |= dev->enetaddr[5] << 8; + macaddrhigh = pdata->enetaddr[4]; + macaddrhigh |= pdata->enetaddr[5] << 8; for (i = 0; i < 4; i++) { writel(0, ®s->laddr[i][LADDR_LOW]); @@ -308,11 +313,11 @@ static int zynq_gem_setup_mac(struct eth_device *dev) return 0; } -static int zynq_phy_init(struct eth_device *dev) +static int zynq_phy_init(struct udevice *dev) { int ret; - struct zynq_gem_priv *priv = dev->priv; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | @@ -342,12 +347,12 @@ static int zynq_phy_init(struct eth_device *dev) return 0; } -static int zynq_gem_init(struct eth_device *dev, bd_t *bis) +static int zynq_gem_init(struct udevice *dev) { u32 i; unsigned long clk_rate = 0; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2]; @@ -437,7 +442,7 @@ static int zynq_gem_init(struct eth_device *dev, bd_t *bis) /* Change the rclk and clk only not using EMIO interface */ if (!priv->emio) - zynq_slcr_gem_clk_setup(dev->iobase != + zynq_slcr_gem_clk_setup((ulong)priv->iobase != ZYNQ_GEM_BASEADDR0, clk_rate); setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | @@ -473,11 +478,11 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, return -ETIMEDOUT; } -static int zynq_gem_send(struct eth_device *dev, void *ptr, int len) +static int zynq_gem_send(struct udevice *dev, void *ptr, int len) { u32 addr, size; - struct zynq_gem_priv *priv = dev->priv; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *current_bd = &priv->tx_bd[1]; /* Setup Tx BD */ @@ -518,10 +523,10 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len) } /* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */ -static int zynq_gem_recv(struct eth_device *dev) +static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp) { int frame_len; - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = dev_get_priv(dev); struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current]; struct emac_bd *first_bd; @@ -561,54 +566,41 @@ static int zynq_gem_recv(struct eth_device *dev) return frame_len; } -static void zynq_gem_halt(struct eth_device *dev) +static void zynq_gem_halt(struct udevice *dev) { - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; clrsetbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK, 0); } -static int zynq_gem_miiphy_read(const char *devname, uchar addr, - uchar reg, ushort *val) +static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr, + int devad, int reg) { - struct eth_device *dev = eth_get_dev(); - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = bus->priv; int ret; + u16 val; - ret = phyread(priv, addr, reg, val); - debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, *val); - return ret; + ret = phyread(priv, addr, reg, &val); + debug("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret); + return val; } -static int zynq_gem_miiphy_write(const char *devname, uchar addr, - uchar reg, ushort val) +static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) { - struct eth_device *dev = eth_get_dev(); - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = bus->priv; - debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val); - return phywrite(priv, addr, reg, val); + debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, value); + return phywrite(priv, addr, reg, value); } -int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, - int phy_addr, u32 emio) +static int zynq_gem_probe(struct udevice *dev) { - int ret; - struct eth_device *dev; - struct zynq_gem_priv *priv; void *bd_space; - - dev = calloc(1, sizeof(*dev)); - if (dev == NULL) - return -1; - - dev->priv = calloc(1, sizeof(struct zynq_gem_priv)); - if (dev->priv == NULL) { - free(dev); - return -1; - } - priv = dev->priv; + struct zynq_gem_priv *priv = dev_get_priv(dev); + int ret; /* Align rxbuffers to ARCH_DMA_MINALIGN */ priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); @@ -623,8 +615,11 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->tx_bd = (struct emac_bd *)bd_space; priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE); - priv->phyaddr = phy_addr; - priv->emio = emio; + priv->bus = mdio_alloc(); + priv->bus->read = zynq_gem_miiphy_read; + priv->bus->write = zynq_gem_miiphy_write; + priv->bus->priv = priv; + strcpy(priv->bus->name, "gem"); #ifndef CONFIG_ZYNQ_GEM_INTERFACE priv->interface = PHY_INTERFACE_MODE_MII; @@ -632,25 +627,71 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->interface = CONFIG_ZYNQ_GEM_INTERFACE; #endif - sprintf(dev->name, "Gem.%lx", base_addr); + ret = mdio_register(priv->bus); + if (ret) + return ret; - dev->iobase = base_addr; - priv->iobase = (struct zynq_gem_regs *)base_addr; + zynq_phy_init(dev); - dev->init = zynq_gem_init; - dev->halt = zynq_gem_halt; - dev->send = zynq_gem_send; - dev->recv = zynq_gem_recv; - dev->write_hwaddr = zynq_gem_setup_mac; + return 0; +} - eth_register(dev); +static int zynq_gem_remove(struct udevice *dev) +{ + struct zynq_gem_priv *priv = dev_get_priv(dev); - miiphy_register(dev->name, zynq_gem_miiphy_read, zynq_gem_miiphy_write); - priv->bus = miiphy_get_dev_by_name(dev->name); + free(priv->phydev); + mdio_unregister(priv->bus); + mdio_free(priv->bus); - ret = zynq_phy_init(dev); - if (ret) - return ret; + return 0; +} + +static const struct eth_ops zynq_gem_ops = { + .start = zynq_gem_init, + .send = zynq_gem_send, + .recv = zynq_gem_recv, + .stop = zynq_gem_halt, + .write_hwaddr = zynq_gem_setup_mac, +}; - return 1; +static int zynq_gem_ofdata_to_platdata(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct zynq_gem_priv *priv = dev_get_priv(dev); + int offset = 0; + + pdata->iobase = (phys_addr_t)dev_get_addr(dev); + priv->iobase = (struct zynq_gem_regs *)pdata->iobase; + /* Hardcode for now */ + priv->emio = 0; + + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset, + "phy-handle"); + if (offset > 0) + priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); + + printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase, + priv->phyaddr); + + return 0; } + +static const struct udevice_id zynq_gem_ids[] = { + { .compatible = "cdns,zynqmp-gem" }, + { .compatible = "cdns,zynq-gem" }, + { .compatible = "cdns,gem" }, + { } +}; + +U_BOOT_DRIVER(zynq_gem) = { + .name = "zynq_gem", + .id = UCLASS_ETH, + .of_match = zynq_gem_ids, + .ofdata_to_platdata = zynq_gem_ofdata_to_platdata, + .probe = zynq_gem_probe, + .remove = zynq_gem_remove, + .ops = &zynq_gem_ops, + .priv_auto_alloc_size = sizeof(struct zynq_gem_priv), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 5db5011..faff0e9 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -56,12 +56,6 @@ # define CONFIG_BOOTP_GATEWAY # define CONFIG_BOOTP_HOSTNAME # define CONFIG_BOOTP_MAY_FAIL -# if !defined(CONFIG_ZYNQ_GEM_EMIO0) -# define CONFIG_ZYNQ_GEM_EMIO0 0 -# endif -# if !defined(CONFIG_ZYNQ_GEM_EMIO1) -# define CONFIG_ZYNQ_GEM_EMIO1 0 -# endif #endif /* SPI */ diff --git a/include/netdev.h b/include/netdev.h index 5c6ae5b..de74b9a 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -87,8 +87,6 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); -int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, - int phy_addr, u32 emio); /* * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface * exported by a public hader file, we need a global definition at this point. -- cgit v0.10.2 From 3cdb1450deb236184f0c673f6ea0ad993c285ad2 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 14:17:50 +0100 Subject: net: gem: Read information about interface from DT Do not set interface via configs. Read information from DT. Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 9e8616e..0ee909c 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -621,12 +621,6 @@ static int zynq_gem_probe(struct udevice *dev) priv->bus->priv = priv; strcpy(priv->bus->name, "gem"); -#ifndef CONFIG_ZYNQ_GEM_INTERFACE - priv->interface = PHY_INTERFACE_MODE_MII; -#else - priv->interface = CONFIG_ZYNQ_GEM_INTERFACE; -#endif - ret = mdio_register(priv->bus); if (ret) return ret; @@ -660,6 +654,7 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); struct zynq_gem_priv *priv = dev_get_priv(dev); int offset = 0; + const char *phy_mode; pdata->iobase = (phys_addr_t)dev_get_addr(dev); priv->iobase = (struct zynq_gem_regs *)pdata->iobase; @@ -671,8 +666,17 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) if (offset > 0) priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); - printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase, - priv->phyaddr); + phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + priv->interface = pdata->phy_interface; + + printf("ZYNQ GEM: %lx, phyaddr %d, interface %s\n", (ulong)priv->iobase, + priv->phyaddr, phy_string_for_interface(priv->interface)); return 0; } -- cgit v0.10.2 From 596e5782e7bdec7ed275b1204122364a3ab4fbf7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 14:34:52 +0100 Subject: net: gem: Move gem to Kconfig Signed-off-by: Michal Simek Reviewed-by: Jagan Teki diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 79304c1..22915f1 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -22,4 +22,5 @@ CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ZYNQ_GEM=y # CONFIG_REGEX is not set diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 0608d8a..c68efc8 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index d6f0ce3..62eb79f 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -9,3 +9,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 8318b94..dd588af 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 533aff9..2e525b4 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 689d19e..6f2ad17 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -18,5 +18,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index c7125c3..d20b3ed 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -13,3 +13,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index a8f28da..4e963a4 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -11,3 +11,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 6b2fd8c..f2d8f14 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -13,3 +13,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 4076c30..2e7c68d 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index c51049e..6f0bd0b 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index a03a95d..6905cc0 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -101,4 +101,10 @@ config PCH_GBE This MAC is present in Intel Platform Controller Hub EG20T. It supports 10/100/1000 Mbps operation. +config ZYNQ_GEM + depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) + bool "Xilinx Ethernet GEM" + help + This MAC is presetn in Xilinx Zynq and ZynqMP SoCs. + endif # NETDEVICES diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 6b8b9f8..a8aa952 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -176,10 +176,8 @@ #define CONFIG_SYS_MAXARGS 64 /* Ethernet driver */ -#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \ - defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3) +#if defined(CONFIG_ZYNQ_GEM) # define CONFIG_NET_MULTI -# define CONFIG_ZYNQ_GEM # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_PHYLIB diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index 8bdb5c9..e9b904b 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -15,9 +15,6 @@ #ifndef __CONFIG_ZYNQMP_EP_H #define __CONFIG_ZYNQMP_EP_H -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 - #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 #define CONFIG_ZYNQ_I2C0 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index faff0e9..d3d5470 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -46,8 +46,7 @@ #define CONFIG_ZYNQ_GPIO /* Ethernet driver */ -#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) -# define CONFIG_ZYNQ_GEM +#if defined(CONFIG_ZYNQ_GEM) # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_PHY_MARVELL diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h index b5ffafb..169ee36 100644 --- a/include/configs/zynq_microzed.h +++ b/include/configs/zynq_microzed.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_SDHCI0 diff --git a/include/configs/zynq_picozed.h b/include/configs/zynq_picozed.h index ffc73bd..47fad66 100644 --- a/include/configs/zynq_picozed.h +++ b/include/configs/zynq_picozed.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_SDHCI1 diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 468a6bc..c52a655 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 - #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_SDHCI0 diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index dbc829e..32ea1f3 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_NO_FLASH #if defined(CONFIG_ZC770_XM010) -# define CONFIG_ZYNQ_GEM0 -# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 # define CONFIG_ZYNQ_SDHCI0 #elif defined(CONFIG_ZC770_XM011) @@ -25,8 +23,6 @@ # undef CONFIG_SYS_NO_FLASH #elif defined(CONFIG_ZC770_XM013) -# define CONFIG_ZYNQ_GEM1 -# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 #endif diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 6ec6117..1488bfe 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_USB diff --git a/include/configs/zynq_zybo.h b/include/configs/zynq_zybo.h index e2270cd..5d1a9d5 100644 --- a/include/configs/zynq_zybo.h +++ b/include/configs/zynq_zybo.h @@ -13,9 +13,6 @@ #define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_SDHCI0 -- cgit v0.10.2 From b8de29feaee2a26e4a72800ed17994c9312f1735 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 24 Sep 2015 20:13:45 +0200 Subject: net: gem: Enable CTRL+C in wait_for_bit Enable to break waiting loop at any time. Signed-off-by: Michal Simek Acked-by: Joe Hershberger diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 0ee909c..0a41281 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -469,6 +470,11 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, if (get_timer(start) > timeout) break; + if (ctrlc()) { + puts("Abort\n"); + return -EINTR; + } + udelay(1); } -- cgit v0.10.2 From a7159e204b83371545e1864d2a714c8ba0181c56 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 20 Nov 2015 10:13:25 +0100 Subject: ARM64: zynqmp: Enable FIT config option via Kconfig Remove configuration options from board file. Signed-off-by: Michal Simek diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 22915f1..dd2a9ed 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_IMLS is not set diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index a8aa952..1546e8b 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -214,9 +214,6 @@ #define CONFIG_CMD_SCSI #endif -#define CONFIG_FIT -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ - #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) #define CONFIG_CMD_BOOTI -- cgit v0.10.2 From e92fc6df7ab1e3389225cca0102995942e010b43 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 1 Dec 2015 08:41:17 +0100 Subject: ARM: zynq: Enable debug console for zc702 Signed-off-by: Michal Simek diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index dd588af..5261b73 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -16,4 +16,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_QSPI=y -- cgit v0.10.2 From 83b6464daa017eb142370f537e58f19e8d9f6e53 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 23 Nov 2015 16:27:38 +0100 Subject: ARM: zynq: Fix location of stack and malloc areas The patch "board_init: Change the logic to setup malloc_base" (sha1: 9ac4fc82071ce346e3885118242ff45d22f69b82) breaks SPL for Zynq because it puts early alloc area on the stack which caused that stack was decreased by CONFIG_SYS_MALLOC_F_LEN (0x400) and there was not enough space for regular stack. This patch changes memory layout to better utilize the last 64k OCM block. 0xffff0000 - 0xfff1000 - Full malloc space 0xffff1000 - 0xffff300 - Stack location 0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space 0xfffffd00 - sizeof(GD) - GD 0xfffffe00 - 0xffffffff - SoC specific boot code Signed-off-by: Michal Simek Tested-by: Moritz Fischer diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index d3d5470..d499656 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -367,17 +367,17 @@ /* The highest 64k OCM address */ #define OCM_HIGH_ADDR 0xffff0000 -/* Just define any reasonable size */ -#define CONFIG_SPL_STACK_SIZE 0x1000 - -/* SPL stack position - and stack goes down */ -#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE) - /* On the top of OCM space */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000 +/* + * SPL stack position - and stack goes down + * 0xfffffe00 is used for putting wfi loop. + * Set it up as limit for now. + */ +#define CONFIG_SPL_STACK 0xfffffe00 + /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0x100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 -- cgit v0.10.2 From ec016a171d4ba0b2d519fb2be1f52387b56ea4ab Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 1 Dec 2015 09:03:43 +0100 Subject: ARM: zynq: Extend malloc size SPL DM MMC FAT requires more malloc space(3k fat buffers + dm) that it is available now. Extend SPL malloc space. Current OCM layout: 0xffff0000 - 0xfff2000 - Full malloc space 0xffff2000 - 0xffff300 - Stack location 0xfffff300 - CONFIG_SYS_MALLOC_F_LEN - Early malloc space 0xfffffd00 - sizeof(GD) - GD 0xfffffe00 - 0xffffffff - SoC specific boot code Signed-off-by: Michal Simek diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index d499656..0ab6083 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -369,7 +369,7 @@ /* On the top of OCM space */ #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 /* * SPL stack position - and stack goes down -- cgit v0.10.2 From 769afa54c622d5443f768fd5b274b872ccfe8c09 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 20 Nov 2015 10:11:03 +0100 Subject: ARM: zynq: Remove unused SERIAL macros for serial_zynq Remove unused macros when driver was moved to DM. Signed-off-by: Michal Simek diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 0f03c24..96d25ee 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -8,9 +8,6 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H -#define ZYNQ_SERIAL_BASEADDR0 0xFF000000 -#define ZYNQ_SERIAL_BASEADDR1 0xFF001000 - #define ZYNQ_GEM_BASEADDR0 0xFF0B0000 #define ZYNQ_GEM_BASEADDR1 0xFF0C0000 #define ZYNQ_GEM_BASEADDR2 0xFF0D0000 diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h index 9a51d6b..513b111 100644 --- a/arch/arm/mach-zynq/include/mach/hardware.h +++ b/arch/arm/mach-zynq/include/mach/hardware.h @@ -7,8 +7,6 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H -#define ZYNQ_SERIAL_BASEADDR0 0xE0000000 -#define ZYNQ_SERIAL_BASEADDR1 0xE0001000 #define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 #define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 #define ZYNQ_SCU_BASEADDR 0xF8F00000 -- cgit v0.10.2 From b8a9bebeecbf915f2fecab0cfa90899abd872512 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 25 Nov 2015 11:51:37 +0530 Subject: zynq: sdhci: Calculate minimum frequency based on max frequency Calculate the minimum sd clock based on max clock. This will be done by add_sdhci() if we pass minimum clock as zero. It also does based on SD host contoller version. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index e169b77..2d6cb31 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -29,7 +29,7 @@ int zynq_sdhci_init(phys_addr_t regbase) SDHCI_QUIRK_BROKEN_R1B; host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, 52000000 >> 9); + add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, 0); return 0; } -- cgit v0.10.2 From 400434537b6c79116dde82899037ae532e81482d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 16:07:07 +0100 Subject: zynq: sdhci: Remove zynq_sdhci_of_init() Prepare for using DM. Signed-off-by: Michal Simek diff --git a/arch/arm/mach-zynq/include/mach/sys_proto.h b/arch/arm/mach-zynq/include/mach/sys_proto.h index 9d50e24..151b903 100644 --- a/arch/arm/mach-zynq/include/mach/sys_proto.h +++ b/arch/arm/mach-zynq/include/mach/sys_proto.h @@ -21,7 +21,6 @@ extern unsigned int zynq_get_silicon_version(void); /* Driver extern functions */ extern int zynq_sdhci_init(phys_addr_t regbase); -extern int zynq_sdhci_of_init(const void *blob); extern void ps7_init(void); diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 2d6cb31..87a1f40 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -32,30 +32,3 @@ int zynq_sdhci_init(phys_addr_t regbase) add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, 0); return 0; } - -#if CONFIG_IS_ENABLED(OF_CONTROL) -int zynq_sdhci_of_init(const void *blob) -{ - int offset = 0; - u32 ret = 0; - phys_addr_t reg; - - debug("ZYNQ SDHCI: Initialization\n"); - - do { - offset = fdt_node_offset_by_compatible(blob, offset, - "arasan,sdhci-8.9a"); - if (offset != -1) { - reg = fdtdec_get_addr(blob, offset, "reg"); - if (reg != FDT_ADDR_T_NONE) { - ret |= zynq_sdhci_init(reg); - } else { - debug("ZYNQ SDHCI: Can't get base address\n"); - return -1; - } - } - } while (offset != -1); - - return ret; -} -#endif -- cgit v0.10.2 From d9ae52c8f081e30cfceafc0ddb7f29d4ecd36d00 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 Nov 2015 16:13:03 +0100 Subject: zynq: sdhci: Move driver to DM Move driver to DM Signed-off-by: Michal Simek Reviewed-by: Simon Glass diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 67d4fd5..fb9176b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -553,6 +553,7 @@ config ARCH_ZYNQ select DM select DM_ETH select SPL_DM + select DM_MMC select DM_SPI select DM_SERIAL select DM_SPI_FLASH @@ -564,6 +565,7 @@ config ARCH_ZYNQMP select DM select OF_CONTROL select DM_ETH + select DM_MMC select DM_SERIAL config TEGRA diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index c417236..528cd27 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -18,6 +18,7 @@ i2c0 = &i2c0; serial0 = &uart1; spi0 = &qspi; + mmc0 = &sdhci0; }; memory { @@ -370,6 +371,7 @@ }; &sdhci0 { + u-boot,dm-pre-reloc; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; @@ -383,6 +385,7 @@ }; &qspi { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 96d25ee..bbf89d9 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -19,9 +19,6 @@ #define ZYNQ_I2C_BASEADDR0 0xFF020000 #define ZYNQ_I2C_BASEADDR1 0xFF030000 -#define ZYNQ_SDHCI_BASEADDR0 0xFF160000 -#define ZYNQ_SDHCI_BASEADDR1 0xFF170000 - #define ZYNQMP_SATA_BASEADDR 0xFD0C0000 #define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000 diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index f1e95a2..021626d 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -13,7 +13,6 @@ static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) { } -int zynq_sdhci_init(phys_addr_t regbase); int zynq_slcr_get_mio_pin_status(const char *periph); unsigned int zynqmp_get_silicon_version(void); diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h index 513b111..830e1fe 100644 --- a/arch/arm/mach-zynq/include/mach/hardware.h +++ b/arch/arm/mach-zynq/include/mach/hardware.h @@ -12,8 +12,6 @@ #define ZYNQ_SCU_BASEADDR 0xF8F00000 #define ZYNQ_GEM_BASEADDR0 0xE000B000 #define ZYNQ_GEM_BASEADDR1 0xE000C000 -#define ZYNQ_SDHCI_BASEADDR0 0xE0100000 -#define ZYNQ_SDHCI_BASEADDR1 0xE0101000 #define ZYNQ_I2C_BASEADDR0 0xE0004000 #define ZYNQ_I2C_BASEADDR1 0xE0005000 #define ZYNQ_SPI_BASEADDR0 0xE0006000 diff --git a/arch/arm/mach-zynq/include/mach/sys_proto.h b/arch/arm/mach-zynq/include/mach/sys_proto.h index 151b903..882beab 100644 --- a/arch/arm/mach-zynq/include/mach/sys_proto.h +++ b/arch/arm/mach-zynq/include/mach/sys_proto.h @@ -20,8 +20,6 @@ extern void zynq_ddrc_init(void); extern unsigned int zynq_get_silicon_version(void); /* Driver extern functions */ -extern int zynq_sdhci_init(phys_addr_t regbase); - extern void ps7_init(void); #endif /* _SYS_PROTO_H_ */ diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 572b146..414f530 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -122,23 +122,6 @@ int board_eth_init(bd_t *bis) return ret; } -#ifdef CONFIG_CMD_MMC -int board_mmc_init(bd_t *bd) -{ - int ret = 0; - -#if defined(CONFIG_ZYNQ_SDHCI) -# if defined(CONFIG_ZYNQ_SDHCI0) - ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0); -# endif -# if defined(CONFIG_ZYNQ_SDHCI1) - ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1); -# endif -#endif - return ret; -} -#endif - int dram_init(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 51dc30f..2cf4712 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -65,28 +65,6 @@ void scsi_init(void) } #endif -#ifdef CONFIG_CMD_MMC -int board_mmc_init(bd_t *bd) -{ - int ret = 0; - - u32 ver = zynqmp_get_silicon_version(); - - if (ver != ZYNQMP_CSU_VERSION_VELOCE) { -#if defined(CONFIG_ZYNQ_SDHCI) -# if defined(CONFIG_ZYNQ_SDHCI0) - ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0); -# endif -# if defined(CONFIG_ZYNQ_SDHCI1) - ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1); -# endif -#endif - } - - return ret; -} -#endif - int board_late_init(void) { u32 reg = 0; diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 87a1f40..4fe3da9 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2013 Inc. + * (C) Copyright 2013 - 2015 Xilinx, Inc. * * Xilinx Zynq SD Host Controller Interface * @@ -7,28 +7,48 @@ */ #include +#include #include #include #include #include -#include -int zynq_sdhci_init(phys_addr_t regbase) +static int arasan_sdhci_probe(struct udevice *dev) { - struct sdhci_host *host = NULL; + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct sdhci_host *host = dev_get_priv(dev); - host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); - if (!host) { - printf("zynq_sdhci_init: sdhci_host malloc fail\n"); - return 1; - } - - host->name = "zynq_sdhci"; - host->ioaddr = (void *)regbase; host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B; host->version = sdhci_readw(host, SDHCI_HOST_VERSION); add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, 0); + + upriv->mmc = host->mmc; + return 0; } + +static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) +{ + struct sdhci_host *host = dev_get_priv(dev); + + host->name = (char *)dev->name; + host->ioaddr = (void *)dev_get_addr(dev); + + return 0; +} + +static const struct udevice_id arasan_sdhci_ids[] = { + { .compatible = "arasan,sdhci-8.9a" }, + { } +}; + +U_BOOT_DRIVER(arasan_sdhci_drv) = { + .name = "arasan_sdhci", + .id = UCLASS_MMC, + .of_match = arasan_sdhci_ids, + .ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata, + .probe = arasan_sdhci_probe, + .priv_auto_alloc_size = sizeof(struct sdhci_host), +}; -- cgit v0.10.2 From 6bf87dacd9d2d4962d32781c99ce891bde2b284f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 1 Dec 2015 14:29:34 +0100 Subject: serial: zynq: Fix incorrect reference to s5p driver Remove this c&p error from s5p driver. Signed-off-by: Michal Simek Reviewed-by: Bin Meng Reviewed-by: Simon Glass diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 82ad90d..1fc287e 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -95,7 +95,7 @@ config DEBUG_UART_S5P config DEBUG_UART_ZYNQ bool "Xilinx Zynq" help - Select this to enable a debug UART using the serial_s5p driver. You + Select this to enable a debug UART using the serial_zynq driver. You will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 88bebed..6807f0f 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -180,7 +180,7 @@ static const struct udevice_id zynq_serial_ids[] = { { } }; -U_BOOT_DRIVER(serial_s5p) = { +U_BOOT_DRIVER(serial_zynq) = { .name = "serial_zynq", .id = UCLASS_SERIAL, .of_match = zynq_serial_ids, -- cgit v0.10.2 From c643f3ef9b68a2444c9672bc7b72735a5b7855b0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 2 Dec 2015 12:57:11 +0100 Subject: serial: zynq: Remove duplicated header debug_uart.h is included twice. Signed-off-by: Michal Simek Reviewed-by: Bin Meng Reviewed-by: Simon Glass diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 6807f0f..b2b98de 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -192,9 +192,6 @@ U_BOOT_DRIVER(serial_zynq) = { }; #ifdef CONFIG_DEBUG_UART_ZYNQ - -#include - void _debug_uart_init(void) { struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE; -- cgit v0.10.2 From e4099c8b8053e7534cc50cdc8403792304eea973 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 4 Dec 2015 16:56:57 +0100 Subject: i2c: cmd: Relocate subcommands when MANUAL_RELOC Subcommands contain pointers to functions which are not updated when MANUAL_RELOC is enabled. This patch fix it. Signed-off-by: Michal Simek Acked-by: Heiko Schocher Reviewed-by: Simon Glass diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 3d0de81..552c875 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -1944,11 +1944,15 @@ static cmd_tbl_t cmd_i2c_sub[] = { U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), }; -#ifdef CONFIG_NEEDS_MANUAL_RELOC -void i2c_reloc(void) { - fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); +static __maybe_unused void i2c_reloc(void) +{ + static int relocated; + + if (!relocated) { + fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); + relocated = 1; + }; } -#endif /** * do_i2c() - Handle the "i2c" command-line command @@ -1964,6 +1968,10 @@ static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { cmd_tbl_t *c; +#ifdef CONFIG_NEEDS_MANUAL_RELOC + i2c_reloc(); +#endif + if (argc < 2) return CMD_RET_USAGE; -- cgit v0.10.2 From d6df048bca348a964943e6dedda8a674eb07dc30 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 4 Dec 2015 11:42:01 +0100 Subject: dm: cmd: Relocate subcommands when MANUAL_RELOC Subcommands contain pointers to functions which are not updated when MANUAL_RELOC is enabled. This patch fix it. Signed-off-by: Michal Simek Reviewed-by: Simon Glass diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c index caff49a..b6e7109 100644 --- a/test/dm/cmd_dm.c +++ b/test/dm/cmd_dm.c @@ -46,11 +46,25 @@ static cmd_tbl_t test_commands[] = { U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""), }; +static __maybe_unused void dm_reloc(void) +{ + static int relocated; + + if (!relocated) { + fixup_cmdtable(test_commands, ARRAY_SIZE(test_commands)); + relocated = 1; + } +} + static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { cmd_tbl_t *test_cmd; int ret; +#ifdef CONFIG_NEEDS_MANUAL_RELOC + dm_reloc(); +#endif + if (argc < 2) return CMD_RET_USAGE; test_cmd = find_cmd_tbl(argv[1], test_commands, -- cgit v0.10.2 From 8bebf03c73cd0830cb2cd234021004cde67c6412 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 1 Dec 2015 08:37:16 +0100 Subject: dm: core: Enable SPL_SIMPLE_BUS by default This option is needed for all SoCs which have nodes on bus. Without enabling this drivers are not found and probed. Issue was found on Zynq MMC probe. Enable this option by default. Signed-off-by: Michal Simek Reviewed-by: Stefan Roese Reviewed-by: Simon Glass diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index ac68172..53acee0 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -134,7 +134,7 @@ config SIMPLE_BUS config SPL_SIMPLE_BUS bool "Support simple-bus driver in SPL" depends on SPL_DM && SPL_OF_CONTROL - default n + default y help Supports the 'simple-bus' driver, which is used on some systems in SPL. -- cgit v0.10.2