From 28d77d968bfe0316deb5bf15c17f57d5ff2c8821 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 30 Jan 2008 14:48:28 +0100 Subject: ppc4xx: Fix problem with init-ram bigger than 4k on 440 platforms Signed-off-by: Stefan Roese diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 77c2aa4..0638024 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -110,6 +110,10 @@ # endif #endif /* CFG_INIT_DCACHE_CS */ +#if (defined(CFG_INIT_RAM_DCACHE) && (CFG_INIT_RAM_END > (4 << 10))) +#error Only 4k of init-ram is supported - please adjust CFG_INIT_RAM_END! +#endif + #define function_prolog(func_name) .text; \ .align 2; \ .globl func_name; \ diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index d66f4bd..07fc23e 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -66,7 +66,7 @@ *----------------------------------------------------------------------*/ #define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */ #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */ -#define CFG_INIT_RAM_END (8 << 10) +#define CFG_INIT_RAM_END (4 << 10) #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index a8eeff9..4c86bc5 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -75,7 +75,7 @@ *----------------------------------------------------------------------*/ #define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */ #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */ -#define CFG_INIT_RAM_END (8 << 10) +#define CFG_INIT_RAM_END (4 << 10) #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -- cgit v0.10.2 From e1d1429b49b0ee58c80f8c7b29c1ebaf8be7f5f1 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 30 Jan 2008 15:35:50 +0100 Subject: ppc4xx: Fix GPIO configuration for pcs440ep The SRD0_PFC0 register was not configured correctly to enable the GPIO's 49-63 for GPIO. They have been configured as trace signals. This patch fixes this by clearing the corresponding bit. Signed-off-by: Stefan Roese diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index 90e99d3..96adbc9 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -175,7 +175,7 @@ int board_early_init_f(void) *-------------------------------------------------------------------*/ mfsdr(sdr_pci0, reg); mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */ - mtsdr(sdr_pfc0, 0x00000100); /* Pin function: enable GPIO49-63 */ + mtsdr(sdr_pfc0, 0x00000000); /* Pin function: enable GPIO49-63 */ mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins, select IRQ5 */ return 0; -- cgit v0.10.2 From ff02f139804f3cb61414f7bbcbfdaa0279e3efae Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 1 Feb 2008 09:38:29 +0100 Subject: ppc4xx: Fix ndfc HW ECC byte order The current ndfc HW ECC implementation swaps the first two ECC bytes. But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering, so this swapping in the HW ECC driver is bogus. This patch fixes this problem and now really uses the SMC ECC byte order. Thanks to Sean MacLennan for pointing this out. Signed-off-by: Stefan Roese diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index ec1b38c..9e2229d 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -121,8 +121,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[2]; - ecc_code[1] = p[1]; + ecc_code[0] = p[1]; + ecc_code[1] = p[2]; ecc_code[2] = p[3]; return 0; -- cgit v0.10.2 From 29e3500cbc43c89eff6e720ca83e375deeecd9b3 Mon Sep 17 00:00:00 2001 From: Larry Johnson Date: Tue, 22 Jan 2008 08:51:59 -0500 Subject: ppc4xx: Add CONFIG_4xx_DCACHE compile switch to Denali-core SPD code Signed-off-by: Larry Johnson diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/cpu/ppc4xx/denali_spd_ddr2.c index 825bc21..60f89c9 100644 --- a/cpu/ppc4xx/denali_spd_ddr2.c +++ b/cpu/ppc4xx/denali_spd_ddr2.c @@ -3,7 +3,7 @@ * This SPD SDRAM detection code supports AMCC PPC44x CPUs with a Denali-core * DDR2 controller, specifically the 440EPx/GRx. * - * (C) Copyright 2007 + * (C) Copyright 2007-2008 * Larry Johnson, lrj@acm.org. * * Based primarily on cpu/ppc4xx/4xx_spd_ddr2.c, which is... @@ -77,10 +77,10 @@ * memory. * * If at some time this restriction doesn't apply anymore, just define - * CFG_ENABLE_SDRAM_CACHE in the board config file and this code should setup + * CONFIG_4xx_DCACHE in the board config file and this code should setup * everything correctly. */ -#if defined(CFG_ENABLE_SDRAM_CACHE) +#if defined(CONFIG_4xx_DCACHE) #define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on SDRAM */ #else #define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */ -- cgit v0.10.2 From b7f6193e76651e1fd606e46eb11915b53cb6618b Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Tue, 5 Feb 2008 10:26:42 +0100 Subject: ppc4xx: HCU4/5. Fix make O=../xx Signed-off-by: Niklaus Giger diff --git a/Makefile b/Makefile index 0f6cc59..b3a1d2f 100644 --- a/Makefile +++ b/Makefile @@ -1225,9 +1225,11 @@ G2000_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000 hcu4_config: unconfig + @mkdir -p $(obj)board/netstal/common @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal hcu5_config: unconfig + @mkdir -p $(obj)board/netstal/common @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal HH405_config: unconfig diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile index b13d9d4..3d1d65d 100644 --- a/board/netstal/hcu4/Makefile +++ b/board/netstal/hcu4/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2007 Netstal Maschinen AG +# (C) Copyright 2007-2008 Netstal Maschinen AG # Niklaus Giger (ng@netstal.com) # # This program is free software; you can redistribute it and/or @@ -22,18 +22,14 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -vpath fixed_sdram.c ../common -vpath hcu_flash.c ../common -vpath nm_bsp.c ../common - # NOBJS : Netstal common objects -NOBJS = ../common/fixed_sdram.o ../common/hcu_flash.o ../common/nm_bsp.o +NOBJS = fixed_sdram.o hcu_flash.o nm_bsp.o COBJS = $(BOARD).o SOBJS = -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix ../common/,$(NOBJS:.o=.c)) OBJS := $(addprefix $(obj),$(COBJS)) -NOBJS := $(addprefix $(obj),$(NOBJS)) +NOBJS := $(addprefix $(obj)../common/,$(NOBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(OBJS) $(SOBJS) $(NOBJS) diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile index 9f248a4..349c653 100644 --- a/board/netstal/hcu5/Makefile +++ b/board/netstal/hcu5/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2007 Netstal Maschinen AG +# (C) Copyright 2007-2008 Netstal Maschinen AG # Niklaus Giger (ng@netstal.com) # # This program is free software; you can redistribute it and/or @@ -22,17 +22,15 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -vpath hcu_flash.c ../common -vpath nm_bsp.c ../common # NOBJS : Netstal common objects -NOBJS = ../common/hcu_flash.o ../common/nm_bsp.o +NOBJS = hcu_flash.o nm_bsp.o COBJS = $(BOARD).o sdram.o SOBJS = init.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix ../common/,$(NOBJS:.o=.c)) OBJS := $(addprefix $(obj),$(COBJS)) -NOBJS := $(addprefix $(obj),$(NOBJS)) +NOBJS := $(addprefix $(obj)../common/,$(NOBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(OBJS) $(SOBJS) $(NOBJS) -- cgit v0.10.2