From 1f7f0edd3c6722efda28b7680f67561cd008d1ca Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 26 Aug 2011 02:25:39 +0000 Subject: ARM: remove broken "sbc2410x" board Signed-off-by: Wolfgang Denk diff --git a/MAKEALL b/MAKEALL index ce987e8..a485b95 100755 --- a/MAKEALL +++ b/MAKEALL @@ -338,7 +338,6 @@ LIST_ARM9=" \ openrd_ultimate \ portl2 \ rd6281a \ - sbc2410x \ scb9328 \ sheevaplug \ smdk2400 \ diff --git a/board/sbc2410x/Makefile b/board/sbc2410x/Makefile deleted file mode 100644 index 2b3b781..0000000 --- a/board/sbc2410x/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := sbc2410x.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/sbc2410x/config.mk b/board/sbc2410x/config.mk deleted file mode 100644 index bc01a2d..0000000 --- a/board/sbc2410x/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, -# David Mueller, ELSOFT AG, -# -# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu -# -# see http://www.samsung.com/ for more information on SAMSUNG -# - -# -# SMDK2410 has 1 bank of 64 MB DRAM -# -# 3000'0000 to 3400'0000 -# -# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 -# optionally with a ramdisk at 3080'0000 -# -# we load ourself to 33F8'0000 -# -# download area is 3300'0000 - -CONFIG_SYS_TEXT_BASE = 0x33F80000 diff --git a/board/sbc2410x/flash.c b/board/sbc2410x/flash.c deleted file mode 100644 index d209a6f..0000000 --- a/board/sbc2410x/flash.c +++ /dev/null @@ -1,433 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -ulong myflush (void); - -#define FLASH_BANK_SIZE PHYS_FLASH_SIZE -#define MAIN_SECT_SIZE 0x10000 /* 64 KB */ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -#define CMD_READ_ARRAY 0x000000F0 -#define CMD_UNLOCK1 0x000000AA -#define CMD_UNLOCK2 0x00000055 -#define CMD_ERASE_SETUP 0x00000080 -#define CMD_ERASE_CONFIRM 0x00000030 -#define CMD_PROGRAM 0x000000A0 -#define CMD_UNLOCK_BYPASS 0x00000020 - -#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1))) -#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1))) - -#define BIT_ERASE_DONE 0x00000080 -#define BIT_RDY_MASK 0x00000080 -#define BIT_PROGRAM_ERROR 0x00000020 -#define BIT_TIMEOUT 0x80000000 /* our flag */ - -#define READY 1 -#define ERR 2 -#define TMO 4 - -/*----------------------------------------------------------------------- - */ - -ulong flash_init (void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - ulong flashbase = 0; - - flash_info[i].flash_id = -#if defined(CONFIG_AMD_LV400) - (AMD_MANUFACT & FLASH_VENDMASK) | - (AMD_ID_LV400B & FLASH_TYPEMASK); -#elif defined(CONFIG_AMD_LV800) - (AMD_MANUFACT & FLASH_VENDMASK) | - (AMD_ID_LV800B & FLASH_TYPEMASK); -#else -#error "Unknown flash configured" -#endif - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - if (i == 0) - flashbase = PHYS_FLASH_1; - else - panic ("configured too many flash banks!\n"); - for (j = 0; j < flash_info[i].sector_count; j++) { - if (j <= 3) { - /* 1st one is 16 KB */ - if (j == 0) { - flash_info[i].start[j] = - flashbase + 0; - } - - /* 2nd and 3rd are both 8 KB */ - if ((j == 1) || (j == 2)) { - flash_info[i].start[j] = - flashbase + 0x4000 + (j - - 1) * - 0x2000; - } - - /* 4th 32 KB */ - if (j == 3) { - flash_info[i].start[j] = - flashbase + 0x8000; - } - } else { - flash_info[i].start[j] = - flashbase + (j - 3) * MAIN_SECT_SIZE; - } - } - size += flash_info[i].size; - } - - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - switch (info->flash_id & FLASH_VENDMASK) { - case (AMD_MANUFACT & FLASH_VENDMASK): - printf ("AMD: "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case (AMD_ID_LV400B & FLASH_TYPEMASK): - printf ("1x Amd29LV400BB (4Mbit)\n"); - break; - case (AMD_ID_LV800B & FLASH_TYPEMASK): - printf ("1x Amd29LV800BB (8Mbit)\n"); - break; - default: - printf ("Unknown Chip Type\n"); - goto Done; - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) { - printf ("\n "); - } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - - Done:; -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - ushort result; - int iflag, cflag, prot, sect; - int rc = ERR_OK; - int chip; - ulong start; - - /* first look for protection bits */ - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; - } - - if ((info->flash_id & FLASH_VENDMASK) != - (AMD_MANUFACT & FLASH_VENDMASK)) { - return ERR_UNKNOWN_FLASH_VENDOR; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) - return ERR_PROTECTED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status (); - icache_disable (); - iflag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - if (info->protect[sect] == 0) { /* not protected */ - vu_short *addr = (vu_short *) (info->start[sect]); - - MEM_FLASH_ADDR1 = CMD_UNLOCK1; - MEM_FLASH_ADDR2 = CMD_UNLOCK2; - MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; - - MEM_FLASH_ADDR1 = CMD_UNLOCK1; - MEM_FLASH_ADDR2 = CMD_UNLOCK2; - *addr = CMD_ERASE_CONFIRM; - - /* wait until flash is ready */ - chip = 0; - - do { - result = *addr; - - /* check timeout */ - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - MEM_FLASH_ADDR1 = CMD_READ_ARRAY; - chip = TMO; - break; - } - - if (!chip - && (result & 0xFFFF) & BIT_ERASE_DONE) - chip = READY; - - if (!chip - && (result & 0xFFFF) & BIT_PROGRAM_ERROR) - chip = ERR; - - } while (!chip); - - MEM_FLASH_ADDR1 = CMD_READ_ARRAY; - - if (chip == ERR) { - rc = ERR_PROG_ERROR; - goto outahere; - } - if (chip == TMO) { - rc = ERR_TIMOUT; - goto outahere; - } - - printf ("ok.\n"); - } else { /* it was protected */ - - printf ("protected!\n"); - } - } - - if (ctrlc ()) - printf ("User Interrupt!\n"); - - outahere: - /* allow flash to settle - wait 10 ms */ - udelay_masked (10000); - - if (iflag) - enable_interrupts (); - - if (cflag) - icache_enable (); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash - */ - -static int write_hword (flash_info_t * info, ulong dest, ushort data) -{ - vu_short *addr = (vu_short *) dest; - ushort result; - int rc = ERR_OK; - int cflag, iflag; - int chip; - ulong start; - - /* - * Check if Flash is (sufficiently) erased - */ - result = *addr; - if ((result & data) != data) - return ERR_NOT_ERASED; - - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status (); - icache_disable (); - iflag = disable_interrupts (); - - MEM_FLASH_ADDR1 = CMD_UNLOCK1; - MEM_FLASH_ADDR2 = CMD_UNLOCK2; - MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS; - *addr = CMD_PROGRAM; - *addr = data; - - /* arm simple, non interrupt dependent timer */ - get_timer(start); - - /* wait until flash is ready */ - chip = 0; - do { - result = *addr; - - /* check timeout */ - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - chip = ERR | TMO; - break; - } - if (!chip && ((result & 0x80) == (data & 0x80))) - chip = READY; - - if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) { - result = *addr; - - if ((result & 0x80) == (data & 0x80)) - chip = READY; - else - chip = ERR; - } - - } while (!chip); - - *addr = CMD_READ_ARRAY; - - if (chip == ERR || *addr != data) - rc = ERR_PROG_ERROR; - - if (iflag) - enable_interrupts (); - - if (cflag) - icache_enable (); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - int l; - int i, rc; - ushort data; - - wp = (addr & ~1); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - for (; i < 2 && cnt > 0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; - } - for (; cnt == 0 && i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - if ((rc = write_hword (info, wp, data)) != 0) { - return (rc); - } - wp += 2; - } - - /* - * handle word aligned part - */ - while (cnt >= 2) { - data = *((vu_short *) src); - if ((rc = write_hword (info, wp, data)) != 0) { - return (rc); - } - src += 2; - wp += 2; - cnt -= 2; - } - - if (cnt == 0) { - return ERR_OK; - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); - --cnt; - } - for (; i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - return write_hword (info, wp, data); -} diff --git a/board/sbc2410x/lowlevel_init.S b/board/sbc2410x/lowlevel_init.S deleted file mode 100644 index 3de9166..0000000 --- a/board/sbc2410x/lowlevel_init.S +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * - * Modified for the Samsung SMDK2410 by - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * Modified for the friendly-arm SBC-2410X by - * (C) Copyright 2005 - * JinHua Luo, GuangDong Linux Center, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -/* - * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S - * - * Copyright (C) 2002 Samsung Electronics SW.LEE - */ - -#define BWSCON 0x48000000 - -/* BWSCON */ -#define DW8 (0x0) -#define DW16 (0x1) -#define DW32 (0x2) -#define WAIT (0x1<<2) -#define UBLB (0x1<<3) - -#define B1_BWSCON (DW16) -#define B2_BWSCON (DW16) -#define B3_BWSCON (DW16 + WAIT + UBLB) -#define B4_BWSCON (DW16) -#define B5_BWSCON (DW16) -#define B6_BWSCON (DW32) -#define B7_BWSCON (DW32) - -#define B0_Tacs 0x0 -#define B0_Tcos 0x0 -#define B0_Tacc 0x7 -#define B0_Tcoh 0x0 -#define B0_Tah 0x0 -#define B0_Tacp 0x0 -#define B0_PMC 0x0 - -#define B1_Tacs 0x0 -#define B1_Tcos 0x0 -#define B1_Tacc 0x7 -#define B1_Tcoh 0x0 -#define B1_Tah 0x0 -#define B1_Tacp 0x0 -#define B1_PMC 0x0 - -#define B2_Tacs 0x0 -#define B2_Tcos 0x0 -#define B2_Tacc 0x7 -#define B2_Tcoh 0x0 -#define B2_Tah 0x0 -#define B2_Tacp 0x0 -#define B2_PMC 0x0 - -#define B3_Tacs 0xc -#define B3_Tcos 0x7 -#define B3_Tacc 0xf -#define B3_Tcoh 0x1 -#define B3_Tah 0x0 -#define B3_Tacp 0x0 -#define B3_PMC 0x0 - -#define B4_Tacs 0x0 -#define B4_Tcos 0x0 -#define B4_Tacc 0x7 -#define B4_Tcoh 0x0 -#define B4_Tah 0x0 -#define B4_Tacp 0x0 -#define B4_PMC 0x0 - -#define B5_Tacs 0xc -#define B5_Tcos 0x7 -#define B5_Tacc 0xf -#define B5_Tcoh 0x1 -#define B5_Tah 0x0 -#define B5_Tacp 0x0 -#define B5_PMC 0x0 - -#define B6_MT 0x3 /* SDRAM */ -#define B6_Trcd 0x1 -#define B6_SCAN 0x1 /* 9bit */ - -#define B7_MT 0x3 /* SDRAM */ -#define B7_Trcd 0x1 /* 3clk */ -#define B7_SCAN 0x1 /* 9bit */ - -/* REFRESH parameter */ -#define REFEN 0x1 /* Refresh enable */ -#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ -#define Trp 0x0 /* 2clk */ -#define Trc 0x3 /* 7clk */ -#define Tchr 0x2 /* 3clk */ -#define REFCNT 0x0459 -/**************************************/ - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE - -.globl lowlevel_init -lowlevel_init: - /* memory control configuration */ - /* make r0 relative the current location so that it */ - /* reads SMRDATA out of FLASH rather than memory ! */ - ldr r0, =SMRDATA - ldr r1, _TEXT_BASE - sub r0, r0, r1 - ldr r1, =BWSCON /* Bus Width Status Controller */ - add r2, r0, #13*4 -0: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r2, r0 - bne 0b - - /* everything is fine now */ - mov pc, lr - - .ltorg -/* the literal pools origin */ - -SMRDATA: - .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) - .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) - .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) - .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) - .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) - .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) - .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) - .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) - .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) - .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) - .word 0xb2 - .word 0x30 - .word 0x30 diff --git a/board/sbc2410x/sbc2410x.c b/board/sbc2410x/sbc2410x.c deleted file mode 100644 index c82382d..0000000 --- a/board/sbc2410x/sbc2410x.c +++ /dev/null @@ -1,193 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * (C) Copyright 2005 - * JinHua Luo, GuangDong Linux Center, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#if defined(CONFIG_CMD_NAND) -#include -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#define FCLK_SPEED 1 - -#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ -#define M_MDIV 0xC3 -#define M_PDIV 0x4 -#define M_SDIV 0x1 -#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ -#define M_MDIV 0x5c -#define M_PDIV 0x4 -#define M_SDIV 0x0 -#endif - -#define USB_CLOCK 1 - -#if USB_CLOCK==0 -#define U_M_MDIV 0xA1 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x1 -#elif USB_CLOCK==1 -#define U_M_MDIV 0x48 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x2 -#endif - -static inline void delay (unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_init (void) -{ - struct s3c24x0_clock_power * const clk_power = - s3c24x0_get_base_clock_power(); - struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); - - /* to reduce PLL lock time, adjust the LOCKTIME register */ - clk_power->locktime = 0xFFFFFF; - - /* configure MPLL */ - clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); - - /* some delay between MPLL and UPLL */ - delay (4000); - - /* configure UPLL */ - clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); - - /* some delay between MPLL and UPLL */ - delay (8000); - - /* set up the I/O ports */ - gpio->gpacon = 0x007FFFFF; - gpio->gpbcon = 0x00044556; - gpio->gpbup = 0x000007FF; - gpio->gpccon = 0xAAAAAAAA; - gpio->gpcup = 0x0000FFFF; - gpio->gpdcon = 0xAAAAAAAA; - gpio->gpdup = 0x0000FFFF; - gpio->gpecon = 0xAAAAAAAA; - gpio->gpeup = 0x0000FFFF; - gpio->gpfcon = 0x000055AA; - gpio->gpfup = 0x000000FF; - gpio->gpgcon = 0xFF95FF3A; - gpio->gpgup = 0x0000FFFF; - gpio->gphcon = 0x0016FAAA; - gpio->gphup = 0x000007FF; - - gpio->extint0 = 0x22222222; - gpio->extint1 = 0x22222222; - gpio->extint2 = 0x22222222; - - /* arch number of SMDK2410-Board */ - gd->bd->bi_arch_number = MACH_TYPE_SMDK2410; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x30000100; - - icache_enable(); - dcache_enable(); - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -#if defined(CONFIG_CMD_NAND) -extern ulong nand_probe(ulong physadr); - -static inline void NF_Reset(void) -{ - int i; - - NF_SetCE(NFCE_LOW); - NF_Cmd(0xFF); /* reset command */ - for(i = 0; i < 10; i++); /* tWB = 100ns. */ - NF_WaitRB(); /* wait 200~500us; */ - NF_SetCE(NFCE_HIGH); -} - -static inline void NF_Init(void) -{ -#if 1 -#define TACLS 0 -#define TWRPH0 3 -#define TWRPH1 0 -#else -#define TACLS 0 -#define TWRPH0 4 -#define TWRPH1 2 -#endif - - NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0)); - /*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */ - /* 1 1 1 1, 1 xxx, r xxx, r xxx */ - /* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */ - - NF_Reset(); -} - -void nand_init(void) -{ - struct s3c2410_nand * const nand = s3c2410_get_base_nand(); - - NF_Init(); -#ifdef DEBUG - printf("NAND flash probing at 0x%.8lX\n", (ulong)nand); -#endif - printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20); -} -#endif - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/boards.cfg b/boards.cfg index 86d31b7..967af2e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -66,7 +66,6 @@ mx1ads arm arm920t - - scb9328 arm arm920t - - imx cm4008 arm arm920t - - ks8695 cm41xx arm arm920t - - ks8695 -sbc2410x arm arm920t - - s3c24x0 VCMA9 arm arm920t vcma9 mpl s3c24x0 smdk2400 arm arm920t - samsung s3c24x0 smdk2410 arm arm920t - samsung s3c24x0 diff --git a/doc/README.scrapyard b/doc/README.scrapyard index df14b4e..ef5ee75 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for... Board Arch CPU removed Commit last known maintainer/contact ============================================================================= +sbc2410x arm arm920t - 2011-07-17 netstar arm arm925t - 2011-07-17 mx1fs2 arm arm920t - 2011-07-17 lpd7a404 arm lh7a40x - 2011-07-17 diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h deleted file mode 100644 index f0f19b2..0000000 --- a/include/configs/sbc2410x.h +++ /dev/null @@ -1,220 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * Gary Jennejohn - * David Mueller - * - * Modified for the friendly-arm SBC-2410X by - * (C) Copyright 2005 - * JinHua Luo, GuangDong Linux Center, - * - * Configuation settings for the friendly-arm SBC-2410X board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * If we are developing, we might want to start armboot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#undef CONFIG_SKIP_LOWLEVEL_INIT /* undef for developing */ - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ -#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */ -#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */ -#define CONFIG_SBC2410X 1 /* on a friendly-arm SBC-2410X Board */ - -/* input clock of PLL */ -#define CONFIG_SYS_CLK_FREQ 12000000/* the SBC2410X has 12MHz input clock */ - - -#define USE_920T_MMU 1 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* we have a CS8900 on-board */ -#define CONFIG_CS8900_BASE 0x19000300 -#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ - -/* - * select serial console configuration - */ -#define CONFIG_S3C24X0_SERIAL -#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */ - -/************************************************************ - * RTC - ************************************************************/ -#define CONFIG_RTC_S3C24X0 1 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 115200 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#define CONFIG_CMD_PING - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs " \ - "nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv " \ - "ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off" -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.0.69 -#define CONFIG_SERVERIP 192.168.0.1 -/*#define CONFIG_BOOTFILE "elinos-lart" */ -#define CONFIG_BOOTCOMMAND "dhcp; bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -/* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "[ ~ljh@GDLC ]# " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ - -#define CONFIG_SYS_HZ 1000 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -/* #define CONFIG_AMD_LV400 1 /\* uncomment this if you have a LV400 flash *\/ */ - -#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - -#ifdef CONFIG_AMD_LV800 -#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ -#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ -#endif - -#ifdef CONFIG_AMD_LV400 -#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ -#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ -#endif - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ - -/*----------------------------------------------------------------------- - * NAND flash settings - */ -#if defined(CONFIG_CMD_NAND) -#define CONFIG_NAND_S3C2410 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#endif /* CONFIG_CMD_NAND */ - -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_TAG - -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -#define CONFIG_CMDLINE_EDITING - -#ifdef CONFIG_CMDLINE_EDITING -#undef CONFIG_AUTO_COMPLETE -#else -#define CONFIG_AUTO_COMPLETE -#endif - -#endif /* __CONFIG_H */ -- cgit v0.10.2