From 01fbf31042e1eba1fcca3e84f70db7de0d176fe4 Mon Sep 17 00:00:00 2001
From: David Andrey <david.andrey@netmodule.com>
Date: Fri, 5 Apr 2013 17:24:24 +0200
Subject: net: gem: Preserve clk on emio interface

Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIO

Do not enable emio for this standard board configuration for now.

Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 546adc8..57d8f53 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -43,11 +43,11 @@ int board_eth_init(bd_t *bis)
 #if defined(CONFIG_ZYNQ_GEM)
 # if defined(CONFIG_ZYNQ_GEM0)
 	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
-						CONFIG_ZYNQ_GEM_PHY_ADDR0);
+						CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
 # endif
 # if defined(CONFIG_ZYNQ_GEM1)
 	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
-						CONFIG_ZYNQ_GEM_PHY_ADDR1);
+						CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
 # endif
 #endif
 	return ret;
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 316816d..8e0e01c 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -33,6 +33,7 @@
 #include <phy.h>
 #include <miiphy.h>
 #include <watchdog.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
 #if !defined(CONFIG_PHYLIB)
@@ -136,6 +137,7 @@ struct zynq_gem_priv {
 	u32 rxbd_current;
 	u32 rx_first_buf;
 	int phyaddr;
+	u32 emio;
 	int init;
 	struct phy_device *phydev;
 	struct mii_dev *bus;
@@ -317,8 +319,11 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
 		clk = (5 << 20) | (8 << 8) | (0 << 4) | (1 << 0);
 		break;
 	}
-	/* FIXME maybe better to define gem address in hardware.h */
-	zynq_slcr_gem_clk_setup(dev->iobase != 0xE000B000, rclk, clk);
+
+	/* Change the rclk and clk only not using EMIO interface */
+	if (!priv->emio)
+		zynq_slcr_gem_clk_setup(dev->iobase !=
+					ZYNQ_GEM_BASEADDR0, rclk, clk);
 
 	setbits_le32(&regs->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK |
 					ZYNQ_GEM_NWCTRL_TXEN_MASK);
@@ -427,7 +432,7 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr,
 	return phywrite(dev, addr, reg, val);
 }
 
-int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr)
+int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio)
 {
 	struct eth_device *dev;
 	struct zynq_gem_priv *priv;
@@ -444,6 +449,7 @@ int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr)
 	priv = dev->priv;
 
 	priv->phyaddr = phy_addr;
+	priv->emio = emio;
 
 	sprintf(dev->name, "Gem.%x", base_addr);
 
diff --git a/include/netdev.h b/include/netdev.h
index 81117b1..516b351 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -104,7 +104,7 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
 							int txpp, int rxpp);
 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
 						unsigned long ctrl_addr);
-int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr);
+int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio);
 /*
  * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
  * exported by a public hader file, we need a global definition at this point.
-- 
cgit v0.10.2