From 69eeefaa060a848cd6acd8c94d1c43c9022adf53 Mon Sep 17 00:00:00 2001
From: Vignesh R <vigneshr@ti.com>
Date: Fri, 22 Jul 2016 10:55:48 +0530
Subject: spi: ti_qspi: Fix failure on multiple READ_ID cmd

Populating QSPI_RD_SNGL bit(0x1) in priv->cmd means that value
QSPI_INVAL (0x4) is not written to CMD field of QSPI_SPI_CMD_REG in
ti_qspi_cs_deactivate(). Therefore CS is never deactivated between
successive READ ID which results in sf probe to fail.
Fix this by not populating priv->cmd with QSPI_RD_SNGL and OR it wih
priv->cmd as required (similar to the convention followed in the
driver).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 9a372ad..a850aa2 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -247,13 +247,12 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen,
 			debug("tx done, status %08x\n", status);
 		}
 		if (rxp) {
-			priv->cmd |= QSPI_RD_SNGL;
 			debug("rx cmd %08x dc %08x\n",
-			      priv->cmd, priv->dc);
+			      ((u32)(priv->cmd | QSPI_RD_SNGL)), priv->dc);
 			#ifdef CONFIG_DRA7XX
 				udelay(500);
 			#endif
-			writel(priv->cmd, &priv->base->cmd);
+			writel(priv->cmd | QSPI_RD_SNGL, &priv->base->cmd);
 			status = readl(&priv->base->status);
 			timeout = QSPI_TIMEOUT;
 			while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
-- 
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