From beca2901fd09f265b6a9b521d31276f93404cd6a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 8 Jun 2017 22:33:25 -0400 Subject: rkcommon.c: Remove unused rkcommon_spi_to_offset This function is unused, remove. Reported by clang-3.8. Fixes: a1c29d4b43dc ("rockchip: mkimage: set init_boot_size to avoid ...") Cc: Philipp Tomsich Signed-off-by: Tom Rini Reviewed-by: Philipp Tomsich Signed-off-by: Philipp Tomsich diff --git a/tools/rkcommon.c b/tools/rkcommon.c index a583c0c..db2da75 100644 --- a/tools/rkcommon.c +++ b/tools/rkcommon.c @@ -226,11 +226,6 @@ static inline unsigned rkcommon_offset_to_spi(unsigned offset) return ((offset & ~0x7ff) << 1) + (offset & 0x7ff); } -static inline unsigned rkcommon_spi_to_offset(unsigned offset) -{ - return ((offset & ~0x7ff) >> 1) + (offset & 0x7ff); -} - static int rkcommon_parse_header(const void *buf, struct header0_info *header0, struct spl_info **spl_info) { -- cgit v0.10.2 From 5302feb69590fe5db06aad723cf5bcf675a15ce7 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 14 Jun 2017 16:14:18 +0800 Subject: rockchip: rk3399: correct SPL_MAX_SIZE The SPL_MAX_SIZE is the internal memory size minux the space used by bootrom. Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich Reviewed-by: Simon Glass Signed-off-by: Philipp Tomsich diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 7a8a442..44dad57 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -31,7 +31,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff8effff #define CONFIG_SPL_TEXT_BASE 0xff8c2000 -#define CONFIG_SPL_MAX_SIZE 0x30000 +#define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000 /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 -- cgit v0.10.2 From 915e09814a83128fee8b87b2ee2e5f4a17e04a01 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 14 Jun 2017 14:54:20 +0800 Subject: rockchip: mkimage: correct spl_size for rk3399 The maximum spl_size for rk3399 is the internal memory size minus the size used in bootrom (which usually can get from SPL_TEXT_BASE). Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich Reviewed-by: Simon Glass Signed-off-by: Philipp Tomsich diff --git a/tools/rkcommon.c b/tools/rkcommon.c index db2da75..1056ffa 100644 --- a/tools/rkcommon.c +++ b/tools/rkcommon.c @@ -76,7 +76,7 @@ static struct spl_info spl_infos[] = { { "rk3188", "RK31", 0x8000 - 0x800, true, false }, { "rk3288", "RK32", 0x8000, false, false }, { "rk3328", "RK32", 0x8000 - 0x1000, false, false }, - { "rk3399", "RK33", 0x20000, false, true }, + { "rk3399", "RK33", 0x30000 - 0x2000, false, true }, { "rv1108", "RK11", 0x1800, false, false}, }; -- cgit v0.10.2 From 6a464d9cab63f5317bc914e2de52a4de98377743 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 13 Jun 2017 10:03:11 +0800 Subject: rockchip: clk: rk3036: correct setting for pll integer mode According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich Acked-by: Simon Glass Signed-off-by: Philipp Tomsich diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 28652df..5ecf512 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -40,7 +40,7 @@ enum { #hz "Hz cannot be hit with PLL "\ "divisors on line " __stringify(__LINE__)); -/* use interge mode*/ +/* use integer mode*/ static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1); static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1); @@ -61,8 +61,8 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id, assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ); - /* use interger mode */ - rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT); + /* use integer mode */ + rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT); rk_clrsetreg(&pll->con0, PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, -- cgit v0.10.2