From 454e725b3a9537b7f273bbd0cbca180f23a7a6e8 Mon Sep 17 00:00:00 2001
From: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Date: Fri, 15 Aug 2008 18:24:25 +0000
Subject: ColdFire: Change the SDRAM BRD2WT timing from 3 to 7

The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 4037efb..af6723c 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -226,7 +226,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index a14c55b..248db53 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -212,7 +212,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000
-- 
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