From 1a2e203b31d33fb720f2cf1033b241ad36ab405a Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Tue, 20 Apr 2010 19:37:54 -0500 Subject: mpc83xx: turn on icache in core initialization to improve u-boot boot time before, MPC8349ITX boots u-boot in 4.3sec: column1 is elapsed time since first message column2 is elapsed time since previous message column3 is the message 0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX 0.000 0.000: 0.000 0.000: Reset Status: 0.000 0.000: 0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.032 0.000: Board: Freescale MPC8349E-mITX 0.032 0.000: UPMA: Configured for compact flash 0.032 0.000: I2C: ready 0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 1.516 1.456: FLASH: 16 MB 2.641 1.125: PCI: Bus Dev VenId DevId Class Int 2.652 0.011: 00 10 1095 3114 0180 00 2.652 0.000: PCI: Bus Dev VenId DevId Class Int 2.652 0.000: In: serial 2.652 0.000: Out: serial 2.652 0.000: Err: serial 2.682 0.030: Board revision: 1.0 (PCF8475A) 3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic 3.080 0.000: TSEC0, TSEC1 4.300 1.219: IDE: Bus 0: .** Timeout ** after, MPC8349ITX boots u-boot in 3.0sec: 0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX 0.010 0.000: 0.010 0.000: Reset Status: 0.010 0.000: 0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.017 0.000: Board: Freescale MPC8349E-mITX 0.038 0.020: UPMA: Configured for compact flash 0.038 0.000: I2C: ready 0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 0.260 0.222: FLASH: 16 MB 1.390 1.130: PCI: Bus Dev VenId DevId Class Int 1.390 0.000: 00 10 1095 3114 0180 00 1.390 0.000: PCI: Bus Dev VenId DevId Class Int 1.400 0.010: In: serial 1.400 0.000: Out: serial 1.400 0.000: Err: serial 1.400 0.000: Board revision: 1.0 (PCF8475A) 1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic 1.832 0.000: TSEC0, TSEC1 3.038 1.205: IDE: Bus 0: .** Timeout ** also tested on these boards (albeit with a less accurate boottime measurement method): seconds: before after 8349MDS ~2.6 ~2.2 8360MDS ~2.8 ~2.6 8313RDB ~2.5 ~2.3 #nand boot 837xRDB ~3.1 ~2.3 also tested on an 8323ERDB. v2: also remove the delayed icache enablement assumption in arch ppc's board.c, and add a CONFIG_MPC83xx define in the ITX config file for consistency (even though it was already being defined in 83xx' config.mk). Signed-off-by: Kim Phillips diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index a30acee..7b09fb5 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -686,7 +686,7 @@ void board_init_r (gd_t *id, ulong dest_addr) WATCHDOG_RESET(); -#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx) +#if defined(CONFIG_SYS_DELAYED_ICACHE) icache_enable (); /* it's time to enable the instruction cache */ #endif diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index a2e4cd4..94695fc 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -517,7 +517,8 @@ #define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ - HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) + HID0_ENABLE_INSTRUCTION_CACHE | \ + HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index b106aa9..6972fe8 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -536,8 +536,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE | \ HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 50aea79..7c84393 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -438,8 +438,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index f7632e0..7bd2793 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -455,8 +455,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 5c410c9..73dbea4 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -598,7 +598,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) /* #define CONFIG_SYS_HID0_FINAL (\ HID0_ENABLE_INSTRUCTION_CACHE |\ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 09f9e38..9be571f 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -63,6 +63,7 @@ /* * High Level Configuration Options */ +#define CONFIG_MPC83xx 1 #define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ @@ -596,8 +597,8 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_SICRH SICRH_TSOBI1 /* Needed for gigabit to work on TSEC 1 */ #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1) /* USB DR as device + USB MPH as host */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_INIT 0x00000000 +#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 620e32c..87a137b 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -495,8 +495,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index a43e465..e78cf60 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -412,8 +412,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 1565ff9..b30d0e3 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -544,8 +544,9 @@ extern int board_pci_host_broken(void); /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 97a05a2..1654f46 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -552,8 +552,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 6cc8d58..26897c6 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -321,7 +321,8 @@ #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1 | SICRL_USB0) #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 40e89d9..84af8df 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -411,8 +411,9 @@ | SICRL_ETSEC2_A ) #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \ - | HID0_ENABLE_DYNAMIC_POWER_MANAGMENT ) +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE | \ + HID0_ENABLE_DYNAMIC_POWER_MANAGMENT ) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index f08c0a9..c1e0e64 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -405,7 +405,8 @@ extern int tqm834x_num_flash_banks; /* i-cache and d-cache disabled */ #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index d27b75b..6497231 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -367,7 +367,8 @@ * Core HID Setup */ #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 80f83ac..deaddde 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -542,7 +542,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) /* #define CONFIG_SYS_HID0_FINAL (\ HID0_ENABLE_INSTRUCTION_CACHE |\ diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index cb987a1..f493e75 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -449,7 +449,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE -- cgit v0.10.2