From 18cc7afd9a153a66854af862d14ba01c5496cf07 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Tue, 28 Apr 2009 16:50:53 -0700 Subject: Enable CONFIG_NET_MULTI on all remaining PPC4xx boards All in-tree PPC4xx boards now use CONFIG_NET_MULTI Signed-off-by: Ben Warren Signed-off-by: Stefan Roese diff --git a/include/configs/AR405.h b/include/configs/AR405.h index 9f19269..73e34bd 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -71,6 +71,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index 3263712..b2679e5 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -54,6 +54,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 150bd29..96bf161 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -45,6 +45,7 @@ #define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */ #define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */ +#define CONFIG_NET_MULTI /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to * keep possible initrd ramdisk decompression out. This is in k (1024 bytes) diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h index 201e62a..023f33e 100644 --- a/include/configs/ERIC.h +++ b/include/configs/ERIC.h @@ -96,6 +96,7 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index 4729464..4d08243 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -81,6 +81,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 0e7d2c0..ea502d4 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -60,6 +60,7 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/JSE.h b/include/configs/JSE.h index 8aca1f9..80c70e4 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -135,6 +135,7 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index a3869c8..8315cfe 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -341,6 +341,7 @@ #define CONFIG_PHY_ADDR 1 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ #define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */ +#define CONFIG_NET_MULTI /************************************************************ * RTC ***********************************************************/ diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 2591f1d..860ec52 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -54,6 +54,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 13d6e04..b2e2d41 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -54,6 +54,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_NET_MULTI /* diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 5c4d69b..e214d70 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -281,6 +281,7 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ +#define CONFIG_NET_MULTI /************************************************************ * RTC ***********************************************************/ diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index ceef76e..553845d 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -68,6 +68,7 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ +#define CONFIG_NET_MULTI #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 11e0630..73d6d24 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -68,6 +68,7 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ +#define CONFIG_NET_MULTI #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 99188bc..5c281a1 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -58,6 +58,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_NET_MULTI #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 204aea0..aed6f50 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -184,6 +184,7 @@ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ /* 32usec min. for LXT971A */ #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ +#define CONFIG_NET_MULTI /* * RTC configuration diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 9b3a11c..24b961f 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -183,6 +183,7 @@ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ /* 32usec min. for LXT971A */ #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ +#define CONFIG_NET_MULTI /* * RTC configuration diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h index 4d5c1ab..4bed7ae 100644 --- a/include/configs/netstal-common.h +++ b/include/configs/netstal-common.h @@ -61,8 +61,8 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ -#if defined(CONFIG_440) #define CONFIG_NET_MULTI 1 +#if defined(CONFIG_440) #define CONFIG_NETCONSOLE /* include NetConsole support */ #define CONFIG_SYS_RX_ETH_BUFFER 32 /* number of eth rx buffers */ #else diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 7197aaf..242f42f 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -62,6 +62,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ +#define CONFIG_NET_MULTI #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=emac(0,0)host:/T221ppc/target/config/sbc405/vxWorks.st " \ -- cgit v0.10.2