From a9003dc641cf881992897585392567811652de09 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 4 Nov 2016 16:18:08 +0100 Subject: mmc: Retry the switch command Some eMMC will fail at the first switch, but would succeed in a subsequent one. Make sure we try several times to cover those cases. The number of retries (and the behaviour) is currently what is being used in Linux. Signed-off-by: Maxime Ripard Reviewed-by: Hans de Goede Reviewed-by: Tom Rini diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 4380c7c..d6b7e4f 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -494,6 +494,7 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) { struct mmc_cmd cmd; int timeout = 1000; + int retries = 3; int ret; cmd.cmdidx = MMC_CMD_SWITCH; @@ -502,11 +503,17 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) (index << 16) | (value << 8); - ret = mmc_send_cmd(mmc, &cmd, NULL); + while (retries > 0) { + ret = mmc_send_cmd(mmc, &cmd, NULL); - /* Waiting for the ready status */ - if (!ret) - ret = mmc_send_status(mmc, timeout); + /* Waiting for the ready status */ + if (!ret) { + ret = mmc_send_status(mmc, timeout); + return ret; + } + + retries--; + } return ret; -- cgit v0.10.2 From fb013184672003bac0b6d05b4a9f06a556821004 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 4 Nov 2016 16:18:09 +0100 Subject: mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai Reviewed-by: Hans de Goede diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 6953acc..b8716c9 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -463,7 +463,7 @@ struct mmc *sunxi_mmc_init(int sdc_no) cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT; -#ifdef CONFIG_MACH_SUN50I +#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I) if (sdc_no == 2) cfg->host_caps = MMC_MODE_8BIT; #endif -- cgit v0.10.2 From 53c37f625d3ef7d36eeb78a80e099cf9b3c93d66 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 4 Nov 2016 16:18:10 +0100 Subject: sunxi: sina33: Enable the eMMC The SinA33 has an 4GB Toshiba eMMC connected to the MMC2 controller. Enable it. Signed-off-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai Reviewed-by: Hans de Goede diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 2a5f985..f4719db 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -4,6 +4,7 @@ CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=15291 CONFIG_MMC0_CD_PIN="PB4" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -- cgit v0.10.2 From 91f839d2d30e489c2d6bf0deafb65b01d416b715 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 4 Nov 2016 16:18:11 +0100 Subject: sunxi: sina33: Enable the LCD The SinA33 comes with an optional 7" display. Enable it in the configuration. Signed-off-by: Maxime Ripard Reviewed-by: Hans de Goede diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index f4719db..26b119a 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -6,6 +6,10 @@ CONFIG_DRAM_ZQ=15291 CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" +CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo:127,hs:70,vs:20,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_BL_EN="PH6" +CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -- cgit v0.10.2