From d26154c9a692586b66eb6d1f8e1b67c75e40ea70 Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Thu, 11 Sep 2008 21:35:36 +0400
Subject: mpc83xx: spd_sdram: fix ddr sdram base address assignment bug

The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.

Found this bug while trying to relocate a DDR memory at the base != 0.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index 3a6347f..128cd40 100644
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -64,7 +64,7 @@ static long fixed_sdram(void)
 	volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
 	u32 msize_log2 = __ilog2(msize);
 
-	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 	im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
 
diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c
index 07e6486..3714c2c 100644
--- a/board/freescale/mpc8315erdb/sdram.c
+++ b/board/freescale/mpc8315erdb/sdram.c
@@ -60,7 +60,7 @@ static long fixed_sdram(void)
 	u32 msize = CFG_DDR_SIZE * 1024 * 1024;
 	u32 msize_log2 = __ilog2(msize);
 
-	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE  & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 	im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
 
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 4c04f2c..ef947fe 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -109,7 +109,7 @@ int fixed_sdram(void)
 			return -1;
 		}
 	}
-	im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
 
 #if (CFG_DDR_SIZE != 256)
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index d3fc560..0a20e2b 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -55,7 +55,7 @@ int fixed_sdram(void)
 
 	im->sysconf.ddrlaw[0].ar =
 	    LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-	im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff;
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 
 	/* Only one CS0 for DDR */
 	im->ddr.csbnds[0].csbnds = 0x0000000f;
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 40f1e63..8003ec1 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -108,7 +108,7 @@ int fixed_sdram(void)
 	u32 msize = CFG_DDR_SIZE * 1024 * 1024;
 	u32 msize_log2 = __ilog2(msize);
 
-	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
 #if (CFG_DDR_SIZE != 512)
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index aaefc18..e547b51 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -96,7 +96,7 @@ int fixed_sdram(void)
 	u32 msize = CFG_DDR_SIZE * 1024 * 1024;
 	u32 msize_log2 = __ilog2(msize);
 
-	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
 	im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
diff --git a/board/matrix_vision/mvblm7/mvblm7.c b/board/matrix_vision/mvblm7/mvblm7.c
index b07f913..3dcff67 100644
--- a/board/matrix_vision/mvblm7/mvblm7.c
+++ b/board/matrix_vision/mvblm7/mvblm7.c
@@ -50,7 +50,7 @@ int fixed_sdram(void)
 		if (ddr_size & 1)
 			return -1;
 	}
-	im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) &
 		LAWAR_SIZE);
 
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 4a44fda..93ada0b 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -101,7 +101,7 @@ int fixed_sdram(void)
 			return -1;
 		}
 	}
-	im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
 
 #if (CFG_DDR_SIZE != 256)
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 76f2474..f4a0e90 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -274,7 +274,7 @@ long int spd_sdram()
 	/*
 	 * Set up LAWBAR for all of DDR.
 	 */
-	ecm->bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+	ecm->bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 	ecm->ar  = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size));
 	debug("DDR:bar=0x%08x\n", ecm->bar);
 	debug("DDR:ar=0x%08x\n", ecm->ar);
-- 
cgit v0.10.2


From 162c41c03179727a1d14262f703c9a8bc40231fa Mon Sep 17 00:00:00 2001
From: Kim Phillips <kim.phillips@freescale.com>
Date: Tue, 23 Sep 2008 09:38:49 -0500
Subject: mpc83xx: add h/w flash protection to board configs

the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 55d7852..b361217 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -174,6 +174,7 @@
 #define CONFIG_FLASH_CFI_DRIVER			/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000	/* start of FLASH   */
 #define CFG_FLASH_SIZE		8		/* flash size in MB */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 #define CFG_FLASH_EMPTY_INFO			/* display empty sectors */
 #define CFG_FLASH_USE_BUFFER_WRITE		/* buffer up multiple bytes */
 
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 5879a82..83f64c6 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -193,6 +193,7 @@
 
 #define CFG_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE		8 /* FLASH size is 8M */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM	CFG_FLASH_BASE /* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM	0x80000016 /* 8MB window size */
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 977142b..697c5ad 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -181,6 +181,7 @@
 #define CONFIG_FLASH_CFI_DRIVER	/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000	/* FLASH base address */
 #define CFG_FLASH_SIZE		16	/* FLASH size is 16M */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM	CFG_FLASH_BASE	/* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM	0x80000018	/* 32MB window size */
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 01cf557..9a9b500 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -169,6 +169,7 @@
 #define CONFIG_FLASH_CFI_DRIVER	/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000	/* FLASH base address */
 #define CFG_FLASH_SIZE		16	/* FLASH size is 16M */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM	CFG_FLASH_BASE	/* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM	0x80000018	/* 32MB window size */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 87f1672..8135254 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -156,6 +156,7 @@
 #define CONFIG_FLASH_CFI_DRIVER			/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000	/* start of FLASH   */
 #define CFG_FLASH_SIZE		32		/* max flash size in MB */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 /* #define CFG_FLASH_USE_BUFFER_WRITE */
 
 #define CFG_BR0_PRELIM		(CFG_FLASH_BASE |	/* flash Base address */ \
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index fa0c0a7..81ea9f8 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -190,6 +190,7 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CFG_FLASH_BANKS_LIST	{CFG_FLASH_BASE, CFG_FLASH_BASE + 0x800000}
 #define CFG_FLASH_SIZE		16		/* FLASH size in MB */
 #define CFG_FLASH_SIZE_SHIFT	4		/* log2 of the above value */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 
 /* Vitesse 7385 */
 
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index f60d7a7..baff03e 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -194,6 +194,7 @@
 #define CONFIG_FLASH_CFI_DRIVER	/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE		32 /* max FLASH size is 32M */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
 
 #define CFG_LBLAWBAR0_PRELIM	CFG_FLASH_BASE /* Window base at flash base */
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 7c87388..256f156 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -229,6 +229,7 @@
 #define CONFIG_FLASH_CFI_DRIVER	/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE		32 /* max FLASH size is 32M */
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM	CFG_FLASH_BASE /* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM	0x80000018 /* 32MB window size */
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2ac4ad0..da77121 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -253,6 +253,7 @@
 #define CFG_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE		8 /* max FLASH size is 32M */
 
+#define CFG_FLASH_PROTECTION	1		/* Use h/w Flash protection. */
 #define CFG_FLASH_EMPTY_INFO			/* display empty sectors */
 #define CFG_FLASH_USE_BUFFER_WRITE		/* buffer up multiple bytes */
 
-- 
cgit v0.10.2


From 2fb29c520c42b7bfef33ea3fd1527eba64099164 Mon Sep 17 00:00:00 2001
From: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Date: Wed, 24 Sep 2008 10:42:15 +0900
Subject: mpc83xx: Fix typo in include/mpc83xx.h

Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 5d82bb4..7f30d683 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -528,7 +528,7 @@
 #if defined(CONFIG_MPC834X)
 #define HRCWH_ROM_LOC_PCI2		0x00200000
 #endif
-#if defined(CONIFG_MPC837X)
+#if defined(CONFIG_MPC837X)
 #define HRCWH_ROM_LOC_ON_CHIP_ROM	0x00300000
 #endif
 #define HRCWH_ROM_LOC_LOCAL_8BIT	0x00500000
-- 
cgit v0.10.2


From 7fd0bea2e4a78eab7e6693140940f9f9a0009bc2 Mon Sep 17 00:00:00 2001
From: Kim Phillips <kim.phillips@freescale.com>
Date: Wed, 24 Sep 2008 08:46:25 -0500
Subject: mpc83xx: don't disable autoboot

bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified.  Change to a positive value to allow
autobooting when a bootcmd is set.

Reported-by: Coray Tate <Coray.Tate@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index b361217..09bb87e 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -597,7 +597,7 @@
 #define CONFIG_FDTFILE		mpc8313erdb.dtb
 
 #define CONFIG_LOADADDR		500000	/* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY	-1	/* -1 disables auto-boot */
+#define CONFIG_BOOTDELAY	6	/* -1 disables auto-boot */
 #define CONFIG_BAUDRATE		115200
 
 #define XMK_STR(x)	#x
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 697c5ad..1ae5bae 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -571,7 +571,7 @@
 #define CONFIG_FDTFILE		mpc832x_rdb.dtb
 
 #define CONFIG_LOADADDR		500000	/* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY	-1	/* -1 disables auto-boot */
+#define CONFIG_BOOTDELAY	6	/* -1 disables auto-boot */
 #define CONFIG_BAUDRATE		115200
 
 #define XMK_STR(x)	#x
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index da77121..f818b0f 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -633,7 +633,7 @@
 #define CONFIG_FDTFILE		mpc8379_rdb.dtb
 
 #define CONFIG_LOADADDR		500000	/* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY	-1	/* -1 disables auto-boot */
+#define CONFIG_BOOTDELAY	6	/* -1 disables auto-boot */
 #define CONFIG_BAUDRATE		115200
 
 #define XMK_STR(x)	#x
-- 
cgit v0.10.2


From d13ff2358ff8c384f52eaf46f5d60258acf96ea6 Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Mon, 15 Sep 2008 05:48:25 +0200
Subject: Revert "ARM: set GD_FLG_RELOC for boards skipping relocation to RAM"

we need this due to the arm implementation which supposed that U-Boot
is in RAM when we jump to start_armboot

This reverts commit f96b44cef897bd372beb86dde1b33637c119d84d.
in order to do it for all arm board

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

diff --git a/lib_arm/board.c b/lib_arm/board.c
index 5ade882..47e834c 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -220,18 +220,6 @@ static int init_func_i2c (void)
 }
 #endif
 
-#ifdef CONFIG_SKIP_RELOCATE_UBOOT
-/*
- * This routine sets the relocation done flag, because even if
- * relocation is skipped, the flag is used by other generic code.
- */
-static int reloc_init(void)
-{
-	gd->flags |= GD_FLG_RELOC;
-	return 0;
-}
-#endif
-
 /*
  * Breathe some life into the board...
  *
@@ -261,11 +249,6 @@ int print_cpuinfo (void); /* test-only */
 
 init_fnc_t *init_sequence[] = {
 	cpu_init,		/* basic cpu dependent setup */
-#if defined(CONFIG_SKIP_RELOCATE_UBOOT)
-	reloc_init,		/* Set the relocation done flag, must
-				   do this AFTER cpu_init(), but as soon
-				   as possible */
-#endif
 	board_init,		/* basic board dependent setup */
 	interrupt_init,		/* set up exceptions */
 	env_init,		/* initialize environment */
-- 
cgit v0.10.2


From 33af3e6656e84660d397b5dd95abab2dccc36f83 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Wed, 1 Oct 2008 12:34:58 +0200
Subject: TQM5200: enable support for ATAPI devices

Signed-off-by: Wolfgang Denk <wd@denx.de>

diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index efc8da4..2cc215a 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -720,6 +720,9 @@
 /* Interval between registers						     */
 #define CFG_ATA_STRIDE		4
 
+/* Support ATAPI devices */
+#define CONFIG_ATAPI            1
+
 /*-----------------------------------------------------------------------
  * Open firmware flat tree support
  *-----------------------------------------------------------------------
-- 
cgit v0.10.2


From bbdbc7cb3abefda5bd998edbcf0508fe6256327d Mon Sep 17 00:00:00 2001
From: David Gibson <david@gibson.dropbear.id.au>
Date: Fri, 29 Aug 2008 14:19:13 +1000
Subject: libfdt: Fix bugs in fdt_get_path()

The current implementation of fdt_get_path() has a couple of bugs,
fixed by this patch.

First, contrary to its documentation, on success it returns the length
of the node's path, rather than 0.  The testcase is correspondingly
wrong, and the patch fixes this as well.

Second, in some circumstances, it will return -FDT_ERR_BADOFFSET
instead of -FDT_ERR_NOSPACE when given insufficient buffer space.
Specifically this happens when there is insufficient space even to
hold the path's second last component.  This behaviour is corrected,
and the testcase updated to check it.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index b09a6e9..f559eed 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -320,9 +320,6 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
 	for (offset = 0, depth = 0;
 	     (offset >= 0) && (offset <= nodeoffset);
 	     offset = fdt_next_node(fdt, offset, &depth)) {
-		if (pdepth < depth)
-			continue; /* overflowed buffer */
-
 		while (pdepth > depth) {
 			do {
 				p--;
@@ -330,14 +327,16 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
 			pdepth--;
 		}
 
-		name = fdt_get_name(fdt, offset, &namelen);
-		if (!name)
-			return namelen;
-		if ((p + namelen + 1) <= buflen) {
-			memcpy(buf + p, name, namelen);
-			p += namelen;
-			buf[p++] = '/';
-			pdepth++;
+		if (pdepth >= depth) {
+			name = fdt_get_name(fdt, offset, &namelen);
+			if (!name)
+				return namelen;
+			if ((p + namelen + 1) <= buflen) {
+				memcpy(buf + p, name, namelen);
+				p += namelen;
+				buf[p++] = '/';
+				pdepth++;
+			}
 		}
 
 		if (offset == nodeoffset) {
@@ -347,7 +346,7 @@ int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
 			if (p > 1) /* special case so that root path is "/", not "" */
 				p--;
 			buf[p] = '\0';
-			return p;
+			return 0;
 		}
 	}
 
-- 
cgit v0.10.2


From 741a6d010d09b5bafca8e4cdfb6b2f8a2c07994d Mon Sep 17 00:00:00 2001
From: Jon Loeliger <jdl@freescale.com>
Date: Thu, 25 Sep 2008 11:02:17 -0500
Subject: Fix an overflow case in fdt_offset_ptr() detected by GCC 4.3.

Using Gcc 4.3 detected this problem:

    ../dtc/libfdt/fdt.c: In function 'fdt_next_tag':
    ../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not
    occur when assuming that (X + c) < X is always false

To fix the problem, treat the offset as an unsigned int.

The problem report and proposed fix were provided
by Steve Papacharalambous <stevep@freescale.com>.

Signed-off-by: Jon Loeliger <jdl@freescale.com>

diff --git a/include/libfdt.h b/include/libfdt.h
index 94c35e3..5492a53 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -122,7 +122,7 @@
 /* Low-level functions (you probably don't need these)                */
 /**********************************************************************/
 
-const void *fdt_offset_ptr(const void *fdt, int offset, int checklen);
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
 static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
 {
 	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
diff --git a/libfdt/fdt.c b/libfdt/fdt.c
index 732103b..a59a518 100644
--- a/libfdt/fdt.c
+++ b/libfdt/fdt.c
@@ -78,7 +78,7 @@ int fdt_check_header(const void *fdt)
 	return 0;
 }
 
-const void *fdt_offset_ptr(const void *fdt, int offset, int len)
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
 {
 	const char *p;
 
-- 
cgit v0.10.2


From 3e38577208e4256956bc33bb8bcd0a6b6fab55c3 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Fri, 26 Sep 2008 17:03:26 +0200
Subject: fdt: Overwrite /chosen node in bootm if it already exists in the dtb

Set force parameter in fdt_chosen() call in do_bootm_linux() call.
Without this, the chosen node is not overwritten if it already
exists.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c
index 38266e1..5af25dd 100644
--- a/lib_ppc/bootm.c
+++ b/lib_ppc/bootm.c
@@ -145,7 +145,7 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 	 * if the user wants it (the logic is in the subroutines).
 	 */
 	if (of_size) {
-		if (fdt_chosen(of_flat_tree, 0) < 0) {
+		if (fdt_chosen(of_flat_tree, 1) < 0) {
 			puts ("ERROR: ");
 			puts ("/chosen node create failed");
 			puts (" - must RESET the board to recover.\n");
-- 
cgit v0.10.2


From 2215987e100d2a841ae6d48a7cc9bb83fcf22737 Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Thu, 2 Oct 2008 01:55:38 -0400
Subject: cfi_flash: do not reset flash when probe fails

The CFI flash driver starts at flash_init() which calls down into
flash_get_size().  This starts by calling flash_detect_cfi().  If said
function fails, flash_get_size() finishes by attempting to reset the
flash.  Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack.  On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address.  Which is what happens on a Blackfin system.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 0d1ee8a..72d063a 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1932,9 +1932,10 @@ ulong flash_get_size (ulong base, int banknum)
 			/* XXX - Need to test on x8/x16 in parallel. */
 			info->portwidth >>= 1;
 		}
+
+		flash_write_cmd (info, 0, 0, info->cmd_reset);
 	}
 
-	flash_write_cmd (info, 0, 0, info->cmd_reset);
 	return (info->size);
 }
 
-- 
cgit v0.10.2


From 9a6cf73a88ddab2e1ac39088f2806177982cc62c Mon Sep 17 00:00:00 2001
From: David Gibson <david@gibson.dropbear.id.au>
Date: Wed, 20 Aug 2008 16:55:14 +1000
Subject: libfdt: Add function to explicitly expand aliases

Kumar has already added alias expansion to fdt_path_offset().
However, in some circumstances it may be convenient for the user of
libfdt to explicitly get the string expansion of an alias.  This patch
adds a function to do this, fdt_get_alias(), and uses it to implement
fdt_path_offset().

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

diff --git a/include/libfdt.h b/include/libfdt.h
index 5492a53..7cad68c 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -459,6 +459,32 @@ static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
 uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
 
 /**
+ * fdt_get_namelen - get alias based on substring
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_get_alias(), but only examine the first namelen
+ * characters of name for matching the alias name.
+ */
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen);
+
+/**
+ * fdt_get_alias - retreive the path referenced by a given alias
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ *
+ * fdt_get_alias() retrieves the value of a given alias.  That is, the
+ * value of the property named 'name' in the node /aliases.
+ *
+ * returns:
+ *	a pointer to the expansion of the alias named 'name', of it exists
+ *	NULL, if the given alias or the /aliases node does not exist
+ */
+const char *fdt_get_alias(const void *fdt, const char *name);
+
+/**
  * fdt_get_path - determine the full path of a node
  * @fdt: pointer to the device tree blob
  * @nodeoffset: offset of the node whose path to find
diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index f559eed..b705f91 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -145,17 +145,12 @@ int fdt_path_offset(const void *fdt, const char *path)
 
 	/* see if we have an alias */
 	if (*path != '/') {
-		const char *q;
-		int aliasoffset = fdt_path_offset(fdt, "/aliases");
-
-		if (aliasoffset < 0)
-			return -FDT_ERR_BADPATH;
+		const char *q = strchr(path, '/');
 
-		q = strchr(path, '/');
 		if (!q)
 			q = end;
 
-		p = fdt_getprop_namelen(fdt, aliasoffset, path, q - p, NULL);
+		p = fdt_get_alias_namelen(fdt, p, q - p);
 		if (!p)
 			return -FDT_ERR_BADPATH;
 		offset = fdt_path_offset(fdt, p);
@@ -306,6 +301,23 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
 	return fdt32_to_cpu(*php);
 }
 
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen)
+{
+	int aliasoffset;
+
+	aliasoffset = fdt_path_offset(fdt, "/aliases");
+	if (aliasoffset < 0)
+		return NULL;
+
+	return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL);
+}
+
+const char *fdt_get_alias(const void *fdt, const char *name)
+{
+	return fdt_get_alias_namelen(fdt, name, strlen(name));
+}
+
 int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
 {
 	int pdepth = 0, p = 0;
-- 
cgit v0.10.2


From cd3cb0d9269d155276b00207e3816a9347fd1c92 Mon Sep 17 00:00:00 2001
From: Gerald Van Baren <vanbaren@cideas.com>
Date: Sat, 4 Oct 2008 07:56:06 -0400
Subject: libfdt: Fix error in documentation for fdt_get_alias_namelen()

Oops, screwed up the function name in the documenting comment for this
function.  Trivial correction in this patch.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>

diff --git a/include/libfdt.h b/include/libfdt.h
index 7cad68c..ce374fd 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -459,7 +459,7 @@ static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
 uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
 
 /**
- * fdt_get_namelen - get alias based on substring
+ * fdt_get_alias_namelen - get alias based on substring
  * @fdt: pointer to the device tree blob
  * @name: name of the alias th look up
  * @namelen: number of characters of name to consider
-- 
cgit v0.10.2


From bac6a1d1fa1cd80aa57881fa9c2152b853cd0ed4 Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@kernel.crashing.org>
Date: Tue, 7 Oct 2008 10:28:46 -0500
Subject: 85xx: Remove setting of *cache-line-size in device trees

ePAPR says if the *cache-block-size is the same as *cache-line-size
than we don't need the *cache-line-size property.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index bc1550d..037a60f 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -152,7 +152,6 @@ static inline void ft_fixup_l2cache(void *blob)
 	}
 	fdt_setprop(blob, off, "cache-unified", NULL, 0);
 	fdt_setprop_cell(blob, off, "cache-block-size", line_size);
-	fdt_setprop_cell(blob, off, "cache-line-size", line_size);
 	fdt_setprop_cell(blob, off, "cache-size", size);
 	fdt_setprop_cell(blob, off, "cache-sets", num_sets);
 	fdt_setprop_cell(blob, off, "cache-level", 2);
@@ -181,7 +180,6 @@ static inline void ft_fixup_cache(void *blob)
 		dnum_sets = dsize / (dline_size * dnum_ways);
 
 		fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
-		fdt_setprop_cell(blob, off, "d-cache-line-size", dline_size);
 		fdt_setprop_cell(blob, off, "d-cache-size", dsize);
 		fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
 
@@ -192,7 +190,6 @@ static inline void ft_fixup_cache(void *blob)
 		inum_sets = isize / (iline_size * inum_ways);
 
 		fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
-		fdt_setprop_cell(blob, off, "i-cache-line-size", iline_size);
 		fdt_setprop_cell(blob, off, "i-cache-size", isize);
 		fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
 
-- 
cgit v0.10.2


From c0391111c33c22fabeddf8f4ca801ec7645b4f5c Mon Sep 17 00:00:00 2001
From: Jason Jin <Jason.jin@freescale.com>
Date: Sat, 27 Sep 2008 14:40:57 +0800
Subject: Fix the incorrect DDR clk freq reporting on 8536DS

On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
The display is still sync mode DDR freq. This patch try to fix
this. The display DDR freq is now the actual freq in both
sync and async mode.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 67e81c0..f15b0a8 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -85,7 +85,8 @@ int checkcpu (void)
 	struct cpu_type *cpu;
 #ifdef CONFIG_DDR_CLK_FREQ
 	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-	u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
+	u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
+		>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
 #else
 	u32 ddr_ratio = 0;
 #endif
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 1cda1e3..485ba20 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -54,7 +54,8 @@ void get_sys_info (sys_info_t * sysInfo)
 
 #ifdef CONFIG_DDR_CLK_FREQ
 	{
-		u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
+		u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
+			>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
 		if (ddr_ratio != 0x7)
 			sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
 	}
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 559d6ea..50c9dde 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1552,6 +1552,13 @@ typedef struct par_io {
  */
 typedef struct ccsr_gur {
 	uint	porpllsr;	/* 0xe0000 - POR PLL ratio status register */
+#ifdef CONFIG_MPC8536
+#define MPC85xx_PORPLLSR_DDR_RATIO	0x3e000000
+#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT	25
+#else
+#define MPC85xx_PORPLLSR_DDR_RATIO	0x00003e00
+#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT	9
+#endif
 	uint	porbmsr;	/* 0xe0004 - POR boot mode status register */
 #define MPC85xx_PORBMSR_HA		0x00070000
 	uint	porimpscr;	/* 0xe0008 - POR I/O impedance status and control register */
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 2578bef..0d65b20 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -59,7 +59,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #endif
 #define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0) /* sysclk for MPC85xx */
-/* #define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk(0) /\* ddrclk for MPC85xx *\/ FIXME-8536*/
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk(0)
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
 #define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
 					     from ICS307 instead of switches */
-- 
cgit v0.10.2


From 1f3ba317a5c5f3a7aabf580fddc211f4bb5a4540 Mon Sep 17 00:00:00 2001
From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Fri, 3 Oct 2008 11:46:59 -0400
Subject: Minor fixes for I2C address on MPC8572DS

MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1
according to the board spec, and adds the 2nd i2c bus offset.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index d7e3a88..87b1011 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -108,6 +108,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	2
 
 /* I2C addresses of SPD EEPROMs */
+#define CFG_SPD_BUS_NUM		1	/* SPD EEPROMS locate on I2C bus 1 */
 #define SPD_EEPROM_ADDRESS1	0x51	/* CTLR 0 DIMM 0 */
 #define SPD_EEPROM_ADDRESS2	0x52	/* CTLR 1 DIMM 0 */
 
@@ -293,11 +294,14 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_FSL_I2C		/* Use FSL common I2C driver */
 #define CONFIG_HARD_I2C		/* I2C with hardware support */
 #undef	CONFIG_SOFT_I2C		/* I2C bit-banged */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
 #define CFG_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR	0x57
 #define CFG_I2C_SLAVE		0x7F
-#define CFG_I2C_NOPROBES	{0x69}	/* Don't probe these addrs */
-#define CFG_I2C_OFFSET		0x3100
+#define CFG_I2C_NOPROBES	{0,0x29} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET		0x3000
+#define CFG_I2C2_OFFSET		0x3100
 
 /*
  * General PCI
-- 
cgit v0.10.2


From 445a7b38308eb05b41de74165b20855db58c7ee5 Mon Sep 17 00:00:00 2001
From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Fri, 3 Oct 2008 11:47:30 -0400
Subject: Add ID EEPROM support for MPC8572DS

The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for
system information like mac addresses etc. This patch enables it.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 87b1011..fbe7b61 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -304,6 +304,17 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CFG_I2C2_OFFSET		0x3100
 
 /*
+ * I2C2 EEPROM
+ */
+#define CONFIG_ID_EEPROM
+#ifdef CONFIG_ID_EEPROM
+#define CFG_I2C_EEPROM_NXID
+#endif
+#define CFG_I2C_EEPROM_ADDR	0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_BUS_NUM	1
+
+/*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-- 
cgit v0.10.2


From 5297246bbaa9943c0da1ec2e717b72e4ab6b830e Mon Sep 17 00:00:00 2001
From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Fri, 3 Oct 2008 11:48:03 -0400
Subject: Remove redundant #define for MPC8536DS

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 0d65b20..b504add 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -303,7 +303,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  */
 #define CONFIG_ID_EEPROM
 #ifdef CONFIG_ID_EEPROM
-#define CONFIG_ID_EEPROM
 #define CFG_I2C_EEPROM_NXID
 #endif
 #define CFG_I2C_EEPROM_ADDR	0x57
-- 
cgit v0.10.2


From f41b144c11341b571eab7dcef6c4b8e03c92d2b2 Mon Sep 17 00:00:00 2001
From: gnusercn <gnusercn@gmail.com>
Date: Wed, 8 Oct 2008 18:58:58 +0200
Subject: Fix bug: in arch-arm, env_get_char dose not work fine

due to the arm implementation which supposed that U-Boot is in RAM
when we jump to start_armboot

Signed-off-by: gnusercn <gnusercn@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

diff --git a/lib_arm/board.c b/lib_arm/board.c
index 47e834c..f02fdc8 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -290,6 +290,8 @@ void start_armboot (void)
 	gd->bd = (bd_t*)((char*)gd - sizeof(bd_t));
 	memset (gd->bd, 0, sizeof (bd_t));
 
+	gd->flags |= GD_FLG_RELOC;
+
 	monitor_flash_len = _bss_start - _armboot_start;
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
-- 
cgit v0.10.2


From 1ed7a7f0f571b13d46530f8f8b9aff3957f15a96 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <lg@denx.de>
Date: Thu, 25 Sep 2008 20:54:37 +0200
Subject: i.MX31: switch to CFG_HZ=1000

Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
provides 2% or 0.4% precision depending on the
CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
boot-delay.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/interrupts.c
index 6e08c71..cd57071 100644
--- a/cpu/arm1136/mx31/interrupts.c
+++ b/cpu/arm1136/mx31/interrupts.c
@@ -27,30 +27,49 @@
 #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
 
 /* General purpose timers registers */
-#define GPTCR   __REG(TIMER_BASE) /* Control register */
-#define GPTPR  __REG(TIMER_BASE + 0x4) /* Prescaler register */
-#define GPTSR   __REG(TIMER_BASE + 0x8) /* Status register */
-#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
+#define GPTCR	__REG(TIMER_BASE)		/* Control register	*/
+#define GPTPR	__REG(TIMER_BASE + 0x4)		/* Prescaler register	*/
+#define GPTSR	__REG(TIMER_BASE + 0x8)		/* Status register	*/
+#define GPTCNT	__REG(TIMER_BASE + 0x24)	/* Counter register	*/
 
 /* General purpose timers bitfields */
-#define GPTCR_SWR       (1<<15) /* Software reset */
-#define GPTCR_FRR       (1<<9)  /* Freerun / restart */
-#define GPTCR_CLKSOURCE_32 (4<<6)  /* Clock source */
-#define GPTCR_TEN       (1)     /* Timer enable */
+#define GPTCR_SWR		(1 << 15)	/* Software reset	*/
+#define GPTCR_FRR		(1 << 9)	/* Freerun / restart	*/
+#define GPTCR_CLKSOURCE_32	(4 << 6)	/* Clock source		*/
+#define GPTCR_TEN		1		/* Timer enable		*/
+
+/* "time" is measured in 1 / CFG_HZ seconds, "tick" is internal timer period */
+#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
+/* ~0.4% error - measured with stop-watch on 100s boot-delay */
+#define TICK_TO_TIME(t)	((t) * CFG_HZ / CONFIG_MX31_CLK32)
+#define TIME_TO_TICK(t)	((unsigned long long)(t) * CONFIG_MX31_CLK32 / CFG_HZ)
+#define US_TO_TICK(t)	(((unsigned long long)(t) * CONFIG_MX31_CLK32 + \
+			999999) / 1000000)
+#else
+/* ~2% error */
+#define TICK_PER_TIME	((CONFIG_MX31_CLK32 + CFG_HZ / 2) / CFG_HZ)
+#define US_PER_TICK	(1000000 / CONFIG_MX31_CLK32)
+#define TICK_TO_TIME(t)	((t) / TICK_PER_TIME)
+#define TIME_TO_TICK(t)	((unsigned long long)(t) * TICK_PER_TIME)
+#define US_TO_TICK(t)	(((t) + US_PER_TICK - 1) / US_PER_TICK)
+#endif
 
 static ulong timestamp;
 static ulong lastinc;
 
 /* nothing really to do with interrupts, just starts up a counter. */
+/* The 32768Hz 32-bit timer overruns in 131072 seconds */
 int interrupt_init (void)
 {
 	int i;
 
 	/* setup GP Timer 1 */
 	GPTCR = GPTCR_SWR;
-	for ( i=0; i<100; i++) GPTCR = 0; /* We have no udelay by now */
+	for (i = 0; i < 100; i++)
+		GPTCR = 0; /* We have no udelay by now */
 	GPTPR = 0; /* 32Khz */
-	GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; /* Freerun Mode, PERCLK1 input */
+	/* Freerun Mode, PERCLK1 input */
+	GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
 
 	return 0;
 }
@@ -67,7 +86,7 @@ void reset_timer(void)
 	reset_timer_masked();
 }
 
-ulong get_timer_masked (void)
+unsigned long long get_ticks (void)
 {
 	ulong now = GPTCNT; /* current tick value */
 
@@ -80,6 +99,17 @@ ulong get_timer_masked (void)
 	return timestamp;
 }
 
+ulong get_timer_masked (void)
+{
+	/*
+	 * get_ticks() returns a long long (64 bit), it wraps in
+	 * 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+	 * 5 * 10^9 days... and get_ticks() * CFG_HZ wraps in
+	 * 5 * 10^6 days - long enough.
+	 */
+	return TICK_TO_TIME(get_ticks());
+}
+
 ulong get_timer (ulong base)
 {
 	return get_timer_masked () - base;
@@ -87,29 +117,20 @@ ulong get_timer (ulong base)
 
 void set_timer (ulong t)
 {
+	timestamp = TIME_TO_TICK(t);
 }
 
 /* delay x useconds AND perserve advance timstamp value */
 void udelay (unsigned long usec)
 {
-	ulong tmo, tmp;
-
-	if (usec >= 1000) {			/* if "big" number, spread normalization to seconds */
-		tmo = usec / 1000;		/* start to normalize for usec to ticks per sec */
-		tmo *= CFG_HZ;			/* find number of "ticks" to wait to achieve target */
-		tmo /= 1000;			/* finish normalize. */
-	} else {					/* else small number, don't kill it prior to HZ multiply */
-		tmo = usec * CFG_HZ;
-		tmo /= (1000*1000);
-	}
-
-	tmp = get_timer (0);		/* get current timestamp */
-	if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */
-		reset_timer_masked ();	/* reset "advancing" timestamp to 0, set lastinc value */
-	else
-		tmo	+= tmp;				/* else, set advancing stamp wake up time */
-	while (get_timer_masked () < tmo)/* loop till event */
-		/*NOP*/;
+	unsigned long long tmp;
+	ulong tmo;
+
+	tmo = US_TO_TICK(usec);
+	tmp = get_ticks() + tmo;	/* get current timestamp */
+
+	while (get_ticks() < tmp)	/* loop till event */
+		 /*NOP*/;
 }
 
 void reset_cpu (ulong addr)
diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 60916b9..9a655aa 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -122,11 +122,9 @@
 #define CFG_MEMTEST_START	0  /* memtest works on */
 #define CFG_MEMTEST_END		0x10000
 
-#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
-
 #define CFG_LOAD_ADDR		0 /* default load address */
 
-#define CFG_HZ			32000
+#define CFG_HZ			1000
 
 #define CONFIG_CMDLINE_EDITING	1
 
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index bf2a8dd..1540203 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -126,7 +126,7 @@
 
 #define CFG_LOAD_ADDR		0 /* default load address */
 
-#define CFG_HZ			32000
+#define CFG_HZ			1000
 
 #define CONFIG_CMDLINE_EDITING	1
 
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index b904d81..04790fd 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -139,11 +139,9 @@
 #define CFG_MEMTEST_START	0		/* memtest works on */
 #define CFG_MEMTEST_END		0x10000
 
-#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
-
 #define CFG_LOAD_ADDR		CONFIG_LOADADDR
 
-#define CFG_HZ			CONFIG_MX31_CLK32 /* use 32kHz clock as source */
+#define CFG_HZ			1000
 
 #define CONFIG_CMDLINE_EDITING	1
 
-- 
cgit v0.10.2


From 77a0355f60b801f232ce0a5bfbe95331fa3b6bc0 Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Tue, 30 Sep 2008 20:08:36 +0200
Subject: move README.imx31 to doc/ and merge with README.mx31

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

diff --git a/README.imx31 b/README.imx31
deleted file mode 100644
index f545f01..0000000
--- a/README.imx31
+++ /dev/null
@@ -1,13 +0,0 @@
-i.MX31 specific Configuration Options:
---------------------------------------
-
-- Timer precision:
-		CONFIG_MX31_TIMER_HIGH_PRECISION
-
-		Enable higher precision timer. The low-precision timer
-		(default) provides approximately 4% error, whereas the
-		high-precision timer is about 0.4% accurate. The extra
-		accuracy is achieved at the cost of higher computational
-		overhead, which, in places where time is measured, should
-		not be critical, so, it should be safe to enable this
-		option.
diff --git a/doc/README.imx31 b/doc/README.imx31
new file mode 100644
index 0000000..91ef766
--- /dev/null
+++ b/doc/README.imx31
@@ -0,0 +1,29 @@
+U-Boot for Freescale i.MX31
+
+This file contains information for the port of U-Boot to the Freescale
+i.MX31 SoC.
+
+1. CONFIGURATION OPTIONS/SETTINGS
+---------------------------------
+
+1.1 Configuration of MC13783 SPI bus
+------------------------------------
+	The power management companion chip MC13783 is connected to the
+	i.MX31 via an SPI bus. Use the following configuration options
+	to setup the bus and chip select used for a particular board.
+
+	CONFIG_MC13783_SPI_BUS	-- defines the SPI bus the MC13783 is connected to.
+			   Note that 0 is CSPI1, 1 is CSPI2 and 2 is CSPI3.
+	CONFIG_MC13783_SPI_CS	-- define the chip select the MC13783 s connected to.
+
+1.2 Timer precision
+-------------------
+	CONFIG_MX31_TIMER_HIGH_PRECISION
+
+	Enable higher precision timer. The low-precision timer
+	(default) provides approximately 4% error, whereas the
+	high-precision timer is about 0.4% accurate. The extra
+	accuracy is achieved at the cost of higher computational
+	overhead, which, in places where time is measured, should
+	not be critical, so, it should be safe to enable this
+	option.
diff --git a/doc/README.mx31 b/doc/README.mx31
deleted file mode 100644
index 291c2f3..0000000
--- a/doc/README.mx31
+++ /dev/null
@@ -1,17 +0,0 @@
-U-Boot for Freescale i.MX31
-
-This file contains information for the port of U-Boot to the Freescale
-i.MX31 SoC.
-
-1. CONFIGURATION OPTIONS/SETTINGS
----------------------------------
-
-1.1 Configuration of MC13783 SPI bus
-------------------------------------
-The power management companion chip MC13783 is connected to the
-i.MX31 via an SPI bus. Use the following configuration options
-to setup the bus and chip select used for a particular board.
-
-CONFIG_MC13783_SPI_BUS	-- defines the SPI bus the MC13783 is connected to.
-			   Note that 0 is CSPI1, 1 is CSPI2 and 2 is CSPI3.
-CONFIG_MC13783_SPI_CS	-- define the chip select the MC13783 s connected to.
-- 
cgit v0.10.2


From 747f316cca484ed627a97dd3391febabce384186 Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Tue, 30 Sep 2008 20:08:49 +0200
Subject: update uImage FIT multi documentation

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

diff --git a/doc/uImage.FIT/multi.its b/doc/uImage.FIT/multi.its
index b992962..1d8c2db 100644
--- a/doc/uImage.FIT/multi.its
+++ b/doc/uImage.FIT/multi.its
@@ -56,6 +56,7 @@
 			data = /incbin/("./eldk-4.2-ramdisk");
 			type = "ramdisk";
 			arch = "ppc";
+			os = "linux";
 			compression = "gzip";
 			hash@1 {
 				algo = "sha1";
@@ -67,6 +68,7 @@
 			data = /incbin/("./eldk-3.1-ramdisk");
 			type = "ramdisk";
 			arch = "ppc";
+			os = "linux";
 			compression = "gzip";
 			hash@1 {
 				algo = "crc32";
-- 
cgit v0.10.2


From e46c7bfb8bc3c304cedd20f7a365d6e78d7eaf17 Mon Sep 17 00:00:00 2001
From: Rafal Czubak <rcz@semihalf.com>
Date: Wed, 8 Oct 2008 13:41:30 +0200
Subject: FSL: Fix get_cpu_board_revision() return value.

get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.

The change has been successfully tested on MPC8555CDS system.

Signed-off-by: Rafal Czubak <rcz@semihalf.com>

diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index e53ead0..9bef92e 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -463,6 +463,6 @@ unsigned int get_cpu_board_revision(void)
 	if ((be.major == 0xff) && (be.minor == 0xff))
 		return MPC85XX_CPU_BOARD_REV(0, 0);
 
-	return MPC85XX_CPU_BOARD_REV(e.major, e.minor);
+	return MPC85XX_CPU_BOARD_REV(be.major, be.minor);
 }
 #endif
-- 
cgit v0.10.2


From dffd2446fb041f38ef034b0fcf41e51e5e489159 Mon Sep 17 00:00:00 2001
From: Wolfgang Grandegger <wg@grandegger.com>
Date: Tue, 30 Sep 2008 10:55:57 +0200
Subject: 85xx: Using proper I2C source clock divider for MPC8544

Measurements with our MPC8544 board showed that the I2C bus frequency
is wrong by a factor of 1.5. Obviously, the interpretation of the
MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
correct. There seems to be an error in the 8544 RM.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 485ba20..70dfad0 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -102,9 +102,9 @@ int get_clocks (void)
 	 * PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
 	 */
 	if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
-		gd->i2c1_clk = sys_info.freqSystemBus / 3;
-	else
 		gd->i2c1_clk = sys_info.freqSystemBus / 2;
+	else
+		gd->i2c1_clk = sys_info.freqSystemBus / 3;
 #else
 	/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
 	gd->i2c1_clk = sys_info.freqSystemBus / 2;
-- 
cgit v0.10.2


From f3bf9273939ffe1a60a32a2eef909097f15df56b Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@kernel.crashing.org>
Date: Wed, 8 Oct 2008 15:36:39 -0500
Subject: MPC8572DS: Fix compile warnings

Commit 445a7b38308eb05b41de74165b20855db58c7ee5 introduced the following
compile warnings:

cmd_i2c.c:112: warning: missing braces around initializer
cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]')

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index fbe7b61..4114a42 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -299,7 +299,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CFG_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR	0x57
 #define CFG_I2C_SLAVE		0x7F
-#define CFG_I2C_NOPROBES	{0,0x29} /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES	{{0,0x29}}/* Don't probe these addrs */
 #define CFG_I2C_OFFSET		0x3000
 #define CFG_I2C2_OFFSET		0x3100
 
-- 
cgit v0.10.2