From 23f00caf6ebb9bcb804e48f5a4630629f64af471 Mon Sep 17 00:00:00 2001 From: Sergei Ianovich Date: Tue, 17 Dec 2013 05:03:40 +0400 Subject: ARM: pxa: prevent PXA270 occasional reboot freezes Erratum 71 of PXA270M Processor Family Specification Update (April 19, 2010) explains that watchdog reset time is just 8us insead of 10ms in EMTS. If SDRAM is not reset, it causes memory bus congestion and the device hangs. We put SDRAM in selfresh mode before watchdog reset, removing potential freezes. Signed-off-by: Sergei Ianovich CC: Marek Vasut diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index c9a7d45..7e861e2 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -279,6 +279,7 @@ void reset_cpu(ulong ignored) tmp = readl(OSCR); tmp += 0x1000; writel(tmp, OSMR3); + writel(MDREFR_SLFRSH, MDREFR); for (;;) ; -- cgit v0.10.2 From a3d6ca432303bc19926a885c83149401abc24d0d Mon Sep 17 00:00:00 2001 From: Sergei Ianovich Date: Wed, 18 Dec 2013 20:19:20 +0400 Subject: arm: pxa: fix LP-8x4x USB support Signed-off-by: Sergei Ianovich CC: Marek Vasut diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c index 92dd4ff..5eee18a 100644 --- a/board/icpdas/lp8x4x/lp8x4x.c +++ b/board/icpdas/lp8x4x/lp8x4x.c @@ -61,15 +61,24 @@ int board_mmc_init(bd_t *bis) #ifdef CONFIG_CMD_USB int board_usb_init(int index, enum usb_init_type init) { - writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE), - UHCHR); + if (index !=0 || init != USB_INIT_HOST) + return -1; + + writel(readl(CKEN) | CKEN10_USBHOST, CKEN); + + writel(readl(UHCHR) | UHCHR_FHR, UHCHR); + udelay(11); + writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR); while (readl(UHCHR) & UHCHR_FSBIR) continue; /* required by checkpath.pl */ + writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR); + writel(readl(UHCRHDA) & ~(0x1000), UHCRHDA); + writel(readl(UHCRHDA) | 0x800, UHCRHDA); + writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR); writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE); @@ -83,19 +92,10 @@ int board_usb_init(int index, enum usb_init_type init) /* Set port power control mask bits, only 3 ports. */ writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB); - /* enable port 2 */ - writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS | - UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR); - return 0; } -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} - -void usb_board_stop(void) +int usb_board_stop(void) { writel(readl(UHCHR) | UHCHR_FHR, UHCHR); udelay(11); @@ -104,9 +104,19 @@ void usb_board_stop(void) writel(readl(UHCCOMS) | 1, UHCCOMS); udelay(10); + writel(readl(UHCHR) | UHCHR_SSEP0 | UHCHR_SSE, UHCHR); + writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN); - return; + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + if (index !=0 || init != USB_INIT_HOST) + return -1; + + return usb_board_stop(); } #endif diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h index 68e1a97..324cc4d 100644 --- a/include/configs/lp8x4x.h +++ b/include/configs/lp8x4x.h @@ -184,7 +184,7 @@ #define CONFIG_SYS_GAFR1_L_VAL 0x999a955a #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a00a #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa -#define CONFIG_SYS_GAFR2_U_VAL 0x55f0a402 +#define CONFIG_SYS_GAFR2_U_VAL 0x55f9a402 #define CONFIG_SYS_GAFR3_L_VAL 0x540a950c #define CONFIG_SYS_GAFR3_U_VAL 0x00001599 @@ -232,7 +232,6 @@ */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_BOARD_INIT #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 -- cgit v0.10.2 From bf92349b41fb61364f2ea3b93d547eb68ade0946 Mon Sep 17 00:00:00 2001 From: Sergei Ianovich Date: Tue, 17 Dec 2013 05:03:42 +0400 Subject: arm: pxa: fix 2nd flash chip address on LP-8x4x Initial configuration has worng address of the second chip. There is an alias for the 1st chip at 0x02000000 in earlier verions of LP-8x4x, so the boot normally. However, new LP-8x4xs have a bigger 1st flash chip, and hang on boot without this patch. Signed-off-by: Sergei Ianovich CC: Marek Vasut diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h index 324cc4d..c5bf2fa 100644 --- a/include/configs/lp8x4x.h +++ b/include/configs/lp8x4x.h @@ -144,7 +144,7 @@ #define CONFIG_ENV_SECT_SIZE 0x40000 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */ +#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ #define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER 1 -- cgit v0.10.2 From 7cd5441eb3b4fb30e6502ede0b80ae09674bdabf Mon Sep 17 00:00:00 2001 From: Sergei Ianovich Date: Tue, 17 Dec 2013 05:03:43 +0400 Subject: arm: pxa: update LP-8x4x to boot DT kernel DT kernel requires CONFIG_OF_LIBFDT. 'bootm' needs to know DT location. In addition, fix kernel console device and enable U-Boot long help. Signed-off-by: Sergei Ianovich CC: Marek Vasut diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h index c5bf2fa..8e58fea 100644 --- a/include/configs/lp8x4x.h +++ b/include/configs/lp8x4x.h @@ -20,18 +20,18 @@ #define CONFIG_SYS_MALLOC_LEN (128*1024) #define CONFIG_ARCH_CPU_INIT #define CONFIG_BOOTCOMMAND \ - "bootm 80000;" + "bootm 80000 - 240000;" #define CONFIG_BOOTARGS \ - "console=ttySA0,115200 mem=128M root=/dev/mmcblk0p1 rw" \ - "init=/sbin/init rootfstype=ext3" + "console=ttyS0,115200 mem=128M root=/dev/mmcblk0p1 rw" \ + "init=/sbin/init rootfstype=ext4 rootwait" #define CONFIG_TIMESTAMP #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_LZMA /* LZMA compression support */ -#undef CONFIG_OF_LIBFDT +#define CONFIG_OF_LIBFDT /* * Serial Console Configuration @@ -101,7 +101,7 @@ */ #define CONFIG_SYS_HUSH_PARSER 1 -#undef CONFIG_SYS_LONGHELP +#define CONFIG_SYS_LONGHELP #ifdef CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT "$ " #else -- cgit v0.10.2 From 914f2bd1f07fba93639ad1273d4cd458b0ee99cc Mon Sep 17 00:00:00 2001 From: Sergei Ianovich Date: Tue, 17 Dec 2013 05:03:44 +0400 Subject: arm: pxa: init ethaddr for LP-8x4x using DT When DT define aliases for etherner0 and ethernet1, U-Boot automatically patched MAC addresses using ethaddr and eth1addr environment variables respectively. Custom initialization is no longer needed. Signed-off-by: Sergei Ianovich CC: Marek Vasut diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c index 5eee18a..a136dc4 100644 --- a/board/icpdas/lp8x4x/lp8x4x.c +++ b/board/icpdas/lp8x4x/lp8x4x.c @@ -121,25 +121,8 @@ int board_usb_cleanup(int index, enum usb_init_type init) #endif #ifdef CONFIG_DRIVER_DM9000 -void lp8x4x_eth1_mac_init(void) -{ - u8 eth1addr[8]; - int i; - u8 reg; - - eth_getenv_enetaddr_by_index("eth", 1, eth1addr); - if (!is_valid_ether_addr(eth1addr)) - return; - - for (i = 0, reg = 0x10; i < 6; i++, reg++) { - writeb(reg, (u8 *)(DM9000_IO_2)); - writeb(eth1addr[i], (u8 *)(DM9000_DATA_2)); - } -} - int board_eth_init(bd_t *bis) { - lp8x4x_eth1_mac_init(); return dm9000_initialize(bis); } #endif -- cgit v0.10.2 From f90aea2a65e71a37ff029849d908538ae9e98283 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 4 Nov 2013 20:50:21 +0100 Subject: ARM: pxa: Fix CONFIG_SYS_HZ on PXA The PXA incorrectly uses CONFIG_SYS_HZ, which should be 1000 across U-Boot. Fix this. Signed-off-by: Marek Vasut Cc: Tom Rini Cc: Albert Aribaud diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index 12df45b..d3d6274 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -85,7 +85,7 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ /* @@ -128,10 +128,10 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 +#define CONFIG_SYS_FLASH_LOCK_TOUT 240000 +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_ENV_IS_IN_FLASH #else diff --git a/include/configs/palmld.h b/include/configs/palmld.h index 84bc9ed..a5b6e3a 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -116,7 +116,7 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */ /* @@ -159,10 +159,10 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_LOCK_TOUT (25*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25*CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 +#define CONFIG_SYS_FLASH_LOCK_TOUT 240000 +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 661101c..7303e1c 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -118,7 +118,7 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */ /* @@ -156,10 +156,10 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 +#define CONFIG_SYS_FLASH_LOCK_TOUT 240000 +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index a09310c..c0048ac 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -69,7 +69,7 @@ #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0x08F00000 -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ #define CONFIG_BAUDRATE 115200 @@ -143,8 +143,8 @@ now.*/ #undef CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Erase operation */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Write operation */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* timeout for Erase operation */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 /* timeout for Write operation */ #define CONFIG_SYS_FLASH_BASE SCB9328_FLASH_BASE diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 52a745e..904f3b0 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -139,7 +139,7 @@ unsigned char zipitz2_spi_read(void); * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ /* @@ -186,10 +186,10 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 +#define CONFIG_SYS_FLASH_LOCK_TOUT 240000 +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 #define CONFIG_SYS_FLASH_PROTECTION /* -- cgit v0.10.2