From c40b29568232761e33400e58be86b15a167d3422 Mon Sep 17 00:00:00 2001 From: wdenk Date: Sat, 13 Mar 2004 23:29:43 +0000 Subject: * Patch by Rune Torgersen, 27 Feb 2004: - Added LBA48 support (CONFIG_LBA48 & CFG_64BIT_LBA) - Added support for 64bit printing in vsprintf (CFG_64BIT_VSPRINTF) - Added support for 64bit strtoul (CFG_64BIT_STRTOUL) * Patch by Masami Komiya, 27 Feb 2004: Fix rarpboot: add autoload by NFS * Patch by Dan Eisenhut, 26 Feb 2004: fix flash_write return value in saveenv * Patch by Stephan Linz, 11 Dec 2003 expand config.mk to avoid trigraph warnings on NIOS * Rename "BMS2003" board into "HMI10" diff --git a/CHANGELOG b/CHANGELOG index c8abefe..a282c85 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,22 @@ Changes for U-Boot 1.0.2: ====================================================================== +* Patch by Rune Torgersen, 27 Feb 2004: + - Added LBA48 support (CONFIG_LBA48 & CFG_64BIT_LBA) + - Added support for 64bit printing in vsprintf (CFG_64BIT_VSPRINTF) + - Added support for 64bit strtoul (CFG_64BIT_STRTOUL) + +* Patch by Masami Komiya, 27 Feb 2004: + Fix rarpboot: add autoload by NFS + +* Patch by Dan Eisenhut, 26 Feb 2004: + fix flash_write return value in saveenv + +* Patch by Stephan Linz, 11 Dec 2003 + expand config.mk to avoid trigraph warnings on NIOS + +* Rename "BMS2003" board into "HMI10" + * SX1 patches: use "serial#" for USB serial #; use redundand environment storage; auto-set console on USB port (using preboot command) diff --git a/Makefile b/Makefile index d1593ee..2e862bf 100644 --- a/Makefile +++ b/Makefile @@ -261,9 +261,6 @@ FADS860T_config: unconfig AMX860_config : unconfig @./mkconfig $(@:_config=) ppc mpc8xx amx860 westel -bms2003_config : unconfig - @./mkconfig $(@:_config=) ppc mpc8xx tqm8xx - c2mon_config: unconfig @./mkconfig $(@:_config=) ppc mpc8xx c2mon @@ -305,6 +302,9 @@ GTH_config: unconfig hermes_config : unconfig @./mkconfig $(@:_config=) ppc mpc8xx hermes +HMI10_config : unconfig + @./mkconfig $(@:_config=) ppc mpc8xx tqm8xx + IAD210_config: unconfig @./mkconfig $(@:_config=) ppc mpc8xx IAD210 siemens diff --git a/README b/README index dc9d975..5bf0ead 100644 --- a/README +++ b/README @@ -670,6 +670,18 @@ The following options need to be configured: Set this to enable ATAPI support. +- LBA48 Support + CONFIG_LBA48 + + Set this to enable support for disks larger than 137GB + Also look at CFG_64BIT_LBA ,CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL + Whithout these , LBA48 support uses 32bit variables and will 'only' + support disks up to 2.1TB. + + CFG_64BIT_LBA: + When enabled, makes the IDE subsystem use 64bit sector addresses. + Default is 32bit. + - SCSI Support: At the moment only there is only support for the SYM53C8XX SCSI controller; define @@ -1713,6 +1725,13 @@ use the "saveenv" command to store a valid environment. - CFG_FAULT_MII_ADDR: MII address of the PHY to check for the Ethernet link state. +- CFG_64BIT_VSPRINTF: + Makes vsprintf (and all *printf functions) support printing + of 64bit values by using the L quantifier + +- CFG_64BIT_STRTOUL: + Adds simple_strtoull that returns a 64bit value + Low Level (hardware related) configuration options: --------------------------------------------------- diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c index 9e9cbd3..b90f5e7 100644 --- a/board/tqm8xx/tqm8xx.c +++ b/board/tqm8xx/tqm8xx.c @@ -425,7 +425,7 @@ static long int dram_size (long int mamr_value, long int *base, long int maxsize #ifdef CONFIG_PS2MULT -#ifdef CONFIG_BMS2003 +#ifdef CONFIG_HMI10 #define BASE_BAUD ( 1843200 / 16 ) struct serial_state rs_table[] = { { BASE_BAUD, 4, (void*)0xec140000 }, @@ -441,12 +441,12 @@ int board_early_init_r (void) return (0); } #endif -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ #endif /* CONFIG_PS2MULT */ /* ------------------------------------------------------------------------- */ -#ifdef CONFIG_BMS2003 +#ifdef CONFIG_HMI10 int misc_init_r (void) { @@ -476,5 +476,5 @@ void ide_led (uchar led, uchar status) } #endif -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ /* ------------------------------------------------------------------------- */ diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 5bde500..1778b33 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -139,7 +139,7 @@ static block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE]; /* ------------------------------------------------------------------------- */ #ifdef CONFIG_IDE_LED -#if !defined(CONFIG_KUP4K) && !defined(CONFIG_BMS2003) +#if !defined(CONFIG_KUP4K) && !defined(CONFIG_HMI10) static void ide_led (uchar led, uchar status); #else extern void ide_led (uchar led, uchar status); @@ -180,7 +180,7 @@ static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len #ifdef CONFIG_ATAPI static void atapi_inquiry(block_dev_desc_t *dev_desc); -ulong atapi_read (int device, ulong blknr, ulong blkcnt, ulong *buffer); +ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer); #endif @@ -303,11 +303,15 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if (strcmp(argv[1],"read") == 0) { ulong addr = simple_strtoul(argv[2], NULL, 16); - ulong blk = simple_strtoul(argv[3], NULL, 16); +#if CFG_64BIT_STRTOUL + lbaint_t blk = simple_strtoull(argv[3], NULL, 16); +#else + lbaint_t blk = simple_strtoul(argv[3], NULL, 16); +#endif ulong cnt = simple_strtoul(argv[4], NULL, 16); ulong n; - printf ("\nIDE read: device %d block # %ld, count %ld ... ", + printf ("\nIDE read: device %d block # %qd, count %ld ... ", curr_device, blk, cnt); n = ide_dev_desc[curr_device].block_read (curr_device, @@ -325,11 +329,15 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } } else if (strcmp(argv[1],"write") == 0) { ulong addr = simple_strtoul(argv[2], NULL, 16); - ulong blk = simple_strtoul(argv[3], NULL, 16); +#if CFG_64BIT_STRTOUL + lbaint_t blk = simple_strtoull(argv[3], NULL, 16); +#else + lbaint_t blk = simple_strtoul(argv[3], NULL, 16); +#endif ulong cnt = simple_strtoul(argv[4], NULL, 16); ulong n; - printf ("\nIDE write: device %d block # %ld, count %ld ... ", + printf ("\nIDE write: device %d block # %qd, count %ld ... ", curr_device, blk, cnt); n = ide_write (curr_device, blk, cnt, (ulong *)addr); @@ -607,8 +615,7 @@ void ide_init (void) ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */ #ifdef CONFIG_AMIGAONEG3SE /* If this is the second bus, the first one was OK */ - if (bus != 0) - { + if (bus != 0) { ide_bus_ok[bus] = 0; goto skip_bus; } @@ -838,7 +845,7 @@ output_data_short(int dev, ulong *sect_buf, int words) static void input_swap_data(int dev, ulong *sect_buf, int words) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); ushort *dbuf = (ushort *)sect_buf; @@ -846,7 +853,7 @@ input_swap_data(int dev, ulong *sect_buf, int words) *dbuf++ = ld_le16(pbuf); *dbuf++ = ld_le16(pbuf); } -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ uchar i; volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN); volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD); @@ -859,7 +866,7 @@ input_swap_data(int dev, ulong *sect_buf, int words) dbuf+=1; } } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ } #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */ @@ -868,7 +875,7 @@ input_swap_data(int dev, ulong *sect_buf, int words) static void output_data(int dev, ulong *sect_buf, int words) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 ushort *dbuf; volatile ushort *pbuf; @@ -880,7 +887,7 @@ output_data(int dev, ulong *sect_buf, int words) __asm__ volatile ("eieio"); *pbuf = *dbuf++; } -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ uchar *dbuf; volatile uchar *pbuf_even; volatile uchar *pbuf_odd; @@ -898,7 +905,7 @@ output_data(int dev, ulong *sect_buf, int words) __asm__ volatile ("eieio"); *pbuf_odd = *dbuf++; } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ } #else /* ! __PPC__ */ static void @@ -912,7 +919,7 @@ output_data(int dev, ulong *sect_buf, int words) static void input_data(int dev, ulong *sect_buf, int words) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 ushort *dbuf; volatile ushort *pbuf; @@ -924,7 +931,7 @@ input_data(int dev, ulong *sect_buf, int words) __asm__ volatile ("eieio"); *dbuf++ = *pbuf; } -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ uchar *dbuf; volatile uchar *pbuf_even; volatile uchar *pbuf_odd; @@ -942,7 +949,7 @@ input_data(int dev, ulong *sect_buf, int words) __asm__ volatile ("eieio"); *dbuf++ = *pbuf_odd; } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ } #else /* ! __PPC__ */ static void @@ -968,8 +975,7 @@ input_data_short(int dev, ulong *sect_buf, int words) __asm__ volatile ("eieio"); } - if (words&1) - { + if (words&1) { ushort dummy; dummy = *pbuf; } @@ -1023,8 +1029,7 @@ static void ide_ident (block_dev_desc_t *dev_desc) retries = 0; /* Warning: This will be tricky to read */ - while (retries <= 1) - { + while (retries <= 1) { #endif /* CONFIG_AMIGAONEG3SE */ /* check signature */ @@ -1042,8 +1047,7 @@ static void ide_ident (block_dev_desc_t *dev_desc) * to become ready */ c = ide_wait (device, ATAPI_TIME_OUT); - } - else + } else #endif { /* Start Ident Command @@ -1133,6 +1137,19 @@ static void ide_ident (block_dev_desc_t *dev_desc) /* swap shorts */ dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16); + +#if CONFIG_LBA48 + if (iop->command_set_2 & 0x0400) { /* LBA 48 support */ + dev_desc->lba48support = 1; + dev_desc->lba48 = (unsigned long long)iop->lba48_capacity[0] | + ((unsigned long long)iop->lba48_capacity[1] << 16) | + ((unsigned long long)iop->lba48_capacity[2] << 32) | + ((unsigned long long)iop->lba48_capacity[3] << 48); + } else { + dev_desc->lba48support = 0; + dev_desc->lba48 = 0; + } +#endif /* CONFIG_LBA48 */ /* assuming HD */ dev_desc->type=DEV_TYPE_HARDDISK; dev_desc->blksz=ATA_BLOCKSIZE; @@ -1158,13 +1175,20 @@ static void ide_ident (block_dev_desc_t *dev_desc) /* ------------------------------------------------------------------------- */ -ulong ide_read (int device, ulong blknr, ulong blkcnt, ulong *buffer) +ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer) { ulong n = 0; unsigned char c; unsigned char pwrsave=0; /* power save */ +#if CONFIG_LBA48 + unsigned char lba48 = 0; - PRINTF ("ide_read dev %d start %lX, blocks %lX buffer at %lX\n", + if (blknr & 0x0000fffff0000000) { + /* more than 28 bits used, use 48bit mode */ + lba48 = 1; + } +#endif + PRINTF ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n", device, blknr, blkcnt, (ulong)buffer); ide_led (DEVICE_LED(device), 1); /* LED on */ @@ -1208,15 +1232,33 @@ ulong ide_read (int device, ulong blknr, ulong blkcnt, ulong *buffer) printf ("IDE read: device %d not ready\n", device); break; } - +#if CONFIG_LBA48 + if (lba48) { + /* write high bits */ + ide_outb (device, ATA_SECT_CNT, 0); + ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); + ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF); + ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); + } +#endif ide_outb (device, ATA_SECT_CNT, 1); ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF); ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); - ide_outb (device, ATA_DEV_HD, ATA_LBA | - ATA_DEVICE(device) | - ((blknr >> 24) & 0xF) ); - ide_outb (device, ATA_COMMAND, ATA_CMD_READ); + +#if CONFIG_LBA48 + if (lba48) { + ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) ); + ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT); + + } else +#endif + { + ide_outb (device, ATA_DEV_HD, ATA_LBA | + ATA_DEVICE(device) | + ((blknr >> 24) & 0xF) ); + ide_outb (device, ATA_COMMAND, ATA_CMD_READ); + } udelay (50); @@ -1228,8 +1270,13 @@ ulong ide_read (int device, ulong blknr, ulong blkcnt, ulong *buffer) } if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) { - printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", +#if CFG_64BIT_LBA && CFG_64BIT_VSPRINTF + printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n", device, blknr, c); +#else + printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", + device, (ulong)blknr, c); +#endif break; } @@ -1248,10 +1295,18 @@ IDE_READ_E: /* ------------------------------------------------------------------------- */ -ulong ide_write (int device, ulong blknr, ulong blkcnt, ulong *buffer) +ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer) { ulong n = 0; unsigned char c; +#if CONFIG_LBA48 + unsigned char lba48 = 0; + + if (blknr & 0x0000fffff0000000) { + /* more than 28 bits used, use 48bit mode */ + lba48 = 1; + } +#endif ide_led (DEVICE_LED(device), 1); /* LED on */ @@ -1267,23 +1322,46 @@ ulong ide_write (int device, ulong blknr, ulong blkcnt, ulong *buffer) printf ("IDE read: device %d not ready\n", device); goto WR_OUT; } - +#if CONFIG_LBA48 + if (lba48) { + /* write high bits */ + ide_outb (device, ATA_SECT_CNT, 0); + ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); + ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF); + ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); + } +#endif ide_outb (device, ATA_SECT_CNT, 1); ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF); ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); - ide_outb (device, ATA_DEV_HD, ATA_LBA | - ATA_DEVICE(device) | - ((blknr >> 24) & 0xF) ); - ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE); + +#if CONFIG_LBA48 + if (lba48) { + ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) ); + ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT); + + } else +#endif + { + ide_outb (device, ATA_DEV_HD, ATA_LBA | + ATA_DEVICE(device) | + ((blknr >> 24) & 0xF) ); + ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE); + } udelay (50); c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */ if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) { - printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", +#if CFG_64BIT_LBA && CFG_64BIT_VSPRINTF + printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n", device, blknr, c); +#else + printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", + device, (ulong)blknr, c); +#endif goto WR_OUT; } @@ -1426,7 +1504,7 @@ static void ide_reset (void) /* ------------------------------------------------------------------------- */ -#if defined(CONFIG_IDE_LED) && !defined(CONFIG_AMIGAONEG3SE) && !defined(CONFIG_KUP4K) && !defined(CONFIG_BMS2003) +#if defined(CONFIG_IDE_LED) && !defined(CONFIG_AMIGAONEG3SE) && !defined(CONFIG_KUP4K) && !defined(CONFIG_HMI10) static uchar led_buffer = 0; /* Buffer for current LED status */ @@ -1467,7 +1545,7 @@ static void ide_led (uchar led, uchar status) static void output_data_shorts(int dev, ushort *sect_buf, int shorts) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 ushort *dbuf; volatile ushort *pbuf; @@ -1477,7 +1555,7 @@ output_data_shorts(int dev, ushort *sect_buf, int shorts) __asm__ volatile ("eieio"); *pbuf = *dbuf++; } -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ uchar *dbuf; volatile uchar *pbuf_even; volatile uchar *pbuf_odd; @@ -1490,13 +1568,13 @@ output_data_shorts(int dev, ushort *sect_buf, int shorts) __asm__ volatile ("eieio"); *pbuf_odd = *dbuf++; } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ } static void input_data_shorts(int dev, ushort *sect_buf, int shorts) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 ushort *dbuf; volatile ushort *pbuf; @@ -1506,7 +1584,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) __asm__ volatile ("eieio"); *dbuf++ = *pbuf; } -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ uchar *dbuf; volatile uchar *pbuf_even; volatile uchar *pbuf_odd; @@ -1519,7 +1597,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts) __asm__ volatile ("eieio"); *dbuf++ = *pbuf_odd; } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ } #else /* ! __PPC__ */ @@ -1858,6 +1936,7 @@ static void atapi_inquiry(block_dev_desc_t * dev_desc) ((unsigned long)iobuf[5]<<16) + ((unsigned long)iobuf[6]<< 8) + ((unsigned long)iobuf[7]); + dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */ return; } @@ -1871,7 +1950,7 @@ static void atapi_inquiry(block_dev_desc_t * dev_desc) #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */ #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */ -ulong atapi_read (int device, ulong blknr, ulong blkcnt, ulong *buffer) +ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer) { ulong n = 0; unsigned char ccb[12]; /* Command descriptor block */ diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c index 53d2227..cb4e4c6 100644 --- a/common/cmd_pcmcia.c +++ b/common/cmd_pcmcia.c @@ -160,8 +160,8 @@ int pcmcia_on (void) } #else -#ifdef CONFIG_BMS2003 -# define BMS2003_FRAM_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(2) | PCMCIA_SL(4)) +#ifdef CONFIG_HMI10 +# define HMI10_FRAM_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(2) | PCMCIA_SL(4)) #endif #if defined(CONFIG_LWMON) || defined(CONFIG_NSCU) # define CFG_PCMCIA_TIMING (PCMCIA_SHT(9) | PCMCIA_SST(3) | PCMCIA_SL(12)) @@ -200,14 +200,14 @@ int pcmcia_on (void) switch (i) { #ifdef CONFIG_IDE_8xx_PCCARD case 4: -#ifdef CONFIG_BMS2003 +#ifdef CONFIG_HMI10 { /* map FRAM area */ win->or = ( PCMCIA_BSIZE_256K | PCMCIA_PPS_8 | PCMCIA_PRS_ATTR | slotbit | PCMCIA_PV - | BMS2003_FRAM_TIMING ); + | HMI10_FRAM_TIMING ); break; } #endif @@ -241,7 +241,7 @@ int pcmcia_on (void) break; } #endif /* CONFIG_IDE_8xx_PCCARD */ -#ifdef CONFIG_BMS2003 +#ifdef CONFIG_HMI10 case 3: { /* map I/O window for 4xUART data/ctrl */ win->br += 0x40000; win->or = ( PCMCIA_BSIZE_256K @@ -252,7 +252,7 @@ int pcmcia_on (void) | CFG_PCMCIA_TIMING ); break; } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ default: /* set to not valid */ win->or = 0; break; @@ -636,7 +636,7 @@ static int hardware_enable(int slot) PCMCIA_PGCRX(slot) = reg; udelay(500); -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 #ifndef CONFIG_NSCU /* * Configure Port C pins for @@ -648,7 +648,7 @@ static int hardware_enable(int slot) immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004); #endif -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ /* * Configure Port B pins for * 5 Volts Enable and 3 Volts enable @@ -657,7 +657,7 @@ static int hardware_enable(int slot) /* remove all power */ immap->im_cpm.cp_pbdat |= 0x00000300; -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ /* * Make sure there is a card in the slot, then configure the interface. @@ -666,11 +666,11 @@ static int hardware_enable(int slot) debug ("[%d] %s: PIPR(%p)=0x%x\n", __LINE__,__FUNCTION__, &(pcmp->pcmc_pipr),pcmp->pcmc_pipr); -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) { #else if (pcmp->pcmc_pipr & (0x10000000 >> (slot << 4))) { -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ printf (" No Card found\n"); return (1); } @@ -686,25 +686,25 @@ static int hardware_enable(int slot) (reg&PCMCIA_VS2(slot))?"n":"ff"); #ifndef CONFIG_NSCU if ((reg & mask) == mask) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 immap->im_ioport.iop_pcdat |= 0x0004; #else immap->im_cpm.cp_pbdat &= ~(0x0000100); -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ puts (" 5.0V card found: "); } else { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 immap->im_ioport.iop_pcdat |= 0x0002; #else immap->im_cpm.cp_pbdat &= ~(0x0000200); -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ puts (" 3.3V card found: "); } -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004); #else immap->im_cpm.cp_pbdir |= 0x00000300; -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ #else if ((reg & mask) == mask) { puts (" 5.0V card found: "); @@ -749,14 +749,14 @@ static int hardware_disable(int slot) immap = (immap_t *)CFG_IMMR; pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 #ifndef CONFIG_NSCU /* remove all power */ immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004); #endif -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ immap->im_cpm.cp_pbdat |= 0x00000300; -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ debug ("Disable PCMCIA buffers and assert RESET\n"); reg = 0; @@ -806,7 +806,7 @@ static int voltage_set(int slot, int vcc, int vpp) PCMCIA_PGCRX(slot) = reg; udelay(500); -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 /* * Configure Port C pins for * 5 Volts Enable and 3 Volts enable, @@ -824,7 +824,7 @@ static int voltage_set(int slot, int vcc, int vpp) case 50: reg |= 0x0004; break; default: goto done; } -#else /* CONFIG_BMS2003 */ +#else /* CONFIG_HMI10 */ /* * Configure Port B pins for * 5 Volts Enable and 3 Volts enable, @@ -843,7 +843,7 @@ static int voltage_set(int slot, int vcc, int vpp) case 50: reg |= 0x00000100; break; default: goto done; } -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ /* Checking supported voltages */ @@ -851,21 +851,21 @@ static int voltage_set(int slot, int vcc, int vpp) pcmp->pcmc_pipr, (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V"); -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 immap->im_ioport.iop_pcdat |= reg; immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004); #else immap->im_cpm.cp_pbdat &= !reg; immap->im_cpm.cp_pbdir |= 0x00000300; -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ if (reg) { -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 debug ("PCMCIA powered at %sV\n", (reg&0x0004) ? "5.0" : "3.3"); #else debug ("PCMCIA powered at %sV\n", (reg&0x00000200) ? "5.0" : "3.3"); -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ } else { debug ("PCMCIA powered down\n"); } @@ -1850,11 +1850,11 @@ static int hardware_enable (int slot) debug ("[%d] %s: PIPR(%p)=0x%x\n", __LINE__,__FUNCTION__, &(pcmp->pcmc_pipr),pcmp->pcmc_pipr); -#ifndef CONFIG_BMS2003 +#ifndef CONFIG_HMI10 if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) { #else if (pcmp->pcmc_pipr & (0x10000000 >> (slot << 4))) { -#endif /* CONFIG_BMS2003 */ +#endif /* CONFIG_HMI10 */ printf (" No Card found\n"); return (1); } diff --git a/common/env_flash.c b/common/env_flash.c index af99880..079f84d 100644 --- a/common/env_flash.c +++ b/common/env_flash.c @@ -207,21 +207,21 @@ int saveenv(void) debug (" %08lX ... %08lX ...", (ulong)&(flash_addr_new->data), sizeof(env_ptr->data)+(ulong)&(flash_addr_new->data)); - if (flash_write(env_ptr->data, + if ((rc = flash_write(env_ptr->data, (ulong)&(flash_addr_new->data), - sizeof(env_ptr->data)) || + sizeof(env_ptr->data))) || - flash_write((char *)&(env_ptr->crc), + (rc = flash_write((char *)&(env_ptr->crc), (ulong)&(flash_addr_new->crc), - sizeof(env_ptr->crc)) || + sizeof(env_ptr->crc))) || - flash_write((char *)&obsolete_flag, + (rc = flash_write((char *)&obsolete_flag, (ulong)&(flash_addr->flags), - sizeof(flash_addr->flags)) || + sizeof(flash_addr->flags))) || - flash_write((char *)&active_flag, + (rc = flash_write((char *)&active_flag, (ulong)&(flash_addr_new->flags), - sizeof(flash_addr_new->flags))) + sizeof(flash_addr_new->flags)))) { flash_perror (rc); goto Done; diff --git a/config.mk b/config.mk index 51ca5f0..313761b 100644 --- a/config.mk +++ b/config.mk @@ -122,6 +122,14 @@ else CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes endif +# avoid trigraph warnings while parsing pci.h (produced by NIOS gcc-2.9) +# this option have to be placed behind -Wall -- that's why it is here +ifeq ($(ARCH),nios) +ifeq ($(findstring 2.9,$(shell $(CC) --version)),2.9) +CFLAGS := $(CPPFLAGS) -Wno-trigraphs +endif +endif + AFLAGS_DEBUG := -Wa,-gstabs AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) diff --git a/disk/part.c b/disk/part.c index 0acc5c2..783b391 100644 --- a/disk/part.c +++ b/disk/part.c @@ -44,7 +44,11 @@ */ void dev_print (block_dev_desc_t *dev_desc) { - ulong lba512; /* number of blocks if 512bytes block size */ +#if CONFIG_LBA48 + uint64_t lba512; /* number of blocks if 512bytes block size */ +#else + lbaint_t lba512; +#endif if (dev_desc->type==DEV_TYPE_UNKNOWN) { puts ("not available\n"); @@ -82,9 +86,15 @@ void dev_print (block_dev_desc_t *dev_desc) puts ("\n"); if ((dev_desc->lba * dev_desc->blksz)>0L) { ulong mb, mb_quot, mb_rem, gb, gb_quot, gb_rem; + lbaint_t lba; +#if CONFIG_LBA48 + if (dev_desc->lba48support) + lba = dev_desc->lba48; + else +#endif + lba = dev_desc->lba; - lba512 = (dev_desc->lba * (dev_desc->blksz/512)); - + lba512 = (lba * (dev_desc->blksz/512)); mb = (10 * lba512) / 2048; /* 2048 = (1024 * 1024) / 512 MB */ /* round to 1 digit */ mb_quot = mb / 10; @@ -93,12 +103,23 @@ void dev_print (block_dev_desc_t *dev_desc) gb = mb / 1024; gb_quot = gb / 10; gb_rem = gb - (10 * gb_quot); - +#if CONFIG_LBA48 + if (dev_desc->lba48support) + printf (" Supports 48-bit addressing\n"); +#endif +#if CFG_64BIT_LBA && CFG_64BIT_VSPRINTF + printf (" Capacity: %ld.%ld MB = %ld.%ld GB (%qd x %ld)\n", + mb_quot, mb_rem, + gb_quot, gb_rem, + lba, + dev_desc->blksz); +#else printf (" Capacity: %ld.%ld MB = %ld.%ld GB (%ld x %ld)\n", mb_quot, mb_rem, gb_quot, gb_rem, - dev_desc->lba, + (ulong)lba, dev_desc->blksz); +#endif } else { puts (" Capacity: not available\n"); } diff --git a/include/ata.h b/include/ata.h index 719f76a..d07210b 100644 --- a/include/ata.h +++ b/include/ata.h @@ -106,6 +106,10 @@ #define ATA_CMD_SETF 0xEF /* Set Features */ #define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */ +#define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */ +#define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */ +#define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */ + /* * ATAPI Commands */ @@ -192,7 +196,7 @@ typedef struct hd_driveid { unsigned short major_rev_num; /* */ unsigned short minor_rev_num; /* */ unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */ - unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero */ + unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/ unsigned short cfsse; /* command set-feature supported extensions */ unsigned short cfs_enable_1; /* command set-feature enabled */ unsigned short cfs_enable_2; /* command set-feature enabled */ @@ -203,7 +207,10 @@ typedef struct hd_driveid { unsigned short CurAPMvalues; /* current APM values */ unsigned short word92; /* reserved (word 92) */ unsigned short hw_config; /* hardware config */ - unsigned short words94_125[32];/* reserved words 94-125 */ + unsigned short words94_99[6];/* reserved words 94-99 */ + //unsigned long long lba48_capacity; /* 4 16bit values containing lba 48 total number of sectors */ + unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */ + unsigned short words104_125[22];/* reserved words 104-125 */ unsigned short last_lun; /* reserved (word 126) */ unsigned short word127; /* reserved (word 127) */ unsigned short dlf; /* device lock function diff --git a/include/common.h b/include/common.h index a1460f4..4c39403 100644 --- a/include/common.h +++ b/include/common.h @@ -459,6 +459,9 @@ int init_timebase (void); /* lib_generic/vsprintf.c */ ulong simple_strtoul(const char *cp,char **endp,unsigned int base); +#if CFG_64BIT_VSPRINTF +unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base); +#endif long simple_strtol(const char *cp,char **endp,unsigned int base); void panic(const char *fmt, ...); int sprintf(char * buf, const char *fmt, ...); diff --git a/include/configs/HMI10.h b/include/configs/HMI10.h new file mode 100644 index 0000000..8acea1c --- /dev/null +++ b/include/configs/HMI10.h @@ -0,0 +1,526 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_HMI10 +#define CONFIG_MPC823 1 /* This is a MPC823 CPU */ +#define CONFIG_TQM823L 1 /* ...on a TQM8xxL module */ + +#define CONFIG_LCD +#define CONFIG_NEC_NL6448BC33_54 /* NEC NL6448BC33_54 display */ + +#ifdef CONFIG_LCD /* with LCD controller ? */ +#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/ +#endif + +#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ +#undef CONFIG_8xx_CONS_SMC2 +#undef CONFIG_8xx_CONS_NONE +#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */ + +#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */ +#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */ +#define CONFIG_PS2SERIAL 2 /* .. on COM3 */ +#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */ + +#define CONFIG_BOOTCOUNT_LIMIT + +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_BOARD_TYPES 1 /* support board types */ + +#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath)\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs $(bootargs) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ + ":$(hostname):$(netdev):off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm $(kernel_addr)\0" \ + "flash_self=run ramargs addip;" \ + "bootm $(kernel_addr) $(ramdisk_addr)\0" \ + "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ + "rootpath=/opt/eldk/ppc_8xx\0" \ + "bootfile=/tftpboot/HMI10/uImage\0" \ + "kernel_addr=40040000\0" \ + "ramdisk_addr=40100000\0" \ + "" +#define CONFIG_BOOTCOMMAND "run flash_self" + +#define CONFIG_BOARD_EARLY_INIT_R 1 +#define CONFIG_MISC_INIT_R 1 + +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ + +/* enable I2C and select the hardware/software driver */ +#undef CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ + +#define CFG_I2C_SPEED 40000 /* 40 kHz is supposed to work */ +#define CFG_I2C_SLAVE 0xFE + +/* Software (bit-bang) I2C driver configuration */ +#define PB_SCL 0x00000020 /* PB 26 */ +#define PB_SDA 0x00000010 /* PB 27 */ + +#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) +#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) +#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) +#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) +#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ + else immr->im_cpm.cp_pbdat &= ~PB_SDA +#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ + else immr->im_cpm.cp_pbdat &= ~PB_SCL +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ + +#undef CONFIG_WATCHDOG /* watchdog disabled */ + +#define CONFIG_STATUS_LED 1 /* Status LED enabled */ + +#define CONFIG_CAN_DRIVER 1 /* CAN Driver support enabled */ + +#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) + +#define CONFIG_MAC_PARTITION +#define CONFIG_DOS_PARTITION + +#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */ +#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ + +#ifdef CONFIG_SPLASH_SCREEN +# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_BMP | \ + CFG_CMD_DATE | \ + CFG_CMD_DHCP | \ + CFG_CMD_I2C | \ + CFG_CMD_IDE ) +#else +# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_DATE | \ + CFG_CMD_DHCP | \ + CFG_CMD_I2C | \ + CFG_CMD_IDE ) +#endif + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ + +#if 0 +#define CFG_HUSH_PARSER 1 /* use "hush" command parser */ +#endif +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +/*----------------------------------------------------------------------- + * Internal Memory Mapped Register + */ +#define CFG_IMMR 0xFFF00000 + +/*----------------------------------------------------------------------- + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CFG_INIT_RAM_ADDR CFG_IMMR +#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */ +#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_FLASH_BASE 0x40000000 +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CFG_MONITOR_BASE CFG_FLASH_BASE +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ +#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) + +/*----------------------------------------------------------------------- + * Hardware Information Block + */ +#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */ +#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */ +#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */ + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ +#endif + +/*----------------------------------------------------------------------- + * SYPCR - System Protection Control 11-9 + * SYPCR can only be written once after reset! + *----------------------------------------------------------------------- + * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze + */ +#if defined(CONFIG_WATCHDOG) +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ + SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) +#else +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) +#endif + +/*----------------------------------------------------------------------- + * SIUMCR - SIU Module Configuration 11-6 + *----------------------------------------------------------------------- + * PCMCIA config., multi-function pin tri-state + */ +#ifndef CONFIG_CAN_DRIVER +#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01) +#else /* we must activate GPL5 in the SIUMCR for CAN */ +#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01) +#endif /* CONFIG_CAN_DRIVER */ + +/*----------------------------------------------------------------------- + * TBSCR - Time Base Status and Control 11-26 + *----------------------------------------------------------------------- + * Clear Reference Interrupt Status, Timebase freezing enabled + */ +#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) + +/*----------------------------------------------------------------------- + * RTCSC - Real-Time Clock Status and Control Register 11-27 + *----------------------------------------------------------------------- + */ +#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) + +/*----------------------------------------------------------------------- + * PISCR - Periodic Interrupt Status and Control 11-31 + *----------------------------------------------------------------------- + * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled + */ +#define CFG_PISCR (PISCR_PS | PISCR_PITF) + +/*----------------------------------------------------------------------- + * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 + *----------------------------------------------------------------------- + * Reset PLL lock status sticky bit, timer expired status bit and timer + * interrupt status bit + * + * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)! + */ +#ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */ +#define CFG_PLPRCR \ + ( (5-1)< ms + * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration + * 4 Number of refresh cycles per period + * 64 Refresh cycle in ms per number of rows + * -------------------------------------------- + * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000 + * + * 50 MHz => 50.000.000 / Divider = 98 + * 66 Mhz => 66.000.000 / Divider = 129 + * 80 Mhz => 80.000.000 / Divider = 156 + */ +#if defined(CONFIG_80MHz) +#define CFG_MAMR_PTA 156 +#elif defined(CONFIG_66MHz) +#define CFG_MAMR_PTA 129 +#else /* 50 MHz */ +#define CFG_MAMR_PTA 98 +#endif /*CONFIG_??MHz */ + +/* + * For 16 MBit, refresh rates could be 31.3 us + * (= 64 ms / 2K = 125 / quad bursts). + * For a simpler initialization, 15.6 us is used instead. + * + * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks + * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank + */ +#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ +#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */ + +/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */ +#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */ +#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */ + +/* + * MAMR settings for SDRAM + */ + +/* 8 column SDRAM */ +#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ + MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ + MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) +/* 9 column SDRAM */ +#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ + MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ + MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) + + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#endif /* __CONFIG_H */ diff --git a/include/configs/bms2003.h b/include/configs/bms2003.h deleted file mode 100644 index 8a76a28..0000000 --- a/include/configs/bms2003.h +++ /dev/null @@ -1,526 +0,0 @@ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_BMS2003 -#define CONFIG_MPC823 1 /* This is a MPC823 CPU */ -#define CONFIG_TQM823L 1 /* ...on a TQM8xxL module */ - -#define CONFIG_LCD -#define CONFIG_NEC_NL6448BC33_54 /* NEC NL6448BC33_54 display */ - -#ifdef CONFIG_LCD /* with LCD controller ? */ -#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/ -#endif - -#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ -#undef CONFIG_8xx_CONS_SMC2 -#undef CONFIG_8xx_CONS_NONE -#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */ - -#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */ -#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */ -#define CONFIG_PS2SERIAL 2 /* .. on COM3 */ -#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */ - -#define CONFIG_BOOTCOUNT_LIMIT - -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ - -#define CONFIG_BOARD_TYPES 1 /* support board types */ - -#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" - -#undef CONFIG_BOOTARGS - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs $(bootargs) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ - ":$(hostname):$(netdev):off panic=1\0" \ - "flash_nfs=run nfsargs addip;" \ - "bootm $(kernel_addr)\0" \ - "flash_self=run ramargs addip;" \ - "bootm $(kernel_addr) $(ramdisk_addr)\0" \ - "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ - "rootpath=/opt/eldk/ppc_8xx\0" \ - "bootfile=/tftpboot/BMS/uImage\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ - "" -#define CONFIG_BOOTCOMMAND "run flash_self" - -#define CONFIG_BOARD_EARLY_INIT_R 1 -#define CONFIG_MISC_INIT_R 1 - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ - -/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ - -#define CFG_I2C_SPEED 40000 /* 40 kHz is supposed to work */ -#define CFG_I2C_SLAVE 0xFE - -/* Software (bit-bang) I2C driver configuration */ -#define PB_SCL 0x00000020 /* PB 26 */ -#define PB_SDA 0x00000010 /* PB 27 */ - -#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) -#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) -#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) -#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) -#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ - else immr->im_cpm.cp_pbdat &= ~PB_SDA -#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ - else immr->im_cpm.cp_pbdat &= ~PB_SCL -#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -#define CONFIG_STATUS_LED 1 /* Status LED enabled */ - -#define CONFIG_CAN_DRIVER 1 /* CAN Driver support enabled */ - -#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) - -#define CONFIG_MAC_PARTITION -#define CONFIG_DOS_PARTITION - -#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */ -#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ - -#ifdef CONFIG_SPLASH_SCREEN -# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_BMP | \ - CFG_CMD_DATE | \ - CFG_CMD_DHCP | \ - CFG_CMD_I2C | \ - CFG_CMD_IDE ) -#else -# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_DATE | \ - CFG_CMD_DHCP | \ - CFG_CMD_I2C | \ - CFG_CMD_IDE ) -#endif - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include - -/* - * Miscellaneous configurable options - */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "=> " /* Monitor Command Prompt */ - -#if 0 -#define CFG_HUSH_PARSER 1 /* use "hush" command parser */ -#endif -#ifdef CFG_HUSH_PARSER -#define CFG_PROMPT_HUSH_PS2 "> " -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ - -#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -#define CFG_LOAD_ADDR 0x100000 /* default load address */ - -#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ - -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - */ -/*----------------------------------------------------------------------- - * Internal Memory Mapped Register - */ -#define CFG_IMMR 0xFFF00000 - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM) - */ -#define CFG_INIT_RAM_ADDR CFG_IMMR -#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */ -#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ -#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CFG_SDRAM_BASE _must_ start at 0 - */ -#define CFG_SDRAM_BASE 0x00000000 -#define CFG_FLASH_BASE 0x40000000 -#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/*----------------------------------------------------------------------- - * FLASH organization - */ -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ - -#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ -#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) -#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) - -/*----------------------------------------------------------------------- - * Hardware Information Block - */ -#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */ -#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */ -#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */ - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ -#endif - -/*----------------------------------------------------------------------- - * SYPCR - System Protection Control 11-9 - * SYPCR can only be written once after reset! - *----------------------------------------------------------------------- - * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze - */ -#if defined(CONFIG_WATCHDOG) -#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) -#else -#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) -#endif - -/*----------------------------------------------------------------------- - * SIUMCR - SIU Module Configuration 11-6 - *----------------------------------------------------------------------- - * PCMCIA config., multi-function pin tri-state - */ -#ifndef CONFIG_CAN_DRIVER -#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01) -#else /* we must activate GPL5 in the SIUMCR for CAN */ -#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01) -#endif /* CONFIG_CAN_DRIVER */ - -/*----------------------------------------------------------------------- - * TBSCR - Time Base Status and Control 11-26 - *----------------------------------------------------------------------- - * Clear Reference Interrupt Status, Timebase freezing enabled - */ -#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) - -/*----------------------------------------------------------------------- - * RTCSC - Real-Time Clock Status and Control Register 11-27 - *----------------------------------------------------------------------- - */ -#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) - -/*----------------------------------------------------------------------- - * PISCR - Periodic Interrupt Status and Control 11-31 - *----------------------------------------------------------------------- - * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled - */ -#define CFG_PISCR (PISCR_PS | PISCR_PITF) - -/*----------------------------------------------------------------------- - * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 - *----------------------------------------------------------------------- - * Reset PLL lock status sticky bit, timer expired status bit and timer - * interrupt status bit - * - * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)! - */ -#ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */ -#define CFG_PLPRCR \ - ( (5-1)< ms - * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration - * 4 Number of refresh cycles per period - * 64 Refresh cycle in ms per number of rows - * -------------------------------------------- - * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000 - * - * 50 MHz => 50.000.000 / Divider = 98 - * 66 Mhz => 66.000.000 / Divider = 129 - * 80 Mhz => 80.000.000 / Divider = 156 - */ -#if defined(CONFIG_80MHz) -#define CFG_MAMR_PTA 156 -#elif defined(CONFIG_66MHz) -#define CFG_MAMR_PTA 129 -#else /* 50 MHz */ -#define CFG_MAMR_PTA 98 -#endif /*CONFIG_??MHz */ - -/* - * For 16 MBit, refresh rates could be 31.3 us - * (= 64 ms / 2K = 125 / quad bursts). - * For a simpler initialization, 15.6 us is used instead. - * - * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks - * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank - */ -#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ -#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */ - -/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */ -#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */ -#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */ - -/* - * MAMR settings for SDRAM - */ - -/* 8 column SDRAM */ -#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ - MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* 9 column SDRAM */ -#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ - MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ - MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -#endif /* __CONFIG_H */ diff --git a/include/ide.h b/include/ide.h index 08b86aa..3af12c8 100644 --- a/include/ide.h +++ b/include/ide.h @@ -38,12 +38,18 @@ #endif /* CONFIG_IDE_LED */ +#if CFG_64BIT_LBA +typedef uint64_t lbaint_t; +#else +typedef ulong lbaint_t; +#endif + /* * Function Prototypes */ void ide_init (void); -ulong ide_read (int device, ulong blknr, ulong blkcnt, ulong *buffer); -ulong ide_write (int device, ulong blknr, ulong blkcnt, ulong *buffer); +ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer); +ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer); #endif /* _IDE_H */ diff --git a/include/status_led.h b/include/status_led.h index 3438bde..4840c49 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -43,7 +43,7 @@ void status_led_tick (unsigned long timestamp); void status_led_set (int led, int state); /***** TQM8xxL ********************************************************/ -#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_BMS2003) +#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_HMI10) # define STATUS_LED_PAR im_cpm.cp_pbpar # define STATUS_LED_DIR im_cpm.cp_pbdir # define STATUS_LED_ODR im_cpm.cp_pbodr @@ -318,8 +318,8 @@ void status_led_set (int led, int state); # define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ -/***** BMS2003 ********************************************************/ -#elif defined(CONFIG_BMS2003) +/***** HMI10 **********************************************************/ +#elif defined(CONFIG_HMI10) # define STATUS_LED_PAR im_ioport.iop_papar # define STATUS_LED_DIR im_ioport.iop_padir # define STATUS_LED_ODR im_ioport.iop_paodr diff --git a/lib_generic/vsprintf.c b/lib_generic/vsprintf.c index 6b04453..3fefd61 100644 --- a/lib_generic/vsprintf.c +++ b/lib_generic/vsprintf.c @@ -55,6 +55,36 @@ long simple_strtol(const char *cp,char **endp,unsigned int base) return simple_strtoul(cp,endp,base); } +#if CFG_64BIT_STRTOUL +unsigned long long simple_strtoull (const char *cp, char **endp, unsigned int base) +{ + unsigned long long result = 0, value; + + if (*cp == '0') { + cp++; + if ((*cp == 'x') && isxdigit (cp[1])) { + base = 16; + cp++; + } + if (!base) { + base = 8; + } + } + if (!base) { + base = 10; + } + while (isxdigit (*cp) && (value = isdigit (*cp) + ? *cp - '0' + : (islower (*cp) ? toupper (*cp) : *cp) - 'A' + 10) < base) { + result = result * base + value; + cp++; + } + if (endp) + *endp = (char *) cp; + return result; +} +#endif /* CFG_64BIT_STRTOUL */ + /* we use this so that we can do without the ctype library */ #define is_digit(c) ((c) >= '0' && (c) <= '9') @@ -76,13 +106,17 @@ static int skip_atoi(const char **s) #define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ #define do_div(n,base) ({ \ -int __res; \ -__res = ((unsigned long) n) % (unsigned) base; \ -n = ((unsigned long) n) / (unsigned) base; \ -__res; }) - -static char * number(char * str, long num, int base, int size, int precision - ,int type) + int __res; \ + __res = ((unsigned long) n) % (unsigned) base; \ + n = ((unsigned long) n) / (unsigned) base; \ + __res; \ +}) + +#if CFG_64BIT_VSPRINTF +static char * number(char * str, long long num, int base, int size, int precision ,int type) +#else +static char * number(char * str, long num, int base, int size, int precision ,int type) +#endif { char c,sign,tmp[66]; const char *digits="0123456789abcdefghijklmnopqrstuvwxyz"; @@ -154,7 +188,11 @@ int sprintf(char * buf, const char *fmt, ...); int vsprintf(char *buf, const char *fmt, va_list args) { int len; +#if CFG_64BIT_VSPRINTF + unsigned long long num; +#else unsigned long num; +#endif int i, base; char * str; const char *s; @@ -164,7 +202,7 @@ int vsprintf(char *buf, const char *fmt, va_list args) int field_width; /* width of output field */ int precision; /* min. # of digits for integers; max number of chars for from string */ - int qualifier; /* 'h', 'l', or 'L' for integer fields */ + int qualifier; /* 'h', 'l', or 'q' for integer fields */ for (str=buf ; *fmt ; ++fmt) { if (*fmt != '%') { @@ -215,7 +253,7 @@ int vsprintf(char *buf, const char *fmt, va_list args) /* get the conversion qualifier */ qualifier = -1; - if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L') { + if (*fmt == 'h' || *fmt == 'l' || *fmt == 'q') { qualifier = *fmt; ++fmt; } @@ -299,6 +337,11 @@ int vsprintf(char *buf, const char *fmt, va_list args) --fmt; continue; } +#if CFG_64BIT_VSPRINTF + if (qualifier == 'q') /* "quad" for 64 bit variables */ + num = va_arg(args, unsigned long long); + else +#endif if (qualifier == 'l') num = va_arg(args, unsigned long); else if (qualifier == 'h') { diff --git a/net/rarp.c b/net/rarp.c index 1c8aff0..b8cc542 100644 --- a/net/rarp.c +++ b/net/rarp.c @@ -24,6 +24,7 @@ #include #include #include +#include "nfs.h" #include "bootp.h" #include "rarp.h" #include "tftp.h" @@ -46,9 +47,18 @@ int RarpTry; static void RarpHandler(uchar * dummi0, unsigned dummi1, unsigned dummi2, unsigned dummi3) { + char *s; #ifdef DEBUG printf("Got good RARP\n"); #endif + if (((s = getenv("autoload")) != NULL) && (*s == 'n')) { + NetState = NETLOOP_SUCCESS; + return; + } + else if ((s != NULL) && !strcmp(s, "NFS")) { + NfsStart(); + return; + } TftpStart (); } -- cgit v0.10.2