/* * Copyright (C) 2016 Stefan Roese * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _CONFIG_MVEBU_ARMADA_8K_H #define _CONFIG_MVEBU_ARMADA_8K_H /* * High Level Configuration Options (easy to change) */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_SYS_TEXT_BASE 0x00000000 /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_NR_DRAM_BANKS 1 /* auto boot */ #define CONFIG_PREBOOT #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200, 230400, 460800, 921600 } /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_INITRD_TAG /* enable INITRD tag */ #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ /* * Other required minimal configurations */ #define CONFIG_SYS_LONGHELP #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_ALT_MEMTEST /* End of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) /* * SPI Flash configuration */ #define CONFIG_KIRKWOOD_SPI #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 /* SPI NOR flash default params, used by sf commands */ #define CONFIG_SF_DEFAULT_SPEED 1000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE /* Environment in SPI NOR flash */ #ifdef CONFIG_MVEBU_SPI_BOOT #define CONFIG_ENV_IS_IN_SPI_FLASH /* Environment in NAND flash */ #elif defined(CONFIG_MVEBU_NAND_BOOT) #define CONFIG_ENV_IS_IN_NAND #endif #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_USE_FLASH_BBT /* * Ethernet Driver configuration */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) /* USB ethernet */ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_USB_ETHER_MCS7830 #define CONFIG_USB_ETHER_RTL8152 #define CONFIG_USB_ETHER_SMSC95XX /* * SATA/SCSI/AHCI configuration */ #define CONFIG_SCSI #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_LIBATA #define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) #define CONFIG_SUPPORT_VFAT /* * PCI configuration */ #ifdef CONFIG_PCIE_DW_MVEBU #define CONFIG_E1000 #define CONFIG_CMD_PCI #endif #endif /* _CONFIG_MVEBU_ARMADA_8K_H */