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| author | Andre Przywara <andre.przywara@arm.com> | 2017-04-26 00:32:40 (GMT) |
|---|---|---|
| committer | Jagan Teki <jagan@openedev.com> | 2017-05-17 17:50:31 (GMT) |
| commit | 0cef6cbe3a50cc48f6d0d574297ccb06b67e0f65 (patch) | |
| tree | c4f5424ab858b869ee898fade923a386184d4f17 /arch/arm/lib | |
| parent | 45e2d067669aee876badb23600e2145e562a961d (diff) | |
| download | u-boot-fsl-qoriq-0cef6cbe3a50cc48f6d0d574297ccb06b67e0f65.tar.xz | |
armv8: SPL: only compile GIC code if needed
Not every SoC needs to set up the GIC interrupt controller, so link
think code only when the respective config option is set.
This shaves off some bytes from the SPL code size.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch/arm/lib')
| -rw-r--r-- | arch/arm/lib/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 53d4ed2..cc5d98a 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -45,7 +45,9 @@ ifdef CONFIG_CPU_V7M obj-y += interrupts_m.o else ifdef CONFIG_ARM64 obj-y += ccn504.o +ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),) obj-y += gic_64.o +endif obj-y += interrupts_64.o else obj-y += interrupts.o |