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author | Grazvydas Ignotas <notasas@gmail.com> | 2009-07-07 21:30:01 (GMT) |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-07-12 15:43:29 (GMT) |
commit | b016000a95514c08cab50e1cba00b019c0801bc4 (patch) | |
tree | 52a65f833cde615ad9cdd260444191f865c1b137 /board | |
parent | 8672c288703f3c51c829851c8fe6608c7869faaa (diff) | |
download | u-boot-fsl-qoriq-b016000a95514c08cab50e1cba00b019c0801bc4.tar.xz |
OMAP3 pandora: Fix CKE1 MUX setting to allow self-refresh
Pandora is using both SDRC CSes. The MUX setting is needed
for the second CS clock signal to allow the 2 RAM parts to
be put in self-refresh correctly.
Based on similar patch for beagle and overo by
Jean Pihet and Steve Sakoman.
Diffstat (limited to 'board')
-rw-r--r-- | board/omap3/pandora/pandora.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/omap3/pandora/pandora.h b/board/omap3/pandora/pandora.h index dfaf32f..f06ee5b 100644 --- a/board/omap3/pandora/pandora.h +++ b/board/omap3/pandora/pandora.h @@ -396,6 +396,6 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ #endif |