From d23dc394aa69093b6326ad917db04dc0d1aff3f8 Mon Sep 17 00:00:00 2001 From: Sergei Poselenov Date: Fri, 6 Jun 2008 15:52:44 +0200 Subject: PHY: Add support for the M88E1121R Marvell chip. Signed-off-by: Yuri Tikhonov Signed-off-by: Sergei Poselenov Signed-off-by: Ben Warren diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 6e0f2c6..e50d516 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -1157,6 +1157,54 @@ struct phy_info phy_info_M88E1118 = { }, }; +/* + * Since to access LED register we need do switch the page, we + * do LED configuring in the miim_read-like function as follows + */ +uint mii_88E1121_set_led (uint mii_reg, struct tsec_private *priv) +{ + uint pg; + + /* Switch the page to access the led register */ + pg = read_phy_reg(priv, MIIM_88E1121_PHY_PAGE); + write_phy_reg(priv, MIIM_88E1121_PHY_PAGE, MIIM_88E1121_PHY_LED_PAGE); + + /* Configure leds */ + write_phy_reg(priv, MIIM_88E1121_PHY_LED_CTRL, + MIIM_88E1121_PHY_LED_DEF); + + /* Restore the page pointer */ + write_phy_reg(priv, MIIM_88E1121_PHY_PAGE, pg); + return 0; +} + +struct phy_info phy_info_M88E1121R = { + 0x01410cb, + "Marvell 88E1121R", + 4, + (struct phy_cmd[]){ /* config */ + /* Reset and configure the PHY */ + {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL}, + {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL}, + {MIIM_ANAR, MIIM_ANAR_INIT, NULL}, + /* Configure leds */ + {MIIM_88E1121_PHY_LED_CTRL, miim_read, + &mii_88E1121_set_led}, + {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init}, + {miim_end,} + }, + (struct phy_cmd[]){ /* startup */ + /* Status is read once to clear old link state */ + {MIIM_STATUS, miim_read, NULL}, + {MIIM_STATUS, miim_read, &mii_parse_sr}, + {MIIM_STATUS, miim_read, &mii_parse_link}, + {miim_end,} + }, + (struct phy_cmd[]){ /* shutdown */ + {miim_end,} + }, +}; + static unsigned int m88e1145_setmode(uint mii_reg, struct tsec_private *priv) { uint mii_data = read_phy_reg(priv, mii_reg); @@ -1522,6 +1570,7 @@ struct phy_info *phy_info[] = { &phy_info_M88E1011S, &phy_info_M88E1111S, &phy_info_M88E1118, + &phy_info_M88E1121R, &phy_info_M88E1145, &phy_info_M88E1149S, &phy_info_dm9161, diff --git a/drivers/net/tsec.h b/drivers/net/tsec.h index 6a2338b..fee5934 100644 --- a/drivers/net/tsec.h +++ b/drivers/net/tsec.h @@ -184,6 +184,13 @@ #define MIIM_88E1111_PHY_LED_DIRECT 0x4100 #define MIIM_88E1111_PHY_LED_COMBINE 0x411C +/* 88E1121 PHY LED Control Register */ +#define MIIM_88E1121_PHY_LED_CTRL 16 +#define MIIM_88E1121_PHY_LED_PAGE 3 +#define MIIM_88E1121_PHY_LED_DEF 0x0030 + +#define MIIM_88E1121_PHY_PAGE 22 + /* 88E1145 Extended PHY Specific Control Register */ #define MIIM_88E1145_PHY_EXT_CR 20 #define MIIM_M88E1145_RGMII_RX_DELAY 0x0080 -- cgit v0.10.2 From dd3d1f56a01f460d560766126ee7dfed2ea9bc10 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:25 -0500 Subject: tsec: Move tsec.h to include/ This is to prepare the way for board code passing in the tsec_info structure Signed-off-by: Andy Fleming Signed-off-by: Ben Warren diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index e50d516..59d41e9 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -16,8 +16,8 @@ #include #include #include +#include -#include "tsec.h" #include "miiphy.h" DECLARE_GLOBAL_DATA_PTR; @@ -32,12 +32,6 @@ typedef volatile struct rtxbd { rxbd8_t rxbd[PKTBUFSRX]; } RTXBD; -struct tsec_info_struct { - unsigned int phyaddr; - u32 flags; - unsigned int phyregidx; -}; - /* The tsec_info structure contains 3 values which the * driver uses to determine how to operate a given ethernet * device. The information needed is: diff --git a/drivers/net/tsec.h b/drivers/net/tsec.h deleted file mode 100644 index fee5934..0000000 --- a/drivers/net/tsec.h +++ /dev/null @@ -1,586 +0,0 @@ -/* - * tsec.h - * - * Driver for the Motorola Triple Speed Ethernet Controller - * - * This software may be used and distributed according to the - * terms of the GNU Public License, Version 2, incorporated - * herein by reference. - * - * Copyright 2004, 2007 Freescale Semiconductor, Inc. - * (C) Copyright 2003, Motorola, Inc. - * maintained by Xianghua Xiao (x.xiao@motorola.com) - * author Andy Fleming - * - */ - -#ifndef __TSEC_H -#define __TSEC_H - -#include -#include - -#ifndef CFG_TSEC1_OFFSET - #define CFG_TSEC1_OFFSET (0x24000) -#endif - -#define TSEC_SIZE 0x01000 - -/* FIXME: Should these be pushed back to 83xx and 85xx config files? */ -#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) - #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET) -#elif defined(CONFIG_MPC83XX) - #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET) -#endif - - -#define MAC_ADDR_LEN 6 - -/* #define TSEC_TIMEOUT 1000000 */ -#define TSEC_TIMEOUT 1000 -#define TOUT_LOOP 1000000 - -#define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* in ms */ - -/* MAC register bits */ -#define MACCFG1_SOFT_RESET 0x80000000 -#define MACCFG1_RESET_RX_MC 0x00080000 -#define MACCFG1_RESET_TX_MC 0x00040000 -#define MACCFG1_RESET_RX_FUN 0x00020000 -#define MACCFG1_RESET_TX_FUN 0x00010000 -#define MACCFG1_LOOPBACK 0x00000100 -#define MACCFG1_RX_FLOW 0x00000020 -#define MACCFG1_TX_FLOW 0x00000010 -#define MACCFG1_SYNCD_RX_EN 0x00000008 -#define MACCFG1_RX_EN 0x00000004 -#define MACCFG1_SYNCD_TX_EN 0x00000002 -#define MACCFG1_TX_EN 0x00000001 - -#define MACCFG2_INIT_SETTINGS 0x00007205 -#define MACCFG2_FULL_DUPLEX 0x00000001 -#define MACCFG2_IF 0x00000300 -#define MACCFG2_GMII 0x00000200 -#define MACCFG2_MII 0x00000100 - -#define ECNTRL_INIT_SETTINGS 0x00001000 -#define ECNTRL_TBI_MODE 0x00000020 -#define ECNTRL_R100 0x00000008 -#define ECNTRL_SGMII_MODE 0x00000002 - -#define miim_end -2 -#define miim_read -1 - -#ifndef CFG_TBIPA_VALUE - #define CFG_TBIPA_VALUE 0x1f -#endif -#define MIIMCFG_INIT_VALUE 0x00000003 -#define MIIMCFG_RESET 0x80000000 - -#define MIIMIND_BUSY 0x00000001 -#define MIIMIND_NOTVALID 0x00000004 - -#define MIIM_CONTROL 0x00 -#define MIIM_CONTROL_RESET 0x00009140 -#define MIIM_CONTROL_INIT 0x00001140 -#define MIIM_CONTROL_RESTART 0x00001340 -#define MIIM_ANEN 0x00001000 - -#define MIIM_CR 0x00 -#define MIIM_CR_RST 0x00008000 -#define MIIM_CR_INIT 0x00001000 - -#define MIIM_STATUS 0x1 -#define MIIM_STATUS_AN_DONE 0x00000020 -#define MIIM_STATUS_LINK 0x0004 -#define PHY_BMSR_AUTN_ABLE 0x0008 -#define PHY_BMSR_AUTN_COMP 0x0020 - -#define MIIM_PHYIR1 0x2 -#define MIIM_PHYIR2 0x3 - -#define MIIM_ANAR 0x4 -#define MIIM_ANAR_INIT 0x1e1 - -#define MIIM_TBI_ANLPBPA 0x5 -#define MIIM_TBI_ANLPBPA_HALF 0x00000040 -#define MIIM_TBI_ANLPBPA_FULL 0x00000020 - -#define MIIM_TBI_ANEX 0x6 -#define MIIM_TBI_ANEX_NP 0x00000004 -#define MIIM_TBI_ANEX_PRX 0x00000002 - -#define MIIM_GBIT_CONTROL 0x9 -#define MIIM_GBIT_CONTROL_INIT 0xe00 - -#define MIIM_EXT_PAGE_ACCESS 0x1f - -/* Broadcom BCM54xx -- taken from linux sungem_phy */ -#define MIIM_BCM54xx_AUXSTATUS 0x19 -#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK 0x0700 -#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT 8 - -/* Cicada Auxiliary Control/Status Register */ -#define MIIM_CIS8201_AUX_CONSTAT 0x1c -#define MIIM_CIS8201_AUXCONSTAT_INIT 0x0004 -#define MIIM_CIS8201_AUXCONSTAT_DUPLEX 0x0020 -#define MIIM_CIS8201_AUXCONSTAT_SPEED 0x0018 -#define MIIM_CIS8201_AUXCONSTAT_GBIT 0x0010 -#define MIIM_CIS8201_AUXCONSTAT_100 0x0008 - -/* Cicada Extended Control Register 1 */ -#define MIIM_CIS8201_EXT_CON1 0x17 -#define MIIM_CIS8201_EXTCON1_INIT 0x0000 - -/* Cicada 8204 Extended PHY Control Register 1 */ -#define MIIM_CIS8204_EPHY_CON 0x17 -#define MIIM_CIS8204_EPHYCON_INIT 0x0006 -#define MIIM_CIS8204_EPHYCON_RGMII 0x1100 - -/* Cicada 8204 Serial LED Control Register */ -#define MIIM_CIS8204_SLED_CON 0x1b -#define MIIM_CIS8204_SLEDCON_INIT 0x1115 - -#define MIIM_GBIT_CON 0x09 -#define MIIM_GBIT_CON_ADVERT 0x0e00 - -/* Entry for Vitesse VSC8244 regs starts here */ -/* Vitesse VSC8244 Auxiliary Control/Status Register */ -#define MIIM_VSC8244_AUX_CONSTAT 0x1c -#define MIIM_VSC8244_AUXCONSTAT_INIT 0x0000 -#define MIIM_VSC8244_AUXCONSTAT_DUPLEX 0x0020 -#define MIIM_VSC8244_AUXCONSTAT_SPEED 0x0018 -#define MIIM_VSC8244_AUXCONSTAT_GBIT 0x0010 -#define MIIM_VSC8244_AUXCONSTAT_100 0x0008 -#define MIIM_CONTROL_INIT_LOOPBACK 0x4000 - -/* Vitesse VSC8244 Extended PHY Control Register 1 */ -#define MIIM_VSC8244_EPHY_CON 0x17 -#define MIIM_VSC8244_EPHYCON_INIT 0x0006 - -/* Vitesse VSC8244 Serial LED Control Register */ -#define MIIM_VSC8244_LED_CON 0x1b -#define MIIM_VSC8244_LEDCON_INIT 0xF011 - -/* Entry for Vitesse VSC8601 regs starts here (Not complete) */ -/* Vitesse VSC8601 Extended PHY Control Register 1 */ -#define MIIM_VSC8601_EPHY_CON 0x17 -#define MIIM_VSC8601_EPHY_CON_INIT_SKEW 0x1120 -#define MIIM_VSC8601_SKEW_CTRL 0x1c - -/* 88E1011 PHY Status Register */ -#define MIIM_88E1011_PHY_STATUS 0x11 -#define MIIM_88E1011_PHYSTAT_SPEED 0xc000 -#define MIIM_88E1011_PHYSTAT_GBIT 0x8000 -#define MIIM_88E1011_PHYSTAT_100 0x4000 -#define MIIM_88E1011_PHYSTAT_DUPLEX 0x2000 -#define MIIM_88E1011_PHYSTAT_SPDDONE 0x0800 -#define MIIM_88E1011_PHYSTAT_LINK 0x0400 - -#define MIIM_88E1011_PHY_SCR 0x10 -#define MIIM_88E1011_PHY_MDI_X_AUTO 0x0060 - -/* 88E1111 PHY LED Control Register */ -#define MIIM_88E1111_PHY_LED_CONTROL 24 -#define MIIM_88E1111_PHY_LED_DIRECT 0x4100 -#define MIIM_88E1111_PHY_LED_COMBINE 0x411C - -/* 88E1121 PHY LED Control Register */ -#define MIIM_88E1121_PHY_LED_CTRL 16 -#define MIIM_88E1121_PHY_LED_PAGE 3 -#define MIIM_88E1121_PHY_LED_DEF 0x0030 - -#define MIIM_88E1121_PHY_PAGE 22 - -/* 88E1145 Extended PHY Specific Control Register */ -#define MIIM_88E1145_PHY_EXT_CR 20 -#define MIIM_M88E1145_RGMII_RX_DELAY 0x0080 -#define MIIM_M88E1145_RGMII_TX_DELAY 0x0002 - -#define MIIM_88E1145_PHY_PAGE 29 -#define MIIM_88E1145_PHY_CAL_OV 30 - -/* RTL8211B PHY Status Register */ -#define MIIM_RTL8211B_PHY_STATUS 0x11 -#define MIIM_RTL8211B_PHYSTAT_SPEED 0xc000 -#define MIIM_RTL8211B_PHYSTAT_GBIT 0x8000 -#define MIIM_RTL8211B_PHYSTAT_100 0x4000 -#define MIIM_RTL8211B_PHYSTAT_DUPLEX 0x2000 -#define MIIM_RTL8211B_PHYSTAT_SPDDONE 0x0800 -#define MIIM_RTL8211B_PHYSTAT_LINK 0x0400 - -/* DM9161 Control register values */ -#define MIIM_DM9161_CR_STOP 0x0400 -#define MIIM_DM9161_CR_RSTAN 0x1200 - -#define MIIM_DM9161_SCR 0x10 -#define MIIM_DM9161_SCR_INIT 0x0610 - -/* DM9161 Specified Configuration and Status Register */ -#define MIIM_DM9161_SCSR 0x11 -#define MIIM_DM9161_SCSR_100F 0x8000 -#define MIIM_DM9161_SCSR_100H 0x4000 -#define MIIM_DM9161_SCSR_10F 0x2000 -#define MIIM_DM9161_SCSR_10H 0x1000 - -/* DM9161 10BT Configuration/Status */ -#define MIIM_DM9161_10BTCSR 0x12 -#define MIIM_DM9161_10BTCSR_INIT 0x7800 - -/* LXT971 Status 2 registers */ -#define MIIM_LXT971_SR2 0x11 /* Status Register 2 */ -#define MIIM_LXT971_SR2_SPEED_MASK 0x4200 -#define MIIM_LXT971_SR2_10HDX 0x0000 /* 10 Mbit half duplex selected */ -#define MIIM_LXT971_SR2_10FDX 0x0200 /* 10 Mbit full duplex selected */ -#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */ -#define MIIM_LXT971_SR2_100FDX 0x4200 /* 100 Mbit full duplex selected */ - -/* DP83865 Control register values */ -#define MIIM_DP83865_CR_INIT 0x9200 - -/* DP83865 Link and Auto-Neg Status Register */ -#define MIIM_DP83865_LANR 0x11 -#define MIIM_DP83865_SPD_MASK 0x0018 -#define MIIM_DP83865_SPD_1000 0x0010 -#define MIIM_DP83865_SPD_100 0x0008 -#define MIIM_DP83865_DPX_FULL 0x0002 - -#define MIIM_READ_COMMAND 0x00000001 - -#define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN - -#define MINFLR_INIT_SETTINGS 0x00000040 - -#define DMACTRL_INIT_SETTINGS 0x000000c3 -#define DMACTRL_GRS 0x00000010 -#define DMACTRL_GTS 0x00000008 - -#define TSTAT_CLEAR_THALT 0x80000000 -#define RSTAT_CLEAR_RHALT 0x00800000 - - -#define IEVENT_INIT_CLEAR 0xffffffff -#define IEVENT_BABR 0x80000000 -#define IEVENT_RXC 0x40000000 -#define IEVENT_BSY 0x20000000 -#define IEVENT_EBERR 0x10000000 -#define IEVENT_MSRO 0x04000000 -#define IEVENT_GTSC 0x02000000 -#define IEVENT_BABT 0x01000000 -#define IEVENT_TXC 0x00800000 -#define IEVENT_TXE 0x00400000 -#define IEVENT_TXB 0x00200000 -#define IEVENT_TXF 0x00100000 -#define IEVENT_IE 0x00080000 -#define IEVENT_LC 0x00040000 -#define IEVENT_CRL 0x00020000 -#define IEVENT_XFUN 0x00010000 -#define IEVENT_RXB0 0x00008000 -#define IEVENT_GRSC 0x00000100 -#define IEVENT_RXF0 0x00000080 - -#define IMASK_INIT_CLEAR 0x00000000 -#define IMASK_TXEEN 0x00400000 -#define IMASK_TXBEN 0x00200000 -#define IMASK_TXFEN 0x00100000 -#define IMASK_RXFEN0 0x00000080 - - -/* Default Attribute fields */ -#define ATTR_INIT_SETTINGS 0x000000c0 -#define ATTRELI_INIT_SETTINGS 0x00000000 - - -/* TxBD status field bits */ -#define TXBD_READY 0x8000 -#define TXBD_PADCRC 0x4000 -#define TXBD_WRAP 0x2000 -#define TXBD_INTERRUPT 0x1000 -#define TXBD_LAST 0x0800 -#define TXBD_CRC 0x0400 -#define TXBD_DEF 0x0200 -#define TXBD_HUGEFRAME 0x0080 -#define TXBD_LATECOLLISION 0x0080 -#define TXBD_RETRYLIMIT 0x0040 -#define TXBD_RETRYCOUNTMASK 0x003c -#define TXBD_UNDERRUN 0x0002 -#define TXBD_STATS 0x03ff - -/* RxBD status field bits */ -#define RXBD_EMPTY 0x8000 -#define RXBD_RO1 0x4000 -#define RXBD_WRAP 0x2000 -#define RXBD_INTERRUPT 0x1000 -#define RXBD_LAST 0x0800 -#define RXBD_FIRST 0x0400 -#define RXBD_MISS 0x0100 -#define RXBD_BROADCAST 0x0080 -#define RXBD_MULTICAST 0x0040 -#define RXBD_LARGE 0x0020 -#define RXBD_NONOCTET 0x0010 -#define RXBD_SHORT 0x0008 -#define RXBD_CRCERR 0x0004 -#define RXBD_OVERRUN 0x0002 -#define RXBD_TRUNCATED 0x0001 -#define RXBD_STATS 0x003f - -typedef struct txbd8 -{ - ushort status; /* Status Fields */ - ushort length; /* Buffer length */ - uint bufPtr; /* Buffer Pointer */ -} txbd8_t; - -typedef struct rxbd8 -{ - ushort status; /* Status Fields */ - ushort length; /* Buffer Length */ - uint bufPtr; /* Buffer Pointer */ -} rxbd8_t; - -typedef struct rmon_mib -{ - /* Transmit and Receive Counters */ - uint tr64; /* Transmit and Receive 64-byte Frame Counter */ - uint tr127; /* Transmit and Receive 65-127 byte Frame Counter */ - uint tr255; /* Transmit and Receive 128-255 byte Frame Counter */ - uint tr511; /* Transmit and Receive 256-511 byte Frame Counter */ - uint tr1k; /* Transmit and Receive 512-1023 byte Frame Counter */ - uint trmax; /* Transmit and Receive 1024-1518 byte Frame Counter */ - uint trmgv; /* Transmit and Receive 1519-1522 byte Good VLAN Frame */ - /* Receive Counters */ - uint rbyt; /* Receive Byte Counter */ - uint rpkt; /* Receive Packet Counter */ - uint rfcs; /* Receive FCS Error Counter */ - uint rmca; /* Receive Multicast Packet (Counter) */ - uint rbca; /* Receive Broadcast Packet */ - uint rxcf; /* Receive Control Frame Packet */ - uint rxpf; /* Receive Pause Frame Packet */ - uint rxuo; /* Receive Unknown OP Code */ - uint raln; /* Receive Alignment Error */ - uint rflr; /* Receive Frame Length Error */ - uint rcde; /* Receive Code Error */ - uint rcse; /* Receive Carrier Sense Error */ - uint rund; /* Receive Undersize Packet */ - uint rovr; /* Receive Oversize Packet */ - uint rfrg; /* Receive Fragments */ - uint rjbr; /* Receive Jabber */ - uint rdrp; /* Receive Drop */ - /* Transmit Counters */ - uint tbyt; /* Transmit Byte Counter */ - uint tpkt; /* Transmit Packet */ - uint tmca; /* Transmit Multicast Packet */ - uint tbca; /* Transmit Broadcast Packet */ - uint txpf; /* Transmit Pause Control Frame */ - uint tdfr; /* Transmit Deferral Packet */ - uint tedf; /* Transmit Excessive Deferral Packet */ - uint tscl; /* Transmit Single Collision Packet */ - /* (0x2_n700) */ - uint tmcl; /* Transmit Multiple Collision Packet */ - uint tlcl; /* Transmit Late Collision Packet */ - uint txcl; /* Transmit Excessive Collision Packet */ - uint tncl; /* Transmit Total Collision */ - - uint res2; - - uint tdrp; /* Transmit Drop Frame */ - uint tjbr; /* Transmit Jabber Frame */ - uint tfcs; /* Transmit FCS Error */ - uint txcf; /* Transmit Control Frame */ - uint tovr; /* Transmit Oversize Frame */ - uint tund; /* Transmit Undersize Frame */ - uint tfrg; /* Transmit Fragments Frame */ - /* General Registers */ - uint car1; /* Carry Register One */ - uint car2; /* Carry Register Two */ - uint cam1; /* Carry Register One Mask */ - uint cam2; /* Carry Register Two Mask */ -} rmon_mib_t; - -typedef struct tsec_hash_regs -{ - uint iaddr0; /* Individual Address Register 0 */ - uint iaddr1; /* Individual Address Register 1 */ - uint iaddr2; /* Individual Address Register 2 */ - uint iaddr3; /* Individual Address Register 3 */ - uint iaddr4; /* Individual Address Register 4 */ - uint iaddr5; /* Individual Address Register 5 */ - uint iaddr6; /* Individual Address Register 6 */ - uint iaddr7; /* Individual Address Register 7 */ - uint res1[24]; - uint gaddr0; /* Group Address Register 0 */ - uint gaddr1; /* Group Address Register 1 */ - uint gaddr2; /* Group Address Register 2 */ - uint gaddr3; /* Group Address Register 3 */ - uint gaddr4; /* Group Address Register 4 */ - uint gaddr5; /* Group Address Register 5 */ - uint gaddr6; /* Group Address Register 6 */ - uint gaddr7; /* Group Address Register 7 */ - uint res2[24]; -} tsec_hash_t; - -typedef struct tsec -{ - /* General Control and Status Registers (0x2_n000) */ - uint res000[4]; - - uint ievent; /* Interrupt Event */ - uint imask; /* Interrupt Mask */ - uint edis; /* Error Disabled */ - uint res01c; - uint ecntrl; /* Ethernet Control */ - uint minflr; /* Minimum Frame Length */ - uint ptv; /* Pause Time Value */ - uint dmactrl; /* DMA Control */ - uint tbipa; /* TBI PHY Address */ - - uint res034[3]; - uint res040[48]; - - /* Transmit Control and Status Registers (0x2_n100) */ - uint tctrl; /* Transmit Control */ - uint tstat; /* Transmit Status */ - uint res108; - uint tbdlen; /* Tx BD Data Length */ - uint res110[5]; - uint ctbptr; /* Current TxBD Pointer */ - uint res128[23]; - uint tbptr; /* TxBD Pointer */ - uint res188[30]; - /* (0x2_n200) */ - uint res200; - uint tbase; /* TxBD Base Address */ - uint res208[42]; - uint ostbd; /* Out of Sequence TxBD */ - uint ostbdp; /* Out of Sequence Tx Data Buffer Pointer */ - uint res2b8[18]; - - /* Receive Control and Status Registers (0x2_n300) */ - uint rctrl; /* Receive Control */ - uint rstat; /* Receive Status */ - uint res308; - uint rbdlen; /* RxBD Data Length */ - uint res310[4]; - uint res320; - uint crbptr; /* Current Receive Buffer Pointer */ - uint res328[6]; - uint mrblr; /* Maximum Receive Buffer Length */ - uint res344[16]; - uint rbptr; /* RxBD Pointer */ - uint res388[30]; - /* (0x2_n400) */ - uint res400; - uint rbase; /* RxBD Base Address */ - uint res408[62]; - - /* MAC Registers (0x2_n500) */ - uint maccfg1; /* MAC Configuration #1 */ - uint maccfg2; /* MAC Configuration #2 */ - uint ipgifg; /* Inter Packet Gap/Inter Frame Gap */ - uint hafdup; /* Half-duplex */ - uint maxfrm; /* Maximum Frame */ - uint res514; - uint res518; - - uint res51c; - - uint miimcfg; /* MII Management: Configuration */ - uint miimcom; /* MII Management: Command */ - uint miimadd; /* MII Management: Address */ - uint miimcon; /* MII Management: Control */ - uint miimstat; /* MII Management: Status */ - uint miimind; /* MII Management: Indicators */ - - uint res538; - - uint ifstat; /* Interface Status */ - uint macstnaddr1; /* Station Address, part 1 */ - uint macstnaddr2; /* Station Address, part 2 */ - uint res548[46]; - - /* (0x2_n600) */ - uint res600[32]; - - /* RMON MIB Registers (0x2_n680-0x2_n73c) */ - rmon_mib_t rmon; - uint res740[48]; - - /* Hash Function Registers (0x2_n800) */ - tsec_hash_t hash; - - uint res900[128]; - - /* Pattern Registers (0x2_nb00) */ - uint resb00[62]; - uint attr; /* Default Attribute Register */ - uint attreli; /* Default Attribute Extract Length and Index */ - - /* TSEC Future Expansion Space (0x2_nc00-0x2_nffc) */ - uint resc00[256]; -} tsec_t; - -#define TSEC_GIGABIT (1) - -/* This flag currently only has - * meaning if we're using the eTSEC */ -#define TSEC_REDUCED (1 << 1) - -struct tsec_private { - volatile tsec_t *regs; - volatile tsec_t *phyregs; - struct phy_info *phyinfo; - uint phyaddr; - u32 flags; - uint link; - uint duplexity; - uint speed; -}; - - -/* - * struct phy_cmd: A command for reading or writing a PHY register - * - * mii_reg: The register to read or write - * - * mii_data: For writes, the value to put in the register. - * A value of -1 indicates this is a read. - * - * funct: A function pointer which is invoked for each command. - * For reads, this function will be passed the value read - * from the PHY, and process it. - * For writes, the result of this function will be written - * to the PHY register - */ -struct phy_cmd { - uint mii_reg; - uint mii_data; - uint (*funct) (uint mii_reg, struct tsec_private * priv); -}; - -/* struct phy_info: a structure which defines attributes for a PHY - * - * id will contain a number which represents the PHY. During - * startup, the driver will poll the PHY to find out what its - * UID--as defined by registers 2 and 3--is. The 32-bit result - * gotten from the PHY will be shifted right by "shift" bits to - * discard any bits which may change based on revision numbers - * unimportant to functionality - * - * The struct phy_cmd entries represent pointers to an arrays of - * commands which tell the driver what to do to the PHY. - */ -struct phy_info { - uint id; - char *name; - uint shift; - /* Called to configure the PHY, and modify the controller - * based on the results */ - struct phy_cmd *config; - - /* Called when starting up the controller */ - struct phy_cmd *startup; - - /* Called when bringing down the controller */ - struct phy_cmd *shutdown; -}; - -#endif /* __TSEC_H */ diff --git a/include/tsec.h b/include/tsec.h new file mode 100644 index 0000000..83863ae --- /dev/null +++ b/include/tsec.h @@ -0,0 +1,592 @@ +/* + * tsec.h + * + * Driver for the Motorola Triple Speed Ethernet Controller + * + * This software may be used and distributed according to the + * terms of the GNU Public License, Version 2, incorporated + * herein by reference. + * + * Copyright 2004, 2007 Freescale Semiconductor, Inc. + * (C) Copyright 2003, Motorola, Inc. + * maintained by Xianghua Xiao (x.xiao@motorola.com) + * author Andy Fleming + * + */ + +#ifndef __TSEC_H +#define __TSEC_H + +#include +#include + +#ifndef CFG_TSEC1_OFFSET + #define CFG_TSEC1_OFFSET (0x24000) +#endif + +#define TSEC_SIZE 0x01000 + +/* FIXME: Should these be pushed back to 83xx and 85xx config files? */ +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET) +#elif defined(CONFIG_MPC83XX) + #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET) +#endif + + +#define MAC_ADDR_LEN 6 + +/* #define TSEC_TIMEOUT 1000000 */ +#define TSEC_TIMEOUT 1000 +#define TOUT_LOOP 1000000 + +#define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* in ms */ + +/* MAC register bits */ +#define MACCFG1_SOFT_RESET 0x80000000 +#define MACCFG1_RESET_RX_MC 0x00080000 +#define MACCFG1_RESET_TX_MC 0x00040000 +#define MACCFG1_RESET_RX_FUN 0x00020000 +#define MACCFG1_RESET_TX_FUN 0x00010000 +#define MACCFG1_LOOPBACK 0x00000100 +#define MACCFG1_RX_FLOW 0x00000020 +#define MACCFG1_TX_FLOW 0x00000010 +#define MACCFG1_SYNCD_RX_EN 0x00000008 +#define MACCFG1_RX_EN 0x00000004 +#define MACCFG1_SYNCD_TX_EN 0x00000002 +#define MACCFG1_TX_EN 0x00000001 + +#define MACCFG2_INIT_SETTINGS 0x00007205 +#define MACCFG2_FULL_DUPLEX 0x00000001 +#define MACCFG2_IF 0x00000300 +#define MACCFG2_GMII 0x00000200 +#define MACCFG2_MII 0x00000100 + +#define ECNTRL_INIT_SETTINGS 0x00001000 +#define ECNTRL_TBI_MODE 0x00000020 +#define ECNTRL_R100 0x00000008 +#define ECNTRL_SGMII_MODE 0x00000002 + +#define miim_end -2 +#define miim_read -1 + +#ifndef CFG_TBIPA_VALUE + #define CFG_TBIPA_VALUE 0x1f +#endif +#define MIIMCFG_INIT_VALUE 0x00000003 +#define MIIMCFG_RESET 0x80000000 + +#define MIIMIND_BUSY 0x00000001 +#define MIIMIND_NOTVALID 0x00000004 + +#define MIIM_CONTROL 0x00 +#define MIIM_CONTROL_RESET 0x00009140 +#define MIIM_CONTROL_INIT 0x00001140 +#define MIIM_CONTROL_RESTART 0x00001340 +#define MIIM_ANEN 0x00001000 + +#define MIIM_CR 0x00 +#define MIIM_CR_RST 0x00008000 +#define MIIM_CR_INIT 0x00001000 + +#define MIIM_STATUS 0x1 +#define MIIM_STATUS_AN_DONE 0x00000020 +#define MIIM_STATUS_LINK 0x0004 +#define PHY_BMSR_AUTN_ABLE 0x0008 +#define PHY_BMSR_AUTN_COMP 0x0020 + +#define MIIM_PHYIR1 0x2 +#define MIIM_PHYIR2 0x3 + +#define MIIM_ANAR 0x4 +#define MIIM_ANAR_INIT 0x1e1 + +#define MIIM_TBI_ANLPBPA 0x5 +#define MIIM_TBI_ANLPBPA_HALF 0x00000040 +#define MIIM_TBI_ANLPBPA_FULL 0x00000020 + +#define MIIM_TBI_ANEX 0x6 +#define MIIM_TBI_ANEX_NP 0x00000004 +#define MIIM_TBI_ANEX_PRX 0x00000002 + +#define MIIM_GBIT_CONTROL 0x9 +#define MIIM_GBIT_CONTROL_INIT 0xe00 + +#define MIIM_EXT_PAGE_ACCESS 0x1f + +/* Broadcom BCM54xx -- taken from linux sungem_phy */ +#define MIIM_BCM54xx_AUXSTATUS 0x19 +#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK 0x0700 +#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT 8 + +/* Cicada Auxiliary Control/Status Register */ +#define MIIM_CIS8201_AUX_CONSTAT 0x1c +#define MIIM_CIS8201_AUXCONSTAT_INIT 0x0004 +#define MIIM_CIS8201_AUXCONSTAT_DUPLEX 0x0020 +#define MIIM_CIS8201_AUXCONSTAT_SPEED 0x0018 +#define MIIM_CIS8201_AUXCONSTAT_GBIT 0x0010 +#define MIIM_CIS8201_AUXCONSTAT_100 0x0008 + +/* Cicada Extended Control Register 1 */ +#define MIIM_CIS8201_EXT_CON1 0x17 +#define MIIM_CIS8201_EXTCON1_INIT 0x0000 + +/* Cicada 8204 Extended PHY Control Register 1 */ +#define MIIM_CIS8204_EPHY_CON 0x17 +#define MIIM_CIS8204_EPHYCON_INIT 0x0006 +#define MIIM_CIS8204_EPHYCON_RGMII 0x1100 + +/* Cicada 8204 Serial LED Control Register */ +#define MIIM_CIS8204_SLED_CON 0x1b +#define MIIM_CIS8204_SLEDCON_INIT 0x1115 + +#define MIIM_GBIT_CON 0x09 +#define MIIM_GBIT_CON_ADVERT 0x0e00 + +/* Entry for Vitesse VSC8244 regs starts here */ +/* Vitesse VSC8244 Auxiliary Control/Status Register */ +#define MIIM_VSC8244_AUX_CONSTAT 0x1c +#define MIIM_VSC8244_AUXCONSTAT_INIT 0x0000 +#define MIIM_VSC8244_AUXCONSTAT_DUPLEX 0x0020 +#define MIIM_VSC8244_AUXCONSTAT_SPEED 0x0018 +#define MIIM_VSC8244_AUXCONSTAT_GBIT 0x0010 +#define MIIM_VSC8244_AUXCONSTAT_100 0x0008 +#define MIIM_CONTROL_INIT_LOOPBACK 0x4000 + +/* Vitesse VSC8244 Extended PHY Control Register 1 */ +#define MIIM_VSC8244_EPHY_CON 0x17 +#define MIIM_VSC8244_EPHYCON_INIT 0x0006 + +/* Vitesse VSC8244 Serial LED Control Register */ +#define MIIM_VSC8244_LED_CON 0x1b +#define MIIM_VSC8244_LEDCON_INIT 0xF011 + +/* Entry for Vitesse VSC8601 regs starts here (Not complete) */ +/* Vitesse VSC8601 Extended PHY Control Register 1 */ +#define MIIM_VSC8601_EPHY_CON 0x17 +#define MIIM_VSC8601_EPHY_CON_INIT_SKEW 0x1120 +#define MIIM_VSC8601_SKEW_CTRL 0x1c + +/* 88E1011 PHY Status Register */ +#define MIIM_88E1011_PHY_STATUS 0x11 +#define MIIM_88E1011_PHYSTAT_SPEED 0xc000 +#define MIIM_88E1011_PHYSTAT_GBIT 0x8000 +#define MIIM_88E1011_PHYSTAT_100 0x4000 +#define MIIM_88E1011_PHYSTAT_DUPLEX 0x2000 +#define MIIM_88E1011_PHYSTAT_SPDDONE 0x0800 +#define MIIM_88E1011_PHYSTAT_LINK 0x0400 + +#define MIIM_88E1011_PHY_SCR 0x10 +#define MIIM_88E1011_PHY_MDI_X_AUTO 0x0060 + +/* 88E1111 PHY LED Control Register */ +#define MIIM_88E1111_PHY_LED_CONTROL 24 +#define MIIM_88E1111_PHY_LED_DIRECT 0x4100 +#define MIIM_88E1111_PHY_LED_COMBINE 0x411C + +/* 88E1121 PHY LED Control Register */ +#define MIIM_88E1121_PHY_LED_CTRL 16 +#define MIIM_88E1121_PHY_LED_PAGE 3 +#define MIIM_88E1121_PHY_LED_DEF 0x0030 + +#define MIIM_88E1121_PHY_PAGE 22 + +/* 88E1145 Extended PHY Specific Control Register */ +#define MIIM_88E1145_PHY_EXT_CR 20 +#define MIIM_M88E1145_RGMII_RX_DELAY 0x0080 +#define MIIM_M88E1145_RGMII_TX_DELAY 0x0002 + +#define MIIM_88E1145_PHY_PAGE 29 +#define MIIM_88E1145_PHY_CAL_OV 30 + +/* RTL8211B PHY Status Register */ +#define MIIM_RTL8211B_PHY_STATUS 0x11 +#define MIIM_RTL8211B_PHYSTAT_SPEED 0xc000 +#define MIIM_RTL8211B_PHYSTAT_GBIT 0x8000 +#define MIIM_RTL8211B_PHYSTAT_100 0x4000 +#define MIIM_RTL8211B_PHYSTAT_DUPLEX 0x2000 +#define MIIM_RTL8211B_PHYSTAT_SPDDONE 0x0800 +#define MIIM_RTL8211B_PHYSTAT_LINK 0x0400 + +/* DM9161 Control register values */ +#define MIIM_DM9161_CR_STOP 0x0400 +#define MIIM_DM9161_CR_RSTAN 0x1200 + +#define MIIM_DM9161_SCR 0x10 +#define MIIM_DM9161_SCR_INIT 0x0610 + +/* DM9161 Specified Configuration and Status Register */ +#define MIIM_DM9161_SCSR 0x11 +#define MIIM_DM9161_SCSR_100F 0x8000 +#define MIIM_DM9161_SCSR_100H 0x4000 +#define MIIM_DM9161_SCSR_10F 0x2000 +#define MIIM_DM9161_SCSR_10H 0x1000 + +/* DM9161 10BT Configuration/Status */ +#define MIIM_DM9161_10BTCSR 0x12 +#define MIIM_DM9161_10BTCSR_INIT 0x7800 + +/* LXT971 Status 2 registers */ +#define MIIM_LXT971_SR2 0x11 /* Status Register 2 */ +#define MIIM_LXT971_SR2_SPEED_MASK 0x4200 +#define MIIM_LXT971_SR2_10HDX 0x0000 /* 10 Mbit half duplex selected */ +#define MIIM_LXT971_SR2_10FDX 0x0200 /* 10 Mbit full duplex selected */ +#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */ +#define MIIM_LXT971_SR2_100FDX 0x4200 /* 100 Mbit full duplex selected */ + +/* DP83865 Control register values */ +#define MIIM_DP83865_CR_INIT 0x9200 + +/* DP83865 Link and Auto-Neg Status Register */ +#define MIIM_DP83865_LANR 0x11 +#define MIIM_DP83865_SPD_MASK 0x0018 +#define MIIM_DP83865_SPD_1000 0x0010 +#define MIIM_DP83865_SPD_100 0x0008 +#define MIIM_DP83865_DPX_FULL 0x0002 + +#define MIIM_READ_COMMAND 0x00000001 + +#define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN + +#define MINFLR_INIT_SETTINGS 0x00000040 + +#define DMACTRL_INIT_SETTINGS 0x000000c3 +#define DMACTRL_GRS 0x00000010 +#define DMACTRL_GTS 0x00000008 + +#define TSTAT_CLEAR_THALT 0x80000000 +#define RSTAT_CLEAR_RHALT 0x00800000 + + +#define IEVENT_INIT_CLEAR 0xffffffff +#define IEVENT_BABR 0x80000000 +#define IEVENT_RXC 0x40000000 +#define IEVENT_BSY 0x20000000 +#define IEVENT_EBERR 0x10000000 +#define IEVENT_MSRO 0x04000000 +#define IEVENT_GTSC 0x02000000 +#define IEVENT_BABT 0x01000000 +#define IEVENT_TXC 0x00800000 +#define IEVENT_TXE 0x00400000 +#define IEVENT_TXB 0x00200000 +#define IEVENT_TXF 0x00100000 +#define IEVENT_IE 0x00080000 +#define IEVENT_LC 0x00040000 +#define IEVENT_CRL 0x00020000 +#define IEVENT_XFUN 0x00010000 +#define IEVENT_RXB0 0x00008000 +#define IEVENT_GRSC 0x00000100 +#define IEVENT_RXF0 0x00000080 + +#define IMASK_INIT_CLEAR 0x00000000 +#define IMASK_TXEEN 0x00400000 +#define IMASK_TXBEN 0x00200000 +#define IMASK_TXFEN 0x00100000 +#define IMASK_RXFEN0 0x00000080 + + +/* Default Attribute fields */ +#define ATTR_INIT_SETTINGS 0x000000c0 +#define ATTRELI_INIT_SETTINGS 0x00000000 + + +/* TxBD status field bits */ +#define TXBD_READY 0x8000 +#define TXBD_PADCRC 0x4000 +#define TXBD_WRAP 0x2000 +#define TXBD_INTERRUPT 0x1000 +#define TXBD_LAST 0x0800 +#define TXBD_CRC 0x0400 +#define TXBD_DEF 0x0200 +#define TXBD_HUGEFRAME 0x0080 +#define TXBD_LATECOLLISION 0x0080 +#define TXBD_RETRYLIMIT 0x0040 +#define TXBD_RETRYCOUNTMASK 0x003c +#define TXBD_UNDERRUN 0x0002 +#define TXBD_STATS 0x03ff + +/* RxBD status field bits */ +#define RXBD_EMPTY 0x8000 +#define RXBD_RO1 0x4000 +#define RXBD_WRAP 0x2000 +#define RXBD_INTERRUPT 0x1000 +#define RXBD_LAST 0x0800 +#define RXBD_FIRST 0x0400 +#define RXBD_MISS 0x0100 +#define RXBD_BROADCAST 0x0080 +#define RXBD_MULTICAST 0x0040 +#define RXBD_LARGE 0x0020 +#define RXBD_NONOCTET 0x0010 +#define RXBD_SHORT 0x0008 +#define RXBD_CRCERR 0x0004 +#define RXBD_OVERRUN 0x0002 +#define RXBD_TRUNCATED 0x0001 +#define RXBD_STATS 0x003f + +typedef struct txbd8 +{ + ushort status; /* Status Fields */ + ushort length; /* Buffer length */ + uint bufPtr; /* Buffer Pointer */ +} txbd8_t; + +typedef struct rxbd8 +{ + ushort status; /* Status Fields */ + ushort length; /* Buffer Length */ + uint bufPtr; /* Buffer Pointer */ +} rxbd8_t; + +typedef struct rmon_mib +{ + /* Transmit and Receive Counters */ + uint tr64; /* Transmit and Receive 64-byte Frame Counter */ + uint tr127; /* Transmit and Receive 65-127 byte Frame Counter */ + uint tr255; /* Transmit and Receive 128-255 byte Frame Counter */ + uint tr511; /* Transmit and Receive 256-511 byte Frame Counter */ + uint tr1k; /* Transmit and Receive 512-1023 byte Frame Counter */ + uint trmax; /* Transmit and Receive 1024-1518 byte Frame Counter */ + uint trmgv; /* Transmit and Receive 1519-1522 byte Good VLAN Frame */ + /* Receive Counters */ + uint rbyt; /* Receive Byte Counter */ + uint rpkt; /* Receive Packet Counter */ + uint rfcs; /* Receive FCS Error Counter */ + uint rmca; /* Receive Multicast Packet (Counter) */ + uint rbca; /* Receive Broadcast Packet */ + uint rxcf; /* Receive Control Frame Packet */ + uint rxpf; /* Receive Pause Frame Packet */ + uint rxuo; /* Receive Unknown OP Code */ + uint raln; /* Receive Alignment Error */ + uint rflr; /* Receive Frame Length Error */ + uint rcde; /* Receive Code Error */ + uint rcse; /* Receive Carrier Sense Error */ + uint rund; /* Receive Undersize Packet */ + uint rovr; /* Receive Oversize Packet */ + uint rfrg; /* Receive Fragments */ + uint rjbr; /* Receive Jabber */ + uint rdrp; /* Receive Drop */ + /* Transmit Counters */ + uint tbyt; /* Transmit Byte Counter */ + uint tpkt; /* Transmit Packet */ + uint tmca; /* Transmit Multicast Packet */ + uint tbca; /* Transmit Broadcast Packet */ + uint txpf; /* Transmit Pause Control Frame */ + uint tdfr; /* Transmit Deferral Packet */ + uint tedf; /* Transmit Excessive Deferral Packet */ + uint tscl; /* Transmit Single Collision Packet */ + /* (0x2_n700) */ + uint tmcl; /* Transmit Multiple Collision Packet */ + uint tlcl; /* Transmit Late Collision Packet */ + uint txcl; /* Transmit Excessive Collision Packet */ + uint tncl; /* Transmit Total Collision */ + + uint res2; + + uint tdrp; /* Transmit Drop Frame */ + uint tjbr; /* Transmit Jabber Frame */ + uint tfcs; /* Transmit FCS Error */ + uint txcf; /* Transmit Control Frame */ + uint tovr; /* Transmit Oversize Frame */ + uint tund; /* Transmit Undersize Frame */ + uint tfrg; /* Transmit Fragments Frame */ + /* General Registers */ + uint car1; /* Carry Register One */ + uint car2; /* Carry Register Two */ + uint cam1; /* Carry Register One Mask */ + uint cam2; /* Carry Register Two Mask */ +} rmon_mib_t; + +typedef struct tsec_hash_regs +{ + uint iaddr0; /* Individual Address Register 0 */ + uint iaddr1; /* Individual Address Register 1 */ + uint iaddr2; /* Individual Address Register 2 */ + uint iaddr3; /* Individual Address Register 3 */ + uint iaddr4; /* Individual Address Register 4 */ + uint iaddr5; /* Individual Address Register 5 */ + uint iaddr6; /* Individual Address Register 6 */ + uint iaddr7; /* Individual Address Register 7 */ + uint res1[24]; + uint gaddr0; /* Group Address Register 0 */ + uint gaddr1; /* Group Address Register 1 */ + uint gaddr2; /* Group Address Register 2 */ + uint gaddr3; /* Group Address Register 3 */ + uint gaddr4; /* Group Address Register 4 */ + uint gaddr5; /* Group Address Register 5 */ + uint gaddr6; /* Group Address Register 6 */ + uint gaddr7; /* Group Address Register 7 */ + uint res2[24]; +} tsec_hash_t; + +typedef struct tsec +{ + /* General Control and Status Registers (0x2_n000) */ + uint res000[4]; + + uint ievent; /* Interrupt Event */ + uint imask; /* Interrupt Mask */ + uint edis; /* Error Disabled */ + uint res01c; + uint ecntrl; /* Ethernet Control */ + uint minflr; /* Minimum Frame Length */ + uint ptv; /* Pause Time Value */ + uint dmactrl; /* DMA Control */ + uint tbipa; /* TBI PHY Address */ + + uint res034[3]; + uint res040[48]; + + /* Transmit Control and Status Registers (0x2_n100) */ + uint tctrl; /* Transmit Control */ + uint tstat; /* Transmit Status */ + uint res108; + uint tbdlen; /* Tx BD Data Length */ + uint res110[5]; + uint ctbptr; /* Current TxBD Pointer */ + uint res128[23]; + uint tbptr; /* TxBD Pointer */ + uint res188[30]; + /* (0x2_n200) */ + uint res200; + uint tbase; /* TxBD Base Address */ + uint res208[42]; + uint ostbd; /* Out of Sequence TxBD */ + uint ostbdp; /* Out of Sequence Tx Data Buffer Pointer */ + uint res2b8[18]; + + /* Receive Control and Status Registers (0x2_n300) */ + uint rctrl; /* Receive Control */ + uint rstat; /* Receive Status */ + uint res308; + uint rbdlen; /* RxBD Data Length */ + uint res310[4]; + uint res320; + uint crbptr; /* Current Receive Buffer Pointer */ + uint res328[6]; + uint mrblr; /* Maximum Receive Buffer Length */ + uint res344[16]; + uint rbptr; /* RxBD Pointer */ + uint res388[30]; + /* (0x2_n400) */ + uint res400; + uint rbase; /* RxBD Base Address */ + uint res408[62]; + + /* MAC Registers (0x2_n500) */ + uint maccfg1; /* MAC Configuration #1 */ + uint maccfg2; /* MAC Configuration #2 */ + uint ipgifg; /* Inter Packet Gap/Inter Frame Gap */ + uint hafdup; /* Half-duplex */ + uint maxfrm; /* Maximum Frame */ + uint res514; + uint res518; + + uint res51c; + + uint miimcfg; /* MII Management: Configuration */ + uint miimcom; /* MII Management: Command */ + uint miimadd; /* MII Management: Address */ + uint miimcon; /* MII Management: Control */ + uint miimstat; /* MII Management: Status */ + uint miimind; /* MII Management: Indicators */ + + uint res538; + + uint ifstat; /* Interface Status */ + uint macstnaddr1; /* Station Address, part 1 */ + uint macstnaddr2; /* Station Address, part 2 */ + uint res548[46]; + + /* (0x2_n600) */ + uint res600[32]; + + /* RMON MIB Registers (0x2_n680-0x2_n73c) */ + rmon_mib_t rmon; + uint res740[48]; + + /* Hash Function Registers (0x2_n800) */ + tsec_hash_t hash; + + uint res900[128]; + + /* Pattern Registers (0x2_nb00) */ + uint resb00[62]; + uint attr; /* Default Attribute Register */ + uint attreli; /* Default Attribute Extract Length and Index */ + + /* TSEC Future Expansion Space (0x2_nc00-0x2_nffc) */ + uint resc00[256]; +} tsec_t; + +#define TSEC_GIGABIT (1) + +/* This flag currently only has + * meaning if we're using the eTSEC */ +#define TSEC_REDUCED (1 << 1) + +struct tsec_private { + volatile tsec_t *regs; + volatile tsec_t *phyregs; + struct phy_info *phyinfo; + uint phyaddr; + u32 flags; + uint link; + uint duplexity; + uint speed; +}; + + +/* + * struct phy_cmd: A command for reading or writing a PHY register + * + * mii_reg: The register to read or write + * + * mii_data: For writes, the value to put in the register. + * A value of -1 indicates this is a read. + * + * funct: A function pointer which is invoked for each command. + * For reads, this function will be passed the value read + * from the PHY, and process it. + * For writes, the result of this function will be written + * to the PHY register + */ +struct phy_cmd { + uint mii_reg; + uint mii_data; + uint (*funct) (uint mii_reg, struct tsec_private * priv); +}; + +/* struct phy_info: a structure which defines attributes for a PHY + * + * id will contain a number which represents the PHY. During + * startup, the driver will poll the PHY to find out what its + * UID--as defined by registers 2 and 3--is. The 32-bit result + * gotten from the PHY will be shifted right by "shift" bits to + * discard any bits which may change based on revision numbers + * unimportant to functionality + * + * The struct phy_cmd entries represent pointers to an arrays of + * commands which tell the driver what to do to the PHY. + */ +struct phy_info { + uint id; + char *name; + uint shift; + /* Called to configure the PHY, and modify the controller + * based on the results */ + struct phy_cmd *config; + + /* Called when starting up the controller */ + struct phy_cmd *startup; + + /* Called when bringing down the controller */ + struct phy_cmd *shutdown; +}; + +struct tsec_info_struct { + unsigned int phyaddr; + u32 flags; + unsigned int phyregidx; +}; + +#endif /* __TSEC_H */ -- cgit v0.10.2 From 75b9d4ae0d69f214eab641caf12ce8af83a39a42 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:26 -0500 Subject: Pass in tsec_info struct through tsec_initialize The tsec driver contains a hard-coded array of configuration information for the tsec ethernet controllers. We create a default function that works for most tsecs, and allow that to be overridden by board code. It creates an array of tsec_info structures, which are then parsed by the corresponding driver instance to determine configuration. Also, add regs, miiregs, and devname fields to the tsec_info structure, so that we don't need the kludgy "index" parameter. Signed-off-by: Andy Fleming Signed-off-by: Ben Warren diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 52e4476..5862acd 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -32,6 +32,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -358,22 +359,15 @@ int dma_xfer(void *dest, u32 count, void *src) } #endif /*CONFIG_DDR_ECC*/ -#ifdef CONFIG_TSEC_ENET -/* Default initializations for TSEC controllers. To override, - * create a board-specific function called: - * int board_eth_init(bd_t *bis) +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() */ - -extern int tsec_initialize(bd_t * bis, int index, char *devname); - int cpu_eth_init(bd_t *bis) { -#if defined(CONFIG_TSEC1) - tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); -#endif -#if defined(CONFIG_TSEC2) - tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#if defined(CONFIG_TSEC_ENET) + tsec_standard_init(bis); #endif + return 0; } -#endif diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 2fe3cea..7976cac 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -25,9 +25,11 @@ * MA 02111-1307 USA */ +#include #include #include #include +#include #include #include @@ -294,6 +296,7 @@ int dma_xfer(void *dest, uint count, void *src) { return dma_check(); } #endif + /* * Configures a UPM. Currently, the loop fields in MxMR (RLF, WLF and TLF) * are hardcoded as "1"."size" is the number or entries, not a sizeof. @@ -360,32 +363,16 @@ void upmconfig (uint upm, uint * table, uint size) out_be32(mxmr, loopval); /* OP_NORMAL */ } -#if defined(CONFIG_TSEC_ENET) || defined(CONFIGMPC85XX_FEC) -/* Default initializations for TSEC controllers. To override, - * create a board-specific function called: - * int board_eth_init(bd_t *bis) - */ - -extern int tsec_initialize(bd_t * bis, int index, char *devname); +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ int cpu_eth_init(bd_t *bis) { -#if defined(CONFIG_TSEC1) - tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); -#endif -#if defined(CONFIG_TSEC2) - tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); -#endif -#if defined(CONFIG_MPC85XX_FEC) - tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME); -#else -#if defined(CONFIG_TSEC3) - tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); -#endif -#if defined(CONFIG_TSEC4) - tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); -#endif +#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85xx_FEC) + tsec_standard_init(bis); #endif + return 0; } -#endif diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index ecea5b0..3a75af7 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -305,28 +306,15 @@ void mpc86xx_reginfo(void) } -#ifdef CONFIG_TSEC_ENET -/* Default initializations for TSEC controllers. To override, - * create a board-specific function called: - * int board_eth_init(bd_t *bis) +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() */ - -extern int tsec_initialize(bd_t * bis, int index, char *devname); - int cpu_eth_init(bd_t *bis) { -#if defined(CONFIG_TSEC1) - tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); -#endif -#if defined(CONFIG_TSEC2) - tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); -#endif -#if defined(CONFIG_TSEC3) - tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); -#endif -#if defined(CONFIG_TSEC4) - tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); +#if defined(CONFIG_TSEC_ENET) + tsec_standard_init(bis); #endif + return 0; } -#endif /* CONFIG_TSEC_ENET */ diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 59d41e9..fbbdd3d 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -32,63 +32,12 @@ typedef volatile struct rtxbd { rxbd8_t rxbd[PKTBUFSRX]; } RTXBD; -/* The tsec_info structure contains 3 values which the - * driver uses to determine how to operate a given ethernet - * device. The information needed is: - * phyaddr - The address of the PHY which is attached to - * the given device. - * - * flags - This variable indicates whether the device - * supports gigabit speed ethernet, and whether it should be - * in reduced mode. - * - * phyregidx - This variable specifies which ethernet device - * controls the MII Management registers which are connected - * to the PHY. For now, only TSEC1 (index 0) has - * access to the PHYs, so all of the entries have "0". - * - * The values specified in the table are taken from the board's - * config file in include/configs/. When implementing a new - * board with ethernet capability, it is necessary to define: - * TSECn_PHY_ADDR - * TSECn_PHYIDX - * - * for n = 1,2,3, etc. And for FEC: - * FEC_PHY_ADDR - * FEC_PHYIDX - */ -static struct tsec_info_struct tsec_info[] = { -#ifdef CONFIG_TSEC1 - {TSEC1_PHY_ADDR, TSEC1_FLAGS, TSEC1_PHYIDX}, -#else - {0, 0, 0}, -#endif -#ifdef CONFIG_TSEC2 - {TSEC2_PHY_ADDR, TSEC2_FLAGS, TSEC2_PHYIDX}, -#else - {0, 0, 0}, -#endif -#ifdef CONFIG_MPC85XX_FEC - {FEC_PHY_ADDR, FEC_FLAGS, FEC_PHYIDX}, -#else -#ifdef CONFIG_TSEC3 - {TSEC3_PHY_ADDR, TSEC3_FLAGS, TSEC3_PHYIDX}, -#else - {0, 0, 0}, -#endif -#ifdef CONFIG_TSEC4 - {TSEC4_PHY_ADDR, TSEC4_FLAGS, TSEC4_PHYIDX}, -#else - {0, 0, 0}, -#endif /* CONFIG_TSEC4 */ -#endif /* CONFIG_MPC85XX_FEC */ -}; - -#define MAXCONTROLLERS (4) +#define MAXCONTROLLERS (8) static int relocated = 0; static struct tsec_private *privlist[MAXCONTROLLERS]; +static int num_tsecs = 0; #ifdef __GNUC__ static RTXBD rtx __attribute__ ((aligned(8))); @@ -121,10 +70,51 @@ static int tsec_miiphy_read(char *devname, unsigned char addr, static int tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set); #endif +/* Default initializations for TSEC controllers. */ + +static struct tsec_info_struct tsec_info[] = { +#ifdef CONFIG_TSEC1 + STD_TSEC_INFO(1), /* TSEC1 */ +#endif +#ifdef CONFIG_TSEC2 + STD_TSEC_INFO(2), /* TSEC2 */ +#endif +#ifdef CONFIG_MPC85XX_FEC + { + .regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000), + .miiregs = (tsec_t *)(TSEC_BASE_ADDR), + .devname = CONFIG_MPC85XX_FEC_NAME, + .phyaddr = FEC_PHY_ADDR, + .flags = FEC_FLAGS + }, /* FEC */ +#endif +#ifdef CONFIG_TSEC3 + STD_TSEC_INFO(3), /* TSEC3 */ +#endif +#ifdef CONFIG_TSEC4 + STD_TSEC_INFO(4), /* TSEC4 */ +#endif +}; + +int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num) +{ + int i; + + for (i = 0; i < num; i++) + tsec_initialize(bis, &tsecs[i]); + + return 0; +} + +int tsec_standard_init(bd_t *bis) +{ + return tsec_eth_init(bis, tsec_info, ARRAY_SIZE(tsec_info)); +} + /* Initialize device structure. Returns success if PHY * initialization succeeded (i.e. if it recognizes the PHY) */ -int tsec_initialize(bd_t * bis, int index, char *devname) +int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info) { struct eth_device *dev; int i; @@ -142,16 +132,14 @@ int tsec_initialize(bd_t * bis, int index, char *devname) if (NULL == priv) return 0; - privlist[index] = priv; - priv->regs = (volatile tsec_t *)(TSEC_BASE_ADDR + index * TSEC_SIZE); - priv->phyregs = (volatile tsec_t *)(TSEC_BASE_ADDR + - tsec_info[index].phyregidx * - TSEC_SIZE); + privlist[num_tsecs++] = priv; + priv->regs = tsec_info->regs; + priv->phyregs = tsec_info->miiregs; - priv->phyaddr = tsec_info[index].phyaddr; - priv->flags = tsec_info[index].flags; + priv->phyaddr = tsec_info->phyaddr; + priv->flags = tsec_info->flags; - sprintf(dev->name, devname); + sprintf(dev->name, tsec_info->devname); dev->iobase = 0; dev->priv = priv; dev->init = tsec_init; @@ -226,7 +214,6 @@ int tsec_init(struct eth_device *dev, bd_t * bd) /* If there's no link, fail */ return (priv->link ? 0 : -1); - } /* Write value to the device's PHY through the registers diff --git a/include/tsec.h b/include/tsec.h index 83863ae..c05b5f0 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -27,12 +27,30 @@ #define TSEC_SIZE 0x01000 /* FIXME: Should these be pushed back to 83xx and 85xx config files? */ -#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) - #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET) -#elif defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ + || defined(CONFIG_MPC83XX) #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET) #endif +#define STD_TSEC_INFO(num) \ +{ \ + .regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \ + .miiregs = (tsec_t *)TSEC_BASE_ADDR, \ + .devname = CONFIG_TSEC##num##_NAME, \ + .phyaddr = TSEC##num##_PHY_ADDR, \ + .flags = TSEC##num##_FLAGS \ +} + +#define SET_STD_TSEC_INFO(x, num) \ +{ \ + x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \ + x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \ + x.devname = CONFIG_TSEC##num##_NAME; \ + x.phyaddr = TSEC##num##_PHY_ADDR; \ + x.flags = TSEC##num##_FLAGS;\ +} + + #define MAC_ADDR_LEN 6 @@ -584,9 +602,15 @@ struct phy_info { }; struct tsec_info_struct { + tsec_t *regs; + tsec_t *miiregs; + char *devname; unsigned int phyaddr; u32 flags; - unsigned int phyregidx; }; +int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info); +int tsec_standard_init(bd_t *bis); +int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsec_info, int num); + #endif /* __TSEC_H */ -- cgit v0.10.2 From 2abe361c03b43e6dcf68f54e96b5c05156c49284 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:27 -0500 Subject: Add SGMII support to the tsec Adds support for configuring the TBI to talk properly with the SerDes. Signed-off-by: Andy Fleming Signed-off-by: Ben Warren diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index fbbdd3d..f81211a 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -216,61 +216,80 @@ int tsec_init(struct eth_device *dev, bd_t * bd) return (priv->link ? 0 : -1); } -/* Write value to the device's PHY through the registers - * specified in priv, modifying the register specified in regnum. - * It will wait for the write to be done (or for a timeout to - * expire) before exiting - */ -void write_any_phy_reg(struct tsec_private *priv, uint phyid, uint regnum, uint value) +/* Writes the given phy's reg with value, using the specified MDIO regs */ +static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr, + uint reg, uint value) { - volatile tsec_t *regbase = priv->phyregs; int timeout = 1000000; - regbase->miimadd = (phyid << 8) | regnum; - regbase->miimcon = value; + phyregs->miimadd = (addr << 8) | reg; + phyregs->miimcon = value; asm("sync"); timeout = 1000000; - while ((regbase->miimind & MIIMIND_BUSY) && timeout--) ; + while ((phyregs->miimind & MIIMIND_BUSY) && timeout--) ; } -/* #define to provide old write_phy_reg functionality without duplicating code */ -#define write_phy_reg(priv, regnum, value) write_any_phy_reg(priv,priv->phyaddr,regnum,value) + +/* Provide the default behavior of writing the PHY of this ethernet device */ +#define write_phy_reg(priv, regnum, value) tsec_local_mdio_write(priv->phyregs,priv->phyaddr,regnum,value) /* Reads register regnum on the device's PHY through the - * registers specified in priv. It lowers and raises the read + * specified registers. It lowers and raises the read * command, and waits for the data to become valid (miimind * notvalid bit cleared), and the bus to cease activity (miimind * busy bit cleared), and then returns the value */ -uint read_any_phy_reg(struct tsec_private *priv, uint phyid, uint regnum) +uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum) { uint value; - volatile tsec_t *regbase = priv->phyregs; /* Put the address of the phy, and the register * number into MIIMADD */ - regbase->miimadd = (phyid << 8) | regnum; + phyregs->miimadd = (phyid << 8) | regnum; /* Clear the command register, and wait */ - regbase->miimcom = 0; + phyregs->miimcom = 0; asm("sync"); /* Initiate a read command, and wait */ - regbase->miimcom = MIIM_READ_COMMAND; + phyregs->miimcom = MIIM_READ_COMMAND; asm("sync"); /* Wait for the the indication that the read is done */ - while ((regbase->miimind & (MIIMIND_NOTVALID | MIIMIND_BUSY))) ; + while ((phyregs->miimind & (MIIMIND_NOTVALID | MIIMIND_BUSY))) ; /* Grab the value read from the PHY */ - value = regbase->miimstat; + value = phyregs->miimstat; return value; } /* #define to provide old read_phy_reg functionality without duplicating code */ -#define read_phy_reg(priv,regnum) read_any_phy_reg(priv,priv->phyaddr,regnum) +#define read_phy_reg(priv,regnum) tsec_local_mdio_read(priv->phyregs,priv->phyaddr,regnum) + +#define TBIANA_SETTINGS ( \ + TBIANA_ASYMMETRIC_PAUSE \ + | TBIANA_SYMMETRIC_PAUSE \ + | TBIANA_FULL_DUPLEX \ + ) + +#define TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_ANEG_ENABLE \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) +/* Configure the TBI for SGMII operation */ +static void tsec_configure_serdes(struct tsec_private *priv) +{ + tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_ANA, + TBIANA_SETTINGS); + tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_TBICON, + TBICON_CLK_SELECT); + tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_CR, + TBICR_SETTINGS); +} /* Discover which PHY is attached to the device, and configure it * properly. If the PHY is not recognized, then return 0 @@ -280,12 +299,12 @@ static int init_phy(struct eth_device *dev) { struct tsec_private *priv = (struct tsec_private *)dev->priv; struct phy_info *curphy; - volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR); + volatile tsec_t *phyregs = priv->phyregs; + volatile tsec_t *regs = priv->regs; /* Assign a Physical address to the TBI */ regs->tbipa = CFG_TBIPA_VALUE; - regs = (volatile tsec_t *)(TSEC_BASE_ADDR + TSEC_SIZE); - regs->tbipa = CFG_TBIPA_VALUE; + phyregs->tbipa = CFG_TBIPA_VALUE; asm("sync"); /* Reset MII (due to new addresses) */ @@ -309,6 +328,9 @@ static int init_phy(struct eth_device *dev) return 0; } + if (regs->ecntrl & ECNTRL_SGMII_MODE) + tsec_configure_serdes(priv); + priv->phyinfo = curphy; phy_run_commands(priv, priv->phyinfo->config); @@ -1700,7 +1722,7 @@ static int tsec_miiphy_read(char *devname, unsigned char addr, return -1; } - ret = (unsigned short)read_any_phy_reg(priv, addr, reg); + ret = (unsigned short)tsec_local_mdio_read(priv->phyregs, addr, reg); *value = ret; return 0; @@ -1722,7 +1744,7 @@ static int tsec_miiphy_write(char *devname, unsigned char addr, return -1; } - write_any_phy_reg(priv, addr, reg, value); + tsec_local_mdio_write(priv->phyregs, addr, reg, value); return 0; } diff --git a/include/tsec.h b/include/tsec.h index c05b5f0..2db4deb 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -60,6 +60,27 @@ #define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* in ms */ +/* TBI register addresses */ +#define TBI_CR 0x00 +#define TBI_SR 0x01 +#define TBI_ANA 0x04 +#define TBI_ANLPBPA 0x05 +#define TBI_ANEX 0x06 +#define TBI_TBICON 0x11 + +/* TBI MDIO register bit fields*/ +#define TBICON_CLK_SELECT 0x0020 +#define TBIANA_ASYMMETRIC_PAUSE 0x0100 +#define TBIANA_SYMMETRIC_PAUSE 0x0080 +#define TBIANA_HALF_DUPLEX 0x0040 +#define TBIANA_FULL_DUPLEX 0x0020 +#define TBICR_PHY_RESET 0x8000 +#define TBICR_ANEG_ENABLE 0x1000 +#define TBICR_RESTART_ANEG 0x0200 +#define TBICR_FULL_DUPLEX 0x0100 +#define TBICR_SPEED1_SET 0x0040 + + /* MAC register bits */ #define MACCFG1_SOFT_RESET 0x80000000 #define MACCFG1_RESET_RX_MC 0x00080000 @@ -540,7 +561,9 @@ typedef struct tsec /* This flag currently only has * meaning if we're using the eTSEC */ -#define TSEC_REDUCED (1 << 1) +#define TSEC_REDUCED (1 << 1) + +#define TSEC_SGMII (1 << 2) struct tsec_private { volatile tsec_t *regs; -- cgit v0.10.2 From 652f7c2eef76a1340928bd660845441e932d86a2 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:28 -0500 Subject: Add support for Freescale SGMII Riser Card The 8544DS and 8572DS systems have an optional SGMII riser card which exposes new ethernet ports which are connected to the eTSECs via an SGMII interface. The SGMII PHYs for this board are offset from the standard PHY addresses, so this code modifies the passed in tsec_info structure to use the SGMII PHYs on the card, instead. Signed-off-by: Andy Fleming Signed-off-by: Ben Warren diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 508e3b5..8584374 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -36,6 +36,7 @@ COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o COBJS-${CONFIG_FSL_PIXIS} += pixis.o COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o +COBJS-${CONFIG_FSL_SGMII_RISER} += sgmii_riser.o COBJS-${CONFIG_MPC8541CDS} += cds_pci_ft.o COBJS-${CONFIG_MPC8548CDS} += cds_pci_ft.o diff --git a/board/freescale/common/sgmii_riser.c b/board/freescale/common/sgmii_riser.c new file mode 100644 index 0000000..5ccd6bc --- /dev/null +++ b/board/freescale/common/sgmii_riser.c @@ -0,0 +1,26 @@ +/* + * Freescale SGMII Riser Card + * + * This driver supports the SGMII Riser card found on the + * "DS" style of development board from Freescale. + * + * This software may be used and distributed according to the + * terms of the GNU Public License, Version 2, incorporated + * herein by reference. + * + * Copyright 2008 Freescale Semiconductor, Inc. + * + */ + +#include +#include +#include + +void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num) +{ + int i; + + for (i = 0; i < num; i++) + if (tsec_info[i].flags & TSEC_SGMII) + tsec_info[i].phyaddr += SGMII_RISER_PHY_OFFSET; +} diff --git a/board/freescale/common/sgmii_riser.h b/board/freescale/common/sgmii_riser.h new file mode 100644 index 0000000..8d56a1f --- /dev/null +++ b/board/freescale/common/sgmii_riser.h @@ -0,0 +1,15 @@ +/* + * Freescale SGMII Riser Card + * + * This driver supports the SGMII Riser card found on the + * "DS" style of development board from Freescale. + * + * This software may be used and distributed according to the + * terms of the GNU Public License, Version 2, incorporated + * herein by reference. + * + * Copyright 2008 Freescale Semiconductor, Inc. + * + */ + +void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num); diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 5738192..a428e88 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -369,6 +369,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_TSEC3 1 #define CONFIG_TSEC3_NAME "eTSEC3" +#define CONFIG_FSL_SGMII_RISER 1 +#define SGMII_RISER_PHY_OFFSET 0x1c + #define TSEC1_PHY_ADDR 0 #define TSEC3_PHY_ADDR 1 -- cgit v0.10.2 From 216f2a7156a5fde7b47adc40ad553c888a9cbaa7 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:29 -0500 Subject: Add SGMII support for the 8544 DS The 8544 DS has an optional SGMII Riser card, which uses different PHY addresses. Check if we are in SGMII mode, and invoke the SGMII Riser setup code if so. Signed-off-by: Andy Fleming Signed-off-by: Ben Warren diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 4e976b7..1e29773 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -32,8 +32,10 @@ #include #include #include +#include #include "../common/pixis.h" +#include "../common/sgmii_riser.h" #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void ddr_enable_ecc(unsigned int dram_size); @@ -463,6 +465,43 @@ get_board_sys_clk(ulong dummy) return val; } +#ifdef CONFIG_TSEC_ENET +int board_eth_init(bd_t *bis) +{ + struct tsec_info_struct tsec_info[2]; + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; + int num = 0; + +#ifdef CONFIG_TSEC1 + SET_STD_TSEC_INFO(tsec_info[num], 1); + if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) + tsec_info[num].flags |= TSEC_SGMII; + num++; +#endif +#ifdef CONFIG_TSEC3 + SET_STD_TSEC_INFO(tsec_info[num], 3); + if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) + tsec_info[num].flags |= TSEC_SGMII; + num++; +#endif + + if (!num) { + printf("No TSECs initialized\n"); + + return 0; + } + + if (io_sel & 1) + fsl_sgmii_riser_init(tsec_info, num); + + + tsec_eth_init(bis, tsec_info, num); + + return 0; +} +#endif + #if defined(CONFIG_OF_BOARD_SETUP) void -- cgit v0.10.2 From 5a8a163ac394d9f4f7ff57f415d82bd673b0068c Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:30 -0500 Subject: Add pixis_set_sgmii command The 8544DS and 8572DS platforms support an optional SGMII riser card to expose ethernet over an SGMII interface. Once the card is in, it is also necessary to configure the board such that it uses the card, rather than the on-board ethernet ports. This can either be done by flipping dip switches on the motherboard, or by modifying registers in the pixis. Either way requires a reboot. This adds a command to allow users to choose which ports are routed through the SGMII card, and which through the onboard ports. It also allows users to revert to the current switch settings. This code does not work on the 8572, as the PIXIS is different. Signed-off-by: Andy Fleming Signed-off-by: Ben Warren diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 64e2e08..b5a0e84 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "pixis.h" @@ -282,6 +283,60 @@ U_BOOT_CMD( "diswd - Disable watchdog timer \n", NULL); +#ifdef CONFIG_FSL_SGMII_RISER +int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int which_tsec = -1; + uchar mask; + uchar switch_mask; + + if (argc > 2) + if (strcmp(argv[1], "all") != 0) + which_tsec = simple_strtoul(argv[1], NULL, 0); + + switch (which_tsec) { + case 1: + mask = PIXIS_VSPEED2_TSEC1SER; + switch_mask = PIXIS_VCFGEN1_TSEC1SER; + break; + case 3: + mask = PIXIS_VSPEED2_TSEC3SER; + switch_mask = PIXIS_VCFGEN1_TSEC3SER; + break; + default: + mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER; + switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER; + break; + } + + /* Toggle whether the switches or FPGA control the settings */ + if (!strcmp(argv[argc - 1], "switch")) + clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1, + switch_mask); + else + setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1, + switch_mask); + + /* If it's not the switches, enable or disable SGMII, as specified */ + if (!strcmp(argv[argc - 1], "on")) + clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask); + else if (!strcmp(argv[argc - 1], "off")) + setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask); + + return 0; +} + +U_BOOT_CMD( + pixis_set_sgmii, CFG_MAXARGS, 1, pixis_set_sgmii, + "pixis_set_sgmii" + " - Enable or disable SGMII mode for a given TSEC \n", + "\npixis_set_sgmii [TSEC num] \n" + " TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n" + " on - enables SGMII\n" + " off - disables SGMII\n" + " switch - use switch settings\n"); +#endif + /* * This function takes the non-integral cpu:mpx pll ratio * and converts it to an integer that can be used to assign diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index a428e88..612e8f2 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -196,7 +196,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define PIXIS_VSPEED2 0x1d /* VELA VSpeed 2 */ #define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ +#define PIXIS_VSPEED2_TSEC1SER 0x2 +#define PIXIS_VSPEED2_TSEC3SER 0x1 +#define PIXIS_VCFGEN1_TSEC1SER 0x20 +#define PIXIS_VCFGEN1_TSEC3SER 0x40 /* define to use L1 as initial stack */ -- cgit v0.10.2 From 89973f8a82c28ad893c4c3cc56839a8e10fe5f13 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 22:22:04 -0700 Subject: Introduce netdev.h header file and remove externs This addresses all drivers whose initializers have already been moved to board_eth_init()/cpu_eth_init(). Signed-off-by: Ben Warren diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index 7f3e485..fa1a2aa 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -26,6 +26,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -93,8 +94,6 @@ void board_init_info(void) gd->bd->bi_phy_id[1] = 0x03; } -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bi) { diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 915b1c3..94523b5 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -26,6 +26,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -116,8 +117,6 @@ void board_init_info(void) gd->bd->bi_phy_id[1] = 0x11; } -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bi) { diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index a9b7a68..4567213 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -32,6 +32,7 @@ #include #include #include +#include /** * is_valid_ether_addr - Determine if the given Ethernet address is valid @@ -156,8 +157,6 @@ int misc_init_r(void) #if defined(CONFIG_BFIN_MAC) -extern int bfin_EMAC_initialize(bd_t *bis); - int board_eth_init(bd_t *bis) { return bfin_EMAC_initialize(bis); diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c index da69e75..da05589 100644 --- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c +++ b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c @@ -18,6 +18,7 @@ * Place, Suite 330, Boston, MA 02111-1307 USA */ #include +#include #include #include @@ -87,8 +88,6 @@ void board_init_info(void) } #if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - int board_eth_init(bd_t *bi) { return macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index af79fc2..130f7aa 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -32,6 +32,7 @@ #include #include #include +#include #include "../common/pixis.h" @@ -520,12 +521,7 @@ get_board_sys_clk(ulong dummy) return val; } -extern int uli526x_initialize(bd_t *); - int board_eth_init(bd_t *bis) { -#if defined(CONFIG_ULI526) - uli526x_initialize(bis); -#endif - return 0; + return pci_eth_init(bis); } diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 4ece11a..8516dcb 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -20,6 +20,7 @@ * MA 02111-1307 USA */ #include +#include #include #include @@ -195,8 +196,6 @@ void spi_cs_deactivate(struct spi_slave *slave) #endif /* CONFIG_ATMEL_SPI */ #ifdef CONFIG_CMD_NET -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - int board_eth_init(bd_t *bi) { macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c index 738ece2..d3875f4 100644 --- a/board/miromico/hammerhead/hammerhead.c +++ b/board/miromico/hammerhead/hammerhead.c @@ -25,6 +25,7 @@ #include "../cpu/at32ap/at32ap700x/sm.h" #include +#include #include #include @@ -51,8 +52,6 @@ static const struct sdram_config sdram_config = { .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, }; -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bis) { diff --git a/board/sl8245/sl8245.c b/board/sl8245/sl8245.c index c853755..e66272e 100644 --- a/board/sl8245/sl8245.c +++ b/board/sl8245/sl8245.c @@ -24,6 +24,7 @@ #include #include #include +#include int checkboard (void) { @@ -67,8 +68,6 @@ void pci_init_board(void) pci_mpc824x_init(&hose); } -extern int skge_initialize(bd_t *bis); - int board_eth_init(bd_t *bis) { int rc = 0; diff --git a/cpu/leon2/cpu.c b/cpu/leon2/cpu.c index 5de1c52..d6e23b1 100644 --- a/cpu/leon2/cpu.c +++ b/cpu/leon2/cpu.c @@ -25,6 +25,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -57,8 +58,6 @@ int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* ------------------------------------------------------------------------- */ -extern int greth_initialize(bd_t *bis); - #ifdef CONFIG_GRETH int cpu_eth_init(bd_t *bis) { diff --git a/cpu/leon3/cpu.c b/cpu/leon3/cpu.c index 1725fdb..976f311 100644 --- a/cpu/leon3/cpu.c +++ b/cpu/leon3/cpu.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -65,7 +66,6 @@ u64 flash_read64(void *addr) } /* ------------------------------------------------------------------------- */ -extern int greth_initialize(bd_t *bis); #ifdef CONFIG_GRETH int cpu_eth_init(bd_t *bis) diff --git a/cpu/mcf523x/cpu.c b/cpu/mcf523x/cpu.c index 8d2152d..bdc152f 100644 --- a/cpu/mcf523x/cpu.c +++ b/cpu/mcf523x/cpu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -114,8 +115,6 @@ int watchdog_init(void) * int board_eth_init(bd_t *bis) */ -extern int mcffec_initialize(bd_t*); - int cpu_eth_init(bd_t *bis) { return mcffec_initialize(bis); diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c index 2af31cb..167097a 100644 --- a/cpu/mcf52x2/cpu.c +++ b/cpu/mcf52x2/cpu.c @@ -32,6 +32,7 @@ #include #include #include +#include #ifdef CONFIG_M5271 /* @@ -328,8 +329,6 @@ int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) * int board_eth_init(bd_t *bis) */ -extern int mcffec_initialize(bd_t*); - int cpu_eth_init(bd_t *bis) { return mcffec_initialize(bis); diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c index 20d0d5c..260d6e6 100644 --- a/cpu/mcf532x/cpu.c +++ b/cpu/mcf532x/cpu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -136,8 +137,6 @@ int watchdog_init(void) * int board_eth_init(bd_t *bis) */ -extern int mcffec_initialize(bd_t*); - int cpu_eth_init(bd_t *bis) { return mcffec_initialize(bis); diff --git a/cpu/mcf5445x/cpu.c b/cpu/mcf5445x/cpu.c index ab342dd..a30c327 100644 --- a/cpu/mcf5445x/cpu.c +++ b/cpu/mcf5445x/cpu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -102,8 +103,6 @@ int checkcpu(void) * int board_eth_init(bd_t *bis) */ -extern int mcffec_initialize(bd_t*); - int cpu_eth_init(bd_t *bis) { return mcffec_initialize(bis); diff --git a/cpu/mcf547x_8x/cpu.c b/cpu/mcf547x_8x/cpu.c index 1ba7aa8..ab4ad28 100644 --- a/cpu/mcf547x_8x/cpu.c +++ b/cpu/mcf547x_8x/cpu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include @@ -148,9 +149,6 @@ int watchdog_init(void) * int board_eth_init(bd_t *bis) */ -extern int mcdmafec_initialize(bd_t *bis); -extern int mcffec_initialize(bd_t*); - int cpu_eth_init(bd_t *bis) { #if defined(CONFIG_FSLDMAFEC) diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index 3ee5d96..c5e74b8 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include diff --git a/drivers/net/greth.c b/drivers/net/greth.c index 90c5338..79bc4d9 100644 --- a/drivers/net/greth.c +++ b/drivers/net/greth.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/net/macb.c b/drivers/net/macb.c index aa39284..08bebf7 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -40,6 +40,7 @@ */ #include +#include #include #include diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 50d6508..f93cf59 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -32,6 +32,7 @@ #include #include +#include #include #undef ET_DEBUG diff --git a/drivers/net/sk98lin/uboot_drv.c b/drivers/net/sk98lin/uboot_drv.c index 205e7d2..0199b33 100644 --- a/drivers/net/sk98lin/uboot_drv.c +++ b/drivers/net/sk98lin/uboot_drv.c @@ -24,6 +24,7 @@ */ #include +#include #include "h/skdrv1st.h" #include "h/skdrv2nd.h" diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c index d87638c..9ea5ac2 100644 --- a/drivers/net/uli526x.c +++ b/drivers/net/uli526x.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include diff --git a/include/netdev.h b/include/netdev.h new file mode 100644 index 0000000..3ec9212 --- /dev/null +++ b/include/netdev.h @@ -0,0 +1,66 @@ +/* + * (C) Copyright 2008 + * Benjamin Warren, biggerbadderben@gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * netdev.h - definitions an prototypes for network devices + */ + +#ifndef _NETDEV_H_ +#define _NETDEV_H_ + +/* + * Board and CPU-specific initialization functions + * board_eth_init() has highest priority. cpu_eth_init() only + * gets called if board_eth_init() isn't instantiated or fails. + * Return values: + * 0: success + * -1: failure + */ + +int board_eth_init(bd_t *bis); +int cpu_eth_init(bd_t *bis); + +/* Driver initialization prototypes */ +int bfin_EMAC_initialize(bd_t *bis); +int greth_initialize(bd_t *bis); +int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); +int mcdmafec_initialize(bd_t *bis); +int mcffec_initialize(bd_t *bis); +int skge_initialize(bd_t *bis); +int uli526x_initialize(bd_t *bis); + +/* Boards with PCI network controllers can call this from their board_eth_init() + * function to initialize whatever's on board. + * Return value is total # of devices found */ + +static inline int pci_eth_init(bd_t *bis) +{ + int num = 0; +#if defined(CONFIG_ULI526) + num += uli526x_initialize(bis); +#endif + return num; +} + +#endif /* _NETDEV_H_ */ + -- cgit v0.10.2 From 3ae071e44256144d6c1e3febb65f6c56bd433769 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Tue, 12 Aug 2008 22:11:53 -0700 Subject: Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init() Removed at91sam9_eth_initialize() from net/eth.c Signed-off-by: Ben Warren diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index c5082a0..787d64d 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -30,11 +30,13 @@ #include #include #include +#include #include #include #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include #endif +#include #define MP_BLOCK_3_BASE 0xFDF00000 @@ -376,3 +378,12 @@ void reset_phy(void) #endif } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 06d8512..913e3fb 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -30,9 +30,11 @@ #include #include #include +#include #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include #endif +#include DECLARE_GLOBAL_DATA_PTR; @@ -248,3 +250,12 @@ void reset_phy(void) #endif } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 927fc91..c705074 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -31,11 +31,13 @@ #include #include #include +#include #include #include #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include #endif +#include DECLARE_GLOBAL_DATA_PTR; @@ -308,3 +310,12 @@ void reset_phy(void) #endif } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); +#endif + return rc; +} diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile index 44cde1a..2d2a888 100644 --- a/cpu/arm926ejs/at91/Makefile +++ b/cpu/arm926ejs/at91/Makefile @@ -25,7 +25,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a -COBJS-y += ether.o COBJS-y += timer.o COBJS-$(CONFIG_HAS_DATAFLASH) +=spi.o COBJS-y += usb.o diff --git a/cpu/arm926ejs/at91/ether.c b/cpu/arm926ejs/at91/ether.c deleted file mode 100644 index 7e11fe4..0000000 --- a/cpu/arm926ejs/at91/ether.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - -#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) -void at91sam9_eth_initialize(bd_t *bi) -{ - macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); -} -#endif diff --git a/net/eth.c b/net/eth.c index 85fa0da..71feb07 100644 --- a/net/eth.c +++ b/net/eth.c @@ -66,7 +66,6 @@ extern int scc_initialize(bd_t*); extern int tsi108_eth_initialize(bd_t*); extern int npe_initialize(bd_t *); extern int uec_initialize(int); -extern int at91sam9_eth_initialize(bd_t *); #ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -254,10 +253,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_RTL8169) rtl8169_initialize(bis); #endif -#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) - at91sam9_eth_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); -- cgit v0.10.2 From 02d69891d95ee76b0e86e1715a4dc0b964a57cb7 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 09:49:42 -0700 Subject: Moved initialization of RTL8169 Ethernet controller to board_eth_init() Affected boards: linkstation r7780mp Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c index 241cf03..afb96ae 100644 --- a/board/linkstation/linkstation.c +++ b/board/linkstation/linkstation.c @@ -26,6 +26,7 @@ #include #include #include +#include #ifdef CONFIG_PCI #include @@ -128,3 +129,8 @@ int board_early_init_f (void) out_8((volatile u8*)UART_DCR, 1); return 0; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/r7780mp/r7780mp.c b/board/r7780mp/r7780mp.c index 19c35d3..efbeec9 100644 --- a/board/r7780mp/r7780mp.c +++ b/board/r7780mp/r7780mp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "r7780mp.h" int checkboard(void) @@ -77,3 +78,8 @@ void pci_init_board(void) { pci_sh7780_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index 7c00926..e9f6391 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -55,6 +55,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index 3ec9212..954de39 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -46,6 +46,7 @@ int greth_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); +int rtl8169_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int uli526x_initialize(bd_t *bis); @@ -56,6 +57,9 @@ int uli526x_initialize(bd_t *bis); static inline int pci_eth_init(bd_t *bis) { int num = 0; +#if defined(CONFIG_RTL8169) + num += rtl8169_initialize(bis); +#endif #if defined(CONFIG_ULI526) num += uli526x_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index 71feb07..69f66b4 100644 --- a/net/eth.c +++ b/net/eth.c @@ -61,7 +61,6 @@ extern int pcnet_initialize(bd_t*); extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); extern int rtl8139_initialize(bd_t*); -extern int rtl8169_initialize(bd_t*); extern int scc_initialize(bd_t*); extern int tsi108_eth_initialize(bd_t*); extern int npe_initialize(bd_t *); @@ -250,10 +249,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_RTL8139) rtl8139_initialize(bis); #endif -#if defined(CONFIG_RTL8169) - rtl8169_initialize(bis); -#endif - if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From 0b252f50ae218ae15bfb63af44227972686ebc56 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 21:41:08 -0700 Subject: Moved initialization of RTL8139 Ethernet controller to board_eth_init() Affected boards: hidden_dragon MPC8544DS MPC8610HPCN R2DPLUS TB0229 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 1e29773..eaf6fa3 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -33,6 +33,7 @@ #include #include #include +#include #include "../common/pixis.h" #include "../common/sgmii_riser.h" @@ -465,9 +466,9 @@ get_board_sys_clk(ulong dummy) return val; } -#ifdef CONFIG_TSEC_ENET int board_eth_init(bd_t *bis) { +#ifdef CONFIG_TSEC_ENET struct tsec_info_struct tsec_info[2]; volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; @@ -497,10 +498,9 @@ int board_eth_init(bd_t *bis) tsec_eth_init(bis, tsec_info, num); - - return 0; -} #endif + return pci_eth_init(bis); +} #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 1bb563e..97f7f49 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -29,6 +29,7 @@ #include #include #include +#include #include "../common/pixis.h" @@ -379,3 +380,10 @@ get_board_sys_clk(ulong dummy) return val; } + +int board_eth_init(bd_t *bis) +{ + /* Initialize TSECs */ + cpu_eth_init(bis); + return pci_eth_init(bis); +} diff --git a/board/hidden_dragon/hidden_dragon.c b/board/hidden_dragon/hidden_dragon.c index 5713a33..2d7a787 100644 --- a/board/hidden_dragon/hidden_dragon.c +++ b/board/hidden_dragon/hidden_dragon.c @@ -27,6 +27,7 @@ #include #include #include +#include int checkboard (void) { @@ -93,3 +94,8 @@ void pci_init_board(void) { pci_mpc824x_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/r2dplus/r2dplus.c b/board/r2dplus/r2dplus.c index 8fb8ff6..b962dd1 100644 --- a/board/r2dplus/r2dplus.c +++ b/board/r2dplus/r2dplus.c @@ -76,3 +76,8 @@ void pci_init_board(void) { pci_sh7751_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c index 921bd3a..2abb4a7 100644 --- a/board/tb0229/tb0229.c +++ b/board/tb0229/tb0229.c @@ -46,3 +46,8 @@ int checkboard (void) return 0; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c index 4fd20ac..d378ce3 100644 --- a/drivers/net/rtl8139.c +++ b/drivers/net/rtl8139.c @@ -74,6 +74,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index 954de39..b333755 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -46,6 +46,7 @@ int greth_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); +int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int uli526x_initialize(bd_t *bis); @@ -57,6 +58,9 @@ int uli526x_initialize(bd_t *bis); static inline int pci_eth_init(bd_t *bis) { int num = 0; +#if defined(CONFIG_RTL8139) + num += rtl8139_initialize(bis); +#endif #if defined(CONFIG_RTL8169) num += rtl8169_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index 69f66b4..092d426 100644 --- a/net/eth.c +++ b/net/eth.c @@ -60,7 +60,6 @@ extern int ns8382x_initialize(bd_t*); extern int pcnet_initialize(bd_t*); extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); -extern int rtl8139_initialize(bd_t*); extern int scc_initialize(bd_t*); extern int tsi108_eth_initialize(bd_t*); extern int npe_initialize(bd_t *); @@ -246,9 +245,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_TSI108_ETH) tsi108_eth_initialize(bis); #endif -#if defined(CONFIG_RTL8139) - rtl8139_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From ccdd12f83ef93719fbe85f642aa4dc648b9498f0 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 09:59:33 -0700 Subject: Moved initialization of TSI108 Ethernet controller to board_eth_init() Affected boards: mpc7448hpc2 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/freescale/mpc7448hpc2/mpc7448hpc2.c b/board/freescale/mpc7448hpc2/mpc7448hpc2.c index 6f74c31..cfdbed5 100644 --- a/board/freescale/mpc7448hpc2/mpc7448hpc2.c +++ b/board/freescale/mpc7448hpc2/mpc7448hpc2.c @@ -32,6 +32,7 @@ #include #include <74xx_7xx.h> #include +#include #undef DEBUG @@ -92,3 +93,12 @@ ft_board_setup(void *blob, bd_t *bd) fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } #endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#if defined(CONFIG_TSI108_ETH) + rc = tsi108_eth_initialize(bis); +#endif + return rc; +} diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c index 2534097..50fa765 100644 --- a/drivers/net/tsi108_eth.c +++ b/drivers/net/tsi108_eth.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #ifdef DEBUG diff --git a/include/netdev.h b/include/netdev.h index b333755..5f6b38f 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -49,6 +49,7 @@ int mcffec_initialize(bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int skge_initialize(bd_t *bis); +int tsi108_eth_initialize(bd_t *bis); int uli526x_initialize(bd_t *bis); /* Boards with PCI network controllers can call this from their board_eth_init() diff --git a/net/eth.c b/net/eth.c index 092d426..65ebf2d 100644 --- a/net/eth.c +++ b/net/eth.c @@ -61,7 +61,6 @@ extern int pcnet_initialize(bd_t*); extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); extern int scc_initialize(bd_t*); -extern int tsi108_eth_initialize(bd_t*); extern int npe_initialize(bd_t *); extern int uec_initialize(int); @@ -242,9 +241,6 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_NS8382X ns8382x_initialize(bis); #endif -#if defined(CONFIG_TSI108_ETH) - tsi108_eth_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From 19403633dd70333893c2da7926a1d0dcd6dab7d8 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:03:22 -0700 Subject: Moved initialization of NS8382X Ethernet controller to board_eth_init() Affected boards: bc3450 cpci5200 mecp5200 pf2000 icecube o2dnt pm520 sandpoint8245 total5200 tqm5200 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c index a728dc6..e27c234 100644 --- a/board/bc3450/bc3450.c +++ b/board/bc3450/bc3450.c @@ -33,6 +33,7 @@ #include #include #include +#include #ifdef CONFIG_VIDEO_SM501 #include @@ -669,3 +670,8 @@ int board_get_height (void) } #endif /* CONFIG_VIDEO_SM501 */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/esd/cpci5200/cpci5200.c b/board/esd/cpci5200/cpci5200.c index 20130ac..2a42e65 100644 --- a/board/esd/cpci5200/cpci5200.c +++ b/board/esd/cpci5200/cpci5200.c @@ -32,6 +32,7 @@ #include #include #include +#include #include "mt46v16m16-75.h" @@ -259,6 +260,11 @@ void init_ata_reset(void) } } +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} + int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { unsigned int addr; diff --git a/board/esd/mecp5200/mecp5200.c b/board/esd/mecp5200/mecp5200.c index 6d776b7..ff44abd 100644 --- a/board/esd/mecp5200/mecp5200.c +++ b/board/esd/mecp5200/mecp5200.c @@ -32,6 +32,7 @@ #include #include #include +#include #include "mt46v16m16-75.h" @@ -259,3 +260,8 @@ void init_power_switch(void) __asm__ volatile ("sync"); } } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/esd/pf5200/pf5200.c b/board/esd/pf5200/pf5200.c index 7970f89..c4c0221 100644 --- a/board/esd/pf5200/pf5200.c +++ b/board/esd/pf5200/pf5200.c @@ -32,6 +32,7 @@ #include #include #include +#include #include "mt46v16m16-75.h" @@ -264,6 +265,11 @@ void init_power_switch(void) __asm__ volatile ("sync"); } +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} + void power_set_reset(int power) { debug("ide_set_reset(%d)\n", power); diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 760db73..2ab86be 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -29,6 +29,7 @@ #include #include #include +#include #if defined(CONFIG_LITE5200B) #include "mt46v32m16.h" @@ -390,3 +391,8 @@ ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/o2dnt/o2dnt.c b/board/o2dnt/o2dnt.c index a4eed3a..37832de 100644 --- a/board/o2dnt/o2dnt.c +++ b/board/o2dnt/o2dnt.c @@ -27,6 +27,7 @@ #include #include #include +#include #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 @@ -180,3 +181,8 @@ void pci_init_board(void) pci_mpc5xxx_init(&hose); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c index 83d9bcd..c9610fb 100644 --- a/board/pm520/pm520.c +++ b/board/pm520/pm520.c @@ -27,6 +27,7 @@ #include #include #include +#include #if defined(CONFIG_MPC5200_DDR) #include "mt46v16m16-75.h" @@ -321,3 +322,8 @@ void doc_init (void) doc_probe (CFG_DOC_BASE); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/sandpoint/sandpoint.c b/board/sandpoint/sandpoint.c index 7429647..832baa2 100644 --- a/board/sandpoint/sandpoint.c +++ b/board/sandpoint/sandpoint.c @@ -24,6 +24,7 @@ #include #include #include +#include int checkboard (void) { @@ -99,3 +100,8 @@ void pci_init_board(void) { pci_mpc824x_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c index 1ae24c4..c1848fc 100644 --- a/board/total5200/total5200.c +++ b/board/total5200/total5200.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "sdram.h" @@ -308,3 +309,8 @@ int board_get_height (void) } #endif /* CONFIG_VIDEO_SED13806 */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/tqc/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index 8b8e461..d75aa9b 100644 --- a/board/tqc/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -32,6 +32,7 @@ #include #include #include +#include #ifdef CONFIG_VIDEO_SM501 #include @@ -749,3 +750,8 @@ void ft_board_setup(void *blob, bd_t *bd) fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c index bb58438..a2d61af 100644 --- a/drivers/net/ns8382x.c +++ b/drivers/net/ns8382x.c @@ -53,6 +53,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index 5f6b38f..97eff7a 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -46,6 +46,7 @@ int greth_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); +int ns8382x_initialize(bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int skge_initialize(bd_t *bis); @@ -59,6 +60,9 @@ int uli526x_initialize(bd_t *bis); static inline int pci_eth_init(bd_t *bis) { int num = 0; +#ifdef CONFIG_NS8382X + num += ns8382x_initialize(bis); +#endif #if defined(CONFIG_RTL8139) num += rtl8139_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index 65ebf2d..b846cad 100644 --- a/net/eth.c +++ b/net/eth.c @@ -56,7 +56,6 @@ extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); extern int natsemi_initialize(bd_t*); -extern int ns8382x_initialize(bd_t*); extern int pcnet_initialize(bd_t*); extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); @@ -238,9 +237,6 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_NATSEMI natsemi_initialize(bis); #endif -#ifdef CONFIG_NS8382X - ns8382x_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From b902b8dda5e1fd4d5fe2f202c71ee3521d2c40ed Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:07:16 -0700 Subject: Moved initialization of NATSEMI Ethernet controller to board_eth_init() Affected boards: a3000 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/a3000/a3000.c b/board/a3000/a3000.c index c1eceaa..040ba89 100644 --- a/board/a3000/a3000.c +++ b/board/a3000/a3000.c @@ -27,6 +27,7 @@ #include #include #include +#include int checkboard (void) { @@ -109,3 +110,9 @@ void pci_init_board(void) { pci_mpc824x_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} + diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index 4aee048..ff8d2d7 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c @@ -53,6 +53,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index 97eff7a..c5b0815 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -46,6 +46,7 @@ int greth_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); +int natsemi_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); @@ -60,6 +61,9 @@ int uli526x_initialize(bd_t *bis); static inline int pci_eth_init(bd_t *bis) { int num = 0; +#ifdef CONFIG_NATSEMI + num += natsemi_initialize(bis); +#endif #ifdef CONFIG_NS8382X num += ns8382x_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index b846cad..dc7b288 100644 --- a/net/eth.c +++ b/net/eth.c @@ -55,7 +55,6 @@ extern int mpc512x_fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); -extern int natsemi_initialize(bd_t*); extern int pcnet_initialize(bd_t*); extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); @@ -234,9 +233,6 @@ int eth_initialize(bd_t *bis) #ifdef CFG_GT_6426x gt6426x_eth_initialize(bis); #endif -#ifdef CONFIG_NATSEMI - natsemi_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From e3090534d62045dcb73f5392bacc64a4e8e443dc Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:08:43 -0700 Subject: Moved initialization of PCNET Ethernet controller to board_eth_init() Affected boards: PN62 sc520_cdp Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/pn62/pn62.c b/board/pn62/pn62.c index d905b29..60fc431 100644 --- a/board/pn62/pn62.c +++ b/board/pn62/pn62.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "pn62.h" @@ -186,3 +187,8 @@ static int get_mac_address (int id, u8 * mac, char *string, int size) mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c index 8050aa6..f21c730 100644 --- a/board/sc520_cdp/sc520_cdp.c +++ b/board/sc520_cdp/sc520_cdp.c @@ -29,6 +29,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -629,3 +630,8 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len) #endif return res; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index a4f0214..99b6942 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index c5b0815..b1dadd8 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -48,6 +48,7 @@ int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); +int pcnet_initialize(bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int skge_initialize(bd_t *bis); @@ -61,6 +62,10 @@ int uli526x_initialize(bd_t *bis); static inline int pci_eth_init(bd_t *bis) { int num = 0; + +#ifdef CONFIG_PCNET + num += pcnet_initialize(bis); +#endif #ifdef CONFIG_NATSEMI num += natsemi_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index dc7b288..aa6b2c8 100644 --- a/net/eth.c +++ b/net/eth.c @@ -55,7 +55,6 @@ extern int mpc512x_fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); -extern int pcnet_initialize(bd_t*); extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); extern int scc_initialize(bd_t*); @@ -227,9 +226,6 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_3COM eth_3com_initialize(bis); #endif -#ifdef CONFIG_PCNET - pcnet_initialize(bis); -#endif #ifdef CFG_GT_6426x gt6426x_eth_initialize(bis); #endif -- cgit v0.10.2 From 6aca145e067efe75398e9fac97822bd3700de0b2 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:13:34 -0700 Subject: Moved initialization of GT6426x Ethernet controller to board_eth_init() Affected boards: EVB64260 P3G4 ZUMA Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c index fa5b6d4..ca8bab5 100644 --- a/board/evb64260/eth.c +++ b/board/evb64260/eth.c @@ -27,6 +27,7 @@ Skeleton NIC driver for Etherboot #include #include #include +#include #include "eth.h" #include "eth_addrtbl.h" diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c index ab59941..bc108d0 100644 --- a/board/evb64260/evb64260.c +++ b/board/evb64260/evb64260.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include "eth.h" @@ -248,7 +249,6 @@ int board_early_init_f (void) sram_boot = 1; #endif - if (!sram_boot) memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE); memoryMapDeviceSpace(DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE); @@ -443,3 +443,9 @@ display_mem_map(void) printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n", base, size>>20, width); } + +int board_eth_init(bd_t *bis) +{ + gt6426x_eth_initialize(bis); + return 0; +} diff --git a/include/netdev.h b/include/netdev.h index b1dadd8..666d12d 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -43,6 +43,7 @@ int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ int bfin_EMAC_initialize(bd_t *bis); int greth_initialize(bd_t *bis); +void gt6426x_eth_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); diff --git a/net/eth.c b/net/eth.c index aa6b2c8..99efa16 100644 --- a/net/eth.c +++ b/net/eth.c @@ -39,10 +39,6 @@ static int __def_eth_init(bd_t *bis) int cpu_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); int board_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); -#ifdef CFG_GT_6426x -extern int gt6426x_eth_initialize(bd_t *bis); -#endif - extern int au1x00_enet_initialize(bd_t*); extern int dc21x4x_initialize(bd_t*); extern int e1000_initialize(bd_t*); @@ -226,9 +222,6 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_3COM eth_3com_initialize(bis); #endif -#ifdef CFG_GT_6426x - gt6426x_eth_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From 164846eeb25cb2a5ede7ab9371fdca7f4831a055 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:15:26 -0700 Subject: Moved initialization of 3COM Ethernet controller (AmigaOne) to board_eth_init() Affected boards: AmigaOneG3SE Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c index e118563..4d44001 100644 --- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c +++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "articiaS.h" #include "memio.h" #include "via686.h" @@ -111,3 +112,11 @@ void pci_init_board (void) articiaS_pci_init (); #endif } + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_3COM) + eth_3com_initialize(bis); +#endif + return 0; +} diff --git a/board/MAI/AmigaOneG3SE/enet.c b/board/MAI/AmigaOneG3SE/enet.c index 5a90cc5..0b4dfe6 100644 --- a/board/MAI/AmigaOneG3SE/enet.c +++ b/board/MAI/AmigaOneG3SE/enet.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index 666d12d..0c16dd6 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -42,6 +42,7 @@ int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ int bfin_EMAC_initialize(bd_t *bis); +int eth_3com_initialize (bd_t * bis); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); diff --git a/net/eth.c b/net/eth.c index 99efa16..c4d7b63 100644 --- a/net/eth.c +++ b/net/eth.c @@ -43,7 +43,6 @@ extern int au1x00_enet_initialize(bd_t*); extern int dc21x4x_initialize(bd_t*); extern int e1000_initialize(bd_t*); extern int eepro100_initialize(bd_t*); -extern int eth_3com_initialize(bd_t*); extern int fec_initialize(bd_t*); extern int inca_switch_initialize(bd_t*); extern int mpc5xxx_fec_initialize(bd_t*); @@ -219,9 +218,6 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_TULIP dc21x4x_initialize(bis); #endif -#ifdef CONFIG_3COM - eth_3com_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From 8218bd2aa68820b878a8413493ae17fd8d21f944 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:16:59 -0700 Subject: Moved initialization of IncaIP Ethernet controller to board_eth_init Affected boards: IncaIP Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c index ac7ad8f..6fe852c 100644 --- a/board/incaip/incaip.c +++ b/board/incaip/incaip.c @@ -23,6 +23,7 @@ #include #include +#include #include #include #include @@ -116,3 +117,10 @@ int checkboard (void) return 0; } + +#if defined(CONFIG_INCA_IP_SWITCH) +int board_eth_init(bd_t *bis) +{ + return inca_switch_initialize(bis); +} +#endif diff --git a/drivers/net/inca-ip_sw.c b/drivers/net/inca-ip_sw.c index d852a15..492f5ce 100644 --- a/drivers/net/inca-ip_sw.c +++ b/drivers/net/inca-ip_sw.c @@ -28,6 +28,7 @@ #include #include +#include #include #include @@ -199,7 +200,7 @@ int inca_switch_initialize(bd_t * bis) printf("Leaving inca_switch_initialize()\n"); #endif - return 1; + return 0; } diff --git a/include/netdev.h b/include/netdev.h index 0c16dd6..f28039e 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -45,6 +45,7 @@ int bfin_EMAC_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); +int inca_switch_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); diff --git a/net/eth.c b/net/eth.c index c4d7b63..0dfa70d 100644 --- a/net/eth.c +++ b/net/eth.c @@ -44,7 +44,6 @@ extern int dc21x4x_initialize(bd_t*); extern int e1000_initialize(bd_t*); extern int eepro100_initialize(bd_t*); extern int fec_initialize(bd_t*); -extern int inca_switch_initialize(bd_t*); extern int mpc5xxx_fec_initialize(bd_t*); extern int mpc512x_fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); @@ -169,9 +168,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_4xx) && !defined(CONFIG_IOP480) && !defined(CONFIG_AP1000) ppc_4xx_eth_initialize(bis); #endif -#ifdef CONFIG_INCA_IP_SWITCH - inca_switch_initialize(bis); -#endif #ifdef CONFIG_PLB2800_ETHER plb2800_eth_initialize(bis); #endif -- cgit v0.10.2 From a0aad08f9427ac00218bdb2cb649833ce6ec9b8d Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:36:38 -0700 Subject: Moved initialization of MPC512x_FEC Ethernet driver to CPU directory Added a cpu_eth_init() function to MPC512x CPU directory and removed code from net/eth.c Signed-off-by: Ben Warren diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index 1f39ac4..d432d99 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #if defined(CONFIG_OF_LIBFDT) @@ -195,3 +196,15 @@ void ft_cpu_setup(void *blob, bd_t *bd) #endif } #endif + +#ifdef CONFIG_MPC512x_FEC +/* Default initializations for FEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +int cpu_eth_init(bd_t *bis) +{ + return mpc512x_fec_initialize(bis); +} +#endif diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c index 7caeeda..54283fb 100644 --- a/drivers/net/mpc512x_fec.c +++ b/drivers/net/mpc512x_fec.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include "mpc512x_fec.h" diff --git a/include/netdev.h b/include/netdev.h index f28039e..487d319 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -49,6 +49,7 @@ int inca_switch_initialize(bd_t *bis); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); +int mpc512x_fec_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); diff --git a/net/eth.c b/net/eth.c index 0dfa70d..b61d0fc 100644 --- a/net/eth.c +++ b/net/eth.c @@ -45,7 +45,6 @@ extern int e1000_initialize(bd_t*); extern int eepro100_initialize(bd_t*); extern int fec_initialize(bd_t*); extern int mpc5xxx_fec_initialize(bd_t*); -extern int mpc512x_fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); @@ -177,9 +176,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_MPC5xxx_FEC) mpc5xxx_fec_initialize(bis); #endif -#if defined(CONFIG_MPC512x_FEC) - mpc512x_fec_initialize (bis); -#endif #if defined(CONFIG_MPC8220_FEC) mpc8220_fec_initialize(bis); #endif -- cgit v0.10.2 From e1d7480b5de1fd4830bf7cf5e2237d3b0846d08d Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:39:12 -0700 Subject: Moved initialization of MPC5xxx_FEC Ethernet driver to CPU directory Modified board_eth_init() functions of boards that have this FEC in addition to other Ethernet controllers. Affected boards: bc3450 icecube mvbc_p o2dnt pm520 total5200 tq5200 Removed initialization of controller from net/eth.c Signed-off-by: Ben Warren diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c index e27c234..7ddf74c 100644 --- a/board/bc3450/bc3450.c +++ b/board/bc3450/bc3450.c @@ -673,5 +673,6 @@ int board_get_height (void) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Built in FEC comes first */ return pci_eth_init(bis); } diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 2ab86be..d84ab3a 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -394,5 +394,6 @@ ft_board_setup(void *blob, bd_t *bd) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Built in FEC comes first */ return pci_eth_init(bis); } diff --git a/board/matrix_vision/mvbc_p/mvbc_p.c b/board/matrix_vision/mvbc_p/mvbc_p.c index 3332f5a..648b45e 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.c +++ b/board/matrix_vision/mvbc_p/mvbc_p.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include "fpga.h" #include "mvbc_p.h" @@ -324,3 +325,8 @@ void ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } + +int board_eth_init(bd_t *bis) +{ + return cpu_eth_init(bis); /* Built in FEC comes first */ +} diff --git a/board/o2dnt/o2dnt.c b/board/o2dnt/o2dnt.c index 37832de..19faf52 100644 --- a/board/o2dnt/o2dnt.c +++ b/board/o2dnt/o2dnt.c @@ -184,5 +184,6 @@ void pci_init_board(void) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Built in FEC comes first */ return pci_eth_init(bis); } diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c index c9610fb..a9d63cc 100644 --- a/board/pm520/pm520.c +++ b/board/pm520/pm520.c @@ -325,5 +325,6 @@ void doc_init (void) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Built in FEC comes first */ return pci_eth_init(bis); } diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c index c1848fc..ec00a67 100644 --- a/board/total5200/total5200.c +++ b/board/total5200/total5200.c @@ -312,5 +312,6 @@ int board_get_height (void) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Built in FEC comes first */ return pci_eth_init(bis); } diff --git a/board/tqc/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index d75aa9b..5152331 100644 --- a/board/tqc/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -753,5 +753,6 @@ void ft_board_setup(void *blob, bd_t *bd) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Built in FEC comes first */ return pci_eth_init(bis); } diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 0ed2899..1326c3c 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -155,3 +156,15 @@ ulong bootcount_load (void) return (*save_addr & 0x0000ffff); } #endif /* CONFIG_BOOTCOUNT_LIMIT */ + +#ifdef CONFIG_MPC5xxx_FEC +/* Default initializations for FEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +int cpu_eth_init(bd_t *bis) +{ + return mpc5xxx_fec_initialize(bis); +} +#endif diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c index 3d3eb8b..f8618b1 100644 --- a/drivers/net/mpc5xxx_fec.c +++ b/drivers/net/mpc5xxx_fec.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include "mpc5xxx_fec.h" diff --git a/include/netdev.h b/include/netdev.h index 487d319..f7738cc 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -50,6 +50,7 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); int mpc512x_fec_initialize(bd_t *bis); +int mpc5xxx_fec_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); diff --git a/net/eth.c b/net/eth.c index b61d0fc..053179e 100644 --- a/net/eth.c +++ b/net/eth.c @@ -44,7 +44,6 @@ extern int dc21x4x_initialize(bd_t*); extern int e1000_initialize(bd_t*); extern int eepro100_initialize(bd_t*); extern int fec_initialize(bd_t*); -extern int mpc5xxx_fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); @@ -173,9 +172,6 @@ int eth_initialize(bd_t *bis) #ifdef SCC_ENET scc_initialize(bis); #endif -#if defined(CONFIG_MPC5xxx_FEC) - mpc5xxx_fec_initialize(bis); -#endif #if defined(CONFIG_MPC8220_FEC) mpc8220_fec_initialize(bis); #endif -- cgit v0.10.2 From 4fce2aceaf8afd31a252bc782c9dbc497bf40487 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:40:51 -0700 Subject: Moved initialization of plb2800 Ethernet driver to board_eth_init Affected boards: purple Removed initialization of controller from net/eth.c Signed-off-by: Ben Warren diff --git a/board/purple/purple.c b/board/purple/purple.c index 9775591..c129d7a 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -23,6 +23,7 @@ #include #include +#include #include #include #include @@ -274,3 +275,11 @@ void copy_code (ulong dest_addr) start += CFG_CACHELINE_SIZE; } } + +#ifdef CONFIG_PLB2800_ETHER +int board_eth_init(bd_t *bis) +{ + return plb2800_eth_initialize(bis); +} +#endif + diff --git a/drivers/net/plb2800_eth.c b/drivers/net/plb2800_eth.c index dad842c..d799c73 100644 --- a/drivers/net/plb2800_eth.c +++ b/drivers/net/plb2800_eth.c @@ -26,6 +26,7 @@ #include #include #include +#include #include @@ -105,7 +106,7 @@ int plb2800_eth_initialize(bd_t * bis) if (!(dev = (struct eth_device *) malloc (sizeof *dev))) { printf("Failed to allocate memory\n"); - return 0; + return -1; } memset(dev, 0, sizeof(*dev)); @@ -140,7 +141,7 @@ int plb2800_eth_initialize(bd_t * bis) printf("Leaving plb2800_eth_initialize()\n"); #endif - return 1; + return 0; } static int plb2800_eth_init(struct eth_device *dev, bd_t * bis) diff --git a/include/netdev.h b/include/netdev.h index f7738cc..1013a80 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -54,6 +54,7 @@ int mpc5xxx_fec_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); +int plb2800_eth_initialize(bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int skge_initialize(bd_t *bis); diff --git a/net/eth.c b/net/eth.c index 053179e..42c370b 100644 --- a/net/eth.c +++ b/net/eth.c @@ -47,7 +47,6 @@ extern int fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); -extern int plb2800_eth_initialize(bd_t*); extern int ppc_4xx_eth_initialize(bd_t *); extern int scc_initialize(bd_t*); extern int npe_initialize(bd_t *); @@ -166,9 +165,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_4xx) && !defined(CONFIG_IOP480) && !defined(CONFIG_AP1000) ppc_4xx_eth_initialize(bis); #endif -#ifdef CONFIG_PLB2800_ETHER - plb2800_eth_initialize(bis); -#endif #ifdef SCC_ENET scc_initialize(bis); #endif -- cgit v0.10.2 From ad3381cf4167120db5c7b88e4970245e1d5c0a32 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:44:19 -0700 Subject: Moved initialization of E1000 Ethernet controller to board_eth_init() Affected boards: ap1000 mvbc_p PM854 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/amirix/ap1000/ap1000.c b/board/amirix/ap1000/ap1000.c index 55277e7..8f30ed9 100644 --- a/board/amirix/ap1000/ap1000.c +++ b/board/amirix/ap1000/ap1000.c @@ -23,6 +23,7 @@ #include #include +#include #include #include "powerspan.h" @@ -697,3 +698,9 @@ U_BOOT_CMD (swrecon, 1, 0, do_swreconfig, "swrecon - trigger a board reconfigure to the software selected configuration\n", "\n" " - trigger a board reconfigure to the software selected configuration\n"); + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} + diff --git a/board/matrix_vision/mvbc_p/mvbc_p.c b/board/matrix_vision/mvbc_p/mvbc_p.c index 648b45e..c88c4a6 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.c +++ b/board/matrix_vision/mvbc_p/mvbc_p.c @@ -328,5 +328,6 @@ void ft_board_setup(void *blob, bd_t *bd) int board_eth_init(bd_t *bis) { - return cpu_eth_init(bis); /* Built in FEC comes first */ + cpu_eth_init(bis); /* Built in FEC comes first */ + return pci_eth_init(bis); } diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c index 7dbafb9..f366814 100644 --- a/board/pm854/pm854.c +++ b/board/pm854/pm854.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include @@ -289,3 +290,8 @@ pci_init_board(void) pci_mpc85xx_init(&hose); #endif /* CONFIG_PCI */ } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index c8b4e98..2dcaa2c 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -3059,5 +3059,5 @@ e1000_initialize(bd_t * bis) card_number++; } - return 1; + return card_number; } diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index c258bc2..08042a8 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -36,6 +36,7 @@ #include #include #include +#include #include #include diff --git a/include/netdev.h b/include/netdev.h index 1013a80..fa4d92d 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -42,6 +42,7 @@ int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ int bfin_EMAC_initialize(bd_t *bis); +int e1000_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); @@ -69,6 +70,9 @@ static inline int pci_eth_init(bd_t *bis) { int num = 0; +#ifdef CONFIG_E1000 + num += e1000_initialize(bis); +#endif #ifdef CONFIG_PCNET num += pcnet_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index 42c370b..f9a9957 100644 --- a/net/eth.c +++ b/net/eth.c @@ -41,7 +41,6 @@ int board_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); extern int au1x00_enet_initialize(bd_t*); extern int dc21x4x_initialize(bd_t*); -extern int e1000_initialize(bd_t*); extern int eepro100_initialize(bd_t*); extern int fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); @@ -193,9 +192,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_IXP4XX_NPE) npe_initialize(bis); #endif -#ifdef CONFIG_E1000 - e1000_initialize(bis); -#endif #ifdef CONFIG_EEPRO100 eepro100_initialize(bis); #endif -- cgit v0.10.2 From 8ca0b3f99c4fce7a599dcaf92ae095496dc8c8e0 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 10:45:44 -0700 Subject: Moved initialization of TULIP Ethernet controller to board_eth_init() Affected boards: cu824 bab7xx adciop dasa_sim mousse mpc8540eval musenki mvblue pcippc2/pcippc6 sbc8240 stxssa Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren diff --git a/board/cu824/cu824.c b/board/cu824/cu824.c index ecf6328..0fd4223 100644 --- a/board/cu824/cu824.c +++ b/board/cu824/cu824.c @@ -28,6 +28,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -91,3 +92,8 @@ void pci_init_board(void) { pci_mpc824x_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c index af52352..8c56116 100644 --- a/board/eltec/bab7xx/bab7xx.c +++ b/board/eltec/bab7xx/bab7xx.c @@ -30,6 +30,7 @@ #include <74xx_7xx.h> #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -244,3 +245,8 @@ void video_get_info_str (int line_number, char *info) #endif /*---------------------------------------------------------------------------*/ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/esd/adciop/adciop.c b/board/esd/adciop/adciop.c index 0f655b7..63aaf2c 100644 --- a/board/esd/adciop/adciop.c +++ b/board/esd/adciop/adciop.c @@ -22,6 +22,7 @@ */ #include +#include #include "adciop.h" /* ------------------------------------------------------------------------- */ @@ -95,3 +96,8 @@ int testdram (void) } /* ------------------------------------------------------------------------- */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c index fb0c77e..e061878 100644 --- a/board/esd/dasa_sim/dasa_sim.c +++ b/board/esd/dasa_sim/dasa_sim.c @@ -22,6 +22,7 @@ */ #include +#include #include "dasa_sim.h" /* ------------------------------------------------------------------------- */ @@ -222,3 +223,8 @@ int testdram (void) } /* ------------------------------------------------------------------------- */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/mousse/mousse.c b/board/mousse/mousse.c index f8f1529..7b61266 100644 --- a/board/mousse/mousse.c +++ b/board/mousse/mousse.c @@ -28,6 +28,7 @@ #include #include +#include #include #include "mousse.h" @@ -84,3 +85,8 @@ int misc_init_f (void) get_tod (); return 0; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c index 7c54458..028a70f 100644 --- a/board/mpc8540eval/mpc8540eval.c +++ b/board/mpc8540eval/mpc8540eval.c @@ -24,6 +24,7 @@ */ #include +#include #include #include #include @@ -247,3 +248,14 @@ long int fixed_sdram (void) return (CFG_SDRAM_SIZE * 1024 * 1024); } #endif /* !defined(CONFIG_SPD_EEPROM) */ + +int board_eth_init(bd_t *bis) +{ + /* + * This board either has PCI NICs or uses the CPU's TSECs + * pci_eth_init() will return 0 if no NICs found, so in that case + * returning -1 will force cpu_eth_init() to be called. + */ + int num = pci_eth_init(bis); + return (num <= 0 ? -1 : num); +} diff --git a/board/musenki/musenki.c b/board/musenki/musenki.c index b2b70e7..6f9eeb2 100644 --- a/board/musenki/musenki.c +++ b/board/musenki/musenki.c @@ -24,6 +24,7 @@ #include #include #include +#include int checkboard (void) { @@ -102,3 +103,8 @@ void pci_init_board(void) { pci_mpc824x_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c index a979102..056fee7 100644 --- a/board/mvblue/mvblue.c +++ b/board/mvblue/mvblue.c @@ -9,6 +9,7 @@ #include #include #include +#include #ifdef CONFIG_PCI #include @@ -245,4 +246,9 @@ void pci_init_board (void) { pci_mpc824x_init (&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} #endif diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c index c1917c1..a3dbdc8 100644 --- a/board/pcippc2/pcippc2.c +++ b/board/pcippc2/pcippc2.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "hardware.h" #include "pcippc2.h" @@ -243,3 +244,8 @@ U_BOOT_CMD( #endif #endif /* CONFIG_WATCHDOG */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/sbc8240/sbc8240.c b/board/sbc8240/sbc8240.c index 175720d..075e377 100644 --- a/board/sbc8240/sbc8240.c +++ b/board/sbc8240/sbc8240.c @@ -28,6 +28,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -103,3 +104,8 @@ int misc_init_r (void) return (0); } #endif /* CONFIG_MISC_INIT_R */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/stxssa/stxssa.c b/board/stxssa/stxssa.c index 124e123..71e9b08 100644 --- a/board/stxssa/stxssa.c +++ b/board/stxssa/stxssa.c @@ -39,6 +39,7 @@ #include #include #include +#include long int fixed_sdram (void); @@ -400,3 +401,10 @@ pci_init_board(void) pci_mpc85xx_init(hose); #endif /* CONFIG_PCI */ } + +int board_eth_init(bd_t *bis) +{ + cpu_eth_init(bis); /* Initialize TSECs first */ + return pci_eth_init(bis); +} + diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c index 8117239..c0137a7 100644 --- a/drivers/net/dc2114x.c +++ b/drivers/net/dc2114x.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #undef DEBUG_SROM diff --git a/include/netdev.h b/include/netdev.h index fa4d92d..d8d1209 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -42,6 +42,7 @@ int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ int bfin_EMAC_initialize(bd_t *bis); +int dc21x4x_initialize(bd_t *bis); int e1000_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); int greth_initialize(bd_t *bis); @@ -70,6 +71,9 @@ static inline int pci_eth_init(bd_t *bis) { int num = 0; +#ifdef CONFIG_TULIP + num += dc21x4x_initialize(bis); +#endif #ifdef CONFIG_E1000 num += e1000_initialize(bis); #endif diff --git a/net/eth.c b/net/eth.c index f9a9957..ab37bc2 100644 --- a/net/eth.c +++ b/net/eth.c @@ -40,7 +40,6 @@ int cpu_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); int board_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); extern int au1x00_enet_initialize(bd_t*); -extern int dc21x4x_initialize(bd_t*); extern int eepro100_initialize(bd_t*); extern int fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); @@ -195,9 +194,6 @@ int eth_initialize(bd_t *bis) #ifdef CONFIG_EEPRO100 eepro100_initialize(bis); #endif -#ifdef CONFIG_TULIP - dc21x4x_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From 10efa024b8ffd9e6aaca63da8bddfdffdc672274 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sun, 31 Aug 2008 20:37:00 -0700 Subject: Moved initialization of EEPRO100 Ethernet controller to board_eth_init() Affected boards: db64360 db64460 katmai taihu taishan yucca cpc45 cpu87 eXalion elppc debris kvme080 mpc8315erdb integratorap ixdp425 oxc pm826 pm828 pm854 pm856 ppmc7xx sc3 sc520_spunk sorcery tqm8272 tqm85xx utx8245 Removed initialization of the driver from net/eth.c Also, wrapped contents of pci_eth_init() by CONFIG_PCI. Signed-off-by: Ben Warren diff --git a/board/Marvell/db64360/db64360.c b/board/Marvell/db64360/db64360.c index 2a810a6..c03d03d 100644 --- a/board/Marvell/db64360/db64360.c +++ b/board/Marvell/db64360/db64360.c @@ -33,6 +33,7 @@ #include "../include/pci.h" #include "../include/mv_gen_reg.h" #include +#include #include "eth.h" #include "mpsc.h" @@ -929,3 +930,8 @@ void board_prebootm_init () icache_disable (); dcache_disable (); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/Marvell/db64460/db64460.c b/board/Marvell/db64460/db64460.c index 1ae898d..8a05cd2 100644 --- a/board/Marvell/db64460/db64460.c +++ b/board/Marvell/db64460/db64460.c @@ -33,6 +33,7 @@ #include "../include/pci.h" #include "../include/mv_gen_reg.h" #include +#include #include "eth.h" #include "mpsc.h" @@ -929,3 +930,8 @@ void board_prebootm_init () icache_disable (); dcache_disable (); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index 08d89d7..172b581 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -447,3 +448,8 @@ int post_hotkeys_pressed(void) return (ctrlc()); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c index 254e3eb..266f260 100644 --- a/board/amcc/taihu/taihu.c +++ b/board/amcc/taihu/taihu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include extern int lcd_init(void); @@ -200,3 +201,8 @@ int pci_pre_init(struct pci_controller *hose) return 1; } #endif /* CONFIG_PCI */ + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/amcc/taishan/taishan.c b/board/amcc/taishan/taishan.c index fdd82e7..cd432cb 100644 --- a/board/amcc/taishan/taishan.c +++ b/board/amcc/taishan/taishan.c @@ -27,6 +27,7 @@ #include #include #include +#include #ifdef CFG_INIT_SHOW_RESET_REG void show_reset_reg(void); @@ -311,3 +312,8 @@ int post_hotkeys_pressed(void) return (ctrlc()); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c index 84c3938..e0c1268 100644 --- a/board/amcc/yucca/yucca.c +++ b/board/amcc/yucca/yucca.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -952,3 +953,8 @@ int onboard_pci_arbiter_selected(int core_pci) #endif return (BOARD_OPTION_NOT_SELECTED); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c index f4e867c..16ead75 100644 --- a/board/cpc45/cpc45.c +++ b/board/cpc45/cpc45.c @@ -27,6 +27,7 @@ #include #include #include +#include int sysControlDisplay(int digit, uchar ascii_code); extern void Plx9030Init(void); @@ -273,3 +274,8 @@ void ide_led (uchar led, uchar status) writeb(val, BCSR_BASE + 0x04); } # endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/cpu87/cpu87.c b/board/cpu87/cpu87.c index f5a5de5..454987c 100644 --- a/board/cpu87/cpu87.c +++ b/board/cpu87/cpu87.c @@ -26,6 +26,7 @@ #include #include "cpu87.h" #include +#include /* * I/O Port configuration table @@ -339,3 +340,8 @@ void pci_init_board(void) pci_mpc8250_init(&hose); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/eXalion/eXalion.c b/board/eXalion/eXalion.c index 385b498..c5dff24 100644 --- a/board/eXalion/eXalion.c +++ b/board/eXalion/eXalion.c @@ -30,6 +30,7 @@ #include #include #include +#include #include "piix_pci.h" #include "eXalion.h" @@ -290,3 +291,8 @@ void pci_init_board (void) { pci_mpc824x_init (&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c index 1b70605..d3ac278 100644 --- a/board/eltec/elppc/elppc.c +++ b/board/eltec/elppc/elppc.c @@ -25,6 +25,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -172,3 +173,8 @@ void video_get_info_str (int line_number, char *info) return; } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c index 763760f..3fcf78e 100644 --- a/board/etin/debris/debris.c +++ b/board/etin/debris/debris.c @@ -25,6 +25,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -177,3 +178,8 @@ int misc_init_r(void) (char*)&gd->bd->bi_enetaddr[0], 6); return 0; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/etin/kvme080/kvme080.c b/board/etin/kvme080/kvme080.c index bfd6854..be6924d 100644 --- a/board/etin/kvme080/kvme080.c +++ b/board/etin/kvme080/kvme080.c @@ -25,6 +25,7 @@ #include #include #include +#include #include int checkboard(void) @@ -191,3 +192,8 @@ void nvram_write(long dest, const void *src, size_t count) asm volatile("sync"); } } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c index 3eecee2..0330218 100644 --- a/board/freescale/mpc8315erdb/mpc8315erdb.c +++ b/board/freescale/mpc8315erdb/mpc8315erdb.c @@ -29,6 +29,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -165,3 +166,9 @@ void ft_board_setup(void *blob, bd_t *bd) fdt_tsec1_fixup(blob, bd); } #endif + +int board_eth_init(bd_t *bis) +{ + cpu_eth_init(bis); /* Initialize TSECs first */ + return pci_eth_init(bis); +} diff --git a/board/integratorap/integratorap.c b/board/integratorap/integratorap.c index e659907..687c486 100644 --- a/board/integratorap/integratorap.c +++ b/board/integratorap/integratorap.c @@ -39,6 +39,8 @@ #include #endif +#include + DECLARE_GLOBAL_DATA_PTR; void flash__init (void); @@ -647,3 +649,8 @@ ulong get_tbclk (void) { return CFG_HZ_CLOCK/div_clock; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c index e0d7637..b379c75 100644 --- a/board/ixdp425/ixdp425.c +++ b/board/ixdp425/ixdp425.c @@ -31,6 +31,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -118,3 +119,8 @@ void pci_init_board(void) pci_ixp_init(&hose); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/oxc/oxc.c b/board/oxc/oxc.c index b61d399..eb7eeb8 100644 --- a/board/oxc/oxc.c +++ b/board/oxc/oxc.c @@ -25,6 +25,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -215,3 +216,8 @@ int misc_init_r (void) #endif return (0); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c index 7ee3ab6..d8b0929 100644 --- a/board/pm826/pm826.c +++ b/board/pm826/pm826.c @@ -25,6 +25,7 @@ #include #include #include +#include /* * I/O Port configuration table @@ -328,3 +329,8 @@ void pci_init_board(void) pci_mpc8250_init(&hose); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c index 6038e97..b163d5b 100644 --- a/board/pm828/pm828.c +++ b/board/pm828/pm828.c @@ -25,6 +25,7 @@ #include #include #include +#include /* * I/O Port configuration table @@ -361,3 +362,8 @@ void pci_init_board(void) pci_mpc8250_init(&hose); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c index f366814..90523bd 100644 --- a/board/pm854/pm854.c +++ b/board/pm854/pm854.c @@ -293,5 +293,6 @@ pci_init_board(void) int board_eth_init(bd_t *bis) { + cpu_eth_init(bis); /* Intialize TSECs first */ return pci_eth_init(bis); } diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c index bd4c065..ee33286 100644 --- a/board/pm856/pm856.c +++ b/board/pm856/pm856.c @@ -34,6 +34,7 @@ #include #include #include +#include #if defined(CONFIG_DDR_ECC) extern void ddr_enable_ecc(unsigned int dram_size); @@ -444,3 +445,9 @@ pci_init_board(void) pci_mpc85xx_init(&hose); #endif /* CONFIG_PCI */ } + +int board_eth_init(bd_t *bis) +{ + cpu_eth_init(bis); /* Intialize TSECs first */ + return pci_eth_init(bis); +} diff --git a/board/ppmc7xx/ppmc7xx.c b/board/ppmc7xx/ppmc7xx.c index 061e01e..9c87c10 100644 --- a/board/ppmc7xx/ppmc7xx.c +++ b/board/ppmc7xx/ppmc7xx.c @@ -10,6 +10,7 @@ #include #include +#include /* Define some MPC107 (memory controller) registers */ @@ -102,3 +103,8 @@ void do_reset( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ) /* Should never get here */ while(1); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/sc3/sc3.c b/board/sc3/sc3.c index 3d1a654..6c82fe7 100644 --- a/board/sc3/sc3.c +++ b/board/sc3/sc3.c @@ -37,6 +37,7 @@ #include #include #include +#include #undef writel #undef writeb @@ -779,3 +780,8 @@ void pci_init_board(void) hose.config_table = pci_solidcard3_config_table; pci_405gp_init(&hose); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c index 038d479..0b11caa 100644 --- a/board/sc520_spunk/sc520_spunk.c +++ b/board/sc520_spunk/sc520_spunk.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -676,3 +677,8 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len) spi_eeprom_write(1, offset, buffer, len) : mw_eeprom_write(1, offset, buffer, len); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/sorcery/sorcery.c b/board/sorcery/sorcery.c index 2b789d4..e4fb146 100644 --- a/board/sorcery/sorcery.c +++ b/board/sorcery/sorcery.c @@ -26,6 +26,7 @@ #include #include #include +#include phys_size_t initdram (int board_type) { @@ -58,3 +59,8 @@ void pci_init_board (void) pci_mpc8220_init (&hose); #endif /* CONFIG_PCI */ } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/tqc/tqm8272/tqm8272.c b/board/tqc/tqm8272/tqm8272.c index a0ec254..3a2376c 100644 --- a/board/tqc/tqm8272/tqm8272.c +++ b/board/tqc/tqm8272/tqm8272.c @@ -26,6 +26,7 @@ #include #include +#include #ifdef CONFIG_PCI #include #include @@ -1226,3 +1227,8 @@ void pci_init_board(void) pci_mpc8250_init(&hose); } #endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index ae3c245..0e5bc2f 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -42,6 +42,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -743,3 +744,9 @@ int board_early_init_r (void) return (0); } #endif /* CONFIG_BOARD_EARLY_INIT_R */ + +int board_eth_init(bd_t *bis) +{ + cpu_eth_init(bis); /* Intialize TSECs first */ + return pci_eth_init(bis); +} diff --git a/board/utx8245/utx8245.c b/board/utx8245/utx8245.c index e2a961a..e7ca669 100644 --- a/board/utx8245/utx8245.c +++ b/board/utx8245/utx8245.c @@ -32,6 +32,7 @@ #include #include #include +#include #define SAVE_SZ 32 @@ -127,3 +128,8 @@ void pci_init_board (void) icache_enable(); } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index 9de0fb5..d6539c0 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include diff --git a/include/netdev.h b/include/netdev.h index d8d1209..8b181f7 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -44,6 +44,7 @@ int cpu_eth_init(bd_t *bis); int bfin_EMAC_initialize(bd_t *bis); int dc21x4x_initialize(bd_t *bis); int e1000_initialize(bd_t *bis); +int eepro100_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); @@ -71,6 +72,11 @@ static inline int pci_eth_init(bd_t *bis) { int num = 0; +#ifdef CONFIG_PCI + +#ifdef CONFIG_EEPRO100 + num += eepro100_initialize(bis); +#endif #ifdef CONFIG_TULIP num += dc21x4x_initialize(bis); #endif @@ -95,6 +101,8 @@ static inline int pci_eth_init(bd_t *bis) #if defined(CONFIG_ULI526) num += uli526x_initialize(bis); #endif + +#endif /* CONFIG_PCI */ return num; } diff --git a/net/eth.c b/net/eth.c index ab37bc2..432dd60 100644 --- a/net/eth.c +++ b/net/eth.c @@ -40,7 +40,6 @@ int cpu_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); int board_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); extern int au1x00_enet_initialize(bd_t*); -extern int eepro100_initialize(bd_t*); extern int fec_initialize(bd_t*); extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); @@ -191,9 +190,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_IXP4XX_NPE) npe_initialize(bis); #endif -#ifdef CONFIG_EEPRO100 - eepro100_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); -- cgit v0.10.2 From 33314470ab32a3f5412bb61b5f3d6c216c88bf9b Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 28 Aug 2008 13:40:44 +0900 Subject: net: smc911x: Add pkt_data_pull and pkt_data_push function The RSK7203 board has the SMSC9118 wired up 'incorrectly'. Byte-swapping is necessary, and so poor performance is inevitable. This problem cannot evade by the swap function of CHIP, this can evade by software Byte-swapping. And this has problem by FIFO access only. pkt_data_pull/pkt_data_push functions necessary to solve this problem. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Ben Warren diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index 0fff820..648c94c 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -57,6 +57,11 @@ static inline void reg_write(u32 addr, u32 val) #error "SMC911X: undefined bus width" #endif /* CONFIG_DRIVER_SMC911X_16_BIT */ +u32 pkt_data_pull(u32 addr) \ + __attribute__ ((weak, alias ("reg_read"))); +void pkt_data_push(u32 addr, u32 val) \ + __attribute__ ((weak, alias ("reg_write"))); + #define mdelay(n) udelay((n)*1000) /* Below are the register offsets and bit definitions @@ -641,7 +646,7 @@ int eth_send(volatile void *packet, int length) tmplen = (length + 3) / 4; while (tmplen--) - reg_write(TX_DATA_FIFO, *data++); + pkt_data_push(TX_DATA_FIFO, *data++); /* wait for transmission */ while (!((reg_read(TX_FIFO_INF) & TX_FIFO_INF_TSUSED) >> 16)); @@ -684,7 +689,7 @@ int eth_rx(void) tmplen = (pktlen + 2+ 3) / 4; while (tmplen--) - *data++ = reg_read(RX_DATA_FIFO); + *data++ = pkt_data_pull(RX_DATA_FIFO); if (status & RX_STS_ES) printf(DRIVERNAME -- cgit v0.10.2 From be1b0d2777e179191a57b138b660547a17e55aad Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Tue, 2 Sep 2008 11:24:59 +0200 Subject: Don't tftp to unknown flash If a board has a variable number of flash banks, there are empty entries in flash_info[] and CFG_DIRECT_FLASH_TFTP is set, tftp boot fails with "Outside available Flash". This patch skips flash banks with unknown flash ids. Signed-off-by: Jochen Friedrich Signed-off-by: Ben Warren diff --git a/net/tftp.c b/net/tftp.c index 84d83ca..9aeecb8 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -111,6 +111,8 @@ store_block (unsigned block, uchar * src, unsigned len) for (i=0; i= flash_info[i].start[0]) { rc = 1; break; -- cgit v0.10.2 From 5a3e480b783bfbc139586293a54fb875d7c5c5d4 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 11:34:08 +0200 Subject: ppc4xx: Increase U-Boot size to 384kB for PLU405 boards Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk index 25b2105..0fb4efa 100644 --- a/board/esd/plu405/config.mk +++ b/board/esd/plu405/config.mk @@ -25,5 +25,4 @@ # esd PLU405 boards # -TEXT_BASE = 0xFFFC0000 -#TEXT_BASE = 0x00FC0000 +TEXT_BASE = 0xFFFA0000 diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index a3d1c56..0e04691 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -262,10 +262,10 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_FLASH_BASE 0xFFFC0000 +#define CFG_FLASH_BASE 0xFFFA0000 #define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ -#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ +#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 256 kB for Monitor */ +#define CFG_MALLOC_LEN (384 * 1024) /* Reserve 256 kB for malloc() */ #if (CFG_MONITOR_BASE < FLASH_BASE0_PRELIM) # define CFG_RAMBOOT 1 -- cgit v0.10.2 From 3bc1054cec2f6b25822f301ea922a16233baa4c7 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 11:34:36 +0200 Subject: ppc4xx: Add fdt support for PLU405 boards Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 0e04691..211d926 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -89,6 +89,8 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_EEPROM +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP #define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION -- cgit v0.10.2 From d74cdb1d0614ab78128e0735a51e7988a7b7ea33 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 11:35:04 +0200 Subject: ppc4xx: Cleanup PLU405 linker script Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/plu405/u-boot.lds b/board/esd/plu405/u-boot.lds index d70d379..d52b51a 100644 --- a/board/esd/plu405/u-boot.lds +++ b/board/esd/plu405/u-boot.lds @@ -61,19 +61,6 @@ SECTIONS /* the sector layout of our flash chips! XXX FIXME XXX */ cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/environment.o(.text)*/ *(.text) *(.fixup) @@ -124,7 +111,6 @@ SECTIONS .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; - . = .; __start___ex_table = .; __ex_table : { *(__ex_table) } -- cgit v0.10.2 From 40e43e3b87d57b2ac786e27f6e25a7df9940d93b Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 11:35:35 +0200 Subject: ppc4xx: Cleanup PLU405 platform file This patch - wraps some long lines - removes unused/obsolete functions: misc_init_f() and initdram() Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c index fc71e9a..3db9c0a 100644 --- a/board/esd/plu405/plu405.c +++ b/board/esd/plu405/plu405.c @@ -65,11 +65,9 @@ au_image_t au_image[] = { int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0])); - /* Prototypes */ int gunzip(void *, int, unsigned char *, unsigned long *); - int board_early_init_f (void) { /* @@ -89,24 +87,18 @@ int board_early_init_f (void) mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */ mtdcr(uictr, 0x10000000); /* set int trigger levels */ - mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ + mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest prio */ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ /* - * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us + * EBC Configuration Register: set ready timeout to + * 512 ebc-clks -> ca. 15 us */ mtebc (epcr, 0xa8400000); /* ebc always driven */ return 0; } - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); @@ -132,13 +124,16 @@ int misc_init_r (void) printf("\nFPGA: Booting failed "); switch (status) { case ERROR_FPGA_PRG_INIT_LOW: - printf("(Timeout: INIT not low after asserting PROGRAM*)\n "); + printf("(Timeout: INIT not low " + "after asserting PROGRAM*)\n"); break; case ERROR_FPGA_PRG_INIT_HIGH: - printf("(Timeout: INIT not high after deasserting PROGRAM*)\n "); + printf("(Timeout: INIT not high " + "after deasserting PROGRAM*)\n"); break; case ERROR_FPGA_PRG_DONE: - printf("(Timeout: DONE not high after programming FPGA)\n "); + printf("(Timeout: DONE not high " + "after programming FPGA)\n"); break; } @@ -184,15 +179,16 @@ int misc_init_r (void) /* * Reset external DUARTs */ - out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ - udelay(10); /* wait 10us */ - out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ - udelay(1000); /* wait 1ms */ + out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_DUART_RST); + udelay(10); + out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CFG_DUART_RST); + udelay(1000); /* * Set NAND-FLASH GPIO signals to default */ - out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); + out_be32((void*)GPIO0_OR, + in_be32((void*)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_NAND_CE); /* @@ -210,7 +206,6 @@ int misc_init_r (void) return (0); } - /* * Check Board Identity: */ @@ -231,18 +226,6 @@ int checkboard (void) return 0; } - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - - #ifdef CONFIG_IDE_RESET void ide_set_reset(int on) { @@ -260,7 +243,6 @@ void ide_set_reset(int on) } #endif /* CONFIG_IDE_RESET */ - void reset_phy(void) { #ifdef CONFIG_LXT971_NO_SLEEP @@ -272,7 +254,6 @@ void reset_phy(void) #endif } - #if defined(CFG_EEPROM_WREN) /* Input: I2C address of EEPROM device to enable. * -1: deliver current state @@ -290,17 +271,20 @@ int eeprom_write_enable (unsigned dev_addr, int state) switch (state) { case 1: /* Enable write access, clear bit GPIO0. */ - out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CFG_EEPROM_WP); + out_be32((void*)GPIO0_OR, + in_be32((void*)GPIO0_OR) & ~CFG_EEPROM_WP); state = 0; break; case 0: /* Disable write access, set bit GPIO0. */ - out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_EEPROM_WP); + out_be32((void*)GPIO0_OR, + in_be32((void*)GPIO0_OR) | CFG_EEPROM_WP); state = 0; break; default: /* Read current status back. */ - state = (0 == (in_be32((void*)GPIO0_OR) & CFG_EEPROM_WP)); + state = (0 == (in_be32((void*)GPIO0_OR) & + CFG_EEPROM_WP)); break; } } -- cgit v0.10.2 From 17e65c21adfb63980e6aff80bfbd2df0eeb12060 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 11:35:56 +0200 Subject: ppc4xx: Enable USB on PLU405 boards This patch enables the PCI-OHCI controller on PLU405 board. Also the default CPU frequency is updated to 266 MHz and command line editing is enabled. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 211d926..4d302ef 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -88,6 +88,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_USB #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP @@ -150,6 +151,7 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ @@ -192,7 +194,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ +#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ @@ -208,7 +210,7 @@ #define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ #define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */ #define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ +#define CFG_PCI_PTM2PCI 0x08000000 /* Host: use this pci address */ /*----------------------------------------------------------------------- * IDE/ATA stuff @@ -406,7 +408,7 @@ * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ -#if 0 +#if 1 #define PLLMR0_DEFAULT PLLMR0_266_133_66_33 #define PLLMR1_DEFAULT PLLMR1_266_133_66_33 #endif @@ -414,9 +416,19 @@ #define PLLMR0_DEFAULT PLLMR0_200_100_50_33 #define PLLMR1_DEFAULT PLLMR1_200_100_50_33 #endif -#if 1 +#if 0 #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 #endif +/* + * PCI OHCI controller + */ +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_PCI_OHCI 1 +#define CFG_OHCI_SWAP_REG_ACCESS 1 +#define CFG_USB_OHCI_MAX_ROOT_PORTS 15 +#define CFG_USB_OHCI_SLOT_NAME "ohci_pci" +#define CONFIG_USB_STORAGE 1 + #endif /* __CONFIG_H */ -- cgit v0.10.2 From 9ec367aa2c5dcf79558aa2b209b45d7686654c14 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 11:36:14 +0200 Subject: ppc4xx: Coding style cleanup Wrap long lines etc. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 4d302ef..38c495e 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -57,7 +57,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ +#define CONFIG_RESET_PHY_R 1 /* use reset_phy() */ #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ @@ -168,11 +168,10 @@ #define CFG_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ -/*----------------------------------------------------------------------- +/* * NAND-FLASH stuff - *----------------------------------------------------------------------- */ -#define CFG_NAND_BASE_LIST { CFG_NAND_BASE } +#define CFG_NAND_BASE_LIST {CFG_NAND_BASE} #define NAND_MAX_CHIPS 1 #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_BIG_DELAY_US 25 @@ -185,9 +184,8 @@ #define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CFG_NAND_QUIET 1 -/*----------------------------------------------------------------------- +/* * PCI stuff - *----------------------------------------------------------------------- */ #define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ #define PCI_HOST_FORCE 1 /* configure as pci host */ @@ -212,55 +210,56 @@ #define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ #define CFG_PCI_PTM2PCI 0x08000000 /* Host: use this pci address */ -/*----------------------------------------------------------------------- +/* * IDE/ATA stuff - *----------------------------------------------------------------------- */ #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ #undef CONFIG_IDE_LED /* no led for ide supported */ #define CONFIG_IDE_RESET 1 /* reset for ide supported */ #define CFG_IDE_MAXBUS 1 /* max. 1 IDE busses */ -#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */ +/* max. 1 drives per IDE bus */ +#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*1) #define CFG_ATA_BASE_ADDR 0xF0100000 #define CFG_ATA_IDE0_OFFSET 0x0000 -#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */ -#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */ -#define CFG_ATA_ALT_OFFSET 0x0000 /* Offset for alternate registers */ +#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */ +#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register access */ +#define CFG_ATA_ALT_OFFSET 0x0000 /* Offset for alternate registers */ /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/*----------------------------------------------------------------------- +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* * FLASH organization */ -#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ +#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ -#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */ -#define CFG_FLASH_WORD_SIZE unsigned short /* flash word size (width) */ -#define CFG_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */ -#define CFG_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */ +#define CFG_FLASH_WORD_SIZE unsigned short /* flash word size (width) */ +#define CFG_FLASH_ADDR0 0x5555 /* 1st addr for flash config cycles */ +#define CFG_FLASH_ADDR1 0x2AAA /* 2nd addr for flash config cycles */ /* * The following defines are added for buggy IOP480 byte interface. * All other boards should use the standard values (CPCI405 etc.) */ -#define CFG_FLASH_READ0 0x0000 /* 0 is standard */ -#define CFG_FLASH_READ1 0x0001 /* 1 is standard */ -#define CFG_FLASH_READ2 0x0002 /* 2 is standard */ +#define CFG_FLASH_READ0 0x0000 /* 0 is standard */ +#define CFG_FLASH_READ1 0x0001 /* 1 is standard */ +#define CFG_FLASH_READ2 0x0002 /* 2 is standard */ -#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector */ -/*----------------------------------------------------------------------- +/* * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 @@ -268,76 +267,73 @@ #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0xFFFA0000 #define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 256 kB for Monitor */ -#define CFG_MALLOC_LEN (384 * 1024) /* Reserve 256 kB for malloc() */ - -#if (CFG_MONITOR_BASE < FLASH_BASE0_PRELIM) -# define CFG_RAMBOOT 1 -#else -# undef CFG_RAMBOOT -#endif +#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384kB for Monitor */ +#define CFG_MALLOC_LEN (384 * 1024) /* Reserve 384kB for malloc() */ -/*----------------------------------------------------------------------- +/* * Environment Variable setup */ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ -#define CFG_ENV_OFFSET 0x100 /* environment starts at the beginning of the EEPROM */ -#define CFG_ENV_SIZE 0x700 /* 2048 bytes may be used for env vars*/ - /* total size of a CAT24WC16 is 2048 bytes */ +#define CFG_ENV_OFFSET 0x100 /* reseve 0x100 bytes for strapping */ +#define CFG_ENV_SIZE 0x700 -/*----------------------------------------------------------------------- - * I2C EEPROM (CAT24WC16) for environment +/* + * I2C EEPROM (24WC16) for environment */ #define CONFIG_HARD_I2C /* I2c with hardware support */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */ +#define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM 24WC16 */ #define CFG_EEPROM_WREN 1 -/* CAT24WC08/16... */ +/* 24WC16 */ #define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ -/* mask of address bits that overflow into the "EEPROM chip address" */ +/* mask of address bits that overflow into the "EEPROM chip address" */ #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 -#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* The Catalyst CAT24WC08 has */ - /* 16 byte page write mode using*/ - /* last 4 bits of the address */ +#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* The 24WC16 has */ + /* 16 byte page write mode using */ + /* last 4 bits of the address */ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ #define CFG_EEPROM_PAGE_WRITE_ENABLE -/*----------------------------------------------------------------------- +/* * External Bus Controller (EBC) Setup */ - -#define CAN_BA 0xF0000000 /* CAN Base Address */ -#define DUART0_BA 0xF0000400 /* DUART Base Address */ -#define DUART1_BA 0xF0000408 /* DUART Base Address */ -#define RTC_BA 0xF0000500 /* RTC Base Address */ -#define VGA_BA 0xF1000000 /* Epson VGA Base Address */ -#define CFG_NAND_BASE 0xF4000000 /* NAND FLASH Base Address */ - -/* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */ +#define CAN_BA 0xF0000000 /* CAN Base Address */ +#define DUART0_BA 0xF0000400 /* DUART Base Address */ +#define DUART1_BA 0xF0000408 /* DUART Base Address */ +#define RTC_BA 0xF0000500 /* RTC Base Address */ +#define VGA_BA 0xF1000000 /* Epson VGA Base Address */ +#define CFG_NAND_BASE 0xF4000000 /* NAND FLASH Base Address */ + +/* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */ +/* TWT=16,CSN=1,OEN=1,WBN=1,WBF=1,TH=4,SOR=1 */ #define CFG_EBC_PB0AP 0x92015480 -/*#define CFG_EBC_PB0AP 0x08055880 /XXX* TWT=16,CSN=1,OEN=1,WBN=1,WBF=1,TH=4,SOR=1 */ -#define CFG_EBC_PB0CR 0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */ +/* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */ +#define CFG_EBC_PB0CR 0xFFC5A000 -/* Memory Bank 1 (Flash Bank 1, NAND-FLASH) initialization */ +/* Memory Bank 1 (Flash Bank 1, NAND-FLASH) initialization */ #define CFG_EBC_PB1AP 0x92015480 -#define CFG_EBC_PB1CR 0xF4018000 /* BAS=0xF40,BS=1MB,BU=R/W,BW=8bit */ +/* BAS=0xF40,BS=1MB,BU=R/W,BW=8bit */ +#define CFG_EBC_PB1CR 0xF4018000 -/* Memory Bank 2 (8 Bit Peripheral: CAN, UART, RTC) initialization */ -#define CFG_EBC_PB2AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ -#define CFG_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ +/* Memory Bank 2 (8 Bit Peripheral: CAN, UART, RTC) initialization */ +/* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ +#define CFG_EBC_PB2AP 0x010053C0 +/* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ +#define CFG_EBC_PB2CR 0xF0018000 -/* Memory Bank 3 (16 Bit Peripheral: FPGA internal, dig. IO) initialization */ -#define CFG_EBC_PB3AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ -#define CFG_EBC_PB3CR 0xF011A000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=16bit */ +/* Memory Bank 3 (16 Bit Peripheral: FPGA internal, dig. IO) initialization */ +/* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ +#define CFG_EBC_PB3AP 0x010053C0 +/* BAS=0xF01,BS=1MB,BU=R/W,BW=16bit */ +#define CFG_EBC_PB3CR 0xF011A000 -/*----------------------------------------------------------------------- +/* * FPGA stuff */ - -#define CFG_FPGA_BASE_ADDR 0xF0100100 /* FPGA internal Base Address */ +#define CFG_FPGA_BASE_ADDR 0xF0100100 /* FPGA internal Base Address */ /* FPGA internal regs */ #define CFG_FPGA_CTRL 0x000 @@ -347,17 +343,17 @@ #define CFG_FPGA_CTRL_WDI 0x0002 #define CFG_FPGA_CTRL_PS2_RESET 0x0020 -#define CFG_FPGA_SPARTAN2 1 /* using Xilinx Spartan 2 now */ +#define CFG_FPGA_SPARTAN2 1 /* using Xilinx Spartan 2 now */ #define CFG_FPGA_MAX_SIZE 128*1024 /* 128kByte is enough for XC2S50E*/ /* FPGA program pin configuration */ #define CFG_FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */ -#define CFG_FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */ -#define CFG_FPGA_DATA 0x01000000 /* FPGA data pin (ppc output) */ -#define CFG_FPGA_INIT 0x00010000 /* FPGA init pin (ppc input) */ -#define CFG_FPGA_DONE 0x00008000 /* FPGA done pin (ppc input) */ +#define CFG_FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */ +#define CFG_FPGA_DATA 0x01000000 /* FPGA data pin (ppc output) */ +#define CFG_FPGA_INIT 0x00010000 /* FPGA init pin (ppc input) */ +#define CFG_FPGA_DONE 0x00008000 /* FPGA done pin (ppc input) */ -/*----------------------------------------------------------------------- +/* * Definitions for initial stack pointer and data area (in data cache) */ /* use on chip memory ( OCM ) for temperary stack until sdram is tested */ @@ -366,14 +362,14 @@ /* On Chip Memory location */ #define CFG_OCM_DATA_ADDR 0xF8000000 #define CFG_OCM_DATA_SIZE 0x1000 -#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of SDRAM */ -#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */ +#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of SDRAM */ +#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */ -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -/*----------------------------------------------------------------------- +/* * Definitions for GPIO setup (PPC405EP specific) * * GPIO0[0] - External Bus Controller BLAST output @@ -401,11 +397,11 @@ * * Boot Flags */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ /* - * Default speed selection (cpu_plb_opb_ebc) in mhz. + * Default speed selection (cpu_plb_opb_ebc) in MHz. * This value will be set if iic boot eprom is disabled. */ #if 1 -- cgit v0.10.2 From fcaffd597f6f5191b12ca66c2a4789bbdeea85c2 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 15:07:51 +0200 Subject: ppc4xx: Add fdt support for VOM405 boards Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index ec6f205..43404fc 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -87,6 +87,8 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_EEPROM +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP #undef CONFIG_WATCHDOG /* watchdog disabled */ -- cgit v0.10.2 From 3d4dd7a941b2327b8c2fc535b782ca307ff8b6c8 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 15:07:52 +0200 Subject: ppc4xx: Cleanup VOM405 linker script Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/vom405/u-boot.lds b/board/esd/vom405/u-boot.lds index 21547ac..5d07e44 100644 --- a/board/esd/vom405/u-boot.lds +++ b/board/esd/vom405/u-boot.lds @@ -61,18 +61,6 @@ SECTIONS /* the sector layout of our flash chips! XXX FIXME XXX */ cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/environment.o(.text)*/ *(.text) *(.fixup) -- cgit v0.10.2 From 830c800e28e96ec7c3c6936a0bd1b9461f3e77d4 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 15:07:53 +0200 Subject: ppc4xx: Remove obsolete initdram() function from VOM405 board This patch removed the obsolete initdram() function from VOM405 platform file. Some minor cleanup. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c index af8efcf..1b1479f 100644 --- a/board/esd/vom405/vom405.c +++ b/board/esd/vom405/vom405.c @@ -37,7 +37,6 @@ const unsigned char fpgadata[] = }; int filesize = sizeof(fpgadata); - int board_early_init_f (void) { /* @@ -76,9 +75,6 @@ int board_early_init_f (void) return 0; } - -/* ------------------------------------------------------------------------- */ - int misc_init_r (void) { /* adjust flash start and offset */ @@ -88,11 +84,9 @@ int misc_init_r (void) return (0); } - /* * Check Board Identity: */ - int checkboard (void) { char str[64]; @@ -127,25 +121,6 @@ int checkboard (void) return 0; } -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - void reset_phy(void) { #ifdef CONFIG_LXT971_NO_SLEEP -- cgit v0.10.2 From 1092ce218c514e5ccb18450ac5af501d96d6e3e9 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 15:07:54 +0200 Subject: ppc4xx: Update VOM405 board configuration - remove PCI code - add command line editing - minor cleanup Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index 43404fc..f235890 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -24,7 +24,6 @@ /* * board/config.h - configuration options, board specific */ - #ifndef __CONFIG_H #define __CONFIG_H @@ -32,7 +31,6 @@ * High Level Configuration Options * (easy to change) */ - #define CONFIG_405EP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ @@ -71,7 +69,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME - /* * Command line configuration. */ @@ -79,7 +76,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_BSP -#define CONFIG_CMD_PCI #define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF #define CONFIG_CMD_I2C @@ -138,44 +134,20 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CFG_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ -/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------- - */ -#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ -#define PCI_HOST_FORCE 1 /* configure as pci host */ -#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ - -#define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ -#undef CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ - -#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ - -#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ -#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ -#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ -#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */ -#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */ -#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */ -#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/*----------------------------------------------------------------------- +/* * FLASH organization */ #define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ @@ -199,12 +171,7 @@ #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#if 0 /* test-only */ -#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ -#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ -#endif - -/*----------------------------------------------------------------------- +/* * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 @@ -221,7 +188,7 @@ # undef CFG_RAMBOOT #endif -/*----------------------------------------------------------------------- +/* * Environment Variable setup */ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ @@ -232,7 +199,7 @@ #define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ #define CFG_NVRAM_SIZE 242 /* NVRAM size */ -/*----------------------------------------------------------------------- +/* * I2C EEPROM (CAT24WC16) for environment */ #define CONFIG_HARD_I2C /* I2c with hardware support */ @@ -249,10 +216,9 @@ #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ #define CFG_EEPROM_PAGE_WRITE_ENABLE -/*----------------------------------------------------------------------- +/* * External Bus Controller (EBC) Setup */ - #define CAN_BA 0xF0000000 /* CAN Base Address */ /* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */ @@ -263,7 +229,7 @@ #define CFG_EBC_PB2AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ #define CFG_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ -/*----------------------------------------------------------------------- +/* * FPGA stuff */ #define CFG_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ @@ -276,7 +242,7 @@ #define CFG_FPGA_INIT 0x00010000 /* unused (ppc input) */ #define CFG_FPGA_DONE 0x00008000 /* JTAG TDI->TDO pin (ppc input) */ -/*----------------------------------------------------------------------- +/* * Definitions for initial stack pointer and data area (in data cache) */ /* use on chip memory ( OCM ) for temperary stack until sdram is tested */ @@ -292,7 +258,7 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -/*----------------------------------------------------------------------- +/* * Definitions for GPIO setup (PPC405EP specific) * * GPIO0[0] - External Bus Controller BLAST output -- cgit v0.10.2 From 97b0734d65f8a0b03df0a335a2addc759da56107 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 2 Sep 2008 16:33:05 +0200 Subject: ppc4xx: Remove obsolete or unused functions from some esd boards This patch removes initdram() and testdram() from most esd 405 platforms. Some boards also have an empty dummy implementation of misc_init_f(). This is also removed. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c index 83657c8..e629fd9 100644 --- a/board/esd/apc405/apc405.c +++ b/board/esd/apc405/apc405.c @@ -423,16 +423,6 @@ int checkboard (void) return 0; } -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - #ifdef CONFIG_IDE_RESET void ide_set_reset(int on) { diff --git a/board/esd/ash405/ash405.c b/board/esd/ash405/ash405.c index 25360a6..c3710ab 100644 --- a/board/esd/ash405/ash405.c +++ b/board/esd/ash405/ash405.c @@ -82,15 +82,6 @@ int board_early_init_f (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); @@ -205,20 +196,6 @@ int checkboard (void) return 0; } -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - void reset_phy(void) { #ifdef CONFIG_LXT971_NO_SLEEP diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c index ba27c03..806c755 100644 --- a/board/esd/cms700/cms700.c +++ b/board/esd/cms700/cms700.c @@ -77,15 +77,6 @@ int board_early_init_f (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { /* adjust flash start and offset */ @@ -141,18 +132,6 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - #if defined(CFG_EEPROM_WREN) /* Input: I2C address of EEPROM device to enable. * -1: deliver current state diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index 54de0b8..8bc40d5 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -67,13 +67,6 @@ int board_early_init_f (void) return 0; } - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { unsigned long cntrl0Reg; @@ -115,20 +108,6 @@ int checkboard (void) return 0; } -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - #if defined(CFG_EEPROM_WREN) /* Input: I2C address of EEPROM device to enable. * -1: deliver current state diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index b856705..005871c 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -255,11 +255,6 @@ int cpci405_version(void) } } -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - int misc_init_r (void) { unsigned long cntrl0Reg; @@ -493,18 +488,6 @@ int checkboard (void) return 0; } -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - void reset_phy(void) { #ifdef CONFIG_LXT971_NO_SLEEP @@ -516,8 +499,6 @@ void reset_phy(void) #endif } -/* ------------------------------------------------------------------------- */ - #ifdef CONFIG_CPCI405_VER2 #ifdef CONFIG_IDE_RESET diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c index 204117e..b5d2543 100644 --- a/board/esd/cpciiser4/cpciiser4.c +++ b/board/esd/cpciiser4/cpciiser4.c @@ -183,22 +183,3 @@ int checkboard (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - return (16 * 1024 * 1024); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - -/* ------------------------------------------------------------------------- */ diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c index fb0c77e..def0354 100644 --- a/board/esd/dasa_sim/dasa_sim.c +++ b/board/esd/dasa_sim/dasa_sim.c @@ -202,23 +202,3 @@ int checkboard (void) return 0; } - - -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - return (16 * 1024 * 1024); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - -/* ------------------------------------------------------------------------- */ diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c index bb3baa4..eb001da 100644 --- a/board/esd/dp405/dp405.c +++ b/board/esd/dp405/dp405.c @@ -74,15 +74,6 @@ int board_early_init_f (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { /* adjust flash start and offset */ @@ -119,30 +110,3 @@ int checkboard (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c index 78ae4ba..8a87d55 100644 --- a/board/esd/du405/du405.c +++ b/board/esd/du405/du405.c @@ -198,18 +198,3 @@ int checkboard (void) return 0; } - - -phys_size_t initdram (int board_type) -{ - return (16 * 1024 * 1024); -} - - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c index 802491a..9fc41c8 100644 --- a/board/esd/hh405/hh405.c +++ b/board/esd/hh405/hh405.c @@ -643,23 +643,6 @@ int checkboard (void) return 0; } - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - - #ifdef CONFIG_IDE_RESET void ide_set_reset(int on) { diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c index 03b87c9..38a6f7a 100644 --- a/board/esd/hub405/hub405.c +++ b/board/esd/hub405/hub405.c @@ -101,13 +101,6 @@ int board_early_init_f (void) return 0; } - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); @@ -227,14 +220,3 @@ int checkboard (void) return 0; } - - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} diff --git a/board/esd/ocrtc/ocrtc.c b/board/esd/ocrtc/ocrtc.c index 7b0edd5..35bfa95 100644 --- a/board/esd/ocrtc/ocrtc.c +++ b/board/esd/ocrtc/ocrtc.c @@ -62,13 +62,6 @@ int board_early_init_f (void) return 0; } - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - /* * Check Board Identity: */ @@ -99,28 +92,3 @@ int checkboard (void) return (0); } - - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr (memcfga, mem_mb0cf); - val = mfdcr (memcfgd); - -#if 0 - printf ("\nmb0cf=%x\n", val); /* test-only */ - printf ("strap=%x\n", mfdcr (strap)); /* test-only */ -#endif - - return (4 * 1024 * 1024 << ((val & 0x000e0000) >> 17)); -} - - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 326d560..90a212b 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -156,24 +156,6 @@ int checkboard (void) } /* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - - -/* ------------------------------------------------------------------------- */ void reset_phy(void) { #ifdef CONFIG_LXT971_NO_SLEEP diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c index 5253422..115f8b4 100644 --- a/board/esd/voh405/voh405.c +++ b/board/esd/voh405/voh405.c @@ -104,13 +104,6 @@ int board_early_init_f (void) return 0; } - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); @@ -303,35 +296,6 @@ int checkboard (void) return 0; } -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - -/* ------------------------------------------------------------------------- */ - #ifdef CONFIG_IDE_RESET void ide_set_reset(int on) { diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c index 0590fc7..3a94fd8 100644 --- a/board/esd/wuh405/wuh405.c +++ b/board/esd/wuh405/wuh405.c @@ -80,15 +80,6 @@ int board_early_init_f (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - int misc_init_r (void) { volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); @@ -202,15 +193,3 @@ int checkboard (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -phys_size_t initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} -- cgit v0.10.2 From 7e410aa30fbcb1d19a26bbf1e84a9ca6102d534b Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 1 Sep 2008 08:35:37 +0200 Subject: ppc4xx: Remove reference to common/lists.o from some esd linker scripts This patch removes some direct references to common/lists.o from some esd linker scripts. This is necessary because the lists source was moved and is not in the "common" directory anymore. Signed-off-by: Stefan Roese diff --git a/board/esd/ar405/u-boot.lds b/board/esd/ar405/u-boot.lds index b072bbb..89cd067 100644 --- a/board/esd/ar405/u-boot.lds +++ b/board/esd/ar405/u-boot.lds @@ -79,7 +79,6 @@ SECTIONS common/cmd_mem.o (.text) common/cmd_nvedit.o (.text) common/console.o (.text) - common/lists.o (.text) common/main.o (.text) /* diff --git a/board/esd/canbt/u-boot.lds b/board/esd/canbt/u-boot.lds index e66db5d..71bac09 100644 --- a/board/esd/canbt/u-boot.lds +++ b/board/esd/canbt/u-boot.lds @@ -78,7 +78,6 @@ SECTIONS common/cmd_mem.o (.text) common/cmd_nvedit.o (.text) common/console.o (.text) - common/lists.o (.text) common/main.o (.text) net/net.o (.text) diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index 67d72f7..6126b16 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -78,7 +78,6 @@ SECTIONS common/cmd_mem.o (.text) common/cmd_nvedit.o (.text) common/console.o (.text) - common/lists.o (.text) common/main.o (.text) board/esd/dasa_sim/flash.o (.text) -- cgit v0.10.2 From 7deb3b3ecd0e81ef09bb68aa0ec2346f4ae0a405 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Wed, 3 Sep 2008 17:15:45 +0200 Subject: ppx4xx: Fix broken DASA_SIM board This patch adds initdram() to DASA_SIM boards that has been removed accidentally by a previous commit. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c index def0354..4cc3a2f 100644 --- a/board/esd/dasa_sim/dasa_sim.c +++ b/board/esd/dasa_sim/dasa_sim.c @@ -202,3 +202,8 @@ int checkboard (void) return 0; } + +phys_size_t initdram (int board_type) +{ + return (16 * 1024 * 1024); +} -- cgit v0.10.2 From 7007c5975ee900ad70983b0681d3251e221f8321 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 2 Sep 2008 02:58:32 +0200 Subject: doc/qemu_mips: add doc howto debug u-boot with gdb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD diff --git a/doc/README.qemu_mips b/doc/README.qemu_mips index c9ac3f3..472469f 100644 --- a/doc/README.qemu_mips +++ b/doc/README.qemu_mips @@ -1,7 +1,7 @@ Notes for the Qemu MIPS port -Example usage: +I) Example usage: # ln -s u-boot.bin mips_bios.bin start it: @@ -16,3 +16,65 @@ create image: # dd of=flash bs=1k conv=notrunc if=u-boot.bin start it: # qemu-system-mips -M mips -pflash flash -monitor null -nographic + +II) How to debug U-Boot + +In order to debug U-Boot you need to start qemu with gdb server support (-s) +and waiting the connection to start the CPU (-S) + +# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic + +in an other console you start gdb + +1) Debugging of U-Boot Before Relocation + +Before relocation, the addresses in the ELF file can be used without any problems +buy connecting to the gdb server localhost:1234 + +# mipsel-unknown-linux-gnu-gdb u-boot +GNU gdb 6.6 +Copyright (C) 2006 Free Software Foundation, Inc. +GDB is free software, covered by the GNU General Public License, and you are +welcome to change it and/or distribute copies of it under certain conditions. +Type "show copying" to see the conditions. +There is absolutely no warranty for GDB. Type "show warranty" for details. +This GDB was configured as "--host=i486-linux-gnu --target=mipsel-unknown-linux-gnu"... +(gdb) target remote localhost:1234 +Remote debugging using localhost:1234 +_start () at start.S:64 +64 RVECENT(reset,0) /* U-boot entry point */ +Current language: auto; currently asm +(gdb) b board.c:289 +Breakpoint 1 at 0xbfc00cc8: file board.c, line 289. +(gdb) c +Continuing. + +Breakpoint 1, board_init_f (bootflag=) at board.c:290 +290 relocate_code (addr_sp, id, addr); +Current language: auto; currently c +(gdb) p/x addr +$1 = 0x87fa0000 + +2) Debugging of U-Boot After Relocation + +For debugging U-Boot after relocation we need to know the address to which +U-Boot relocates itself to 0x87fa0000 by default. +And replace the symbol table to this offset. + +(gdb) symbol-file +Discard symbol table from `/private/u-boot-arm/u-boot'? (y or n) y +Error in re-setting breakpoint 1: +No symbol table is loaded. Use the "file" command. +No symbol file now. +(gdb) add-symbol-file u-boot 0x87fa0000 +add symbol table from file "u-boot" at + .text_addr = 0x87fa0000 +(y or n) y +Reading symbols from /private/u-boot-arm/u-boot...done. +Breakpoint 1 at 0x87fa0cc8: file board.c, line 289. +(gdb) c +Continuing. + +Program received signal SIGINT, Interrupt. +0xffffffff87fa0de4 in udelay (usec=) at time.c:78 +78 while ((tmo - read_c0_count()) < 0x7fffffff) -- cgit v0.10.2