From ea5877e31ed63ade948fd1293895ec23fe01472e Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 16 Aug 2007 11:01:21 -0500 Subject: Fix up some fdt issues on 8544DS It looks like we had a merge issue that duplicated a bit of code in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get the MAC address properly set in the device tree on boot for TSEC1 Signed-off-by: Kumar Gala diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 8ddbb01..80822be 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -540,12 +540,5 @@ ft_board_setup(void *blob, bd_t *bd) debug("PCI@b000 first_busno=%d last_busno=%d\n",p[0],p[1]); } #endif - ft_cpu_setup(blob, bd); - - p = ft_get_prop(blob, "/memory/reg", &len); - if (p != NULL) { - *p++ = cpu_to_be32(bd->bi_memstart); - *p = cpu_to_be32(bd->bi_memsize); - } } #endif diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 7863447..fcb92fa 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -472,6 +472,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:02:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD -- cgit v0.10.2 From d64ee908a1b525e5bb2b4cbeb5c449ad6a469666 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 16 Aug 2007 15:05:04 -0500 Subject: Update MPC8544 DS PCI memory map The PCIe bus that the ULI M1575 is connected to has no possible way of needing more than the fixed amount of IO & Memory space needed by the ULI. So make it use far less IO & memory space and have it use the shared LAW. This free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed by each bus. Signed-off-by: Kumar Gala diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S index ea7d54d..900c368 100644 --- a/board/freescale/mpc8544ds/init.S +++ b/board/freescale/mpc8544ds/init.S @@ -218,7 +218,7 @@ law_entry: .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M) .long (CFG_PCI1_IO_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M) + .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_64K) .long (CFG_LBC_CACHE_BASE>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M) @@ -226,18 +226,17 @@ law_entry: .long (CFG_PCIE1_MEM_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_256M) - /* To keep to 10 LAWs, PCIE1_IO_PHYS must use top of mem region */ + .long (CFG_PCIE1_IO_PHYS>>12) & 0xfffff + .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_64K) .long (CFG_PCIE2_MEM_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_512M) .long (CFG_PCIE2_IO_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_16M) + .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_64K) + /* contains both PCIE3 MEM & IO space */ .long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_256M) - - .long (CFG_PCIE3_IO_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_16M) + .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_2M) 4: entry_end diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index fcb92fa..746f360 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -282,7 +282,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */ #define CFG_PCI1_IO_BASE 0x00000000 #define CFG_PCI1_IO_PHYS 0xe1000000 -#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */ +#define CFG_PCI1_IO_SIZE 0x00010000 /* 64k */ /* PCI view of System Memory */ #define CFG_PCI_MEMORY_BUS 0x00000000 @@ -294,26 +294,23 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_PCIE2_MEM_PHYS CFG_PCIE2_MEM_BASE #define CFG_PCIE2_MEM_SIZE 0x20000000 /* 512M */ #define CFG_PCIE2_IO_BASE 0x00000000 -#define CFG_PCIE2_IO_PHYS 0xe2000000 -#define CFG_PCIE2_IO_SIZE 0x00100000 /* 1M */ +#define CFG_PCIE2_IO_PHYS 0xe1010000 +#define CFG_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 1, Slot 2,tgtid 2, Base address a000 */ #define CFG_PCIE1_MEM_BASE 0xa0000000 #define CFG_PCIE1_MEM_PHYS CFG_PCIE1_MEM_BASE -#define CFG_PCIE1_MEM_SIZE 0x08000000 /* 128M */ -#define CFG_PCIE1_MEM_BASE2 0xa8000000 -#define CFG_PCIE1_MEM_PHYS2 CFG_PCIE1_MEM_BASE2 -#define CFG_PCIE1_MEM_SIZE2 0x04000000 /* 64M */ -#define CFG_PCIE1_IO_BASE 0x00000000 /* reuse mem LAW */ -#define CFG_PCIE1_IO_PHYS 0xaf000000 -#define CFG_PCIE1_IO_SIZE 0x00100000 /* 1M */ +#define CFG_PCIE1_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_PCIE1_IO_BASE 0x00000000 +#define CFG_PCIE1_IO_PHYS 0xe1020000 +#define CFG_PCIE1_IO_SIZE 0x00010000 /* 64k */ /* controller 3, direct to uli, tgtid 3, Base address b000 */ #define CFG_PCIE3_MEM_BASE 0xb0000000 #define CFG_PCIE3_MEM_PHYS CFG_PCIE3_MEM_BASE -#define CFG_PCIE3_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_PCIE3_MEM_SIZE 0x00100000 /* 1M */ #define CFG_PCIE3_IO_BASE 0x00000000 -#define CFG_PCIE3_IO_PHYS 0xe3000000 +#define CFG_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */ #define CFG_PCIE3_IO_SIZE 0x00100000 /* 1M */ #if defined(CONFIG_PCI) -- cgit v0.10.2 From 10327dc5541f947c0cf7e31fef86c4706169607a Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Thu, 16 Aug 2007 16:35:02 -0500 Subject: Add CONFIG_HAS_ETH0 to all boards with TSEC The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether to update TSEC1's device-tree node, so we need to add it to all the boards with TSECs. Do this for 83xx and 86xx, too, since they will eventually do something similar. Signed-off-by: Andy Fleming diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index f92dce5..3775037 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -509,6 +509,7 @@ #define CONFIG_ETHADDR 00:E0:0C:00:95:01 #define CONFIG_HAS_ETH1 +#define CONFIG_HAS_ETH0 #define CONFIG_ETH1ADDR 00:E0:0C:00:95:02 #define CONFIG_IPADDR 10.0.0.2 diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 10af5f0..48616c0 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -701,6 +701,7 @@ #if defined(CONFIG_TSEC_ENET) #define CONFIG_ETHADDR 00:04:9f:ef:23:33 #define CONFIG_HAS_ETH1 +#define CONFIG_HAS_ETH0 #define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21 #endif diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 58ee13d..c5d0362 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -378,6 +378,7 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_TSEC1 #ifdef CONFIG_TSEC1 +#define CONFIG_HAS_ETH0 #define CONFIG_TSEC1_NAME "TSEC0" #define CFG_TSEC1_OFFSET 0x24000 #define TSEC1_PHY_ADDR 0x1c /* VSC8201 uses address 0x1c */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index b774992..22de2fb 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -492,6 +492,7 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 5c03ac8..e376c11 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -213,10 +213,13 @@ #define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 +#define CONFIG_HAS_ETH0 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC2 1 +#define CONFIG_HAS_ETH1 #define CONFIG_TSEC2_NAME "TSEC1" #define CONFIG_MPC85XX_FEC 1 +#define CONFIG_HAS_ETH2 #define CONFIG_MPC85XX_FEC_NAME "FEC" #define TSEC1_PHY_ADDR 7 #define TSEC2_PHY_ADDR 4 diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 33a153e..a4727b2 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -481,6 +481,7 @@ extern unsigned long get_clock_freq(void); /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 7345a3e..58a8ea5 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -542,6 +542,7 @@ extern unsigned long get_clock_freq(void); /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 48a2663..8d7d657 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -481,6 +481,7 @@ extern unsigned long get_clock_freq(void); /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index da41dad..b3c33d9 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -522,6 +522,7 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index e912331..03e815d 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -608,6 +608,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD #endif +#define CONFIG_HAS_ETH0 1 #define CONFIG_HAS_ETH1 1 #define CONFIG_HAS_ETH2 1 #define CONFIG_HAS_ETH3 1 diff --git a/include/configs/PM854.h b/include/configs/PM854.h index 93090b9..a6a1e73 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -282,6 +282,7 @@ /* Options are: TSEC[0-1] */ #define CONFIG_ETHPRIME "TSEC0" +#define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 1 #define CONFIG_HAS_ETH2 1 diff --git a/include/configs/PM856.h b/include/configs/PM856.h index 6105747..9a17e3d 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -392,6 +392,7 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:40:42:01:00:00 #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:40:42:01:00:01 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 91c1694..0147252 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -501,6 +501,7 @@ extern int tqm834x_num_flash_banks; */ #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR D2:DA:5E:44:BC:29 #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 1E:F3:40:21:92:53 diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index cb9bf54..a330c42 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -271,6 +271,7 @@ #define FEC_PHY_ADDR 3 #define FEC_PHYIDX 0 #define FEC_FLAGS 0 +#define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index aa515ea..37a8f87 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -662,6 +662,7 @@ #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_TSEC_ENET) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:a0:1e:a0:13:8d #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 760b754..3525ab4 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -546,6 +546,7 @@ #define CONFIG_ETH3ADDR 02:E0:0C:00:03:FD #endif +#define CONFIG_HAS_ETH0 1 #define CONFIG_HAS_ETH1 1 #define CONFIG_HAS_ETH2 1 #define CONFIG_HAS_ETH3 1 diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 43b185b..c5ae0cd 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -379,6 +379,7 @@ /*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:e0:0c:07:9b:8a #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:e0:0c:07:9b:8b diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 3dae27a..f32ff67 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -407,6 +407,7 @@ /*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) +#define CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:e0:0c:07:9b:8a #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:e0:0c:07:9b:8b -- cgit v0.10.2