From f0eda3cb89813c49d90fec7ee5fa69d3fe3d6daa Mon Sep 17 00:00:00 2001
From: Christophe Leroy <christophe.leroy@c-s.fr>
Date: Thu, 13 Jul 2017 15:09:50 +0200
Subject: power, timer: reset TBL before TBU

In order to avoid TBU increment due to TBL reaching its max
and wrapping, reset TBL before resetting TBU

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index ff9bb67..c43f254 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -66,7 +66,7 @@ int timer_init(void)
 	unsigned long temp;
 
 	/* reset */
-	asm volatile("li %0,0 ; mttbu %0 ; mttbl %0;"
+	asm volatile("li %0,0 ; mttbl %0 ; mttbu %0;"
 	     : "=&r"(temp) );
 
 	return (0);
-- 
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