From e3ef41df480f5c0da2d3d40ec2207e210bd34419 Mon Sep 17 00:00:00 2001 From: "eric.gao@rock-chips.com" Date: Mon, 19 Jun 2017 14:45:36 +0800 Subject: rockchip: pwm: fix the register layout for the PWM controller According to rk3288 spec, the pwm register order is: PWM_PWM0_CNT, PWM_PWM0_PERIOD_HPR, PWM_PWM0_DUTY_LPR, PWM_PWM0_CTRL but the source code's order is: struct rk3288_pwm { u32 cnt; u32 duty_lpr; u32 period_hpr; u32 ctrl; }; So, correct it here. It is the same as RK3399. Signed-off-by: Eric Gao Edited the commit message: Signed-off-by: Philipp Tomsich diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h index 5d9a178..08ff945 100644 --- a/arch/arm/include/asm/arch-rockchip/pwm.h +++ b/arch/arm/include/asm/arch-rockchip/pwm.h @@ -10,8 +10,8 @@ struct rk3288_pwm { u32 cnt; - u32 duty_lpr; u32 period_hpr; + u32 duty_lpr; u32 ctrl; }; check_member(rk3288_pwm, ctrl, 0xc); -- cgit v0.10.2