From 9055f66c2dfb637d0f30372a7e79cca854e45bae Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Mon, 26 Aug 2013 12:08:48 +0200
Subject: ppc4xx: Fix GPIO handling in lwmon5 and lcd4_lwmon5 BSP

LCD4 needs a slightly different GPIO configuration than the
original LWMON5 variant. GPIO49 needs to be configured to a
default output value of 0 (permanent voltage supply).

Additionally lcd4 also needs to enable the LSB transmitter.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index 4e4a594..e9aa0b7 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -527,6 +527,9 @@ void spl_board_init(void)
 	 */
 	board_early_init_f();
 
+	/* enable the LSB transmitter */
+	gpio_write_bit(CONFIG_SYS_GPIO_LSB_ENABLE, 1);
+
 	/*
 	 * Clear resets
 	 */
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 8f5eb95..96f3ba5 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -565,6 +565,7 @@
 #define CONFIG_SYS_GPIO_PHY1_RST	12
 #define CONFIG_SYS_GPIO_FLASH_WP	14
 #define CONFIG_SYS_GPIO_PHY0_RST	22
+#define CONFIG_SYS_GPIO_PERM_VOLT_FEED	49
 #define CONFIG_SYS_GPIO_DSPIC_READY	51
 #define CONFIG_SYS_GPIO_CAN_ENABLE	53
 #define CONFIG_SYS_GPIO_LSB_ENABLE	54
@@ -577,6 +578,13 @@
 #define CONFIG_SYS_GPIO_SYSMON_STATUS	62
 #define CONFIG_SYS_GPIO_WATCHDOG	63
 
+/* On LCD4, GPIO49 has to be configured to 0 instead of 1 */
+#ifdef CONFIG_LCD4_LWMON5
+#define GPIO49_VAL	0
+#else
+#define GPIO49_VAL	1
+#endif
+
 /*
  * PPC440 GPIO Configuration
  */
@@ -635,7 +643,7 @@
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 UIC_IRQ(7)	DMA_REQ(0)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO47 UIC_IRQ(8)	DMA_ACK(0)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO48 UIC_IRQ(9)	DMA_EOT/TC(0)	*/	\
-{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO49  Unselect via TraceSelect Bit	*/	\
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO49_VAL}, /* GPIO49  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN,  GPIO_SEL , GPIO_OUT_0}, /* GPIO50  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52  Unselect via TraceSelect Bit	*/	\
-- 
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