From 2179a07c0c7d1a87ccf13b3f3124c107de7dab91 Mon Sep 17 00:00:00 2001 From: Xu Ziyuan Date: Mon, 5 Sep 2016 09:39:58 +0800 Subject: rockchip: rk3288: sdram: fix DDR address range The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe000000~0xff000000. Actually, some IP controller can't address to, so let's limit the available range. This patch fixes a bug which found in miniarm-rk3288-4GB board. The U-Boot was relocated to 0xfef72000, and .bss variants was also relocated, such as do_fat_read_at_block. Once eMMC controller transfer data to do_fat_read_at_block via DMA, DMAC can't access more than 0xfe000000. So that DMAC didn't work sane. Signed-off-by: Ziyuan Xu Acked-by: Simon Glass Tested-by: Simon Glass diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c index cf9ef2e..8020e9c 100644 --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c @@ -755,10 +755,11 @@ size_t sdram_size_mb(struct rk3288_pmu *pmu) } /* - * we use the 0x00000000~0xfeffffff space since 0xff000000~0xffffffff - * is SoC register space (i.e. reserved) + * we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff + * is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is + * inaccessible for some IP controller. */ - size_mb = min(size_mb, 0xff000000 >> 20); + size_mb = min(size_mb, 0xfe000000 >> 20); return size_mb; } -- cgit v0.10.2 From 427351dc1d054b6d92814017f3ea6694474949b7 Mon Sep 17 00:00:00 2001 From: Sandy Patterson Date: Wed, 10 Aug 2016 10:21:47 -0400 Subject: rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabled Move back_to_bootrom() call later in SPL init so that the console is initialized and printouts happen. Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console output from the SPL init stages. I wasn't sure exactly where this should happen, so if we are set to do run spl_board_init, then go back to bootrom there after preloader_console_init(). Otherwise fall back to old behavior of doing it in board_init_f. Signed-off-by: Sandy Patterson Acked-by: Ziyuan Xu Acked-by: Simon Glass diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index ae509ff..0f40351 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -206,7 +206,7 @@ void board_init_f(ulong dummy) debug("DRAM init failed: %d\n", ret); return; } -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif } @@ -273,6 +273,9 @@ void spl_board_init(void) } preloader_console_init(); +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM + back_to_bootrom(); +#endif return; err: printf("spl_board_init: Error %d\n", ret); -- cgit v0.10.2 From 230e0e09dae00b94632282b570040e99d6642ca7 Mon Sep 17 00:00:00 2001 From: Sandy Patterson Date: Mon, 29 Aug 2016 07:31:16 -0400 Subject: Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled. Default SPL_MMC_SUPPORT to false when ROCKCHIP_SPL_BACK_TO_BROM is enabled. Acked-by: Ziyuan Xu Signed-off-by: Sandy Patterson Acked-by: Simon Glass diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1aac3c8..8a5d62a 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -42,6 +42,9 @@ config ROCKCHIP_SPL_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config SPL_MMC_SUPPORT + default y if !ROCKCHIP_SPL_BACK_TO_BROM + source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" -- cgit v0.10.2 From 70616df2bfbb4de675b93aa85e8aec744346fede Mon Sep 17 00:00:00 2001 From: Sandy Patterson Date: Mon, 29 Aug 2016 07:31:17 -0400 Subject: Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 board Rock2 has been tested with back to brom feature. The tricky part is that with this feature the default environment is inside u-boot, and it's defined for every rk3288 board independetly. So I just changed it for rock2 here if ROCKCHIP_SPL_BACK_TO_BROM. Solve by moving environment after u-boot before 1M boundary Signed-off-by: Sandy Patterson Acked-by: Simon Glass diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index fc9ff78..0361256 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +# CONFIG_SPL_MMC_SUPPORT is not set +CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/include/configs/rock2.h b/include/configs/rock2.h index ee924c3..99d6915 100644 --- a/include/configs/rock2.h +++ b/include/configs/rock2.h @@ -16,11 +16,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 -- cgit v0.10.2 From e73e5fcd8498b5db7bb604ef2223d636a54505ff Mon Sep 17 00:00:00 2001 From: "jacob2.chen" Date: Tue, 30 Aug 2016 01:26:14 +0800 Subject: rockchip: add usb mass storage feature support for rk3036 Enable ums feature for rk3036 boards, so that we can mount the mmc device to PC. Signed-off-by: jacob2.chen Acked-by: Simon Glass diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 4b26662..1b411c0 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -70,6 +70,10 @@ #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 +/* usb mass storage */ +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE + #define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_MANUFACTURER "Rockchip" #define CONFIG_G_DNL_VENDOR_NUM 0x2207 -- cgit v0.10.2 From 8389dcbf98b756d01b0b31679d3b83119382ac51 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:17 +0800 Subject: rockchip: rk3399: update PPLL and pmu_pclk frequency Update PPLL to 676MHz and PMU_PCLK to 48MHz, because: 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz can not, 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost than 99MHz, 3. PPLL 676 MHz and PMU_PCLK 48MHz are the clock rate we are using internally for kernel,it suppose not to change the bus clock like pmu_pclk in kernel, so we want to change it in uboot. Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h index c919f47..6776e48 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h @@ -64,9 +64,9 @@ check_member(rk3399_cru, sdio1_con[1], 0x594); #define APLL_HZ (600*MHz) #define GPLL_HZ (594*MHz) #define CPLL_HZ (384*MHz) -#define PPLL_HZ (594*MHz) +#define PPLL_HZ (676*MHz) -#define PMU_PCLK_HZ (99*MHz) +#define PMU_PCLK_HZ (48*MHz) #define ACLKM_CORE_HZ (300*MHz) #define ATCLK_CORE_HZ (300*MHz) -- cgit v0.10.2 From d840daf4c247aa2a9bfade9317a4d2724afe21b3 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:18 +0800 Subject: rockchip: rkpwm: fix the register sequence Reference to kernel source code, rockchip pwm has three type, we are using v2 for rk3288 and rk3399, so let's update the register to sync with pwm_data_v2 in kernel. Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h index 08ff945..5d9a178 100644 --- a/arch/arm/include/asm/arch-rockchip/pwm.h +++ b/arch/arm/include/asm/arch-rockchip/pwm.h @@ -10,8 +10,8 @@ struct rk3288_pwm { u32 cnt; - u32 period_hpr; u32 duty_lpr; + u32 period_hpr; u32 ctrl; }; check_member(rk3288_pwm, ctrl, 0xc); -- cgit v0.10.2 From 1a01695615f91f9f47d91ad4045b2b170bcb1b5e Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:19 +0800 Subject: power: regulator: add pwm regulator add driver support for pwm regulator. Signed-off-by: Elaine Zhang Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 17f22dd..c7e88c0 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -42,6 +42,16 @@ config DM_REGULATOR_PFUZE100 features for REGULATOR PFUZE100. The driver implements get/set api for: value, enable and mode. +config REGULATOR_PWM + bool "Enable driver for PWM regulators" + depends on DM_REGULATOR + ---help--- + Enable support for the PWM regulator functions which voltage are + controlled by PWM duty ratio. Some of Rockchip board using this kind + of regulator. The driver implements get/set api for the various BUCKS. + This driver is controlled by a device tree node + which includes voltage limits. + config DM_REGULATOR_MAX77686 bool "Enable Driver Model for REGULATOR MAX77686" depends on DM_REGULATOR && DM_PMIC_MAX77686 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 1590d85..ab461ec 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o +obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o obj-$(CONFIG_REGULATOR_RK808) += rk808.o obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c new file mode 100644 index 0000000..b0a4c5d --- /dev/null +++ b/drivers/power/regulator/pwm_regulator.c @@ -0,0 +1,159 @@ +/* + * Copyright (C) 2016 Rockchip Electronics Co., Ltd + * + * Based on kernel drivers/regulator/pwm-regulator.c + * Copyright (C) 2014 - STMicroelectronics Inc. + * Author: Lee Jones + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct pwm_regulator_info { + /* pwm id corresponding to the PWM driver */ + int pwm_id; + /* the period of one PWM cycle */ + int period_ns; + struct udevice *pwm; + /* initialize voltage of regulator */ + unsigned int init_voltage; + /* the maximum voltage of regulator */ + unsigned int max_voltage; + /* the minimum voltage of regulator */ + unsigned int min_voltage; + /* the current voltage of regulator */ + unsigned int volt_uV; +}; + +static int pwm_regulator_enable(struct udevice *dev, bool enable) +{ + struct pwm_regulator_info *priv = dev_get_priv(dev); + + return pwm_set_enable(priv->pwm, priv->pwm_id, enable); +} + +static int pwm_voltage_to_duty_cycle_percentage(struct udevice *dev, int req_uV) +{ + struct pwm_regulator_info *priv = dev_get_priv(dev); + int min_uV = priv->min_voltage; + int max_uV = priv->max_voltage; + int diff = max_uV - min_uV; + + return 100 - (((req_uV * 100) - (min_uV * 100)) / diff); +} + +static int pwm_regulator_get_voltage(struct udevice *dev) +{ + struct pwm_regulator_info *priv = dev_get_priv(dev); + + return priv->volt_uV; +} + +static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt) +{ + struct pwm_regulator_info *priv = dev_get_priv(dev); + int duty_cycle; + int ret = 0; + + duty_cycle = pwm_voltage_to_duty_cycle_percentage(dev, uvolt); + + ret = pwm_set_config(priv->pwm, priv->pwm_id, + (priv->period_ns / 100) * duty_cycle, priv->period_ns); + if (ret) { + dev_err(dev, "Failed to configure PWM\n"); + return ret; + } + + ret = pwm_set_enable(priv->pwm, priv->pwm_id, true); + if (ret) { + dev_err(dev, "Failed to enable PWM\n"); + return ret; + } + priv->volt_uV = uvolt; + return ret; +} + +static int pwm_regulator_ofdata_to_platdata(struct udevice *dev) +{ + struct pwm_regulator_info *priv = dev_get_priv(dev); + struct fdtdec_phandle_args args; + const void *blob = gd->fdt_blob; + int node = dev->of_offset; + int ret; + + ret = fdtdec_parse_phandle_with_args(blob, node, "pwms", "#pwm-cells", + 0, 0, &args); + if (ret) { + debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret); + return ret; + } + /* TODO: pwm_id here from device tree if needed */ + + priv->period_ns = args.args[1]; + + priv->init_voltage = fdtdec_get_int(blob, node, + "regulator-init-microvolt", -1); + if (priv->init_voltage < 0) { + printf("Cannot find regulator pwm init_voltage\n"); + return -EINVAL; + } + + ret = uclass_get_device_by_of_offset(UCLASS_PWM, args.node, &priv->pwm); + if (ret) { + debug("%s: Cannot get PWM: ret=%d\n", __func__, ret); + return ret; + } + + return 0; +} + +static int pwm_regulator_probe(struct udevice *dev) +{ + struct pwm_regulator_info *priv = dev_get_priv(dev); + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + + uc_pdata->type = REGULATOR_TYPE_BUCK; + uc_pdata->mode_count = 0; + priv->max_voltage = uc_pdata->max_uV; + priv->min_voltage = uc_pdata->min_uV; + + if (priv->init_voltage) + pwm_regulator_set_voltage(dev, priv->init_voltage); + + pwm_regulator_enable(dev, 1); + + return 0; +} + +static const struct dm_regulator_ops pwm_regulator_ops = { + .get_value = pwm_regulator_get_voltage, + .set_value = pwm_regulator_set_voltage, + .set_enable = pwm_regulator_enable, +}; + +static const struct udevice_id pwm_regulator_ids[] = { + { .compatible = "pwm-regulator" }, + { } +}; + +U_BOOT_DRIVER(pwm_regulator) = { + .name = "pwm_regulator", + .id = UCLASS_REGULATOR, + .ops = &pwm_regulator_ops, + .probe = pwm_regulator_probe, + .of_match = pwm_regulator_ids, + .ofdata_to_platdata = pwm_regulator_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct pwm_regulator_info), +}; -- cgit v0.10.2 From be3fcd0fe8218b699ed1d783221727a76d9b388b Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:20 +0800 Subject: rockchip: evb_rk3399: init vdd_center regulator Add vdd_center pwm regulator get_device to enable this regulator. Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index 2580b38..c6e6cd3 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -39,6 +40,11 @@ int board_init(void) goto out; } + /* rk3399 need init vdd_center to get correct output voltage */ + ret = regulator_get_by_platname("vdd_center", ®ulator); + if (ret) + debug("%s: Cannot get vdd_center regulator\n", __func__); + ret = regulator_get_by_platname("vcc5v0_host", ®ulator); if (ret) { debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); -- cgit v0.10.2 From 8d29e3a4c4a274e1c10c68ede19dc90dd28fca66 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:21 +0800 Subject: Kconfig: rockchip: enable DM_PWM and DM_REGULATOR Enable DM_PWM and DM_REGULATOR on rockchip SoCs. Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1e4830a..382a73f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -928,6 +928,8 @@ config ARCH_ROCKCHIP select DM_SPI select DM_SPI_FLASH select DM_USB if USB + select DM_PWM + select DM_REGULATOR config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" -- cgit v0.10.2 From c553de90bd6405fbf790d4d6f468e8bfc2a8c116 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:22 +0800 Subject: dts: evb-rk3399: add init voltage node for vdd-center Add a regulator-init-microvolt for vdd_center regulator so that we can get a init value for driver probe. Not like pmic regulator, the PWM regulator do not have a known default output value, so we would like to init the regulator when driver probe. Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index bd7801b..fa60e19 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -23,6 +23,7 @@ regulator-name = "vdd_center"; regulator-min-microvolt = <800000>; regulator-max-microvolt = <1400000>; + regulator-init-microvolt = <950000>; regulator-always-on; regulator-boot-on; status = "okay"; -- cgit v0.10.2 From f2358ece1de576ad466b4306bb439f565a0a53e4 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 23 Sep 2016 15:57:23 +0800 Subject: config: evb-rk3399: enable pwm regulator Enable the pwm regulator for evb-rk3399. Signed-off-by: Kever Yang Acked-by: Simon Glass diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 25e8939..97f2966 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -23,6 +23,7 @@ CONFIG_ROCKCHIP_SDHCI=y CONFIG_ROCKCHIP_GPIO=y CONFIG_PINCTRL=y CONFIG_ROCKCHIP_RK3399_PINCTRL=y +CONFIG_REGULATOR_PWM=y CONFIG_RAM=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 -- cgit v0.10.2 From c12777a625544a6ac19c4496d255ff6010f3a8a8 Mon Sep 17 00:00:00 2001 From: Xu Ziyuan Date: Fri, 9 Sep 2016 21:44:50 +0800 Subject: rockchip: miniarm: remove eMMC support The latest rk3288-miniarm board doesn't have eMMC device, so remove it. Signed-off-by: Ziyuan Xu Acked-by: Simon Glass diff --git a/arch/arm/dts/rk3288-miniarm.dtsi b/arch/arm/dts/rk3288-miniarm.dtsi index b889875..ceb4e2b 100644 --- a/arch/arm/dts/rk3288-miniarm.dtsi +++ b/arch/arm/dts/rk3288-miniarm.dtsi @@ -116,18 +116,6 @@ cpu0-supply = <&vdd_cpu>; }; -&emmc { - broken-cd; - bus-width = <8>; - cap-mmc-highspeed; - disable-wp; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; - status = "okay"; -}; - &sdmmc { bus-width = <4>; cap-mmc-highspeed; diff --git a/board/rockchip/miniarm_rk3288/miniarm-rk3288.c b/board/rockchip/miniarm_rk3288/miniarm-rk3288.c index aad74ef..79541a3 100644 --- a/board/rockchip/miniarm_rk3288/miniarm-rk3288.c +++ b/board/rockchip/miniarm_rk3288/miniarm-rk3288.c @@ -5,11 +5,3 @@ */ #include -#include - -void board_boot_order(u32 *spl_boot_list) -{ - /* eMMC prior to sdcard */ - spl_boot_list[0] = BOOT_DEVICE_MMC2; - spl_boot_list[1] = BOOT_DEVICE_MMC1; -} diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h index 390c243..aa259db 100644 --- a/include/configs/miniarm_rk3288.h +++ b/include/configs/miniarm_rk3288.h @@ -10,8 +10,13 @@ #define ROCKCHIP_DEVICE_SETTINGS #include +#undef BOOT_TARGET_DEVICES + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K -- cgit v0.10.2 From 73a85989713cce45a6999ea4305a5d09f0db25dd Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Mon, 19 Sep 2016 18:46:25 +0800 Subject: rockchip: move partitons define from 3036-kylin to 3036-common To keep it same with 3288. Signed-off-by: Jacob Chen Acked-by: Simon Glass diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index e8ca76d..39fb239 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -23,30 +23,6 @@ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -/* Enable gpt partition table */ -#define CONFIG_CMD_GPT -#define CONFIG_RANDOM_UUID -#define PARTS_DEFAULT \ - "uuid_disk=${uuid_gpt_disk};" \ - "name=loader,start=32K,size=4000K,uuid=${uuid_gpt_loader};" \ - "name=reserved,size=64K,uuid=${uuid_gpt_reserved};" \ - "name=misc,size=4M,uuid=${uuid_gpt_misc};" \ - "name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \ - "name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \ - "name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \ - "name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \ - "name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \ - "name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \ - "name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \ - "name=cache,size=100M,uuid=${uuid_gpt_cache};" \ - "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \ - "name=persist,size=4M,uuid=${uuid_gpt_persist};" \ - "name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \ - -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "partitions=" PARTS_DEFAULT \ - #endif #define CONFIG_BOARD_LATE_INIT diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 1b411c0..6ddf0d9 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -79,6 +79,9 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x2207 #define CONFIG_G_DNL_PRODUCT_NUM 0x310a +/* Enable gpt partition table */ +#define CONFIG_CMD_GPT + #include #define ENV_MEM_LAYOUT_SETTINGS \ @@ -88,6 +91,12 @@ "kernel_addr_r=0x62000000\0" \ "ramdisk_addr_r=0x64000000\0" +#define CONFIG_RANDOM_UUID +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \ + "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ + /* First try to boot from SD (index 0), then eMMC (index 1 */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ @@ -99,6 +108,7 @@ * so limit the fdt reallocation to that */ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x7fffffff\0" \ + "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV #endif -- cgit v0.10.2 From cd77fd1b434ef1aa0e3eb1832136a7aad882cde2 Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Mon, 19 Sep 2016 18:46:26 +0800 Subject: rockchip: rename board.c to rk3288-board.c Signed-off-by: Jacob Chen Acked-by: Simon Glass diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 157d42f..e31b8de 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o obj-$(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) += save_boot_param.o else -obj-$(CONFIG_ROCKCHIP_RK3288) += board.o +obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o endif ifndef CONFIG_ARM64 obj-y += rk_timer.o diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c deleted file mode 100644 index 6c36bf9..0000000 --- a/arch/arm/mach-rockchip/board.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * (C) Copyright 2015 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM - struct udevice *pinctrl; - int ret; - - /* - * We need to implement sdcard iomux here for the further - * initlization, otherwise, it'll hit sdcard command sending - * timeout exception. - */ - ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); - if (ret) { - debug("%s: Cannot find pinctrl device\n", __func__); - goto err; - } - ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD); - if (ret) { - debug("%s: Failed to set up SD card\n", __func__); - goto err; - } - - return 0; -err: - printf("board_init: Error %d\n", ret); - - /* No way to report error here */ - hang(); - - return -1; -#else - return 0; -#endif -} - -int dram_init(void) -{ - struct ram_info ram; - struct udevice *dev; - int ret; - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - debug("DRAM init failed: %d\n", ret); - return ret; - } - ret = ram_get_info(dev, &ram); - if (ret) { - debug("Cannot get DRAM size: %d\n", ret); - return ret; - } - debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size); - gd->ram_size = ram.size; - - return 0; -} - -#ifndef CONFIG_SYS_DCACHE_OFF -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data rk3288_otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node, phy_node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - u32 grf_phy_offset; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-usb"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3288-usb"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - node = fdtdec_lookup_phandle(blob, node, "phys"); - if (node <= 0) { - debug("Not found usb phy device\n"); - return -ENODEV; - } - - phy_node = fdt_parent_offset(blob, node); - if (phy_node <= 0) { - debug("Not found usb phy device\n"); - return -ENODEV; - } - - rk3288_otg_data.phy_of_node = phy_node; - grf_phy_offset = fdtdec_get_addr(blob, node, "reg"); - - /* find the grf node */ - node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-grf"); - if (node <= 0) { - debug("Not found grf device\n"); - return -ENODEV; - } - rk3288_otg_data.regs_phy = grf_phy_offset + - fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&rk3288_otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif - -static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) -{ - static const struct { - char *name; - int id; - } clks[] = { - { "osc", CLK_OSC }, - { "apll", CLK_ARM }, - { "dpll", CLK_DDR }, - { "cpll", CLK_CODEC }, - { "gpll", CLK_GENERAL }, -#ifdef CONFIG_ROCKCHIP_RK3036 - { "mpll", CLK_NEW }, -#else - { "npll", CLK_NEW }, -#endif - }; - int ret, i; - struct udevice *dev; - - ret = rockchip_get_clk(&dev); - if (ret) { - printf("clk-uclass not found\n"); - return 0; - } - - for (i = 0; i < ARRAY_SIZE(clks); i++) { - struct clk clk; - ulong rate; - - clk.id = clks[i].id; - ret = clk_request(dev, &clk); - if (ret < 0) - continue; - - rate = clk_get_rate(&clk); - printf("%s: %lu\n", clks[i].name, rate); - - clk_free(&clk); - } - - return 0; -} - -U_BOOT_CMD( - clock, 2, 1, do_clock, - "display information about clocks", - "" -); diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c new file mode 100644 index 0000000..6c36bf9 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -0,0 +1,205 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM + struct udevice *pinctrl; + int ret; + + /* + * We need to implement sdcard iomux here for the further + * initlization, otherwise, it'll hit sdcard command sending + * timeout exception. + */ + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); + if (ret) { + debug("%s: Cannot find pinctrl device\n", __func__); + goto err; + } + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD); + if (ret) { + debug("%s: Failed to set up SD card\n", __func__); + goto err; + } + + return 0; +err: + printf("board_init: Error %d\n", ret); + + /* No way to report error here */ + hang(); + + return -1; +#else + return 0; +#endif +} + +int dram_init(void) +{ + struct ram_info ram; + struct udevice *dev; + int ret; + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + return ret; + } + ret = ram_get_info(dev, &ram); + if (ret) { + debug("Cannot get DRAM size: %d\n", ret); + return ret; + } + debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size); + gd->ram_size = ram.size; + + return 0; +} + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif + +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include +#include + +static struct dwc2_plat_otg_data rk3288_otg_data = { + .rx_fifo_sz = 512, + .np_tx_fifo_sz = 16, + .tx_fifo_sz = 128, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + int node, phy_node; + const char *mode; + bool matched = false; + const void *blob = gd->fdt_blob; + u32 grf_phy_offset; + + /* find the usb_otg node */ + node = fdt_node_offset_by_compatible(blob, -1, + "rockchip,rk3288-usb"); + + while (node > 0) { + mode = fdt_getprop(blob, node, "dr_mode", NULL); + if (mode && strcmp(mode, "otg") == 0) { + matched = true; + break; + } + + node = fdt_node_offset_by_compatible(blob, node, + "rockchip,rk3288-usb"); + } + if (!matched) { + debug("Not found usb_otg device\n"); + return -ENODEV; + } + rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + + node = fdtdec_lookup_phandle(blob, node, "phys"); + if (node <= 0) { + debug("Not found usb phy device\n"); + return -ENODEV; + } + + phy_node = fdt_parent_offset(blob, node); + if (phy_node <= 0) { + debug("Not found usb phy device\n"); + return -ENODEV; + } + + rk3288_otg_data.phy_of_node = phy_node; + grf_phy_offset = fdtdec_get_addr(blob, node, "reg"); + + /* find the grf node */ + node = fdt_node_offset_by_compatible(blob, -1, + "rockchip,rk3288-grf"); + if (node <= 0) { + debug("Not found grf device\n"); + return -ENODEV; + } + rk3288_otg_data.regs_phy = grf_phy_offset + + fdtdec_get_addr(blob, node, "reg"); + + return dwc2_udc_probe(&rk3288_otg_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} +#endif + +static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + static const struct { + char *name; + int id; + } clks[] = { + { "osc", CLK_OSC }, + { "apll", CLK_ARM }, + { "dpll", CLK_DDR }, + { "cpll", CLK_CODEC }, + { "gpll", CLK_GENERAL }, +#ifdef CONFIG_ROCKCHIP_RK3036 + { "mpll", CLK_NEW }, +#else + { "npll", CLK_NEW }, +#endif + }; + int ret, i; + struct udevice *dev; + + ret = rockchip_get_clk(&dev); + if (ret) { + printf("clk-uclass not found\n"); + return 0; + } + + for (i = 0; i < ARRAY_SIZE(clks); i++) { + struct clk clk; + ulong rate; + + clk.id = clks[i].id; + ret = clk_request(dev, &clk); + if (ret < 0) + continue; + + rate = clk_get_rate(&clk); + printf("%s: %lu\n", clks[i].name, rate); + + clk_free(&clk); + } + + return 0; +} + +U_BOOT_CMD( + clock, 2, 1, do_clock, + "display information about clocks", + "" +); -- cgit v0.10.2 From f48f2b729bf891aa6c1f752d5f8e06e44dd8b0b4 Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Mon, 19 Sep 2016 18:46:27 +0800 Subject: rockchip: move common function from board-file to rk3036-board.c To keep it same with 3288 Signed-off-by: Jacob Chen Acked-by: Simon Glass diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index e31b8de..6e79fed 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o obj-$(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) += save_boot_param.o else obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o +obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o endif ifndef CONFIG_ARM64 obj-y += rk_timer.o diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c new file mode 100644 index 0000000..b63f9c0 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = sdram_size(); + + return 0; +} + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif + +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include +#include + +static struct dwc2_plat_otg_data rk3036_otg_data = { + .rx_fifo_sz = 512, + .np_tx_fifo_sz = 16, + .tx_fifo_sz = 128, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + int node; + const char *mode; + bool matched = false; + const void *blob = gd->fdt_blob; + + /* find the usb_otg node */ + node = fdt_node_offset_by_compatible(blob, -1, + "rockchip,rk3288-usb"); + + while (node > 0) { + mode = fdt_getprop(blob, node, "dr_mode", NULL); + if (mode && strcmp(mode, "otg") == 0) { + matched = true; + break; + } + + node = fdt_node_offset_by_compatible(blob, node, + "rockchip,rk3288-usb"); + } + if (!matched) { + debug("Not found usb_otg device\n"); + return -ENODEV; + } + rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + + return dwc2_udc_probe(&rk3036_otg_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} +#endif diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c b/board/rockchip/evb_rk3036/evb_rk3036.c index e5582b4..288370a 100644 --- a/board/rockchip/evb_rk3036/evb_rk3036.c +++ b/board/rockchip/evb_rk3036/evb_rk3036.c @@ -27,69 +27,3 @@ void get_ddr_config(struct rk3036_ddr_config *config) /* 16bit bw */ config->bw = 1; } - -int board_init(void) -{ - return 0; -} - -int dram_init(void) -{ - gd->ram_size = sdram_size(); - - return 0; -} - -#ifndef CONFIG_SYS_DCACHE_OFF -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data rk3036_otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-usb"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3288-usb"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&rk3036_otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c index 5ade695..848f23d 100644 --- a/board/rockchip/kylin_rk3036/kylin_rk3036.c +++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c @@ -59,69 +59,3 @@ int board_late_init(void) return 0; } - -int board_init(void) -{ - return 0; -} - -int dram_init(void) -{ - gd->ram_size = sdram_size(); - - return 0; -} - -#ifndef CONFIG_SYS_DCACHE_OFF -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data rk3036_otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-usb"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3288-usb"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&rk3036_otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif -- cgit v0.10.2 From 67171e13a3e0665b18c657a6704a22ca7900f4c3 Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Mon, 19 Sep 2016 18:46:28 +0800 Subject: rockchip: add boot-mode support for rk3288, rk3036 rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by: Jacob Chen Acked-by: Simon Glass diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h new file mode 100644 index 0000000..bd65f60 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h @@ -0,0 +1,19 @@ +#ifndef __REBOOT_MODE_H +#define __REBOOT_MODE_H + +/* high 24 bits is tag, low 8 bits is type */ +#define REBOOT_FLAG 0x5242C300 +/* normal boot */ +#define BOOT_NORMAL (REBOOT_FLAG + 0) +/* enter loader rockusb mode */ +#define BOOT_LOADER (REBOOT_FLAG + 1) +/* enter recovery */ +#define BOOT_RECOVERY (REBOOT_FLAG + 3) +/* enter fastboot mode */ +#define BOOT_FASTBOOT (REBOOT_FLAG + 9) +/* enter charging mode */ +#define BOOT_CHARGING (REBOOT_FLAG + 11) +/* enter usb mass storage mode */ +#define BOOT_UMS (REBOOT_FLAG + 12) + +#endif diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c index b63f9c0..bf2b268 100644 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -11,11 +11,50 @@ #include #include #include +#include +#include +#include #include #include DECLARE_GLOBAL_DATA_PTR; +#define GRF_BASE 0x20008000 + +static void setup_boot_mode(void) +{ + struct rk3036_grf *const grf = (void *)GRF_BASE; + int boot_mode = readl(&grf->os_reg[4]); + + debug("boot mode %x.\n", boot_mode); + + /* Clear boot mode */ + writel(BOOT_NORMAL, &grf->os_reg[4]); + + switch (boot_mode) { + case BOOT_FASTBOOT: + printf("enter fastboot!\n"); + setenv("preboot", "setenv preboot; fastboot usb0"); + break; + case BOOT_UMS: + printf("enter UMS!\n"); + setenv("preboot", "setenv preboot; ums mmc 0"); + break; + } +} + +__weak int rk_board_late_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + setup_boot_mode(); + + return rk_board_late_init(); +} + int board_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 6c36bf9..baf9522 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -8,25 +8,65 @@ #include #include #include +#include #include #include #include +#include +#include #include #include DECLARE_GLOBAL_DATA_PTR; +#define PMU_BASE 0xff730000 + +static void setup_boot_mode(void) +{ + struct rk3288_pmu *const pmu = (void *)PMU_BASE; + int boot_mode = readl(&pmu->sys_reg[0]); + + debug("boot mode %x.\n", boot_mode); + + /* Clear boot mode */ + writel(BOOT_NORMAL, &pmu->sys_reg[0]); + + switch (boot_mode) { + case BOOT_FASTBOOT: + printf("enter fastboot!\n"); + setenv("preboot", "setenv preboot; fastboot usb0"); + break; + case BOOT_UMS: + printf("enter UMS!\n"); + setenv("preboot", "setenv preboot; if mmc dev 0;" + "then ums mmc 0; else ums mmc 1;fi"); + break; + } +} + +__weak int rk_board_late_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + setup_boot_mode(); + + return rk_board_late_init(); +} + int board_init(void) { #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM struct udevice *pinctrl; int ret; - /* - * We need to implement sdcard iomux here for the further - * initlization, otherwise, it'll hit sdcard command sending - * timeout exception. - */ + /* + * We need to implement sdcard iomux here for the further + * initlization, otherwise, it'll hit sdcard command sending + * timeout exception. + */ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); if (ret) { debug("%s: Cannot find pinctrl device\n", __func__); diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c index 848f23d..7e2edf4 100644 --- a/board/rockchip/kylin_rk3036/kylin_rk3036.c +++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c @@ -8,14 +8,11 @@ #include #include #include -#include #include #include DECLARE_GLOBAL_DATA_PTR; -#define GRF_BASE 0x20008000 - void get_ddr_config(struct rk3036_ddr_config *config) { /* K4B4G1646Q config */ @@ -43,16 +40,9 @@ int fastboot_key_pressed(void) #define ROCKCHIP_BOOT_MODE_FASTBOOT 0x5242C309 -int board_late_init(void) +int rk_board_late_init(void) { - struct rk3036_grf * const grf = (void *)GRF_BASE; - int boot_mode = readl(&grf->os_reg[4]); - - /* Clear boot mode */ - writel(0, &grf->os_reg[4]); - - if (boot_mode == ROCKCHIP_BOOT_MODE_FASTBOOT || - fastboot_key_pressed()) { + if (fastboot_key_pressed()) { printf("enter fastboot!\n"); setenv("preboot", "setenv preboot; fastboot usb0"); } diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index 39fb239..4f0bd84 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -25,7 +25,4 @@ #endif -#define CONFIG_BOARD_LATE_INIT -#define CONFIG_PREBOOT - #endif diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 6ddf0d9..73830e4 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -113,4 +113,7 @@ BOOTENV #endif +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_PREBOOT + #endif diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index e8bf987..9ddfe1d 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -132,4 +132,7 @@ BOOTENV #endif +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_PREBOOT + #endif -- cgit v0.10.2