From 2ddaf13bd28d9d9450831e84e30d617d2f49f1bd Mon Sep 17 00:00:00 2001
From: Sonic Zhang <sonic.zhang@analog.com>
Date: Thu, 29 Jan 2015 13:37:31 +0800
Subject: net: configure DWMAC DMA by default AXI burst length

Board can define its own AXI burst length to improve DWMAC DMA performance.

v2-changes:
- Avoid write burst len register when the Macro is not defined.

v3-changes:
- Add axi_bus register member to struct eth_dma_regs.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index c03e935..7469e59 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -258,6 +258,10 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 
 	writel(readl(&dma_p->opmode) | RXSTART | TXSTART, &dma_p->opmode);
 
+#ifdef CONFIG_DW_AXI_BURST_LEN
+	writel((CONFIG_DW_AXI_BURST_LEN & 0x1FF >> 1), &dma_p->axibus);
+#endif
+
 	/* Start up the PHY */
 	if (phy_startup(priv->phydev)) {
 		printf("Could not initialize PHY %s\n",
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index ce51102..49d900c 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -68,7 +68,9 @@ struct eth_dma_regs {
 	u32 status;		/* 0x14 */
 	u32 opmode;		/* 0x18 */
 	u32 intenable;		/* 0x1c */
-	u8 reserved[40];
+	u32 reserved1[2];
+	u32 axibus;		/* 0x28 */
+	u32 reserved2[7];
 	u32 currhosttxdesc;	/* 0x48 */
 	u32 currhostrxdesc;	/* 0x4c */
 	u32 currhosttxbuffaddr;	/* 0x50 */
-- 
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