From 2e82e745a4cf6bad10d9fe5a53db6592f40ff903 Mon Sep 17 00:00:00 2001
From: Miao Yan <yanmiaobest@gmail.com>
Date: Sun, 22 May 2016 19:37:15 -0700
Subject: x86: qemu: move x86 specific operations out of qfw core

The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.

This patch adds callback functions and moves those to arch/x86/

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 32a4351..6ff9947 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -15,6 +15,43 @@
 
 static bool i440fx;
 
+#ifdef CONFIG_QFW
+
+#define FW_CONTROL_PORT	0x510
+#define FW_DATA_PORT		0x511
+#define FW_DMA_PORT_LOW	0x514
+#define FW_DMA_PORT_HIGH	0x518
+
+static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
+		uint32_t size, void *address)
+{
+	uint32_t i = 0;
+	uint8_t *data = address;
+
+	/*
+	 * writting FW_CFG_INVALID will cause read operation to resume at
+	 * last offset, otherwise read will start at offset 0
+	 */
+	if (entry != FW_CFG_INVALID)
+		outw(entry, FW_CONTROL_PORT);
+	while (size--)
+		data[i++] = inb(FW_DATA_PORT);
+}
+
+static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
+{
+	outl(cpu_to_be32((uint32_t)dma), FW_DMA_PORT_HIGH);
+
+	while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
+		__asm__ __volatile__ ("pause");
+}
+
+static struct fw_cfg_arch_ops fwcfg_x86_ops = {
+	.arch_read_pio = qemu_x86_fwcfg_read_entry_pio,
+	.arch_read_dma = qemu_x86_fwcfg_read_entry_dma
+};
+#endif
+
 static void enable_pm_piix(void)
 {
 	u8 en;
@@ -89,7 +126,7 @@ static void qemu_chipset_init(void)
 	}
 
 #ifdef CONFIG_QFW
-	qemu_fwcfg_init();
+	qemu_fwcfg_init(&fwcfg_x86_ops);
 #endif
 }
 
diff --git a/drivers/misc/qemu_fw_cfg.c b/drivers/misc/qemu_fw_cfg.c
index a574bd1..0f72549 100644
--- a/drivers/misc/qemu_fw_cfg.c
+++ b/drivers/misc/qemu_fw_cfg.c
@@ -14,6 +14,7 @@
 
 static bool fwcfg_present;
 static bool fwcfg_dma_present;
+static struct fw_cfg_arch_ops *fwcfg_arch_ops;
 
 static LIST_HEAD(fw_list);
 
@@ -21,17 +22,10 @@ static LIST_HEAD(fw_list);
 static void qemu_fwcfg_read_entry_pio(uint16_t entry,
 		uint32_t size, void *address)
 {
-	uint32_t i = 0;
-	uint8_t *data = address;
+	debug("qemu_fwcfg_read_entry_pio: entry 0x%x, size %u address %p\n",
+	      entry, size, address);
 
-	/*
-	 * writting FW_CFG_INVALID will cause read operation to resume at
-	 * last offset, otherwise read will start at offset 0
-	 */
-	if (entry != FW_CFG_INVALID)
-		outw(entry, FW_CONTROL_PORT);
-	while (size--)
-		data[i++] = inb(FW_DATA_PORT);
+	return fwcfg_arch_ops->arch_read_pio(entry, size, address);
 }
 
 /* Read configuration item using fw_cfg DMA interface */
@@ -53,13 +47,10 @@ static void qemu_fwcfg_read_entry_dma(uint16_t entry,
 
 	barrier();
 
-	debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n",
-	      address, size, be32_to_cpu(dma.control));
-
-	outl(cpu_to_be32((uint32_t)&dma), FW_DMA_PORT_HIGH);
+	debug("qemu_fwcfg_read_entry_dma: entry 0x%x, size %u address %p, control 0x%x\n",
+	      entry, size, address, be32_to_cpu(dma.control));
 
-	while (be32_to_cpu(dma.control) & ~FW_CFG_DMA_ERROR)
-		__asm__ __volatile__ ("pause");
+	fwcfg_arch_ops->arch_read_dma(&dma);
 }
 
 bool qemu_fwcfg_present(void)
@@ -164,13 +155,18 @@ bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter)
 	return iter->entry == &fw_list;
 }
 
-void qemu_fwcfg_init(void)
+void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops)
 {
 	uint32_t qemu;
 	uint32_t dma_enabled;
 
 	fwcfg_present = false;
 	fwcfg_dma_present = false;
+	fwcfg_arch_ops = NULL;
+
+	if (!ops || !ops->arch_read_pio || !ops->arch_read_dma)
+		return;
+	fwcfg_arch_ops = ops;
 
 	qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, &qemu);
 	if (be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE)
diff --git a/include/qemu_fw_cfg.h b/include/qemu_fw_cfg.h
index f718e09..b0b3b59 100644
--- a/include/qemu_fw_cfg.h
+++ b/include/qemu_fw_cfg.h
@@ -7,11 +7,6 @@
 #ifndef __FW_CFG__
 #define __FW_CFG__
 
-#define FW_CONTROL_PORT	0x510
-#define FW_DATA_PORT		0x511
-#define FW_DMA_PORT_LOW	0x514
-#define FW_DMA_PORT_HIGH	0x518
-
 #include <linux/list.h>
 
 enum qemu_fwcfg_items {
@@ -97,6 +92,12 @@ struct fw_cfg_dma_access {
 	__be64 address;
 };
 
+struct fw_cfg_arch_ops {
+	void (*arch_read_pio)(uint16_t selector, uint32_t size,
+			void *address);
+	void (*arch_read_dma)(struct fw_cfg_dma_access *dma);
+};
+
 struct bios_linker_entry {
 	__le32 command;
 	union {
@@ -148,8 +149,10 @@ struct bios_linker_entry {
 
 /**
  * Initialize QEMU fw_cfg interface
+ *
+ * @ops: arch specific read operations
  */
-void qemu_fwcfg_init(void);
+void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops);
 
 void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address);
 int qemu_fwcfg_read_firmware_list(void);
-- 
cgit v0.10.2