From 1541d7a63d46309651bb6cb8abee018c04b7dfa2 Mon Sep 17 00:00:00 2001 From: Vanessa Maegima Date: Mon, 8 May 2017 13:17:28 -0300 Subject: pico-imx7d: Add initial support Add the initial support for pico-imx7d board based on Wig Cheng's source code. Add support for eMMC, USB gadget, I2C, PMIC and Ethernet. For more information about this board, please visit: http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc Signed-off-by: Vanessa Maegima Reviewed-by: Fabio Estevam diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig index 80c1290..aea8526 100644 --- a/arch/arm/cpu/armv7/mx7/Kconfig +++ b/arch/arm/cpu/armv7/mx7/Kconfig @@ -25,6 +25,13 @@ config TARGET_MX7DSABRESD select DM select DM_THERMAL +config TARGET_PICO_IMX7D + bool "pico-imx7d" + select BOARD_LATE_INIT + select MX7D + select DM + select DM_THERMAL + config TARGET_WARP7 bool "warp7" select BOARD_LATE_INIT @@ -45,6 +52,7 @@ config SYS_SOC default "mx7" source "board/freescale/mx7dsabresd/Kconfig" +source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/board/technexion/pico-imx7d/Kconfig b/board/technexion/pico-imx7d/Kconfig new file mode 100644 index 0000000..f4ae18c --- /dev/null +++ b/board/technexion/pico-imx7d/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PICO_IMX7D + +config SYS_BOARD + default "pico-imx7d" + +config SYS_VENDOR + default "technexion" + +config SYS_SOC + default "mx7" + +config SYS_CONFIG_NAME + default "pico-imx7d" + +endif diff --git a/board/technexion/pico-imx7d/MAINTAINERS b/board/technexion/pico-imx7d/MAINTAINERS new file mode 100644 index 0000000..276162a --- /dev/null +++ b/board/technexion/pico-imx7d/MAINTAINERS @@ -0,0 +1,7 @@ +Technexion PICO-IMX7D board +M: Wig Cheng +M: Vanessa Maegima +S: Maintained +F: board/technexion/pico-imx7d/ +F: include/configs/pico-imx7d.h +F: configs/pico-imx7d_defconfig diff --git a/board/technexion/pico-imx7d/Makefile b/board/technexion/pico-imx7d/Makefile new file mode 100644 index 0000000..42cca47 --- /dev/null +++ b/board/technexion/pico-imx7d/Makefile @@ -0,0 +1,6 @@ +# (C) Copyright 2017 NXP Semiconductors +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := pico-imx7d.o diff --git a/board/technexion/pico-imx7d/README b/board/technexion/pico-imx7d/README new file mode 100644 index 0000000..a2805ee --- /dev/null +++ b/board/technexion/pico-imx7d/README @@ -0,0 +1,49 @@ +How to update U-Boot on pico-imx7d board +---------------------------------------- + +Required software on the host PC: + +- imx_usb_loader: https://github.com/boundarydevices/imx_usb_loader + +Build U-Boot for pico: + +$ make mrproper +$ make pico-imx7d_defconfig +$ make + +This generates the U-Boot binary called u-boot.imx. + +Put pico board in USB download mode (refer to the PICO-iMX7D Quick Start Guide +page 3) + +Connect a USB to serial adapter between the host PC and pico. + +Connect a USB cable between the OTG pico port and the host PC. + +Open a terminal program such as minicom. + +Copy u-boot.imx to the imx_usb_loader folder. + +Load u-boot.imx via USB: + +$ sudo ./imx_usb u-boot.imx + +Then U-Boot starts and its messages appear in the console program. + +Use the default environment variables: + +=> env default -f -a +=> saveenv + +Run the UMS command: +=> ums 0 mmc 0 + +Transfer u-boot.imx to be flashed into the eMMC: + +$ sudo dd if=u-boot.imx of=/dev/sdX bs=1K seek=1; sync + +Remove power from the pico board. + +Put pico board into normal boot mode. + +Power up the board and the new updated U-Boot should boot from eMMC. diff --git a/board/technexion/pico-imx7d/imximage.cfg b/board/technexion/pico-imx7d/imximage.cfg new file mode 100644 index 0000000..202956a --- /dev/null +++ b/board/technexion/pico-imx7d/imximage.cfg @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2017 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include + +/* image version */ + +IMAGE_VERSION 2 + +BOOT_FROM sd + +/* Secure boot support */ +#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +DATA 4 0x30340004 0x4F400005 +/* Clear then set bit30 to ensure exit from DDR retention */ +DATA 4 0x30360388 0x40000000 +DATA 4 0x30360384 0x40000000 + +DATA 4 0x30391000 0x00000002 +DATA 4 0x307a0000 0x01040001 +DATA 4 0x307a01a0 0x80400003 +DATA 4 0x307a01a4 0x00100020 +DATA 4 0x307a01a8 0x80100004 +DATA 4 0x307a0064 0x00400046 +DATA 4 0x307a0490 0x00000001 +DATA 4 0x307a00d0 0x00020083 +DATA 4 0x307a00d4 0x00690000 +DATA 4 0x307a00dc 0x09300004 +DATA 4 0x307a00e0 0x04080000 +DATA 4 0x307a00e4 0x00100004 +DATA 4 0x307a00f4 0x0000033f +DATA 4 0x307a0100 0x09081109 +DATA 4 0x307a0104 0x0007020d +DATA 4 0x307a0108 0x03040407 +DATA 4 0x307a010c 0x00002006 +DATA 4 0x307a0110 0x04020205 +DATA 4 0x307a0114 0x03030202 +DATA 4 0x307a0120 0x00000803 +DATA 4 0x307a0180 0x00800020 +DATA 4 0x307a0184 0x02000100 +DATA 4 0x307a0190 0x02098204 +DATA 4 0x307a0194 0x00030303 +DATA 4 0x307a0200 0x00000016 +DATA 4 0x307a0204 0x00080808 +DATA 4 0x307a0210 0x00000f0f +DATA 4 0x307a0214 0x07070707 +DATA 4 0x307a0218 0x0f070707 +DATA 4 0x307a0240 0x06000604 +DATA 4 0x307a0244 0x00000001 +DATA 4 0x30391000 0x00000000 +DATA 4 0x30790000 0x17420f40 +DATA 4 0x30790004 0x10210100 +DATA 4 0x30790010 0x00060807 +DATA 4 0x307900b0 0x1010007e +DATA 4 0x3079009c 0x00000b24 +DATA 4 0x30790020 0x08080808 +DATA 4 0x30790030 0x08080808 +DATA 4 0x30790050 0x01000010 +DATA 4 0x30790050 0x00000010 + +DATA 4 0x307900c0 0x0e407304 +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e447306 + +CHECK_BITS_SET 4 0x307900c4 0x1 + +DATA 4 0x307900c0 0x0e407304 + +DATA 4 0x30384130 0x00000000 +DATA 4 0x30340020 0x00000178 +DATA 4 0x30384130 0x00000002 +DATA 4 0x30790018 0x0000000f + +CHECK_BITS_SET 4 0x307a0004 0x1 diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c new file mode 100644 index 0000000..799751d --- /dev/null +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -0,0 +1,289 @@ +/* + * Copyright (C) 2017 NXP Semiconductors + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../freescale/common/pfuze.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) +#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) + +#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) + +#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM) + +#ifdef CONFIG_SYS_I2C_MXC +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +/* I2C4 for PMIC */ +static struct i2c_pads_info i2c_pad_info4 = { + .scl = { + .i2c_mode = MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL | PC, + .gpio_mode = MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 | PC, + .gp = IMX_GPIO_NR(6, 16), + }, + .sda = { + .i2c_mode = MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA | PC, + .gpio_mode = MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 | PC, + .gp = IMX_GPIO_NR(6, 17), + }, +}; +#endif + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +#ifdef CONFIG_POWER +#define I2C_PMIC 3 +int power_init_board(void) +{ + struct pmic *p; + int ret; + unsigned int reg, rev_id; + + ret = power_pfuze3000_init(I2C_PMIC); + if (ret) + return ret; + + p = pmic_get("PFUZE3000"); + ret = pmic_probe(p); + if (ret) + return ret; + + pmic_reg_read(p, PFUZE3000_DEVICEID, ®); + pmic_reg_read(p, PFUZE3000_REVID, &rev_id); + printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id); + + /* disable Low Power Mode during standby mode */ + pmic_reg_read(p, PFUZE3000_LDOGCTL, ®); + reg |= 0x1; + pmic_reg_write(p, PFUZE3000_LDOGCTL, reg); + + /* SW1A/1B mode set to APS/APS */ + reg = 0x8; + pmic_reg_write(p, PFUZE3000_SW1AMODE, reg); + pmic_reg_write(p, PFUZE3000_SW1BMODE, reg); + + /* SW1A/1B standby voltage set to 1.025V */ + reg = 0xd; + pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg); + pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg); + + /* decrease SW1B normal voltage to 0.975V */ + pmic_reg_read(p, PFUZE3000_SW1BVOLT, ®); + reg &= ~0x1f; + reg |= PFUZE3000_SW1AB_SETP(975); + pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg); + + return 0; +} +#endif + +static iomux_v3_cfg_t const wdog_pads[] = { + MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart5_pads[] = { + MX7D_PAD_I2C4_SCL__UART5_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_I2C4_SDA__UART5_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { + MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#ifdef CONFIG_FEC_MXC +static iomux_v3_cfg_t const fec1_pads[] = { + MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), + MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), + MX7D_PAD_SD3_STROBE__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define FEC1_RST_GPIO IMX_GPIO_NR(6, 11) + +static void setup_iomux_fec(void) +{ + imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); + + gpio_direction_output(FEC1_RST_GPIO, 0); + udelay(500); + gpio_set_value(FEC1_RST_GPIO, 1); +} + +int board_eth_init(bd_t *bis) +{ + setup_iomux_fec(); + + return fecmxc_initialize_multi(bis, 0, + CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); +} + +static int setup_fec(void) +{ + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs + = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + /* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17] */ + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], + (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK | + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0); + + return set_clk_enet(ENET_125MHz); +} + +int board_phy_config(struct phy_device *phydev) +{ + unsigned short val; + + /* To enable AR8035 ouput a 125MHz clk from CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= 0xffe7; + val |= 0x18; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + val |= 0x0100; + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart5_pads, ARRAY_SIZE(uart5_pads)); +} + +static struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC3_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + /* Assume uSDHC3 emmc is always present */ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + imx_iomux_v3_setup_multiple_pads( + usdhc3_emmc_pads, ARRAY_SIZE(usdhc3_emmc_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + +#ifdef CONFIG_SYS_I2C_MXC + setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4); +#endif + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_FEC_MXC + setup_fec(); +#endif + + return 0; +} + +int board_late_init(void) +{ + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + + imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); + + set_wdog_reset(wdog); + + /* + * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), + * since we use PMIC_PWRON to reset the board. + */ + clrsetbits_le16(&wdog->wcr, 0, 0x10); + + return 0; +} + +int checkboard(void) +{ + puts("Board: i.MX7D PICOSOM\n"); + + return 0; +} + +int board_usb_phy_mode(int port) +{ + return USB_INIT_DEVICE; +} diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig new file mode 100644 index 0000000..35d4486 --- /dev/null +++ b/configs/pico-imx7d_defconfig @@ -0,0 +1,35 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_TARGET_PICO_IMX7D=y +CONFIG_IMX_RDC=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx7d/imximage.cfg" +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_I2C=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="FSL" +CONFIG_G_DNL_VENDOR_NUM=0x0525 +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_OF_LIBFDT=y diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h new file mode 100644 index 0000000..d128ede --- /dev/null +++ b/include/configs/pico-imx7d.h @@ -0,0 +1,143 @@ +/* + * Copyright (C) 2017 NXP Semiconductors + * + * Configuration settings for the i.MX7D Pico board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PICO_IMX7D_CONFIG_H +#define __PICO_IMX7D_CONFIG_H + +#include "mx7_common.h" + +#define PHYS_SDRAM_SIZE SZ_1G + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR + +/* Network */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 1 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +/* ENET1 */ +#define IMX_FEC_BASE ENET_IPS_BASE_ADDR + +/* MMC Config */ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttymxc4\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=imx7d-pico.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "ip_dyn=yes\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "finduuid=part uuid mmc 0:2 uuid\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=PARTUUID=${uuid} rootwait rw\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run finduuid; " \ + "run mmcargs; " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan; then " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "else run netboot; fi" + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* I2C configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 +#define CONFIG_SYS_I2C_MXC_I2C2 +#define CONFIG_SYS_I2C_MXC_I2C3 +#define CONFIG_SYS_I2C_MXC_I2C4 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE3000 +#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 + +/* FLASH and environment organization */ +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_IS_IN_MMC + +#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 + +/* USB Configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +#define CONFIG_IMX_THERMAL + +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +#endif -- cgit v0.10.2 From da384fc67a30ff4685b679a822ef005a8f1aeaa7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 28 May 2017 14:07:24 -0300 Subject: mx7dsabresd: Increase CONFIG_ENV_OFFSET After running 'saveenv' we can no longer boot. Adjust CONFIG_ENV_OFFSET so that U-Boot binary and the environment section do not overlap. Signed-off-by: Fabio Estevam diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 39291a2..fe9fd66 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -207,7 +207,7 @@ #define CONFIG_APBH_DMA_BURST8 #endif -#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#define CONFIG_ENV_OFFSET (12 * SZ_64K) #ifdef CONFIG_NAND_MXS #define CONFIG_SYS_FSL_USDHC_NUM 1 #else -- cgit v0.10.2 From 6ecbe13756711baa795180d1a63b7a73a835c303 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 12 May 2017 12:58:41 -0700 Subject: drivers: pci: imx: add imx_pcie_remove function There is no dedicated reset signal wired up for the MX6QDL thus if the bootloader enables the link we need some special handling to get the core back into a state where it is safe to touch it for configuration. While there has been some special handling in the Linux kernel to do this, it was removed in 4.11 thus we need to do it properly in the bootloader and therefore without this if you enable PCI in the bootloader you will hang while booting the 4.11 kernel. This puts the PCIe controller back into a safe state for the kernel driver before launching the kernel. Signed-off-by: Tim Harvey Reviewed-by: Fabio Estevam Tested-by: Peter Senna Tschudin diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 40fe813..74bdd24 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -275,6 +275,9 @@ u32 get_ahb_clk(void) void arch_preboot_os(void) { +#if defined(CONFIG_PCIE_IMX) + imx_pcie_remove(); +#endif #if defined(CONFIG_CMD_SATA) sata_stop(); #if defined(CONFIG_MX6) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 732d59d..eab0a2b 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -42,6 +42,9 @@ /* PCIe Port Logic registers (memory-mapped) */ #define PL_OFFSET 0x700 +#define PCIE_PL_PFLR (PL_OFFSET + 0x08) +#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16) +#define PCIE_PL_PFLR_FORCE_LINK (1 << 15) #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28) #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c) #define PCIE_PHY_DEBUG_R1_LINK_UP (1 << 4) @@ -445,6 +448,36 @@ static int imx6_pcie_assert_core_reset(void) /* Power up PCIe PHY */ setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ); #else + /* + * If the bootloader already enabled the link we need some special + * handling to get the core back into a state where it is safe to + * touch it for configuration. As there is no dedicated reset signal + * wired up for MX6QDL, we need to manually force LTSSM into "detect" + * state before completely disabling LTSSM, which is a prerequisite + * for core configuration. + * + * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong + * indication that the bootloader activated the link. + */ + if (is_mx6dq()) { + u32 val, gpr1, gpr12; + + gpr1 = readl(&iomuxc_regs->gpr[1]); + gpr12 = readl(&iomuxc_regs->gpr[12]); + if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) && + (gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) { + val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR); + val &= ~PCIE_PL_PFLR_LINK_STATE_MASK; + val |= PCIE_PL_PFLR_FORCE_LINK; + + imx_pcie_fix_dabt_handler(true); + writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR); + imx_pcie_fix_dabt_handler(false); + + gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2; + writel(val, &iomuxc_regs->gpr[12]); + } + } setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN); clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); #endif @@ -652,6 +685,11 @@ void imx_pcie_init(void) } } +void imx_pcie_remove(void) +{ + imx6_pcie_assert_core_reset(); +} + /* Probe function. */ void pci_init_board(void) { diff --git a/include/pci.h b/include/pci.h index d3c955e..c8ef997 100644 --- a/include/pci.h +++ b/include/pci.h @@ -754,6 +754,10 @@ int pci_last_busno(void); extern void pci_mpc85xx_init (struct pci_controller *hose); #endif +#ifdef CONFIG_PCIE_IMX +extern void imx_pcie_remove(void); +#endif + #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) /** * pci_write_bar32() - Write the address of a BAR including control bits -- cgit v0.10.2 From 267c5b79899dcbdfa190b8c6633a2bf517a73123 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Lothar=20Wa=C3=9Fmann?= Date: Fri, 26 May 2017 10:12:09 +0200 Subject: arm: mx6: remove unused config variable CONFIG_SPL_NAND_MXS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The config variable CONFIG_SPL_NAND_MXS is only set in include/configs/imx6_spl.h but used nowhere. Remove it. Signed-off-by: Lothar Waßmann Reviewed-by: Jagan Teki diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 4598d27..bda9541 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -35,11 +35,6 @@ */ #define CONFIG_SPL_PAD_TO 0x11000 -/* NAND support */ -#if defined(CONFIG_SPL_NAND_SUPPORT) -#define CONFIG_SPL_NAND_MXS -#endif - /* MMC support */ #if defined(CONFIG_SPL_MMC_SUPPORT) #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e8f49eb..5b7257b 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2617,7 +2617,6 @@ CONFIG_SPL_NAND_ECC CONFIG_SPL_NAND_INIT CONFIG_SPL_NAND_LOAD CONFIG_SPL_NAND_MINIMAL -CONFIG_SPL_NAND_MXS CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SIMPLE CONFIG_SPL_NAND_SOFTECC -- cgit v0.10.2 From 4f425280fa718a88c436d16d88c2efd6a998943a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Wed, 3 May 2017 11:59:03 +0200 Subject: mmc: fsl_esdhc: Allow all supported prescaler values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On i.MX, SYSCTL.SDCLKFS may be set to 0 in order to make the SD clock frequency prescaler divide by 1 in SDR mode. In DDR mode, the prescaler can divide by up to 512. Allow both of these settings. The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25, this change makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL (240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2). Signed-off-by: Benoît Thébaudeau Reviewed-by: Fabio Estevam diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index f3c6358..ca72627 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -521,7 +521,13 @@ out: static void set_sysctl(struct mmc *mmc, uint clock) { - int div, pre_div; + int div = 1; +#ifdef ARCH_MXC + int pre_div = 1; +#else + int pre_div = 2; +#endif + int ddr_pre_div = mmc->ddr_mode ? 2 : 1; struct fsl_esdhc_priv *priv = mmc->priv; struct fsl_esdhc *regs = priv->esdhc_regs; int sdhc_clk = priv->sdhc_clk; @@ -530,18 +536,13 @@ static void set_sysctl(struct mmc *mmc, uint clock) if (clock < mmc->cfg->f_min) clock = mmc->cfg->f_min; - if (sdhc_clk / 16 > clock) { - for (pre_div = 2; pre_div < 256; pre_div *= 2) - if ((sdhc_clk / pre_div) <= (clock * 16)) - break; - } else - pre_div = 2; + while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256) + pre_div *= 2; - for (div = 1; div <= 16; div++) - if ((sdhc_clk / (div * pre_div)) <= clock) - break; + while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16) + div++; - pre_div >>= mmc->ddr_mode ? 2 : 1; + pre_div >>= 1; div -= 1; clk = (pre_div << 8) | (div << 4); -- cgit v0.10.2 From f7c13e6a791b997e5b73f073db5f81864b882b61 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Wed, 3 May 2017 11:59:04 +0200 Subject: mx25: Fix imx_get_perclk() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit imx_get_perclk() used the AHB clock as the clock source for all PER clocks, but the USB PLL output can also be a PER clock source if the corresponding PER CLK MUX bit is set in CCM.MCR. Signed-off-by: Benoît Thébaudeau Reviewed-by: Fabio Estevam diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 0b1a8f4..f02cffb 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -58,6 +58,14 @@ static ulong imx_get_mpllclk(void) return imx_decode_pll(readl(&ccm->mpctl), fref); } +static ulong imx_get_upllclk(void) +{ + struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; + ulong fref = MXC_HCLK; + + return imx_decode_pll(readl(&ccm->upctl), fref); +} + static ulong imx_get_armclk(void) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; @@ -95,7 +103,8 @@ static ulong imx_get_ipgclk(void) static ulong imx_get_perclk(int clk) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; - ulong fref = imx_get_ahbclk(); + ulong fref = readl(&ccm->mcr) & (1 << clk) ? imx_get_upllclk() : + imx_get_ahbclk(); ulong div; div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]); -- cgit v0.10.2 From 3e3aab3379d99f4c955ecca4992ad33ae70e71e4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Wed, 3 May 2017 11:59:05 +0200 Subject: mx25: Add function to set PER clocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce the imx_set_perclk() function to make it possible to set the PER clocks. Signed-off-by: Benoît Thébaudeau Reviewed-by: Fabio Estevam diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index f02cffb..5d9bc6c 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -113,6 +113,25 @@ static ulong imx_get_perclk(int clk) return fref / div; } +int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq) +{ + struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; + ulong fref = from_upll ? imx_get_upllclk() : imx_get_ahbclk(); + ulong div = (fref + freq - 1) / freq; + + if (clk > MXC_UART_CLK || !div || --div > CCM_PERCLK_MASK) + return -EINVAL; + + clrsetbits_le32(&ccm->pcdr[CCM_PERCLK_REG(clk)], + CCM_PERCLK_MASK << CCM_PERCLK_SHIFT(clk), + div << CCM_PERCLK_SHIFT(clk)); + if (from_upll) + setbits_le32(&ccm->mcr, 1 << clk); + else + clrbits_le32(&ccm->mcr, 1 << clk); + return 0; +} + unsigned int mxc_get_clock(enum mxc_clock clk) { if (clk >= MXC_CLK_NUM) diff --git a/arch/arm/include/asm/arch-mx25/clock.h b/arch/arm/include/asm/arch-mx25/clock.h index 9fdaa9d..7753caf 100644 --- a/arch/arm/include/asm/arch-mx25/clock.h +++ b/arch/arm/include/asm/arch-mx25/clock.h @@ -51,6 +51,7 @@ enum mxc_clock { MXC_CLK_NUM }; +int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq); unsigned int mxc_get_clock(enum mxc_clock clk); #define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK) -- cgit v0.10.2 From 747778cf69468daa1f35abb932e17032ddfe9c1a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Wed, 3 May 2017 11:59:06 +0200 Subject: mx25pdk: Set the eSDHC PER clock to 48 MHz MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The maximum SD clock frequency in High Speed mode is 50 MHz. This change makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1) instead of the previous 33.25 MHz from the AHB clock (133 MHz / 2 / 2). Signed-off-by: Benoît Thébaudeau Reviewed-by: Fabio Estevam diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 788d3c3..cab769c 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -175,6 +175,12 @@ int board_mmc_init(bd_t *bis) imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads)); + /* + * Set the eSDHC1 PER clock to the maximum frequency lower than or equal + * to 50 MHz that can be obtained, which requires to use UPLL as the + * clock source. This actually gives 48 MHz. + */ + imx_set_perclk(MXC_ESDHC1_CLK, true, 50000000); esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK); return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); } -- cgit v0.10.2 From 237868c9c08db051ec123ff7c3317ff35c2bf2de Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 11 May 2017 10:35:00 +0800 Subject: regulator: pfuze100: add SPDX License Add SPDX license Signed-off-by: Peng Fan Cc: Jaehoon Chung Reviewed-by: Jaehoon Chung diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c index 4702161..88b1b72 100644 --- a/drivers/power/regulator/pfuze100.c +++ b/drivers/power/regulator/pfuze100.c @@ -1,3 +1,11 @@ +/* + * Copyright 2017 NXP + * + * Peng Fan + * + * SPDX-License-Identifier: GPL-2.0+ + */ + #include #include #include -- cgit v0.10.2 From fcdb5319ceae7c55450053defc031749d6a7da57 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 11 May 2017 10:35:01 +0800 Subject: regulator: pfuze100: unsigned compared against 0 Fix unsigned compared against 0. Signed-off-by: Peng Fan Cc: Jaehoon Chung Reviewed-by: Jaehoon Chung diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c index 88b1b72..02f3894 100644 --- a/drivers/power/regulator/pfuze100.c +++ b/drivers/power/regulator/pfuze100.c @@ -314,7 +314,7 @@ static int pfuze100_regulator_probe(struct udevice *dev) static int pfuze100_regulator_mode(struct udevice *dev, int op, int *opmode) { - unsigned char val; + int val; struct pfuze100_regulator_platdata *plat = dev_get_platdata(dev); struct pfuze100_regulator_desc *desc = plat->desc; @@ -384,7 +384,7 @@ static int pfuze100_regulator_mode(struct udevice *dev, int op, int *opmode) static int pfuze100_regulator_enable(struct udevice *dev, int op, bool *enable) { - unsigned char val; + int val; int ret, on_off; struct dm_regulator_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev); @@ -448,7 +448,7 @@ static int pfuze100_regulator_enable(struct udevice *dev, int op, bool *enable) static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV) { int i; - unsigned char val; + int val; struct pfuze100_regulator_platdata *plat = dev_get_platdata(dev); struct pfuze100_regulator_desc *desc = plat->desc; struct dm_regulator_uclass_platdata *uc_pdata = -- cgit v0.10.2 From 2e87c440f610ca99d5103c39b370e5b5d2481720 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:20 +0530 Subject: mmc: fsl_esdhc: Move non DM_MMC code in #ifndef CONFIG_DM_MMC Don't build non DM_MMC code when DM_MMC defined so move them into #ifndef CONFIG_DM_MMC Cc: Jaehoon Chung Signed-off-by: Jagan Teki diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index ca72627..6f08a2d 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -724,20 +724,6 @@ static const struct mmc_ops esdhc_ops = { .getcd = esdhc_getcd, }; -static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, - struct fsl_esdhc_priv *priv) -{ - if (!cfg || !priv) - return -EINVAL; - - priv->esdhc_regs = (struct fsl_esdhc *)(unsigned long)(cfg->esdhc_base); - priv->bus_width = cfg->max_bus_width; - priv->sdhc_clk = cfg->sdhc_clk; - priv->wp_enable = cfg->wp_enable; - - return 0; -}; - static int fsl_esdhc_init(struct fsl_esdhc_priv *priv) { struct fsl_esdhc *regs; @@ -834,6 +820,21 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv) return 0; } +#ifndef CONFIG_DM_MMC +static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, + struct fsl_esdhc_priv *priv) +{ + if (!cfg || !priv) + return -EINVAL; + + priv->esdhc_regs = (struct fsl_esdhc *)(unsigned long)(cfg->esdhc_base); + priv->bus_width = cfg->max_bus_width; + priv->sdhc_clk = cfg->sdhc_clk; + priv->wp_enable = cfg->wp_enable; + + return 0; +}; + int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) { struct fsl_esdhc_priv *priv; @@ -872,6 +873,7 @@ int fsl_esdhc_mmc_init(bd_t *bis) cfg->sdhc_clk = gd->arch.sdhc_clk; return fsl_esdhc_initialize(bis, cfg); } +#endif #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT void mmc_adapter_card_type_ident(void) -- cgit v0.10.2 From 6d931fd569c040bc6b168c270d84266ae56d4465 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:21 +0530 Subject: engicam: Move SPL mmc configs under CONFIG_SPL_BUILD - CONFIG_SYS_FSL_USDHC_NUM - CONFIG_SYS_FSL_ESDHC_ADDR Signed-off-by: Jagan Teki diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 741bdfa..1fc418e 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -137,8 +137,6 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif /* NAND */ @@ -203,6 +201,8 @@ # include "imx6_spl.h" # ifdef CONFIG_SPL_BUILD +# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 # undef CONFIG_DM_GPIO # undef CONFIG_DM_MMC # endif diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index f52865b..f36a6c6 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -119,8 +119,6 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif /* Ethernet */ @@ -137,8 +135,11 @@ /* SPL */ #ifdef CONFIG_SPL # define CONFIG_SPL_MMC_SUPPORT + # include "imx6_spl.h" # ifdef CONFIG_SPL_BUILD +# define CONFIG_SYS_FSL_USDHC_NUM 2 +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 # undef CONFIG_DM_GPIO # undef CONFIG_DM_MMC # endif diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index 2e12b97..73b4239 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -136,8 +136,6 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif /* NAND */ @@ -187,6 +185,8 @@ # include "imx6_spl.h" # ifdef CONFIG_SPL_BUILD +# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 # undef CONFIG_DM_GPIO # undef CONFIG_DM_MMC # endif diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 76ae159..d262e82 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -136,8 +136,6 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif /* NAND */ @@ -188,6 +186,8 @@ # include "imx6_spl.h" # ifdef CONFIG_SPL_BUILD +# define CONFIG_SYS_FSL_USDHC_NUM 2 +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 # undef CONFIG_DM_GPIO # undef CONFIG_DM_MMC # endif -- cgit v0.10.2 From 4f816fbd7b6102979c6656dc96c83f21256f4c4b Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:22 +0530 Subject: icorem6: Recover missing nand defconfig nand defconfig is accidentally removed from below commit, so recover the same. "icorem6: Make SPL to pick suitable fdt" (sha1: 15455a6b01d97d575afe2f494cfc9722424230c0) Signed-off-by: Jagan Teki diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig new file mode 100644 index 0000000..7bedc31 --- /dev/null +++ b/configs/imx6qdl_icore_nand_defconfig @@ -0,0 +1,45 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +# CONFIG_CMD_BMODE is not set +CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" +CONFIG_OF_LIST="imx6q-icore imx6dl-icore" +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND" +CONFIG_BOOTDELAY=3 +CONFIG_SPL=y +CONFIG_SPL_DMA_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="icorem6qdl> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_UBI=y +# CONFIG_BLK is not set +CONFIG_SYS_I2C_MXC=y +# CONFIG_DM_MMC_OPS is not set +CONFIG_NAND_MXS=y +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_VIDEO_IPUV3=y -- cgit v0.10.2 From a43241a406890b2f309d05039556cf4f57e9bb0d Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:23 +0530 Subject: drivers: net: Kconfig: Add PHY_MICREL_KSZ9021 entry Add kconfig entry for Micrel KSZ9021 PHY support. Cc: Joe Hershberger Signed-off-by: Jagan Teki diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index aca3990..ce1b30a 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -58,6 +58,14 @@ config PHY_MARVELL config PHY_MICREL bool "Micrel Ethernet PHYs support" +config PHY_MICREL_KSZ9021 + bool "Micrel KSZ9021 Ethernet PHYs support" + depends on PHY_MICREL + help + KSZ9021 is a completely integrated triple speed (10Base-T/100Base-TX/1000Base-T) + Ethernet Physical Layer Transceiver for transmission and reception of data over + standard CAT-5 unshielded twisted pair (UTP) cable. + config PHY_MSCC bool "Microsemi Corp Ethernet PHYs support" -- cgit v0.10.2 From a48f32f71b653d0137ed83055d902813bae28ca7 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:24 +0530 Subject: engicam: Move PHY configs to defconfig - CONFIG_PHYLIB - CONFIG_PHY_SMSC - CONFIG_PHY_MICREL - CONFIG_PHY_MICREL_KSZ9021 Signed-off-by: Jagan Teki diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index b6b1b4b..4ab1fac 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -42,3 +42,5 @@ CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_VIDEO_IPUV3=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 7bedc31..4bc661e 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -43,3 +43,5 @@ CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_VIDEO_IPUV3=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/configs/imx6qdl_icore_rqs_mmc_defconfig b/configs/imx6qdl_icore_rqs_mmc_defconfig index 08e6784..a03aa0a 100644 --- a/configs/imx6qdl_icore_rqs_mmc_defconfig +++ b/configs/imx6qdl_icore_rqs_mmc_defconfig @@ -39,3 +39,6 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ9021=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 8751a36..561c0b0 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -39,3 +39,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 704c0c0..6037db8 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -40,3 +40,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 1f501cb..4165cc5 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -37,3 +37,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 5214479..06ef950 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -39,3 +39,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 1b28336..01a6c6f 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -40,3 +40,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 1fc418e..5789f24 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -174,8 +174,6 @@ # define CONFIG_ETHPRIME "FEC" # define CONFIG_MII -# define CONFIG_PHYLIB -# define CONFIG_PHY_SMSC #endif /* Framebuffer */ diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index f36a6c6..a74ee33 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -127,9 +127,6 @@ # define CONFIG_FEC_XCV_TYPE RGMII # define CONFIG_MII -# define CONFIG_PHYLIB -# define CONFIG_PHY_MICREL -# define CONFIG_PHY_MICREL_KSZ9021 #endif /* SPL */ diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index 73b4239..8cd1466 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -171,8 +171,6 @@ # define CONFIG_FEC_XCV_TYPE RMII # define CONFIG_MII -# define CONFIG_PHYLIB -# define CONFIG_PHY_SMSC #endif /* SPL */ diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index d262e82..c09a754 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -172,8 +172,6 @@ # define CONFIG_FEC_XCV_TYPE RMII # define CONFIG_MII -# define CONFIG_PHYLIB -# define CONFIG_PHY_SMSC #endif /* SPL */ -- cgit v0.10.2 From 8bd06ba91af529f3e5746bac94a3308181f69d09 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:25 +0530 Subject: icorem6: Remove unused FEC configs - IMX_FEC_BASE: icorem6 using dts, no need for explicit base. - CONFIG_ETHPRIME: ethprime env not using anywhere in the board. Signed-off-by: Jagan Teki diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 5789f24..00a533c 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -168,10 +168,8 @@ /* Ethernet */ #ifdef CONFIG_FEC_MXC -# define IMX_FEC_BASE ENET_BASE_ADDR # define CONFIG_FEC_MXC_PHYADDR 0 # define CONFIG_FEC_XCV_TYPE RMII -# define CONFIG_ETHPRIME "FEC" # define CONFIG_MII #endif -- cgit v0.10.2 From 46f9c839c9c2b1da54bc7a1f786e82d09588aadf Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:26 +0530 Subject: engicam: Set console env on board_late_init Set console env on board_late_init instead of configs. Signed-off-by: Jagan Teki diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index af4ef28..e3bb569 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -53,6 +53,11 @@ int board_late_init(void) break; } + if (is_mx6ul()) + setenv("console", "ttymxc0"); + else + setenv("console", "ttymxc3"); + setenv_fdt_file(); return 0; diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 00a533c..f3e8481 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -40,7 +40,6 @@ "splashpos=m,m\0" \ "image=uImage\0" \ "fit_image=fit.itb\0" \ - "console=ttymxc3\0" \ "fdt_high=0xffffffff\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index a74ee33..8f0128e 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -35,7 +35,6 @@ "script=boot.scr\0" \ "image=uImage\0" \ "fit_image=fit.itb\0" \ - "console=ttymxc3\0" \ "fdt_high=0xffffffff\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index 8cd1466..f7c4824 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -39,7 +39,6 @@ "script=boot.scr\0" \ "image=uImage\0" \ "fit_image=fit.itb\0" \ - "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "fdt_addr=0x87800000\0" \ "boot_fdt=try\0" \ diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index c09a754..2dff5ee 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -40,7 +40,6 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "splashpos=m,m\0" \ - "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "fdt_addr=0x87800000\0" \ "boot_fdt=try\0" \ -- cgit v0.10.2 From 5ed7d31a1461592a4e65d9a8cfdfd73de4738b35 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:27 +0530 Subject: engicam: Add fdt_addr env value based on cpu_type Define FDT_ADDR based on the respective SOM, and later patches will make use of this fdt_addr in single config file. Signed-off-by: Jagan Teki diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index f3e8481..531631d 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -41,7 +41,7 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x18000000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ @@ -109,6 +109,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x1##x +#define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index 8f0128e..4bc1055 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -36,7 +36,7 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x18000000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "mmcautodetect=yes\0" \ @@ -91,6 +91,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x1##x +#define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index f7c4824..2617c8a 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -40,7 +40,7 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x87800000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ @@ -108,6 +108,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x87##x +#define FDT_ADDR __stringify(DRAM_OFFSET(800000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 2dff5ee..5de3e1d 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -41,7 +41,7 @@ "fit_image=fit.itb\0" \ "splashpos=m,m\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x87800000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ @@ -108,6 +108,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x87##x +#define FDT_ADDR __stringify(DRAM_OFFSET(800000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -- cgit v0.10.2 From 0e689a61929bdf15423e868bc242c1268bda7db9 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 12 May 2017 17:18:28 +0530 Subject: engicam: Generate single config file Engicam has several SOM's on i.MX6 stream, where each SOM has one include/configs/*.h file, this patch generate single config file for all SOM's include/configs/imx6-engicam.h Signed-off-by: Jagan Teki diff --git a/board/engicam/geam6ul/Kconfig b/board/engicam/geam6ul/Kconfig index 8753d15..7f4023e 100644 --- a/board/engicam/geam6ul/Kconfig +++ b/board/engicam/geam6ul/Kconfig @@ -7,6 +7,6 @@ config SYS_VENDOR default "engicam" config SYS_CONFIG_NAME - default "imx6ul_geam" + default "imx6-engicam" endif diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/icorem6/Kconfig index 6d62f0e..4a1c9ac 100644 --- a/board/engicam/icorem6/Kconfig +++ b/board/engicam/icorem6/Kconfig @@ -7,6 +7,6 @@ config SYS_VENDOR default "engicam" config SYS_CONFIG_NAME - default "imx6qdl_icore" + default "imx6-engicam" endif diff --git a/board/engicam/icorem6_rqs/Kconfig b/board/engicam/icorem6_rqs/Kconfig index 1352c68..6dc3a07 100644 --- a/board/engicam/icorem6_rqs/Kconfig +++ b/board/engicam/icorem6_rqs/Kconfig @@ -7,6 +7,6 @@ config SYS_VENDOR default "engicam" config SYS_CONFIG_NAME - default "imx6qdl_icore_rqs" + default "imx6-engicam" endif diff --git a/board/engicam/isiotmx6ul/Kconfig b/board/engicam/isiotmx6ul/Kconfig index 213ffad..10c2c50 100644 --- a/board/engicam/isiotmx6ul/Kconfig +++ b/board/engicam/isiotmx6ul/Kconfig @@ -7,6 +7,6 @@ config SYS_VENDOR default "engicam" config SYS_CONFIG_NAME - default "imx6ul_isiot" + default "imx6-engicam" endif diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h new file mode 100644 index 0000000..558f38d --- /dev/null +++ b/include/configs/imx6-engicam.h @@ -0,0 +1,228 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * Configuration settings for the Engicam i.MX6 SOM Starter Kits. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __IMX6_ENGICAM_CONFIG_H +#define __IMX6_ENGICAM_CONFIG_H + +#include +#include "mx6_common.h" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE SZ_128K + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +/* Environment in MMC */ +# if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_ENV_OFFSET 0x100000 +/* Environment in NAND */ +# elif defined(CONFIG_ENV_IS_IN_NAND) +# define CONFIG_ENV_OFFSET 0x400000 +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# endif +#endif + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "splashpos=m,m\0" \ + "image=uImage\0" \ + "fit_image=fit.itb\0" \ + "fdt_high=0xffffffff\0" \ + "fdt_addr=" FDT_ADDR "\0" \ + "boot_fdt=try\0" \ + "mmcpart=1\0" \ + "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "ubiargs=setenv bootargs console=${console},${baudrate} " \ + "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ + "fitboot=echo Booting FIT image from mmc ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "_mmcboot=run mmcargs; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootm ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootm; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootm; " \ + "fi\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadfit; then " \ + "run fitboot; " \ + "else " \ + "if run loadimage; then " \ + "run _mmcboot; " \ + "fi; " \ + "fi; " \ + "fi; " \ + "fi\0" \ + "nandboot=echo Booting from nand ...; " \ + "if mtdparts; then " \ + "echo Starting nand boot ...; " \ + "else " \ + "mtdparts default; " \ + "fi; " \ + "run ubiargs; " \ + "nand read ${loadaddr} kernel 0x800000; " \ + "nand read ${fdt_addr} dtb 0x100000; " \ + "bootm ${loadaddr} - ${fdt_addr}\0" + +#define CONFIG_BOOTCOMMAND "run $modeboot" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#ifdef CONFIG_MX6UL +# define DRAM_OFFSET(x) 0x87##x +# define FDT_ADDR __stringify(DRAM_OFFSET(800000)) +#else +# define DRAM_OFFSET(x) 0x1##x +# define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) +#endif + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_SP_OFFSET) + +/* FIT */ +#ifdef CONFIG_FIT +# define CONFIG_HASH_VERIFY +# define CONFIG_IMAGE_FORMAT_LEGACY +#endif + +/* UART */ +#ifdef CONFIG_MXC_UART +# ifdef CONFIG_MX6UL +# define CONFIG_MXC_UART_BASE UART1_BASE +# else +# define CONFIG_MXC_UART_BASE UART4_BASE +# endif +#endif + +/* MMC */ +#ifdef CONFIG_FSL_USDHC +# define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +/* NAND */ +#ifdef CONFIG_NAND_MXS +# define CONFIG_SYS_MAX_NAND_DEVICE 1 +# define CONFIG_SYS_NAND_BASE 0x40000000 +# define CONFIG_SYS_NAND_5_ADDR_CYCLE +# define CONFIG_SYS_NAND_ONFI_DETECTION +# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 + +/* MTD device */ +# define CONFIG_MTD_DEVICE +# define CONFIG_CMD_MTDPARTS +# define CONFIG_MTD_PARTITIONS +# define MTDIDS_DEFAULT "nand0=gpmi-nand" +# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ + "1m(env),8m(kernel),1m(dtb),-(rootfs)" + +/* UBI */ +# define CONFIG_CMD_UBIFS +# define CONFIG_RBTREE +# define CONFIG_LZO + +# define CONFIG_APBH_DMA +# define CONFIG_APBH_DMA_BURST +# define CONFIG_APBH_DMA_BURST8 +#endif + +/* Ethernet */ +#ifdef CONFIG_FEC_MXC +# ifdef CONFIG_TARGET_MX6Q_ICORE_RQS +# define CONFIG_FEC_MXC_PHYADDR 3 +# define CONFIG_FEC_XCV_TYPE RGMII +# else +# define CONFIG_FEC_MXC_PHYADDR 0 +# define CONFIG_FEC_XCV_TYPE RMII +# endif + +# define CONFIG_MII +#endif + +/* Framebuffer */ +#ifdef CONFIG_VIDEO_IPUV3 +# define CONFIG_IPUV3_CLK 260000000 +# define CONFIG_IMX_VIDEO_SKIP + +# define CONFIG_SPLASH_SCREEN +# define CONFIG_SPLASH_SCREEN_ALIGN +# define CONFIG_BMP_16BPP +# define CONFIG_VIDEO_BMP_RLE8 +# define CONFIG_VIDEO_LOGO +# define CONFIG_VIDEO_BMP_LOGO +#endif + +/* SPL */ +#ifdef CONFIG_SPL +# ifdef CONFIG_NAND_MXS +# define CONFIG_SPL_NAND_SUPPORT +# else +# define CONFIG_SPL_MMC_SUPPORT +# endif + +# include "imx6_spl.h" +# ifdef CONFIG_SPL_BUILD +# if defined(CONFIG_TARGET_MX6Q_ICORE_RQS) || defined(CONFIG_TARGET_MX6UL_ISIOT) +# define CONFIG_SYS_FSL_USDHC_NUM 2 +# else +# define CONFIG_SYS_FSL_USDHC_NUM 1 +# endif + +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 +# undef CONFIG_DM_GPIO +# undef CONFIG_DM_MMC +# endif +#endif + +#endif /* __IMX6_ENGICAM_CONFIG_H */ diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h deleted file mode 100644 index 531631d..0000000 --- a/include/configs/imx6qdl_icore.h +++ /dev/null @@ -1,209 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __IMX6QLD_ICORE_CONFIG_H -#define __IMX6QLD_ICORE_CONFIG_H - -#include -#include "mx6_common.h" - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) - -/* Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE SZ_128K - -/* Allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Environment */ -#ifndef CONFIG_ENV_IS_NOWHERE -/* Environment in MMC */ -# if defined(CONFIG_ENV_IS_IN_MMC) -# define CONFIG_ENV_OFFSET 0x100000 -/* Environment in NAND */ -# elif defined(CONFIG_ENV_IS_IN_NAND) -# define CONFIG_ENV_OFFSET 0x400000 -# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -# endif -#endif - -/* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "splashpos=m,m\0" \ - "image=uImage\0" \ - "fit_image=fit.itb\0" \ - "fdt_high=0xffffffff\0" \ - "fdt_addr=" FDT_ADDR "\0" \ - "boot_fdt=try\0" \ - "mmcpart=1\0" \ - "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "ubiargs=setenv bootargs console=${console},${baudrate} " \ - "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ - "fitboot=echo Booting FIT image from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "_mmcboot=run mmcargs; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootm; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootm; " \ - "fi\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run _mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi\0" \ - "nandboot=echo Booting from nand ...; " \ - "if mtdparts; then " \ - "echo Starting nand boot ...; " \ - "else " \ - "mtdparts default; " \ - "fi; " \ - "run ubiargs; " \ - "nand read ${loadaddr} kernel 0x800000; " \ - "nand read ${fdt_addr} dtb 0x100000; " \ - "bootm ${loadaddr} - ${fdt_addr}\0" - -#define CONFIG_BOOTCOMMAND "run $modeboot" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 - -#define DRAM_OFFSET(x) 0x1##x -#define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_SP_OFFSET) - -/* FIT */ -#ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY -# define CONFIG_IMAGE_FORMAT_LEGACY -#endif - -/* UART */ -#ifdef CONFIG_MXC_UART -# define CONFIG_MXC_UART_BASE UART4_BASE -#endif - -/* MMC */ -#ifdef CONFIG_FSL_USDHC -# define CONFIG_SYS_MMC_ENV_DEV 0 -#endif - -/* NAND */ -#ifdef CONFIG_NAND_MXS -# define CONFIG_SYS_MAX_NAND_DEVICE 1 -# define CONFIG_SYS_NAND_BASE 0x40000000 -# define CONFIG_SYS_NAND_5_ADDR_CYCLE -# define CONFIG_SYS_NAND_ONFI_DETECTION -# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 - -/* MTD device */ -# define CONFIG_MTD_DEVICE -# define CONFIG_CMD_MTDPARTS -# define CONFIG_MTD_PARTITIONS -# define MTDIDS_DEFAULT "nand0=gpmi-nand" -# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ - "1m(env),8m(kernel),1m(dtb),-(rootfs)" - -/* UBI */ -# define CONFIG_CMD_UBIFS -# define CONFIG_RBTREE -# define CONFIG_LZO - -# define CONFIG_APBH_DMA -# define CONFIG_APBH_DMA_BURST -# define CONFIG_APBH_DMA_BURST8 -#endif - -/* Ethernet */ -#ifdef CONFIG_FEC_MXC -# define CONFIG_FEC_MXC_PHYADDR 0 -# define CONFIG_FEC_XCV_TYPE RMII - -# define CONFIG_MII -#endif - -/* Framebuffer */ -#ifdef CONFIG_VIDEO_IPUV3 -# define CONFIG_IPUV3_CLK 260000000 -# define CONFIG_IMX_VIDEO_SKIP - -# define CONFIG_SPLASH_SCREEN -# define CONFIG_SPLASH_SCREEN_ALIGN -# define CONFIG_BMP_16BPP -# define CONFIG_VIDEO_BMP_RLE8 -# define CONFIG_VIDEO_LOGO -# define CONFIG_VIDEO_BMP_LOGO -#endif - -/* SPL */ -#ifdef CONFIG_SPL -# ifdef CONFIG_NAND_MXS -# define CONFIG_SPL_NAND_SUPPORT -# else -# define CONFIG_SPL_MMC_SUPPORT -# endif - -# include "imx6_spl.h" -# ifdef CONFIG_SPL_BUILD -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif -#endif - -#endif /* __IMX6QLD_ICORE_CONFIG_H */ diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h deleted file mode 100644 index 4bc1055..0000000 --- a/include/configs/imx6qdl_icore_rqs.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * Configuration settings for the Engicam i.CoreM6 QDL RQS Starter Kits. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __IMX6QLD_ICORE_RQS_CONFIG_H -#define __IMX6QLD_ICORE_RQS_CONFIG_H - -#include -#include "mx6_common.h" - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) - -/* Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE SZ_128K - -/* Allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Environment */ -#ifndef CONFIG_ENV_IS_NOWHERE -/* Environment in MMC */ -# if defined(CONFIG_ENV_IS_IN_MMC) -# define CONFIG_ENV_OFFSET 0x100000 -# endif -#endif - -/* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=uImage\0" \ - "fit_image=fit.itb\0" \ - "fdt_high=0xffffffff\0" \ - "fdt_addr=" FDT_ADDR "\0" \ - "boot_fdt=try\0" \ - "mmcpart=1\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ - "fitboot=echo Booting FIT image from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "_mmcboot=run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootm; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootm; " \ - "fi\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "mmc dev ${mmcdev};" \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run _mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi\0" - -#define CONFIG_BOOTCOMMAND "run $modeboot" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 - -#define DRAM_OFFSET(x) 0x1##x -#define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_SP_OFFSET) - -/* FIT */ -#ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY -# define CONFIG_IMAGE_FORMAT_LEGACY -#endif - -/* UART */ -#ifdef CONFIG_MXC_UART -# define CONFIG_MXC_UART_BASE UART4_BASE -#endif - -/* MMC */ -#ifdef CONFIG_FSL_USDHC -# define CONFIG_SYS_MMC_ENV_DEV 0 -#endif - -/* Ethernet */ -#ifdef CONFIG_FEC_MXC -# define CONFIG_FEC_MXC_PHYADDR 3 -# define CONFIG_FEC_XCV_TYPE RGMII - -# define CONFIG_MII -#endif - -/* SPL */ -#ifdef CONFIG_SPL -# define CONFIG_SPL_MMC_SUPPORT - -# include "imx6_spl.h" -# ifdef CONFIG_SPL_BUILD -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif -#endif - -#endif /* __IMX6QLD_ICORE_RQS_CONFIG_H */ diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h deleted file mode 100644 index 2617c8a..0000000 --- a/include/configs/imx6ul_geam.h +++ /dev/null @@ -1,195 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * Configuration settings for the Engicam GEAM6UL Starter Kits. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __IMX6UL_GEAM_CONFIG_H -#define __IMX6UL_GEAM_CONFIG_H - -#include -#include "mx6_common.h" - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) - -/* Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE SZ_128K - -/* Allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Environment */ -#ifndef CONFIG_ENV_IS_NOWHERE -/* Environment in MMC */ -# if defined(CONFIG_ENV_IS_IN_MMC) -# define CONFIG_ENV_OFFSET 0x100000 -/* Environment in NAND */ -# elif defined(CONFIG_ENV_IS_IN_NAND) -# define CONFIG_ENV_OFFSET 0x400000 -# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -# endif -#endif - -/* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=uImage\0" \ - "fit_image=fit.itb\0" \ - "fdt_high=0xffffffff\0" \ - "fdt_addr=" FDT_ADDR "\0" \ - "boot_fdt=try\0" \ - "mmcpart=1\0" \ - "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "ubiargs=setenv bootargs console=${console},${baudrate} " \ - "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ - "fitboot=echo Booting FIT image from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "_mmcboot=run mmcargs; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootm; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootm; " \ - "fi\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run _mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi\0" \ - "nandboot=echo Booting from nand ...; " \ - "if mtdparts; then " \ - "echo Starting nand boot ...; " \ - "else " \ - "mtdparts default; " \ - "fi; " \ - "run ubiargs; " \ - "nand read ${loadaddr} kernel 0x800000; " \ - "nand read ${fdt_addr} dtb 0x100000; " \ - "bootm ${loadaddr} - ${fdt_addr}\0" - -#define CONFIG_BOOTCOMMAND "run $modeboot" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 - -#define DRAM_OFFSET(x) 0x87##x -#define FDT_ADDR __stringify(DRAM_OFFSET(800000)) - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_SP_OFFSET) - -/* FIT */ -#ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY -# define CONFIG_IMAGE_FORMAT_LEGACY -#endif - -/* UART */ -#ifdef CONFIG_MXC_UART -# define CONFIG_MXC_UART_BASE UART1_BASE -#endif - -/* MMC */ -#ifdef CONFIG_FSL_USDHC -# define CONFIG_SYS_MMC_ENV_DEV 0 -#endif - -/* NAND */ -#ifdef CONFIG_NAND_MXS -# define CONFIG_SYS_MAX_NAND_DEVICE 1 -# define CONFIG_SYS_NAND_BASE 0x40000000 -# define CONFIG_SYS_NAND_5_ADDR_CYCLE -# define CONFIG_SYS_NAND_ONFI_DETECTION -# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 - -/* MTD device */ -# define CONFIG_MTD_DEVICE -# define CONFIG_CMD_MTDPARTS -# define CONFIG_MTD_PARTITIONS -# define MTDIDS_DEFAULT "nand0=gpmi-nand" -# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ - "1m(env),8m(kernel),1m(dtb),-(rootfs)" - -/* UBI */ -# define CONFIG_CMD_UBIFS -# define CONFIG_RBTREE -# define CONFIG_LZO - -# define CONFIG_APBH_DMA -# define CONFIG_APBH_DMA_BURST -# define CONFIG_APBH_DMA_BURST8 -#endif - -/* Ethernet */ -#ifdef CONFIG_FEC_MXC -# define CONFIG_FEC_MXC_PHYADDR 0 -# define CONFIG_FEC_XCV_TYPE RMII - -# define CONFIG_MII -#endif - -/* SPL */ -#ifdef CONFIG_SPL -# ifdef CONFIG_NAND_MXS -# define CONFIG_SPL_NAND_SUPPORT -# else -# define CONFIG_SPL_MMC_SUPPORT -# endif - -# include "imx6_spl.h" -# ifdef CONFIG_SPL_BUILD -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif -#endif - -#endif /* __IMX6UL_GEAM_CONFIG_H */ diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h deleted file mode 100644 index 5de3e1d..0000000 --- a/include/configs/imx6ul_isiot.h +++ /dev/null @@ -1,196 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * - * Configuration settings for the Engicam Is.IoT MX6UL Starter Kits. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __IMX6UL_ISIOT_CONFIG_H -#define __IMX6UL_ISIOT_CONFIG_H - -#include -#include "mx6_common.h" - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) - -/* Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE SZ_128K - -/* Allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Environment */ -#ifndef CONFIG_ENV_IS_NOWHERE -/* Environment in MMC */ -# if defined(CONFIG_ENV_IS_IN_MMC) -# define CONFIG_ENV_OFFSET 0x100000 -/* Environment in NAND */ -# elif defined(CONFIG_ENV_IS_IN_NAND) -# define CONFIG_ENV_OFFSET 0x400000 -# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -# endif -#endif - -/* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=uImage\0" \ - "fit_image=fit.itb\0" \ - "splashpos=m,m\0" \ - "fdt_high=0xffffffff\0" \ - "fdt_addr=" FDT_ADDR "\0" \ - "boot_fdt=try\0" \ - "mmcpart=1\0" \ - "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "ubiargs=setenv bootargs console=${console},${baudrate} " \ - "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ - "fitboot=echo Booting FIT image from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "_mmcboot=run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootm; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootm; " \ - "fi\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run _mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi\0" \ - "nandboot=echo Booting from nand ...; " \ - "if mtdparts; then " \ - "echo Starting nand boot ...; " \ - "else " \ - "mtdparts default; " \ - "fi; " \ - "run ubiargs; " \ - "nand read ${loadaddr} kernel 0x800000; " \ - "nand read ${fdt_addr} dtb 0x100000; " \ - "bootm ${loadaddr} - ${fdt_addr}\0" - -#define CONFIG_BOOTCOMMAND "run $modeboot" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 - -#define DRAM_OFFSET(x) 0x87##x -#define FDT_ADDR __stringify(DRAM_OFFSET(800000)) - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_SP_OFFSET) - -/* FIT */ -#ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY -# define CONFIG_IMAGE_FORMAT_LEGACY -#endif - -/* UART */ -#ifdef CONFIG_MXC_UART -# define CONFIG_MXC_UART_BASE UART1_BASE -#endif - -/* MMC */ -#ifdef CONFIG_FSL_USDHC -# define CONFIG_SYS_MMC_ENV_DEV 0 -#endif - -/* NAND */ -#ifdef CONFIG_NAND_MXS -# define CONFIG_SYS_MAX_NAND_DEVICE 1 -# define CONFIG_SYS_NAND_BASE 0x40000000 -# define CONFIG_SYS_NAND_5_ADDR_CYCLE -# define CONFIG_SYS_NAND_ONFI_DETECTION -# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 - -/* MTD device */ -# define CONFIG_MTD_DEVICE -# define CONFIG_CMD_MTDPARTS -# define CONFIG_MTD_PARTITIONS -# define MTDIDS_DEFAULT "nand0=gpmi-nand" -# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ - "1m(env),8m(kernel),1m(dtb),-(rootfs)" - -/* UBI */ -# define CONFIG_CMD_UBIFS -# define CONFIG_RBTREE -# define CONFIG_LZO - -/* APBH DMA */ -# define CONFIG_APBH_DMA -# define CONFIG_APBH_DMA_BURST -# define CONFIG_APBH_DMA_BURST8 -#endif - -/* Ethernet */ -#ifdef CONFIG_FEC_MXC -# define CONFIG_FEC_MXC_PHYADDR 0 -# define CONFIG_FEC_XCV_TYPE RMII - -# define CONFIG_MII -#endif - -/* SPL */ -#ifdef CONFIG_SPL -# ifdef CONFIG_NAND_MXS -# define CONFIG_SPL_NAND_SUPPORT -# else -# define CONFIG_SPL_MMC_SUPPORT -# endif - -# include "imx6_spl.h" -# ifdef CONFIG_SPL_BUILD -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif -#endif - -#endif /* __IMX6UL_ISIOT_CONFIG_H */ -- cgit v0.10.2 From 4e2ece0e1518fb25bf0c672d0026477801b5e186 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 May 2017 08:15:02 -0300 Subject: mx6sabresd: Rename target to mx6sabresd_defconfig As mx6sabresd only supports SPL target now, there is no need to keep the 'spl' in the name of the target, so simply rename it to mx6sabresd_defconfig. Signed-off-by: Fabio Estevam diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig new file mode 100644 index 0000000..0e0edef --- /dev/null +++ b/configs/mx6sabresd_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6SABRESD=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_VIDEO=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL" +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SPL=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PCI=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="FSL" +CONFIG_G_DNL_VENDOR_NUM=0x0525 +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +# CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_OF_LIBFDT=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig deleted file mode 100644 index 0e0edef..0000000 --- a/configs/mx6sabresd_spl_defconfig +++ /dev/null @@ -1,51 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6SABRESD=y -CONFIG_SPL_MMC_SUPPORT=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_VIDEO=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL" -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SPL=y -CONFIG_SPL_EXT_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PCI=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y -- cgit v0.10.2 From 3791c3174696d0f1bf22bdc87e8b168c156d1e55 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 May 2017 08:15:03 -0300 Subject: mx6sabresd: Update the config file Only configs/mx6sabresd_defconfig is supported now, so update the MAINTAINERS file accordingly. Signed-off-by: Fabio Estevam diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index add2314..9575261 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -3,6 +3,4 @@ M: Fabio Estevam S: Maintained F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h -F: configs/mx6dlsabresd_defconfig -F: configs/mx6qsabresd_defconfig -F: configs/mx6sabresd_spl_defconfig +F: configs/mx6sabresd_defconfig -- cgit v0.10.2 From 54d63bb1ad4fbf95e7136a4fef819e4631adbc39 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 May 2017 08:15:04 -0300 Subject: mx6sabresd: Update to SPL only mode mx6sabresd only supports SPL mode now, so update the README file accordingly. Signed-off-by: Fabio Estevam diff --git a/board/freescale/mx6sabresd/README b/board/freescale/mx6sabresd/README index bc0c0d0..4b4df06 100644 --- a/board/freescale/mx6sabresd/README +++ b/board/freescale/mx6sabresd/README @@ -1,56 +1,47 @@ -How to use and build U-Boot on mx6sabresd: ----------------------------------- - -Currently there are four methods for booting mx6sabresd boards: +How to use and build U-Boot on mx6sabresd +----------------------------------------- -1. Booting from SD card via normal U-Boot (u-boot.imx) +The following methods can be used for booting mx6sabresd boards: -2. Booting from eMMC via normal U-Boot +1. Booting from SD card -3. Booting via SPL (SPL and u-boot.img) +2. Booting from eMMC -4. Booting via Falcon mode (SPL launches the kernel directly) +3. Booting via Falcon mode (SPL launches the kernel directly) -1. Booting from SD card via normal U-Boot ------------------------------------------ +1. Booting from SD card via SPL +------------------------------- -$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) +mx6sabresd_defconfig target supports mx6q/mx6dl/mx6qp sabresd variants. -or +In order to build it: -$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make mx6sabresd_defconfig $ make -This will generate the image called u-boot.imx. +This will generate the SPL and u-boot.img binaries. -- Flash the u-boot.imx binary into the SD card: +- Flash the SPL binary into the SD card: -$ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync +- Flash the u-boot.img binary into the SD card: -2. Booting from eMMC via normal U-Boot --------------------------------------- +$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync -$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) -or +2. Booting from eMMC +-------------------- -$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make mx6sabresd_defconfig $ make -This will generate the image called u-boot.imx. - -- Flash the u-boot.imx binary into the eMMC: - -Set SW6 to download mode: 00001100 +This will generate the SPL and u-boot.img binaries. -Plug a usb cable to USB-OTG and load the u-boot image using the imx_usb_loader -tool (https://github.com/boundarydevices/imx_usb_loader): - -$ sudo ./imx_usb u-boot.imx +- Boot first from SD card as shown in the previous section In U-boot change the eMMC partition config: @@ -60,48 +51,29 @@ Mount the eMMC in the host PC: => ums 0 mmc 2 -Flash the u-boot.imx binary +- Flash SPL and u-boot.img binaries into the eMMC: -$ sudo dd if=u-boot.imx of=/dev/sdX bs=1K seek=1 && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync +$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync Set SW6 to eMMC 8-bit boot: 11010110 -3. Booting via SPL ------------------- - -Other method for building U-Boot on mx6qsabresd and mx6qpsabresd is -through SPL. In order to do so: - -$ make mx6sabresd_spl_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot.img. - -- Flash the SPL image into the SD card: - -$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync - -- Flash the u-boot.img image into the SD card: - -$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 && sync - - -4. Booting via Falcon mode +3. Booting via Falcon mode -------------------------- -$ make mx6sabresd_spl_defconfig +$ make mx6sabresd_defconfig $ make This will generate the SPL image called SPL and the u-boot.img. - Flash the SPL image into the SD card: -$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 oflag=sync status=none && sync - Flash the u-boot.img image into the SD card: -$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 oflag=sync status=none && sync +$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none && sync Create a partition for root file system and extract it there: -- cgit v0.10.2 From 65496a34835cb4c9547bd02dd15b018c333add9d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 22 Jun 2017 10:50:05 -0300 Subject: mx6: soc: Fix typo in temperature unit name The correct name is 'Celsius', so fix it accordingly. Signed-off-by: Fabio Estevam diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index dd94797..2bedbdb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -158,7 +158,7 @@ u32 get_cpu_speed_grade_hz(void) * OCOTP_MEM0[7:6] (see Fusemap Description Table offset 0x480) * defines a 2-bit Temperature Grade * - * return temperature grade and min/max temperature in celcius + * return temperature grade and min/max temperature in Celsius */ #define OCOTP_MEM0_TEMP_SHIFT 6 -- cgit v0.10.2