From 264eaa0ea967bac32214b87d60cfc86c8b22cac6 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 4 May 2011 01:47:33 +0000 Subject: keymile boards: move keymile specific header in subdir Collect all keymile specific common headers in include/configs/km. Signed-off-by: Heiko Schocher Signed-off-by: Valentin Longchamp cc: Wolfgang Denk cc: Detlev Zundel cc: Prafulla Wadaskar cc: Kim Phillips cc: Holger Brunck diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h deleted file mode 100644 index e91f6c7..0000000 --- a/include/configs/keymile-common.h +++ /dev/null @@ -1,456 +0,0 @@ -/* - * (C) Copyright 2008-2011 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_KEYMILE_H -#define __CONFIG_KEYMILE_H - -/* Do boardspecific init for all boards */ -#define CONFIG_BOARD_EARLY_INIT_R -#define CONFIG_LAST_STAGE_INIT - -#define CONFIG_BOOTCOUNT_LIMIT - -/* - * By default kwbimage.cfg from board specific folder is used - * If for some board, different configuration file need to be used, - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file - */ -#ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg -#endif /* CONFIG_SYS_KWD_CONFIG */ - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_I2C -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MTDPARTS -#define CONFIG_CMD_SETEXPR - -#undef CONFIG_WATCHDOG /* disable platform specific watchdog */ - -#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ -#undef CONFIG_BOOTARGS /* the boot command will set bootargs */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - -#define CONFIG_HUSH_INIT_VAR - -#define CONFIG_SYS_ALT_MEMTEST /* memory test, takes time */ - -#define CONFIG_SYS_HZ 1000 /* decr. freq: 1 ms ticks */ - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } - -#define CONFIG_LOADS_ECHO -#define CONFIG_SYS_LOADS_BAUD_CHANGE -#define CONFIG_SYS_BOARD_DRAM_INIT /* Used board specific dram_init */ - -/* - * How to get access to the slot ID. Put this here to make it easy - * to modify in a centralized location. This is used in the HDLC - * driver to set the MAC. -*/ -#define CONFIG_CHECK_ETHERNET_PRESENT -#define CONFIG_SYS_SLOT_ID_BASE CONFIG_SYS_KMBEC_FPGA_BASE -#define CONFIG_SYS_SLOT_ID_OFF (0x07) /* register offset */ -#define CONFIG_SYS_SLOT_ID_MASK (0x3f) /* mask for slot ID bits */ - -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS 1 -#define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_I2C_MUX - -/* EEprom support */ -#define CONFIG_SYS_I2C_MULTI_EEPROMS -#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 - -/* Support the IVM EEprom */ -#define CONFIG_SYS_IVM_EEPROM_ADR 0x50 -#define CONFIG_SYS_IVM_EEPROM_MAX_LEN 0x400 -#define CONFIG_SYS_IVM_EEPROM_PAGE_LEN 0x100 - -#define CONFIG_SYS_FLASH_PROTECTION - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) - -/* UBI Support for all Keymile boards */ -#define CONFIG_CMD_UBI -#define CONFIG_RBTREE -#define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_CONCAT - -/* common powerpc specific env settings */ -#ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS -#define CONFIG_KM_DEF_ENV_BOOTPARAMS \ - "bootparams=empty\0" \ - "initial_boot_bank=0\0" -#endif - -#ifndef CONFIG_KM_DEF_NETDEV -#define CONFIG_KM_DEF_NETDEV \ - "netdev=eth0\0" -#endif - -#ifndef CONFIG_KM_UBI_PARTITION_NAME -#define CONFIG_KM_UBI_PARTITION_NAME "ubi0" -#endif -#ifndef CONFIG_KM_UBI_LINUX_MTD_NAME -#define CONFIG_KM_UBI_LINUX_MTD_NAME "ubi0" -#endif - -#define xstr(s) str(s) -#define str(s) #s - -/* - * bootrunner - * - run all commands in 'subbootcmds' - * - on error, stop running the remaing commands - */ -#define CONFIG_KM_DEF_ENV_BOOTRUNNER \ - "bootrunner=" \ - "break=0; " \ - "for subbootcmd in ${subbootcmds}; do " \ - "if test ${break} -eq 0; then; " \ - "echo \"[INFO] running \\c\"; " \ - "print ${subbootcmd}; " \ - "run ${subbootcmd} || break=1; " \ - "if test ${break} -eq 1; then; " \ - "echo \"[ERR] failed \\c\"; " \ - "print ${subbootcmd}; " \ - "fi; " \ - "fi; " \ - "done\0" \ - "" - -/* - * boottargets - * - set 'subbootcmds' for the bootrunner - * - set 'bootcmd' and 'altbootcmd' - * available targets: - * - 'release': for a standalone system kernel/rootfs from flash - * - 'develop': for development kernel(tftp)/rootfs(NFS) - * - 'ramfs': rootfilesystem in RAM kernel(tftp)/rootfs(RAM) - * - * - 'commonargs': bootargs common to all targets - */ -#define CONFIG_KM_DEF_ENV_BOOTTARGETS \ - "commonargs=" \ - "addip " \ - "addtty " \ - "addmem " \ - "addinit " \ - "addvar " \ - "addmtdparts " \ - "addbootcount " \ - "\0" \ - "develop=" \ - "setenv subbootcmds \"" \ - "tftpfdt tftpkernel " \ - "nfsargs ${commonargs} " \ - "printbootargs boot " \ - "\" && " \ - "setenv bootcmd \'" \ - "run bootrunner" \ - "\' && " \ - "setenv altbootcmd \'" \ - "run bootcmd" \ - "\' && " \ - "run setboardid && " \ - "saveenv && " \ - "reset\0" \ - "ramfs=" \ - "setenv actual_bank -1 && " \ - "setenv subbootcmds \"" \ - "tftpfdt tftpkernel " \ - "setrootfsaddr tftpramfs " \ - "flashargs ${commonargs} " \ - "addpanic addramfs " \ - "printbootargs boot " \ - "\" && " \ - "setenv bootcmd \'" \ - "run bootrunner" \ - "\' && " \ - "setenv altbootcmd \'" \ - "run bootcmd" \ - "\' && " \ - "run setboardid && " \ - "run setramfspram && " \ - "saveenv && " \ - "reset\0" \ - "release=" \ - "setenv actual_bank ${initial_boot_bank} && " \ - "setenv subbootcmds \"" \ - "checkboardidlist " \ - "checkboardid " \ - "ubiattach ubicopy " \ - "cramfsloadfdt cramfsloadkernel " \ - "flashargs ${commonargs} " \ - "addpanic " \ - "printbootargs boot " \ - "\" && " \ - "setenv bootcmd \'" \ - "run actual bootrunner; reset" \ - "\' && " \ - "setenv altbootcmd \'" \ - "run backup bootrunner; reset" \ - "\' && " \ - "saveenv && " \ - "reset\0" \ - "" - -/* - * bootargs - * - modify 'bootargs' - * - * - 'addip': add ip configuration - * - 'addmem': limit kernel memory mem= - * - 'addpanic': add kernel panic options - * - 'addramfs': add phram device for the rootfilesysten in ram - * - 'addtty': add console=... - * - 'addvar': add phram device for /var - * - 'nfsargs': default arguments for nfs boot - * - 'flashargs': defaults arguments for flash base boot - * - * processor specific settings - * - 'addbootcount': add boot counter - * - 'addmtdparts': add mtd partition information - */ -#define CONFIG_KM_DEF_ENV_BOOTARGS \ - "addinit=" \ - "setenv bootargs ${bootargs} init=${init}\0" \ - "addip=" \ - "setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off\0" \ - "addmem=" \ - "setenv bootargs ${bootargs} mem=0x${pnvramaddr}\0" \ - "addpanic=" \ - "setenv bootargs ${bootargs} " \ - "panic=1 panic_on_oops=1\0" \ - "addramfs=" \ - "setenv bootargs \"" \ - "${bootargs} phram.phram=" \ - "rootfs${boot_bank},${rootfsaddr},${rootfssize}\"\0" \ - "addtty=" \ - "setenv bootargs ${bootargs}" \ - " console=" CONFIG_KM_CONSOLE_TTY ",${baudrate}\0" \ - "addvar=" \ - "setenv bootargs ${bootargs} phram.phram=phvar," \ - "${varaddr},0x" xstr(CONFIG_KM_PHRAM) "\0" \ - "nfsargs=" \ - "setenv bootargs " \ - "ubi.mtd=" CONFIG_KM_UBI_LINUX_MTD_NAME " " \ - "root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "flashargs=" \ - "setenv bootargs " \ - "ubi.mtd=" CONFIG_KM_UBI_LINUX_MTD_NAME " " \ - "root=mtdblock:rootfs${boot_bank} " \ - "rootfstype=squashfs ro\0" \ - "" - -/* - * compute_addr - * - compute addresses and sizes - * - addresses are calculated form the end of memory 'memsize' - * - * - 'setramfspram': compute PRAM size for ramfs target - * - 'setrootfsaddr': compute rootfilesystem address for phram - */ -#define CONFIG_KM_DEF_ENV_COMPUTE_ADDR \ - "setboardid=" \ - "if test \"x${boardId}\" = \"x\"; then; " \ - "setenv boardId ${IVM_BoardId} && " \ - "setenv hwKey ${IVM_HWKey}; " \ - "else; " \ - "echo \\\\c; " \ - "fi\0" \ - "setramfspram=" \ - "setexpr value ${rootfssize} / 0x400 && " \ - "setexpr value 0x${value} + ${pram} && " \ - "setenv pram 0x${value}\0" \ - "setrootfsaddr=" \ - "setexpr value ${pnvramaddr} - ${rootfssize} && " \ - "setenv rootfsaddr 0x${value}\0" \ - "" - -/* - * flash_boot - * - commands for booting from flash - * - * - 'cramfsaddr': address to the cramfs (in ram) - * - 'cramfsloadkernel': copy kernel from a cramfs to ram - * - 'ubiattach': attach ubi partition - * - 'ubicopy': copy ubi volume to ram - * - volume names: bootfs0, bootfs1, bootfs2, ... - * - 'ubiparition': mtd parition name for ubi - * - * processor specific settings - * - 'cramfsloadfdt': copy fdt from a cramfs to ram - */ -#define CONFIG_KM_DEF_ENV_FLASH_BOOT \ - "cramfsaddr="xstr(CONFIG_KM_CRAMFS_ADDR) "\0" \ - "cramfsloadkernel=" \ - "cramfsload ${kernel_addr_r} uImage && " \ - "setenv actual_kernel_addr ${kernel_addr_r}\0" \ - "ubiattach=ubi part ${ubipartition}\0" \ - "ubicopy=ubi read ${cramfsaddr} bootfs${boot_bank}\0" \ - "ubipartition=" CONFIG_KM_UBI_PARTITION_NAME "\0" \ - "" - -/* - * net_boot - * - commands for booting over the network - * - * - 'tftpkernel': load a kernel with tftp into ram - * - 'tftpramfs': load rootfs with tftp into ram - * - * processor specific settings - * - 'tftpfdt': load fdt with tftp into ram - */ -#define CONFIG_KM_DEF_ENV_NET_BOOT \ - "tftpkernel=" \ - "tftpboot ${kernel_addr_r} ${kernel_file} && " \ - "setenv actual_kernel_addr ${kernel_addr_r}\0" \ - "tftpramfs=" \ - "tftpboot ${rootfsaddr} \"\\\"${rootfsfile}\\\"\" && " \ - "setenv loadaddr\0" \ - "" - -/* - * constants - * - KM specific constants and commands - * - * - 'default': setup default environment - */ -#define CONFIG_KM_DEF_ENV_CONSTANTS \ - "actual=setenv boot_bank ${actual_bank}\0" \ - "backup=setenv boot_bank ${backup_bank}\0" \ - "actual_bank=${initial_boot_bank}\0" \ - "backup_bank=0\0" \ - "default=" \ - "setenv default 'run newenv; reset' && " \ - "run release && saveenv; reset\0" \ - "checkboardidlist=" \ - "if test \"x${boardIdListHex}\" != \"x\"; then " \ - "IVMbidhwk=${IVM_BoardId}_${IVM_HWKey}; " \ - "found=0; " \ - "for bidhwk in \"${boardIdListHex}\"; do " \ - "echo trying $bidhwk ...; " \ - "if test \"x$bidhwk\" = \"x$IVMbidhwk\"; then " \ - "found=1; " \ - "echo match found for $bidhwk; " \ - "if test \"x$bidhwk\" != \"x${boardId}_${hwKey}\";then "\ - "setenv boardid ${IVM_BoardId}; " \ - "setenv boardId ${IVM_BoardId}; " \ - "setenv hwkey ${IVM_HWKey}; " \ - "setenv hwKey ${IVM_HWKey}; " \ - "echo \"boardId set to ${boardId}\"; " \ - "echo \"hwKey set to ${hwKey}\"; " \ - "saveenv; " \ - "fi; " \ - "fi; " \ - "done; " \ - "else " \ - "echo \"boardIdListHex not set, not checked\"; "\ - "found=1; " \ - "fi; " \ - "test \"$found\" = 1 \0" \ - "checkboardid=" \ - "test \"x${boardId}\" = \"x${IVM_BoardId}\" && " \ - "test \"x${hwKey}\" = \"x${IVM_HWKey}\"\0" \ - "printbootargs=print bootargs\0" \ - "rootfsfile="xstr(CONFIG_HOSTNAME) "/rootfsImage\0" \ - "" - -#ifndef CONFIG_KM_DEF_ENV -#define CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ENV_BOOTPARAMS \ - CONFIG_KM_DEF_NETDEV \ - CONFIG_KM_DEF_ENV_CPU \ - CONFIG_KM_DEF_ENV_BOOTRUNNER \ - CONFIG_KM_DEF_ENV_BOOTTARGETS \ - CONFIG_KM_DEF_ENV_BOOTARGS \ - CONFIG_KM_DEF_ENV_COMPUTE_ADDR \ - CONFIG_KM_DEF_ENV_FLASH_BOOT \ - CONFIG_KM_DEF_ENV_NET_BOOT \ - CONFIG_KM_DEF_ENV_CONSTANTS \ - "altbootcmd=run bootcmd\0" \ - "bootcmd=run default\0" \ - "bootlimit=2\0" \ - "init=/sbin/init-overlay.sh\0" \ - "kernel_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ - "kernel_file="xstr(CONFIG_HOSTNAME) "/uImage\0" \ - "kernel_name=uImage\0" \ - "load=tftpboot ${u-boot_addr_r} ${u-boot}\0" \ - "mtdids=" MTDIDS_DEFAULT "\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ - "stderr=serial\0" \ - "stdin=serial\0" \ - "stdout=serial\0" \ - "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ - "u-boot_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ - "" -#endif /* CONFIG_KM_DEF_ENV */ - -#define CONFIG_VERSION_VARIABLE /* include version env variable */ - -#endif /* __CONFIG_KEYMILE_H */ diff --git a/include/configs/km-powerpc.h b/include/configs/km-powerpc.h deleted file mode 100644 index 3351609..0000000 --- a/include/configs/km-powerpc.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * (C) Copyright 2011 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_KEYMILE_POWERPC_H -#define __CONFIG_KEYMILE_POWERPC_H - -#define CONFIG_BOOTCOUNT_LIMIT - -#define CONFIG_CMD_DTT -#define CONFIG_JFFS2_CMDLINE - -#define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */ -#define CONFIG_FLASH_CFI_MTD - -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ - -#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -/****************************************************************************** - * (PRAM usage) - * ... ------------------------------------------------------- - * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM - * ... |<------------------- pram -------------------------->| - * ... ------------------------------------------------------- - * @END_OF_RAM: - * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose - * @CONFIG_KM_PHRAM: address for /var - * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM - */ - -/* size of rootfs in RAM */ -#define CONFIG_KM_ROOTFSSIZE 0x0 -/* pseudo-non volatile RAM [hex] */ -#define CONFIG_KM_PNVRAM 0x80000 -/* physical RAM MTD size [hex] */ -#define CONFIG_KM_PHRAM 0x100000 -/* resereved pram area at the end of memroy [hex] */ -#define CONFIG_KM_RESERVED_PRAM 0x0 -/* enable protected RAM */ -#define CONFIG_PRAM 0 - -#define CONFIG_KM_CRAMFS_ADDR 0x800000 -#define CONFIG_KM_KERNEL_ADDR 0x400000 /* 3968Kbytes */ -#define CONFIG_KM_FDT_ADDR 0x7E0000 /* 128Kbytes */ - -#define CONFIG_KM_DEF_ENV_CPU \ - "addbootcount=echo \\\\c\0" \ - "addmtdparts=echo \\\\c\0" \ - "boot=bootm ${actual_kernel_addr} - ${actual_fdt_addr}\0" \ - "cramfsloadfdt=" \ - "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb && " \ - "setenv actual_fdt_addr ${fdt_addr_r}\0" \ - "fdt_addr_r=" xstr(CONFIG_KM_FDT_ADDR) "\0" \ - "fdt_file=" \ - xstr(CONFIG_HOSTNAME) "/" \ - xstr(CONFIG_HOSTNAME) ".dtb\0" \ - "tftpfdt=" \ - "tftpboot ${fdt_addr_r} ${fdt_file} && " \ - "setenv actual_fdt_addr ${fdt_addr_r} \0" \ - "update=" \ - "protect off " xstr(BOOTFLASH_START) " +${filesize} && "\ - "erase " xstr(BOOTFLASH_START) " +${filesize} && " \ - "cp.b ${u-boot_addr_r} " xstr(BOOTFLASH_START) \ - " ${filesize} && " \ - "protect on " xstr(BOOTFLASH_START) " +${filesize}\0" \ - "" - -#endif /* __CONFIG_KEYMILE_POWERPC_H */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h new file mode 100644 index 0000000..e91f6c7 --- /dev/null +++ b/include/configs/km/keymile-common.h @@ -0,0 +1,456 @@ +/* + * (C) Copyright 2008-2011 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_KEYMILE_H +#define __CONFIG_KEYMILE_H + +/* Do boardspecific init for all boards */ +#define CONFIG_BOARD_EARLY_INIT_R +#define CONFIG_LAST_STAGE_INIT + +#define CONFIG_BOOTCOUNT_LIMIT + +/* + * By default kwbimage.cfg from board specific folder is used + * If for some board, different configuration file need to be used, + * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file + */ +#ifndef CONFIG_SYS_KWD_CONFIG +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg +#endif /* CONFIG_SYS_KWD_CONFIG */ + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_SETEXPR + +#undef CONFIG_WATCHDOG /* disable platform specific watchdog */ + +#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ +#undef CONFIG_BOOTARGS /* the boot command will set bootargs */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE + +#define CONFIG_HUSH_INIT_VAR + +#define CONFIG_SYS_ALT_MEMTEST /* memory test, takes time */ + +#define CONFIG_SYS_HZ 1000 /* decr. freq: 1 ms ticks */ + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +#define CONFIG_LOADS_ECHO +#define CONFIG_SYS_LOADS_BAUD_CHANGE +#define CONFIG_SYS_BOARD_DRAM_INIT /* Used board specific dram_init */ + +/* + * How to get access to the slot ID. Put this here to make it easy + * to modify in a centralized location. This is used in the HDLC + * driver to set the MAC. +*/ +#define CONFIG_CHECK_ETHERNET_PRESENT +#define CONFIG_SYS_SLOT_ID_BASE CONFIG_SYS_KMBEC_FPGA_BASE +#define CONFIG_SYS_SLOT_ID_OFF (0x07) /* register offset */ +#define CONFIG_SYS_SLOT_ID_MASK (0x3f) /* mask for slot ID bits */ + +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_MAX_I2C_BUS 1 +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_I2C_MUX + +/* EEprom support */ +#define CONFIG_SYS_I2C_MULTI_EEPROMS +#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 + +/* Support the IVM EEprom */ +#define CONFIG_SYS_IVM_EEPROM_ADR 0x50 +#define CONFIG_SYS_IVM_EEPROM_MAX_LEN 0x400 +#define CONFIG_SYS_IVM_EEPROM_PAGE_LEN 0x100 + +#define CONFIG_SYS_FLASH_PROTECTION + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) + +/* UBI Support for all Keymile boards */ +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_CONCAT + +/* common powerpc specific env settings */ +#ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS +#define CONFIG_KM_DEF_ENV_BOOTPARAMS \ + "bootparams=empty\0" \ + "initial_boot_bank=0\0" +#endif + +#ifndef CONFIG_KM_DEF_NETDEV +#define CONFIG_KM_DEF_NETDEV \ + "netdev=eth0\0" +#endif + +#ifndef CONFIG_KM_UBI_PARTITION_NAME +#define CONFIG_KM_UBI_PARTITION_NAME "ubi0" +#endif +#ifndef CONFIG_KM_UBI_LINUX_MTD_NAME +#define CONFIG_KM_UBI_LINUX_MTD_NAME "ubi0" +#endif + +#define xstr(s) str(s) +#define str(s) #s + +/* + * bootrunner + * - run all commands in 'subbootcmds' + * - on error, stop running the remaing commands + */ +#define CONFIG_KM_DEF_ENV_BOOTRUNNER \ + "bootrunner=" \ + "break=0; " \ + "for subbootcmd in ${subbootcmds}; do " \ + "if test ${break} -eq 0; then; " \ + "echo \"[INFO] running \\c\"; " \ + "print ${subbootcmd}; " \ + "run ${subbootcmd} || break=1; " \ + "if test ${break} -eq 1; then; " \ + "echo \"[ERR] failed \\c\"; " \ + "print ${subbootcmd}; " \ + "fi; " \ + "fi; " \ + "done\0" \ + "" + +/* + * boottargets + * - set 'subbootcmds' for the bootrunner + * - set 'bootcmd' and 'altbootcmd' + * available targets: + * - 'release': for a standalone system kernel/rootfs from flash + * - 'develop': for development kernel(tftp)/rootfs(NFS) + * - 'ramfs': rootfilesystem in RAM kernel(tftp)/rootfs(RAM) + * + * - 'commonargs': bootargs common to all targets + */ +#define CONFIG_KM_DEF_ENV_BOOTTARGETS \ + "commonargs=" \ + "addip " \ + "addtty " \ + "addmem " \ + "addinit " \ + "addvar " \ + "addmtdparts " \ + "addbootcount " \ + "\0" \ + "develop=" \ + "setenv subbootcmds \"" \ + "tftpfdt tftpkernel " \ + "nfsargs ${commonargs} " \ + "printbootargs boot " \ + "\" && " \ + "setenv bootcmd \'" \ + "run bootrunner" \ + "\' && " \ + "setenv altbootcmd \'" \ + "run bootcmd" \ + "\' && " \ + "run setboardid && " \ + "saveenv && " \ + "reset\0" \ + "ramfs=" \ + "setenv actual_bank -1 && " \ + "setenv subbootcmds \"" \ + "tftpfdt tftpkernel " \ + "setrootfsaddr tftpramfs " \ + "flashargs ${commonargs} " \ + "addpanic addramfs " \ + "printbootargs boot " \ + "\" && " \ + "setenv bootcmd \'" \ + "run bootrunner" \ + "\' && " \ + "setenv altbootcmd \'" \ + "run bootcmd" \ + "\' && " \ + "run setboardid && " \ + "run setramfspram && " \ + "saveenv && " \ + "reset\0" \ + "release=" \ + "setenv actual_bank ${initial_boot_bank} && " \ + "setenv subbootcmds \"" \ + "checkboardidlist " \ + "checkboardid " \ + "ubiattach ubicopy " \ + "cramfsloadfdt cramfsloadkernel " \ + "flashargs ${commonargs} " \ + "addpanic " \ + "printbootargs boot " \ + "\" && " \ + "setenv bootcmd \'" \ + "run actual bootrunner; reset" \ + "\' && " \ + "setenv altbootcmd \'" \ + "run backup bootrunner; reset" \ + "\' && " \ + "saveenv && " \ + "reset\0" \ + "" + +/* + * bootargs + * - modify 'bootargs' + * + * - 'addip': add ip configuration + * - 'addmem': limit kernel memory mem= + * - 'addpanic': add kernel panic options + * - 'addramfs': add phram device for the rootfilesysten in ram + * - 'addtty': add console=... + * - 'addvar': add phram device for /var + * - 'nfsargs': default arguments for nfs boot + * - 'flashargs': defaults arguments for flash base boot + * + * processor specific settings + * - 'addbootcount': add boot counter + * - 'addmtdparts': add mtd partition information + */ +#define CONFIG_KM_DEF_ENV_BOOTARGS \ + "addinit=" \ + "setenv bootargs ${bootargs} init=${init}\0" \ + "addip=" \ + "setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off\0" \ + "addmem=" \ + "setenv bootargs ${bootargs} mem=0x${pnvramaddr}\0" \ + "addpanic=" \ + "setenv bootargs ${bootargs} " \ + "panic=1 panic_on_oops=1\0" \ + "addramfs=" \ + "setenv bootargs \"" \ + "${bootargs} phram.phram=" \ + "rootfs${boot_bank},${rootfsaddr},${rootfssize}\"\0" \ + "addtty=" \ + "setenv bootargs ${bootargs}" \ + " console=" CONFIG_KM_CONSOLE_TTY ",${baudrate}\0" \ + "addvar=" \ + "setenv bootargs ${bootargs} phram.phram=phvar," \ + "${varaddr},0x" xstr(CONFIG_KM_PHRAM) "\0" \ + "nfsargs=" \ + "setenv bootargs " \ + "ubi.mtd=" CONFIG_KM_UBI_LINUX_MTD_NAME " " \ + "root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "flashargs=" \ + "setenv bootargs " \ + "ubi.mtd=" CONFIG_KM_UBI_LINUX_MTD_NAME " " \ + "root=mtdblock:rootfs${boot_bank} " \ + "rootfstype=squashfs ro\0" \ + "" + +/* + * compute_addr + * - compute addresses and sizes + * - addresses are calculated form the end of memory 'memsize' + * + * - 'setramfspram': compute PRAM size for ramfs target + * - 'setrootfsaddr': compute rootfilesystem address for phram + */ +#define CONFIG_KM_DEF_ENV_COMPUTE_ADDR \ + "setboardid=" \ + "if test \"x${boardId}\" = \"x\"; then; " \ + "setenv boardId ${IVM_BoardId} && " \ + "setenv hwKey ${IVM_HWKey}; " \ + "else; " \ + "echo \\\\c; " \ + "fi\0" \ + "setramfspram=" \ + "setexpr value ${rootfssize} / 0x400 && " \ + "setexpr value 0x${value} + ${pram} && " \ + "setenv pram 0x${value}\0" \ + "setrootfsaddr=" \ + "setexpr value ${pnvramaddr} - ${rootfssize} && " \ + "setenv rootfsaddr 0x${value}\0" \ + "" + +/* + * flash_boot + * - commands for booting from flash + * + * - 'cramfsaddr': address to the cramfs (in ram) + * - 'cramfsloadkernel': copy kernel from a cramfs to ram + * - 'ubiattach': attach ubi partition + * - 'ubicopy': copy ubi volume to ram + * - volume names: bootfs0, bootfs1, bootfs2, ... + * - 'ubiparition': mtd parition name for ubi + * + * processor specific settings + * - 'cramfsloadfdt': copy fdt from a cramfs to ram + */ +#define CONFIG_KM_DEF_ENV_FLASH_BOOT \ + "cramfsaddr="xstr(CONFIG_KM_CRAMFS_ADDR) "\0" \ + "cramfsloadkernel=" \ + "cramfsload ${kernel_addr_r} uImage && " \ + "setenv actual_kernel_addr ${kernel_addr_r}\0" \ + "ubiattach=ubi part ${ubipartition}\0" \ + "ubicopy=ubi read ${cramfsaddr} bootfs${boot_bank}\0" \ + "ubipartition=" CONFIG_KM_UBI_PARTITION_NAME "\0" \ + "" + +/* + * net_boot + * - commands for booting over the network + * + * - 'tftpkernel': load a kernel with tftp into ram + * - 'tftpramfs': load rootfs with tftp into ram + * + * processor specific settings + * - 'tftpfdt': load fdt with tftp into ram + */ +#define CONFIG_KM_DEF_ENV_NET_BOOT \ + "tftpkernel=" \ + "tftpboot ${kernel_addr_r} ${kernel_file} && " \ + "setenv actual_kernel_addr ${kernel_addr_r}\0" \ + "tftpramfs=" \ + "tftpboot ${rootfsaddr} \"\\\"${rootfsfile}\\\"\" && " \ + "setenv loadaddr\0" \ + "" + +/* + * constants + * - KM specific constants and commands + * + * - 'default': setup default environment + */ +#define CONFIG_KM_DEF_ENV_CONSTANTS \ + "actual=setenv boot_bank ${actual_bank}\0" \ + "backup=setenv boot_bank ${backup_bank}\0" \ + "actual_bank=${initial_boot_bank}\0" \ + "backup_bank=0\0" \ + "default=" \ + "setenv default 'run newenv; reset' && " \ + "run release && saveenv; reset\0" \ + "checkboardidlist=" \ + "if test \"x${boardIdListHex}\" != \"x\"; then " \ + "IVMbidhwk=${IVM_BoardId}_${IVM_HWKey}; " \ + "found=0; " \ + "for bidhwk in \"${boardIdListHex}\"; do " \ + "echo trying $bidhwk ...; " \ + "if test \"x$bidhwk\" = \"x$IVMbidhwk\"; then " \ + "found=1; " \ + "echo match found for $bidhwk; " \ + "if test \"x$bidhwk\" != \"x${boardId}_${hwKey}\";then "\ + "setenv boardid ${IVM_BoardId}; " \ + "setenv boardId ${IVM_BoardId}; " \ + "setenv hwkey ${IVM_HWKey}; " \ + "setenv hwKey ${IVM_HWKey}; " \ + "echo \"boardId set to ${boardId}\"; " \ + "echo \"hwKey set to ${hwKey}\"; " \ + "saveenv; " \ + "fi; " \ + "fi; " \ + "done; " \ + "else " \ + "echo \"boardIdListHex not set, not checked\"; "\ + "found=1; " \ + "fi; " \ + "test \"$found\" = 1 \0" \ + "checkboardid=" \ + "test \"x${boardId}\" = \"x${IVM_BoardId}\" && " \ + "test \"x${hwKey}\" = \"x${IVM_HWKey}\"\0" \ + "printbootargs=print bootargs\0" \ + "rootfsfile="xstr(CONFIG_HOSTNAME) "/rootfsImage\0" \ + "" + +#ifndef CONFIG_KM_DEF_ENV +#define CONFIG_KM_DEF_ENV \ + CONFIG_KM_DEF_ENV_BOOTPARAMS \ + CONFIG_KM_DEF_NETDEV \ + CONFIG_KM_DEF_ENV_CPU \ + CONFIG_KM_DEF_ENV_BOOTRUNNER \ + CONFIG_KM_DEF_ENV_BOOTTARGETS \ + CONFIG_KM_DEF_ENV_BOOTARGS \ + CONFIG_KM_DEF_ENV_COMPUTE_ADDR \ + CONFIG_KM_DEF_ENV_FLASH_BOOT \ + CONFIG_KM_DEF_ENV_NET_BOOT \ + CONFIG_KM_DEF_ENV_CONSTANTS \ + "altbootcmd=run bootcmd\0" \ + "bootcmd=run default\0" \ + "bootlimit=2\0" \ + "init=/sbin/init-overlay.sh\0" \ + "kernel_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ + "kernel_file="xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "kernel_name=uImage\0" \ + "load=tftpboot ${u-boot_addr_r} ${u-boot}\0" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "stderr=serial\0" \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ + "u-boot_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ + "" +#endif /* CONFIG_KM_DEF_ENV */ + +#define CONFIG_VERSION_VARIABLE /* include version env variable */ + +#endif /* __CONFIG_KEYMILE_H */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h new file mode 100644 index 0000000..3351609 --- /dev/null +++ b/include/configs/km/km-powerpc.h @@ -0,0 +1,92 @@ +/* + * (C) Copyright 2011 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_KEYMILE_POWERPC_H +#define __CONFIG_KEYMILE_POWERPC_H + +#define CONFIG_BOOTCOUNT_LIMIT + +#define CONFIG_CMD_DTT +#define CONFIG_JFFS2_CMDLINE + +#define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */ +#define CONFIG_FLASH_CFI_MTD + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ + +#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ + +/****************************************************************************** + * (PRAM usage) + * ... ------------------------------------------------------- + * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM + * ... |<------------------- pram -------------------------->| + * ... ------------------------------------------------------- + * @END_OF_RAM: + * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose + * @CONFIG_KM_PHRAM: address for /var + * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) + * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM + */ + +/* size of rootfs in RAM */ +#define CONFIG_KM_ROOTFSSIZE 0x0 +/* pseudo-non volatile RAM [hex] */ +#define CONFIG_KM_PNVRAM 0x80000 +/* physical RAM MTD size [hex] */ +#define CONFIG_KM_PHRAM 0x100000 +/* resereved pram area at the end of memroy [hex] */ +#define CONFIG_KM_RESERVED_PRAM 0x0 +/* enable protected RAM */ +#define CONFIG_PRAM 0 + +#define CONFIG_KM_CRAMFS_ADDR 0x800000 +#define CONFIG_KM_KERNEL_ADDR 0x400000 /* 3968Kbytes */ +#define CONFIG_KM_FDT_ADDR 0x7E0000 /* 128Kbytes */ + +#define CONFIG_KM_DEF_ENV_CPU \ + "addbootcount=echo \\\\c\0" \ + "addmtdparts=echo \\\\c\0" \ + "boot=bootm ${actual_kernel_addr} - ${actual_fdt_addr}\0" \ + "cramfsloadfdt=" \ + "cramfsload ${fdt_addr_r} " \ + "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb && " \ + "setenv actual_fdt_addr ${fdt_addr_r}\0" \ + "fdt_addr_r=" xstr(CONFIG_KM_FDT_ADDR) "\0" \ + "fdt_file=" \ + xstr(CONFIG_HOSTNAME) "/" \ + xstr(CONFIG_HOSTNAME) ".dtb\0" \ + "tftpfdt=" \ + "tftpboot ${fdt_addr_r} ${fdt_file} && " \ + "setenv actual_fdt_addr ${fdt_addr_r} \0" \ + "update=" \ + "protect off " xstr(BOOTFLASH_START) " +${filesize} && "\ + "erase " xstr(BOOTFLASH_START) " +${filesize} && " \ + "cp.b ${u-boot_addr_r} " xstr(BOOTFLASH_START) \ + " ${filesize} && " \ + "protect on " xstr(BOOTFLASH_START) " +${filesize}\0" \ + "" + +#endif /* __CONFIG_KEYMILE_POWERPC_H */ diff --git a/include/configs/km/km82xx-common.h b/include/configs/km/km82xx-common.h new file mode 100644 index 0000000..446c1d0 --- /dev/null +++ b/include/configs/km/km82xx-common.h @@ -0,0 +1,311 @@ +/* + * (C) Copyright 2007-2010 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __KM82XX_COMMON +#define __KM82XX_COMMON + +/* + * Select serial console configuration + * + * If either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then + * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4 + * for SCC). + */ +#define CONFIG_CONS_ON_SMC /* Console is on SMC */ +#undef CONFIG_CONS_ON_SCC /* It's not on SCC */ +#undef CONFIG_CONS_NONE /* It's not on external UART */ +#define CONFIG_CONS_INDEX 2 /* SMC2 is used for console */ +#define CONFIG_SYS_SMC_RXBUFLEN 128 +#define CONFIG_SYS_MAXIDLE 10 + +/* + * Select ethernet configuration + * + * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, + * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for + * SCC, 1-3 for FCC) + * + * If CONFIG_ETHER_NONE is defined, then either the ethernet routines + * must be defined elsewhere (as for the console), or CONFIG_CMD_NET + * must be unset. + */ +#define CONFIG_ETHER_ON_SCC /* Ethernet is on SCC */ +#undef CONFIG_ETHER_ON_FCC /* Ethernet is not on FCC */ +#undef CONFIG_ETHER_NONE /* No external Ethernet */ +#define CONFIG_NET_MULTI + +#define CONFIG_ETHER_INDEX 4 +#define CONFIG_HAS_ETH0 +#define CONFIG_SYS_SCC_TOUT_LOOP 10000000 + +#define CONFIG_SYS_CMXSCR_VALUE (CMXSCR_RS4CS_CLK7 | CMXSCR_TS4CS_CLK8) + +#ifndef CONFIG_8260_CLKIN +#define CONFIG_8260_CLKIN 66000000 /* in Hz */ +#endif + +#define BOOTFLASH_START 0xFE000000 + +#define CONFIG_KM_CONSOLE_TTY "ttyCPM0" + +#define MTDPARTS_DEFAULT "mtdparts=" \ + "app:" \ + "768k(u-boot)," \ + "128k(env)," \ + "128k(envred)," \ + "3072k(free)," \ + "-(" CONFIG_KM_UBI_PARTITION_NAME ")" + +/* + * Default environment settings + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_KM_BOARD_EXTRA_ENV \ + CONFIG_KM_DEF_ENV \ + "EEprom_ivm=pca9544a:70:4 \0" \ + "unlock=yes\0" \ + "newenv=" \ + "prot off 0xFE0C0000 +0x40000 && " \ + "era 0xFE0C0000 +0x40000\0" \ + "rootpath=/opt/eldk/ppc_82xx\0" \ + "" + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +#define CONFIG_SYS_RAMBOOT +#endif + +#define CONFIG_SYS_MONITOR_LEN (768 << 10) + +#define CONFIG_ENV_IS_IN_FLASH + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) +#endif /* CONFIG_ENV_IS_IN_FLASH */ + +/* enable I2C and select the hardware/software driver */ +#undef CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed */ +#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ + +/* + * Software (bit-bang) I2C driver configuration + */ + +#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ +#define I2C_ACTIVE (iop->pdir |= 0x00010000) +#define I2C_TRISTATE (iop->pdir &= ~0x00010000) +#define I2C_READ ((iop->pdat & 0x00010000) != 0) +#define I2C_SDA(bit) do { \ + if (bit) \ + iop->pdat |= 0x00010000; \ + else \ + iop->pdat &= ~0x00010000; \ + } while (0) +#define I2C_SCL(bit) do { \ + if (bit) \ + iop->pdat |= 0x00020000; \ + else \ + iop->pdat &= ~0x00020000; \ + } while (0) +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ + +/* I2C SYSMON (LM75, AD7414 is almost compatible) */ +#define CONFIG_DTT_LM75 /* ON Semi's LM75 */ +#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ +#define CONFIG_SYS_DTT_MAX_TEMP 70 +#define CONFIG_SYS_DTT_LOW_TEMP -30 +#define CONFIG_SYS_DTT_HYSTERESIS 3 +#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) + +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + +#define CONFIG_SYS_IMMR 0xF0000000 + +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR +#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* used size in DPRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/* Hard reset configuration word */ +#define CONFIG_SYS_HRCW_MASTER 0x0604b211 + +/* No slaves */ +#define CONFIG_SYS_HRCW_SLAVE1 0 +#define CONFIG_SYS_HRCW_SLAVE2 0 +#define CONFIG_SYS_HRCW_SLAVE3 0 +#define CONFIG_SYS_HRCW_SLAVE4 0 +#define CONFIG_SYS_HRCW_SLAVE5 0 +#define CONFIG_SYS_HRCW_SLAVE6 0 +#define CONFIG_SYS_HRCW_SLAVE7 0 + +/* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */ +#if defined(CONFIG_CMD_KGDB) +# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + +#define CONFIG_SYS_HID0_INIT 0 +#define CONFIG_SYS_HID0_FINAL (HID0_ICE | HID0_IFEM | HID0_ABE) + +#define CONFIG_SYS_HID2 0 + +#define CONFIG_SYS_SIUMCR 0x4020c200 +#define CONFIG_SYS_SYPCR 0xFFFFFF83 +#define CONFIG_SYS_BCR 0x10000000 +#define CONFIG_SYS_SCCR (SCCR_PCI_MODE | SCCR_PCI_MODCK) + +/* + *----------------------------------------------------------------------- + * RMR - Reset Mode Register 5-5 + *----------------------------------------------------------------------- + * turn on Checkstop Reset Enable + */ +#define CONFIG_SYS_RMR 0 + +/* + *----------------------------------------------------------------------- + * TMCNTSC - Time Counter Status and Control 4-40 + *----------------------------------------------------------------------- + * Clear once per Second and Alarm Interrupt Status, Set 32KHz timersclk, + * and enable Time Counter + */ +#define CONFIG_SYS_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR|TMCNTSC_TCF|TMCNTSC_TCE) + +/* + *----------------------------------------------------------------------- + * PISCR - Periodic Interrupt Status and Control 4-42 + *----------------------------------------------------------------------- + * Clear Periodic Interrupt Status, Set 32KHz timersclk, and enable + * Periodic timer + */ +#define CONFIG_SYS_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE) + +/* + *----------------------------------------------------------------------- + * RCCR - RISC Controller Configuration 13-7 + *----------------------------------------------------------------------- + */ +#define CONFIG_SYS_RCCR 0 + +/* + * Init Memory Controller: + * + * Bank Bus Machine PortSz Device + * ---- --- ------- ------ ------ + * 0 60x GPCM 8 bit FLASH + * 1 60x SDRAM 32 bit SDRAM + * 3 60x GPCM 8 bit GPIO/PIGGY + * 5 60x GPCM 16 bit CFG-Flash + * + */ +/* Bank 0 - FLASH + */ +#define CONFIG_SYS_BR0_PRELIM ((CONFIG_SYS_FLASH_BASE & BRx_BA_MSK) |\ + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) + +#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) |\ + ORxG_CSNT |\ + ORxG_ACS_DIV2 |\ + ORxG_SCY_5_CLK |\ + ORxG_TRLX) + +#define CONFIG_SYS_MPTPR 0x1800 + +/* + *----------------------------------------------------------------------------- + * Address for Mode Register Set (MRS) command + *----------------------------------------------------------------------------- + */ +#define CONFIG_SYS_MRS_OFFS 0x00000110 +#define CONFIG_SYS_PSRT 0x0e + +#define CONFIG_SYS_BR1_PRELIM ((CONFIG_SYS_SDRAM_BASE & BRx_BA_MSK) |\ + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) + +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR1 + +/* + * UPIO FPGA (GPIO/PIGGY) on CS3 initialization values + */ +#define CONFIG_SYS_KMBEC_FPGA_BASE 0x30000000 +#define CONFIG_SYS_KMBEC_FPGA_SIZE 128 + +#define CONFIG_SYS_BR3_PRELIM ((CONFIG_SYS_KMBEC_FPGA_BASE & BRx_BA_MSK) |\ + BRx_PS_8 | BRx_MS_GPCM_P | BRx_V) + +#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_3_CLK | ORxG_TRLX) + +/* + * BFTICU board FPGA on CS4 initialization values + */ +#define CONFIG_SYS_FPGA_BASE 0x40000000 +#define CONFIG_SYS_FPGA_SIZE 1 /*1KB*/ + +#define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_FPGA_BASE & BRx_BA_MSK) |\ + BRx_PS_8 | BRx_MS_GPCM_P | BRx_V) + +#define CONFIG_SYS_OR4_PRELIM (P2SZ_TO_AM(CONFIG_SYS_FPGA_SIZE << 10) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_3_CLK | ORxG_TRLX) + +/* + * CFG-Flash on CS5 initialization values + */ +#define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_FLASH_BASE_1 & BRx_BA_MSK) |\ + BRx_PS_16 | BRx_MS_GPCM_P | BRx_V) + +#define CONFIG_SYS_OR5_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE_1 + \ + CONFIG_SYS_FLASH_SIZE_2) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_5_CLK | ORxG_TRLX) + +#define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */ + +/* pass open firmware flat tree */ +#define CONFIG_FIT 1 +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc/cpm/serial@11a90" + +#endif /* __KM82XX_COMMON */ diff --git a/include/configs/km/km8321-common.h b/include/configs/km/km8321-common.h new file mode 100644 index 0000000..6fab45e --- /dev/null +++ b/include/configs/km/km8321-common.h @@ -0,0 +1,137 @@ +/* + * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Dave Liu + * + * Copyright (C) 2007 Logic Product Development, Inc. + * Peter Barada + * + * Copyright (C) 2007 MontaVista Software, Inc. + * Anton Vorontsov + * + * (C) Copyright 2008 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * (C) Copyright 2010 + * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com + * + * (C) Copyright 2010-2011 + * Thomas Reufer, KEYMILE Ltd, thomas.reufer@keymile.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef __CONFIG_KM8321_COMMON_H +#define __CONFIG_KM8321_COMMON_H + +/* + * High Level Configuration Options + */ +#define CONFIG_QE /* Has QE */ +#define CONFIG_MPC832x /* MPC832x CPU specific */ +#define CONFIG_KM8321 /* Keymile PBEC8321 board specific */ + +#define CONFIG_KM_DEF_ROOTPATH \ + "rootpath=/opt/eldk/ppc_8xx\0" + +/* include common defines/options for all 83xx Keymile boards */ +#include "km83xx-common.h" + +#define CONFIG_MISC_INIT_R + +/* + * System IO Config + */ +#define CONFIG_SYS_SICRL SICRL_IRQ_CKS + +/* + * Hardware Reset Configuration Word + */ +#define CONFIG_SYS_HRCW_LOW (\ + HRCWL_LCL_BUS_TO_SCB_CLK_1X1 | \ + HRCWL_DDR_TO_SCB_CLK_2X1 | \ + HRCWL_CSB_TO_CLKIN_2X1 | \ + HRCWL_CORE_TO_CSB_2_5X1 | \ + HRCWL_CE_PLL_VCO_DIV_2 | \ + HRCWL_CE_TO_PLL_1X3) + +#define CONFIG_SYS_HRCW_HIGH (\ + HRCWH_PCI_AGENT | \ + HRCWH_PCI_ARBITER_DISABLE | \ + HRCWH_CORE_ENABLE | \ + HRCWH_FROM_0X00000100 | \ + HRCWH_BOOTSEQ_DISABLE | \ + HRCWH_SW_WATCHDOG_DISABLE | \ + HRCWH_ROM_LOC_LOCAL_16BIT | \ + HRCWH_BIG_ENDIAN | \ + HRCWH_LALE_NORMAL) + +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000007f +#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 | \ + SDRAM_CFG_32_BE | \ + SDRAM_CFG_SREN) + +#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 +#define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) +#define CONFIG_SYS_DDR_INTERVAL ((0x064 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \ + (0x200 << SDRAM_INTERVAL_REFINT_SHIFT)) + +#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ + CSCONFIG_ODT_WR_CFG | \ + CSCONFIG_ROW_BIT_13 | \ + CSCONFIG_COL_BIT_10) + +#define CONFIG_SYS_DDR_MODE 0x47860252 +#define CONFIG_SYS_DDR_MODE2 0x8080c000 + +#define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ + (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \ + (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \ + (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \ + (0 << TIMING_CFG0_WWT_SHIFT) | \ + (0 << TIMING_CFG0_RRT_SHIFT) | \ + (0 << TIMING_CFG0_WRT_SHIFT) | \ + (0 << TIMING_CFG0_RWT_SHIFT)) + +#define CONFIG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_50) | \ + (2 << TIMING_CFG1_WRTORD_SHIFT) | \ + (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \ + (2 << TIMING_CFG1_WRREC_SHIFT) | \ + (6 << TIMING_CFG1_REFREC_SHIFT) | \ + (2 << TIMING_CFG1_ACTTORW_SHIFT) | \ + (6 << TIMING_CFG1_ACTTOPRE_SHIFT) | \ + (2 << TIMING_CFG1_PRETOACT_SHIFT)) + +#define CONFIG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \ + (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \ + (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \ + (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \ + (4 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) | \ + (0 << TIMING_CFG2_ADD_LAT_SHIFT) | \ + (5 << TIMING_CFG2_CPO_SHIFT)) + +#define CONFIG_SYS_DDR_TIMING_3 0x00000000 + +#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 +#define CONFIG_SYS_KMBEC_FPGA_SIZE 128 + +/* EEprom support */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + +/* + * Local Bus Configuration & Clock Setup + */ +#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_EADC_1 | LCRR_CLKDIV_2) +#define CONFIG_SYS_LBC_LBCR 0x00000000 + +/* + * MMU Setup + */ +#define CONFIG_SYS_IBAT7L (0) +#define CONFIG_SYS_IBAT7U (0) +#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L +#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U + +#endif /* __CONFIG_KM8321_COMMON_H */ diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h new file mode 100644 index 0000000..85b6ed2 --- /dev/null +++ b/include/configs/km/km83xx-common.h @@ -0,0 +1,325 @@ +/* + * (C) Copyright 2010 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef __CONFIG_KM83XX_H +#define __CONFIG_KM83XX_H + +/* include common defines/options for all Keymile boards */ +#include "keymile-common.h" +#include "km-powerpc.h" + +#define MTDIDS_DEFAULT "nor0=boot" +#define MTDPARTS_DEFAULT "mtdparts=" \ + "boot:" \ + "768k(u-boot)," \ + "128k(env)," \ + "128k(envred)," \ + "-(" CONFIG_KM_UBI_PARTITION_NAME ")" + +#define CONFIG_MISC_INIT_R +/* + * System Clock Setup + */ +#define CONFIG_83XX_CLKIN 66000000 +#define CONFIG_SYS_CLK_FREQ 66000000 +#define CONFIG_83XX_PCICLK 66000000 + +/* + * IMMR new address + */ +#define CONFIG_SYS_IMMR 0xE0000000 + +/* + * Bus Arbitration Configuration Register (ACR) + */ +#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */ +#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */ +#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */ +#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */ + +/* + * DDR Setup + */ +#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ + DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) + +#define CFG_83XX_DDR_USES_CS0 + +/* + * Manually set up DDR parameters + */ +#define CONFIG_DDR_II +#define CONFIG_SYS_DDR_SIZE 2048 /* MB */ + +/* + * The reserved memory + */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_FLASH_BASE 0xF0000000 + +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +#define CONFIG_SYS_RAMBOOT +#endif + +/* Reserve 768 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) + +/* + * Initial RAM Base Address Setup + */ +#define CONFIG_SYS_INIT_RAM_LOCK +#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* + * Init Local Bus Memory Controller: + * + * Bank Bus Machine PortSz Size Device + * ---- --- ------- ------ ----- ------ + * 0 Local GPCM 16 bit 256MB FLASH + * 1 Local GPCM 8 bit 128MB GPIO/PIGGY + * + */ +/* + * FLASH on the Local Bus + */ +#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ +#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ +#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_LBLAWAR0_PRELIM 0x8000001b /* 256MB window size */ + +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ + (2 << BR_PS_SHIFT) | /* 16 bit port size */ \ + BR_V) + +#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \ + OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \ + OR_GPCM_SCY_5 | \ + OR_GPCM_TRLX | OR_GPCM_EAD) + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */ +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } + +/* + * PRIO1/PIGGY on the local bus CS1 + */ +/* Window base at flash base */ +#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE +#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000001A /* 128MB window size */ + +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ + (1 << BR_PS_SHIFT) | /* 8 bit port size */ \ + BR_V) +#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \ + OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \ + OR_GPCM_SCY_2 | \ + OR_GPCM_TRLX | OR_GPCM_EAD) + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) + +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) + +/* Pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_OF_STDOUT_VIA_ALIAS + +#ifndef CONFIG_NET_MULTI +#define CONFIG_NET_MULTI +#endif +/* + * QE UEC ethernet configuration + */ +#define CONFIG_UEC_ETH +#define CONFIG_ETHPRIME "UEC0" + +#define CONFIG_UEC_ETH1 /* GETH1 */ +#define UEC_VERBOSE_DEBUG 1 + +#ifdef CONFIG_UEC_ETH1 +#define CONFIG_SYS_UEC1_UCC_NUM 3 /* UCC4 */ +#define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE /* not used in RMII Mode */ +#define CONFIG_SYS_UEC1_TX_CLK QE_CLK17 +#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH +#define CONFIG_SYS_UEC1_PHY_ADDR 0 +#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII +#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 +#endif + +/* + * Environment + */ + +#ifndef CONFIG_SYS_RAMBOOT +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_MONITOR_LEN) + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) + +#else /* CFG_SYS_RAMBOOT */ +#define CONFIG_SYS_NO_FLASH /* Flash is not usable now */ +#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) +#define CONFIG_ENV_SIZE 0x2000 +#endif /* CFG_SYS_RAMBOOT */ + +/* I2C */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_FSL_I2C +#define CONFIG_SYS_I2C_SPEED 200000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x3000 + +/* I2C SYSMON (LM75, AD7414 is almost compatible) */ +#define CONFIG_DTT_LM75 /* ON Semi's LM75 */ +#define CONFIG_DTT_SENSORS {0, 1, 2, 3} /* Sensor addresses */ +#define CONFIG_SYS_DTT_MAX_TEMP 70 +#define CONFIG_SYS_DTT_LOW_TEMP -30 +#define CONFIG_SYS_DTT_HYSTERESIS 3 +#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) + +#if defined(CONFIG_CMD_NAND) +#define CONFIG_NAND_KMETER1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE +#endif + +#if defined(CONFIG_PCI) +#define CONFIG_CMD_PCI +#endif + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + +/* + * Core HID Setup + */ +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) +#define CONFIG_SYS_HID2 HID2_HBE + +/* + * MMU Setup + */ + +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ + +/* DDR: cache cacheable */ +#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | \ + BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \ + BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L +#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U + +/* IMMRBAR & PCI IO: cache-inhibit and guarded */ +#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_10 | \ + BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \ + | BATU_VP) +#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L +#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U + +/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */ +#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_10 | \ + BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \ + BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_10 | \ + BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U + +/* FLASH: icache cacheable, but dcache-inhibit and guarded */ +#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_10 | \ + BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \ + BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_10 | \ + BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U + +/* Stack in dcache: cacheable, no memory coherence */ +#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10) +#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \ + BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L +#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#define BOOTFLASH_START 0xF0000000 + +#define CONFIG_KM_CONSOLE_TTY "ttyS0" + +/* + * Environment Configuration + */ +#define CONFIG_ENV_OVERWRITE +#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ +#define CONFIG_KM_DEF_ENV "km-common=empty\0" +#endif + +#ifndef CONFIG_KM_DEF_ROOTPATH +#define CONFIG_KM_DEF_ROOTPATH \ + "rootpath=/opt/eldk/ppc_82xx\0" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_KM_DEF_ENV \ + CONFIG_KM_DEF_ROOTPATH \ + "dtt_bus=pca9547:70:a\0" \ + "EEprom_ivm=pca9547:70:9\0" \ + "newenv=" \ + "prot off 0xF00C0000 +0x40000 && " \ + "era 0xF00C0000 +0x40000\0" \ + "unlock=yes\0" \ + "" + +#if defined(CONFIG_UEC_ETH) +#define CONFIG_HAS_ETH0 +#endif + +#endif /* __CONFIG_KM83XX_H */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h new file mode 100644 index 0000000..add5624 --- /dev/null +++ b/include/configs/km/km_arm.h @@ -0,0 +1,266 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Prafulla Wadaskar + * + * (C) Copyright 2009 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * (C) Copyright 2010-2011 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +/* + * for linking errors see + * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html + */ + +#ifndef _CONFIG_KM_ARM_H +#define _CONFIG_KM_ARM_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_MARVELL +#define CONFIG_ARM926EJS /* Basic Architecture */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ + +/* include common defines/options for all Keymile boards */ +#include "keymile-common.h" + +#define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */ +#define CONFIG_ENV_SIZE (128 << 10) /* NAND chip block size */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ + +/* pseudo-non volatile RAM [hex] */ +#define CONFIG_KM_PNVRAM 0x80000 +/* physical RAM MTD size [hex] */ +#define CONFIG_KM_PHRAM 0x17F000 + +#define CONFIG_KM_CRAMFS_ADDR 0x2400000 +#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */ + +#define CONFIG_KM_DEF_ENV_CPU \ + "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "boot=bootm ${actual_kernel_addr} - -\0" \ + "cramfsloadfdt=echo \\\\c\0" \ + "tftpfdt=echo \\\\c\0" \ + CONFIG_KM_DEF_ENV_UPDATE \ + "" + + + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#undef CONFIG_KIRKWOOD_PCIE_INIT /* Disable PCIE Port0 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ + +#define CONFIG_MISC_INIT_R + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /* Console on UART0 */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ + +/* + * Commands configuration + */ +#define CONFIG_CMD_ELF +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NFS + +/* + * Without NOR FLASH we need this + */ +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + +/* + * NAND Flash configuration + */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_NAND_KIRKWOOD +#define CONFIG_SYS_NAND_BASE 0xd8000000 + +#define BOOTFLASH_START 0x0 + +#define CONFIG_KM_CONSOLE_TTY "ttyS0" + +/* size in bytes reserved for initial data */ + +/* + * Other required minimal configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ + +/* + * Ethernet Driver configuration + */ +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi ove miiphy interface */ +#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */ + +/* + * UBI related stuff + */ +#define CONFIG_SYS_USE_UBI + +/* + * I2C related stuff + */ +#define CONFIG_SOFT_I2C /* I2C bit-banged */ + +#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ +#if defined(CONFIG_SOFT_I2C) +#ifndef __ASSEMBLY__ +#include +extern void __set_direction(unsigned pin, int high); +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); +#define KM_KIRKWOOD_SDA_PIN 8 +#define KM_KIRKWOOD_SCL_PIN 9 +#define KM_KIRKWOOD_ENV_WP 38 + +#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) +#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) +#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) +#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) +#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) +#endif + +#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */ +#define I2C_SOFT_DECLARATIONS + +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 +#endif + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 + +/* + * Environment variables configurations + */ +#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */ +#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 +#define CONFIG_ENV_EEPROM_IS_ON_I2C +#define CONFIG_SYS_EEPROM_WREN +#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) +#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0" + +/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) + +#define CONFIG_CMD_SF + +#define CONFIG_SPI_FLASH +#define CONFIG_HARD_SPI +#define CONFIG_KIRKWOOD_SPI +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50Mhz */ + +#define FLASH_GPIO_PIN 0x00010000 + +#define MTDIDS_DEFAULT "nand0=orion_nand" +/* test-only: partitioning needs some tuning, this is just for tests */ +#define MTDPARTS_DEFAULT "mtdparts=" \ + "orion_nand:" \ + "-(" CONFIG_KM_UBI_PARTITION_NAME ")" + +#define CONFIG_KM_DEF_ENV_UPDATE \ + "update=" \ + "spi on;sf probe 0;sf erase 0 50000;" \ + "sf write ${u-boot_addr_r} 0 ${filesize};" \ + "spi off\0" + +#if defined(CONFIG_SYS_NO_FLASH) +#define CONFIG_KM_UBI_PARTITION_NAME "ubi0" +#undef CONFIG_FLASH_CFI_MTD +#undef CONFIG_JFFS2_CMDLINE +#endif + +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +/* Kirkwood has 2k of Security SRAM, use it for SP */ +#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 +/* Do early setups now in board_init_f() */ +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * resereved pram area at the end of memroy [hex] + * 8Mbytes for switch + 4Kbytes for bootcount + */ +#define CONFIG_KM_RESERVED_PRAM 0x801000 +/* address for the bootcount (taken from end of RAM) */ +#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) + +#endif /* _CONFIG_KM_ARM_H */ diff --git a/include/configs/km82xx-common.h b/include/configs/km82xx-common.h deleted file mode 100644 index 446c1d0..0000000 --- a/include/configs/km82xx-common.h +++ /dev/null @@ -1,311 +0,0 @@ -/* - * (C) Copyright 2007-2010 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __KM82XX_COMMON -#define __KM82XX_COMMON - -/* - * Select serial console configuration - * - * If either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then - * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4 - * for SCC). - */ -#define CONFIG_CONS_ON_SMC /* Console is on SMC */ -#undef CONFIG_CONS_ON_SCC /* It's not on SCC */ -#undef CONFIG_CONS_NONE /* It's not on external UART */ -#define CONFIG_CONS_INDEX 2 /* SMC2 is used for console */ -#define CONFIG_SYS_SMC_RXBUFLEN 128 -#define CONFIG_SYS_MAXIDLE 10 - -/* - * Select ethernet configuration - * - * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, - * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for - * SCC, 1-3 for FCC) - * - * If CONFIG_ETHER_NONE is defined, then either the ethernet routines - * must be defined elsewhere (as for the console), or CONFIG_CMD_NET - * must be unset. - */ -#define CONFIG_ETHER_ON_SCC /* Ethernet is on SCC */ -#undef CONFIG_ETHER_ON_FCC /* Ethernet is not on FCC */ -#undef CONFIG_ETHER_NONE /* No external Ethernet */ -#define CONFIG_NET_MULTI - -#define CONFIG_ETHER_INDEX 4 -#define CONFIG_HAS_ETH0 -#define CONFIG_SYS_SCC_TOUT_LOOP 10000000 - -#define CONFIG_SYS_CMXSCR_VALUE (CMXSCR_RS4CS_CLK7 | CMXSCR_TS4CS_CLK8) - -#ifndef CONFIG_8260_CLKIN -#define CONFIG_8260_CLKIN 66000000 /* in Hz */ -#endif - -#define BOOTFLASH_START 0xFE000000 - -#define CONFIG_KM_CONSOLE_TTY "ttyCPM0" - -#define MTDPARTS_DEFAULT "mtdparts=" \ - "app:" \ - "768k(u-boot)," \ - "128k(env)," \ - "128k(envred)," \ - "3072k(free)," \ - "-(" CONFIG_KM_UBI_PARTITION_NAME ")" - -/* - * Default environment settings - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_BOARD_EXTRA_ENV \ - CONFIG_KM_DEF_ENV \ - "EEprom_ivm=pca9544a:70:4 \0" \ - "unlock=yes\0" \ - "newenv=" \ - "prot off 0xFE0C0000 +0x40000 && " \ - "era 0xFE0C0000 +0x40000\0" \ - "rootpath=/opt/eldk/ppc_82xx\0" \ - "" - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_MONITOR_LEN (768 << 10) - -#define CONFIG_ENV_IS_IN_FLASH - -#ifdef CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ - CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -#endif /* CONFIG_ENV_IS_IN_FLASH */ - -/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ - -/* - * Software (bit-bang) I2C driver configuration - */ - -#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ -#define I2C_ACTIVE (iop->pdir |= 0x00010000) -#define I2C_TRISTATE (iop->pdir &= ~0x00010000) -#define I2C_READ ((iop->pdat & 0x00010000) != 0) -#define I2C_SDA(bit) do { \ - if (bit) \ - iop->pdat |= 0x00010000; \ - else \ - iop->pdat &= ~0x00010000; \ - } while (0) -#define I2C_SCL(bit) do { \ - if (bit) \ - iop->pdat |= 0x00020000; \ - else \ - iop->pdat &= ~0x00020000; \ - } while (0) -#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ - -/* I2C SYSMON (LM75, AD7414 is almost compatible) */ -#define CONFIG_DTT_LM75 /* ON Semi's LM75 */ -#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ -#define CONFIG_SYS_DTT_MAX_TEMP 70 -#define CONFIG_SYS_DTT_LOW_TEMP -30 -#define CONFIG_SYS_DTT_HYSTERESIS 3 -#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) - -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - -#define CONFIG_SYS_IMMR 0xF0000000 - -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* used size in DPRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* Hard reset configuration word */ -#define CONFIG_SYS_HRCW_MASTER 0x0604b211 - -/* No slaves */ -#define CONFIG_SYS_HRCW_SLAVE1 0 -#define CONFIG_SYS_HRCW_SLAVE2 0 -#define CONFIG_SYS_HRCW_SLAVE3 0 -#define CONFIG_SYS_HRCW_SLAVE4 0 -#define CONFIG_SYS_HRCW_SLAVE5 0 -#define CONFIG_SYS_HRCW_SLAVE6 0 -#define CONFIG_SYS_HRCW_SLAVE7 0 - -/* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) - -#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */ -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - -#define CONFIG_SYS_HID0_INIT 0 -#define CONFIG_SYS_HID0_FINAL (HID0_ICE | HID0_IFEM | HID0_ABE) - -#define CONFIG_SYS_HID2 0 - -#define CONFIG_SYS_SIUMCR 0x4020c200 -#define CONFIG_SYS_SYPCR 0xFFFFFF83 -#define CONFIG_SYS_BCR 0x10000000 -#define CONFIG_SYS_SCCR (SCCR_PCI_MODE | SCCR_PCI_MODCK) - -/* - *----------------------------------------------------------------------- - * RMR - Reset Mode Register 5-5 - *----------------------------------------------------------------------- - * turn on Checkstop Reset Enable - */ -#define CONFIG_SYS_RMR 0 - -/* - *----------------------------------------------------------------------- - * TMCNTSC - Time Counter Status and Control 4-40 - *----------------------------------------------------------------------- - * Clear once per Second and Alarm Interrupt Status, Set 32KHz timersclk, - * and enable Time Counter - */ -#define CONFIG_SYS_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR|TMCNTSC_TCF|TMCNTSC_TCE) - -/* - *----------------------------------------------------------------------- - * PISCR - Periodic Interrupt Status and Control 4-42 - *----------------------------------------------------------------------- - * Clear Periodic Interrupt Status, Set 32KHz timersclk, and enable - * Periodic timer - */ -#define CONFIG_SYS_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE) - -/* - *----------------------------------------------------------------------- - * RCCR - RISC Controller Configuration 13-7 - *----------------------------------------------------------------------- - */ -#define CONFIG_SYS_RCCR 0 - -/* - * Init Memory Controller: - * - * Bank Bus Machine PortSz Device - * ---- --- ------- ------ ------ - * 0 60x GPCM 8 bit FLASH - * 1 60x SDRAM 32 bit SDRAM - * 3 60x GPCM 8 bit GPIO/PIGGY - * 5 60x GPCM 16 bit CFG-Flash - * - */ -/* Bank 0 - FLASH - */ -#define CONFIG_SYS_BR0_PRELIM ((CONFIG_SYS_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) - -#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV2 |\ - ORxG_SCY_5_CLK |\ - ORxG_TRLX) - -#define CONFIG_SYS_MPTPR 0x1800 - -/* - *----------------------------------------------------------------------------- - * Address for Mode Register Set (MRS) command - *----------------------------------------------------------------------------- - */ -#define CONFIG_SYS_MRS_OFFS 0x00000110 -#define CONFIG_SYS_PSRT 0x0e - -#define CONFIG_SYS_BR1_PRELIM ((CONFIG_SYS_SDRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) - -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR1 - -/* - * UPIO FPGA (GPIO/PIGGY) on CS3 initialization values - */ -#define CONFIG_SYS_KMBEC_FPGA_BASE 0x30000000 -#define CONFIG_SYS_KMBEC_FPGA_SIZE 128 - -#define CONFIG_SYS_BR3_PRELIM ((CONFIG_SYS_KMBEC_FPGA_BASE & BRx_BA_MSK) |\ - BRx_PS_8 | BRx_MS_GPCM_P | BRx_V) - -#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) |\ - ORxG_CSNT | ORxG_ACS_DIV2 |\ - ORxG_SCY_3_CLK | ORxG_TRLX) - -/* - * BFTICU board FPGA on CS4 initialization values - */ -#define CONFIG_SYS_FPGA_BASE 0x40000000 -#define CONFIG_SYS_FPGA_SIZE 1 /*1KB*/ - -#define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_FPGA_BASE & BRx_BA_MSK) |\ - BRx_PS_8 | BRx_MS_GPCM_P | BRx_V) - -#define CONFIG_SYS_OR4_PRELIM (P2SZ_TO_AM(CONFIG_SYS_FPGA_SIZE << 10) |\ - ORxG_CSNT | ORxG_ACS_DIV2 |\ - ORxG_SCY_3_CLK | ORxG_TRLX) - -/* - * CFG-Flash on CS5 initialization values - */ -#define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_FLASH_BASE_1 & BRx_BA_MSK) |\ - BRx_PS_16 | BRx_MS_GPCM_P | BRx_V) - -#define CONFIG_SYS_OR5_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE_1 + \ - CONFIG_SYS_FLASH_SIZE_2) |\ - ORxG_CSNT | ORxG_ACS_DIV2 |\ - ORxG_SCY_5_CLK | ORxG_TRLX) - -#define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */ - -/* pass open firmware flat tree */ -#define CONFIG_FIT 1 -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 - -#define OF_TBCLK (bd->bi_busfreq / 4) -#define OF_STDOUT_PATH "/soc/cpm/serial@11a90" - -#endif /* __KM82XX_COMMON */ diff --git a/include/configs/km8321-common.h b/include/configs/km8321-common.h deleted file mode 100644 index 6fab45e..0000000 --- a/include/configs/km8321-common.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 2006 Freescale Semiconductor, Inc. - * Dave Liu - * - * Copyright (C) 2007 Logic Product Development, Inc. - * Peter Barada - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov - * - * (C) Copyright 2008 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * (C) Copyright 2010 - * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com - * - * (C) Copyright 2010-2011 - * Thomas Reufer, KEYMILE Ltd, thomas.reufer@keymile.com - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef __CONFIG_KM8321_COMMON_H -#define __CONFIG_KM8321_COMMON_H - -/* - * High Level Configuration Options - */ -#define CONFIG_QE /* Has QE */ -#define CONFIG_MPC832x /* MPC832x CPU specific */ -#define CONFIG_KM8321 /* Keymile PBEC8321 board specific */ - -#define CONFIG_KM_DEF_ROOTPATH \ - "rootpath=/opt/eldk/ppc_8xx\0" - -/* include common defines/options for all 83xx Keymile boards */ -#include "km83xx-common.h" - -#define CONFIG_MISC_INIT_R - -/* - * System IO Config - */ -#define CONFIG_SYS_SICRL SICRL_IRQ_CKS - -/* - * Hardware Reset Configuration Word - */ -#define CONFIG_SYS_HRCW_LOW (\ - HRCWL_LCL_BUS_TO_SCB_CLK_1X1 | \ - HRCWL_DDR_TO_SCB_CLK_2X1 | \ - HRCWL_CSB_TO_CLKIN_2X1 | \ - HRCWL_CORE_TO_CSB_2_5X1 | \ - HRCWL_CE_PLL_VCO_DIV_2 | \ - HRCWL_CE_TO_PLL_1X3) - -#define CONFIG_SYS_HRCW_HIGH (\ - HRCWH_PCI_AGENT | \ - HRCWH_PCI_ARBITER_DISABLE | \ - HRCWH_CORE_ENABLE | \ - HRCWH_FROM_0X00000100 | \ - HRCWH_BOOTSEQ_DISABLE | \ - HRCWH_SW_WATCHDOG_DISABLE | \ - HRCWH_ROM_LOC_LOCAL_16BIT | \ - HRCWH_BIG_ENDIAN | \ - HRCWH_LALE_NORMAL) - -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000007f -#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 | \ - SDRAM_CFG_32_BE | \ - SDRAM_CFG_SREN) - -#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 -#define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) -#define CONFIG_SYS_DDR_INTERVAL ((0x064 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \ - (0x200 << SDRAM_INTERVAL_REFINT_SHIFT)) - -#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ - CSCONFIG_ODT_WR_CFG | \ - CSCONFIG_ROW_BIT_13 | \ - CSCONFIG_COL_BIT_10) - -#define CONFIG_SYS_DDR_MODE 0x47860252 -#define CONFIG_SYS_DDR_MODE2 0x8080c000 - -#define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ - (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \ - (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \ - (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \ - (0 << TIMING_CFG0_WWT_SHIFT) | \ - (0 << TIMING_CFG0_RRT_SHIFT) | \ - (0 << TIMING_CFG0_WRT_SHIFT) | \ - (0 << TIMING_CFG0_RWT_SHIFT)) - -#define CONFIG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_50) | \ - (2 << TIMING_CFG1_WRTORD_SHIFT) | \ - (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \ - (2 << TIMING_CFG1_WRREC_SHIFT) | \ - (6 << TIMING_CFG1_REFREC_SHIFT) | \ - (2 << TIMING_CFG1_ACTTORW_SHIFT) | \ - (6 << TIMING_CFG1_ACTTOPRE_SHIFT) | \ - (2 << TIMING_CFG1_PRETOACT_SHIFT)) - -#define CONFIG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \ - (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \ - (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \ - (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \ - (4 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) | \ - (0 << TIMING_CFG2_ADD_LAT_SHIFT) | \ - (5 << TIMING_CFG2_CPO_SHIFT)) - -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 - -#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 -#define CONFIG_SYS_KMBEC_FPGA_SIZE 128 - -/* EEprom support */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - -/* - * Local Bus Configuration & Clock Setup - */ -#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_EADC_1 | LCRR_CLKDIV_2) -#define CONFIG_SYS_LBC_LBCR 0x00000000 - -/* - * MMU Setup - */ -#define CONFIG_SYS_IBAT7L (0) -#define CONFIG_SYS_IBAT7U (0) -#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L -#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U - -#endif /* __CONFIG_KM8321_COMMON_H */ diff --git a/include/configs/km83xx-common.h b/include/configs/km83xx-common.h deleted file mode 100644 index 85b6ed2..0000000 --- a/include/configs/km83xx-common.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - * (C) Copyright 2010 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef __CONFIG_KM83XX_H -#define __CONFIG_KM83XX_H - -/* include common defines/options for all Keymile boards */ -#include "keymile-common.h" -#include "km-powerpc.h" - -#define MTDIDS_DEFAULT "nor0=boot" -#define MTDPARTS_DEFAULT "mtdparts=" \ - "boot:" \ - "768k(u-boot)," \ - "128k(env)," \ - "128k(envred)," \ - "-(" CONFIG_KM_UBI_PARTITION_NAME ")" - -#define CONFIG_MISC_INIT_R -/* - * System Clock Setup - */ -#define CONFIG_83XX_CLKIN 66000000 -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - -/* - * IMMR new address - */ -#define CONFIG_SYS_IMMR 0xE0000000 - -/* - * Bus Arbitration Configuration Register (ACR) - */ -#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */ -#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */ -#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */ -#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */ - -/* - * DDR Setup - */ -#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE -#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ - DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) - -#define CFG_83XX_DDR_USES_CS0 - -/* - * Manually set up DDR parameters - */ -#define CONFIG_DDR_II -#define CONFIG_SYS_DDR_SIZE 2048 /* MB */ - -/* - * The reserved memory - */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_SYS_FLASH_BASE 0xF0000000 - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#endif - -/* Reserve 768 kB for Mon */ -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - -/* - * Initial RAM Base Address Setup - */ -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* - * Init Local Bus Memory Controller: - * - * Bank Bus Machine PortSz Size Device - * ---- --- ------- ------ ----- ------ - * 0 Local GPCM 16 bit 256MB FLASH - * 1 Local GPCM 8 bit 128MB GPIO/PIGGY - * - */ -/* - * FLASH on the Local Bus - */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ -#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE - -#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM 0x8000001b /* 256MB window size */ - -#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ - (2 << BR_PS_SHIFT) | /* 16 bit port size */ \ - BR_V) - -#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \ - OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \ - OR_GPCM_SCY_5 | \ - OR_GPCM_TRLX | OR_GPCM_EAD) - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } - -/* - * PRIO1/PIGGY on the local bus CS1 - */ -/* Window base at flash base */ -#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE -#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000001A /* 128MB window size */ - -#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ - (1 << BR_PS_SHIFT) | /* 8 bit port size */ \ - BR_V) -#define CONFIG_SYS_OR1_PRELIM (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \ - OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \ - OR_GPCM_SCY_2 | \ - OR_GPCM_TRLX | OR_GPCM_EAD) - -/* - * Serial Port - */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) - -/* Pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_OF_STDOUT_VIA_ALIAS - -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI -#endif -/* - * QE UEC ethernet configuration - */ -#define CONFIG_UEC_ETH -#define CONFIG_ETHPRIME "UEC0" - -#define CONFIG_UEC_ETH1 /* GETH1 */ -#define UEC_VERBOSE_DEBUG 1 - -#ifdef CONFIG_UEC_ETH1 -#define CONFIG_SYS_UEC1_UCC_NUM 3 /* UCC4 */ -#define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE /* not used in RMII Mode */ -#define CONFIG_SYS_UEC1_TX_CLK QE_CLK17 -#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH -#define CONFIG_SYS_UEC1_PHY_ADDR 0 -#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII -#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 -#endif - -/* - * Environment - */ - -#ifndef CONFIG_SYS_RAMBOOT -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ -#define CONFIG_ENV_OFFSET (CONFIG_SYS_MONITOR_LEN) - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ - CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -#else /* CFG_SYS_RAMBOOT */ -#define CONFIG_SYS_NO_FLASH /* Flash is not usable now */ -#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) -#define CONFIG_ENV_SIZE 0x2000 -#endif /* CFG_SYS_RAMBOOT */ - -/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 200000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 - -/* I2C SYSMON (LM75, AD7414 is almost compatible) */ -#define CONFIG_DTT_LM75 /* ON Semi's LM75 */ -#define CONFIG_DTT_SENSORS {0, 1, 2, 3} /* Sensor addresses */ -#define CONFIG_SYS_DTT_MAX_TEMP 70 -#define CONFIG_SYS_DTT_LOW_TEMP -30 -#define CONFIG_SYS_DTT_HYSTERESIS 3 -#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) - -#if defined(CONFIG_CMD_NAND) -#define CONFIG_NAND_KMETER1 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE -#endif - -#if defined(CONFIG_PCI) -#define CONFIG_CMD_PCI -#endif - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) - -/* - * Core HID Setup - */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ - HID0_ENABLE_INSTRUCTION_CACHE) -#define CONFIG_SYS_HID2 HID2_HBE - -/* - * MMU Setup - */ - -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - -/* DDR: cache cacheable */ -#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) -#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L -#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U - -/* IMMRBAR & PCI IO: cache-inhibit and guarded */ -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_10 | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \ - | BATU_VP) -#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L -#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U - -/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */ -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_10 | \ - BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \ - BATU_VS | BATU_VP) -#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_10 | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U - -/* FLASH: icache cacheable, but dcache-inhibit and guarded */ -#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_10 | \ - BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) -#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_10 | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U - -/* Stack in dcache: cacheable, no memory coherence */ -#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10) -#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \ - BATU_VS | BATU_VP) -#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L -#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -#define BOOTFLASH_START 0xF0000000 - -#define CONFIG_KM_CONSOLE_TTY "ttyS0" - -/* - * Environment Configuration - */ -#define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ -#define CONFIG_KM_DEF_ENV "km-common=empty\0" -#endif - -#ifndef CONFIG_KM_DEF_ROOTPATH -#define CONFIG_KM_DEF_ROOTPATH \ - "rootpath=/opt/eldk/ppc_82xx\0" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ROOTPATH \ - "dtt_bus=pca9547:70:a\0" \ - "EEprom_ivm=pca9547:70:9\0" \ - "newenv=" \ - "prot off 0xF00C0000 +0x40000 && " \ - "era 0xF00C0000 +0x40000\0" \ - "unlock=yes\0" \ - "" - -#if defined(CONFIG_UEC_ETH) -#define CONFIG_HAS_ETH0 -#endif - -#endif /* __CONFIG_KM83XX_H */ diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h deleted file mode 100644 index add5624..0000000 --- a/include/configs/km_arm.h +++ /dev/null @@ -1,266 +0,0 @@ -/* - * (C) Copyright 2009 - * Marvell Semiconductor - * Prafulla Wadaskar - * - * (C) Copyright 2009 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * (C) Copyright 2010-2011 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -/* - * for linking errors see - * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html - */ - -#ifndef _CONFIG_KM_ARM_H -#define _CONFIG_KM_ARM_H - -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_MARVELL -#define CONFIG_ARM926EJS /* Basic Architecture */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KIRKWOOD /* SOC Family Name */ -#define CONFIG_KW88F6281 /* SOC Name */ -#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ - -/* include common defines/options for all Keymile boards */ -#include "keymile-common.h" - -#define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */ -#define CONFIG_ENV_SIZE (128 << 10) /* NAND chip block size */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ -#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ -#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ - -/* pseudo-non volatile RAM [hex] */ -#define CONFIG_KM_PNVRAM 0x80000 -/* physical RAM MTD size [hex] */ -#define CONFIG_KM_PHRAM 0x17F000 - -#define CONFIG_KM_CRAMFS_ADDR 0x2400000 -#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */ - -#define CONFIG_KM_DEF_ENV_CPU \ - "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "boot=bootm ${actual_kernel_addr} - -\0" \ - "cramfsloadfdt=echo \\\\c\0" \ - "tftpfdt=echo \\\\c\0" \ - CONFIG_KM_DEF_ENV_UPDATE \ - "" - - - -#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ -#undef CONFIG_KIRKWOOD_PCIE_INIT /* Disable PCIE Port0 for kernel */ -#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ - -#define CONFIG_MISC_INIT_R - -/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK -#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE - -/* - * Serial Port configuration - * The following definitions let you select what serial you want to use - * for your console driver. - */ - -#define CONFIG_CONS_INDEX 1 /* Console on UART0 */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_INITRD_TAG /* enable INITRD tag */ -#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ - -/* - * Commands configuration - */ -#define CONFIG_CMD_ELF -#define CONFIG_CMD_MTDPARTS -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NFS - -/* - * Without NOR FLASH we need this - */ -#define CONFIG_SYS_NO_FLASH -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS - -/* - * NAND Flash configuration - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 -#define CONFIG_NAND_KIRKWOOD -#define CONFIG_SYS_NAND_BASE 0xd8000000 - -#define BOOTFLASH_START 0x0 - -#define CONFIG_KM_CONSOLE_TTY "ttyS0" - -/* size in bytes reserved for initial data */ - -/* - * Other required minimal configurations - */ -#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ -#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ -#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ -#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ -#define CONFIG_NR_DRAM_BANKS 4 -#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ -#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ - -/* - * Ethernet Driver configuration - */ -#define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_NET_MULTI /* specify more that one ports available */ -#define CONFIG_MII /* expose smi ove miiphy interface */ -#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 -#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ -#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */ - -/* - * UBI related stuff - */ -#define CONFIG_SYS_USE_UBI - -/* - * I2C related stuff - */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ - -#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ -#if defined(CONFIG_SOFT_I2C) -#ifndef __ASSEMBLY__ -#include -extern void __set_direction(unsigned pin, int high); -void set_sda(int state); -void set_scl(int state); -int get_sda(void); -int get_scl(void); -#define KM_KIRKWOOD_SDA_PIN 8 -#define KM_KIRKWOOD_SCL_PIN 9 -#define KM_KIRKWOOD_ENV_WP 38 - -#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) -#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) -#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) -#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) -#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) -#endif - -#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */ -#define I2C_SOFT_DECLARATIONS - -#define CONFIG_SYS_I2C_SLAVE 0x0 -#define CONFIG_SYS_I2C_SPEED 100000 -#endif - -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 - -/* - * Environment variables configurations - */ -#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */ -#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 -#define CONFIG_ENV_EEPROM_IS_ON_I2C -#define CONFIG_SYS_EEPROM_WREN -#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ -#undef CONFIG_ENV_SIZE -#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) -#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0" - -/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -#define CONFIG_CMD_SF - -#define CONFIG_SPI_FLASH -#define CONFIG_HARD_SPI -#define CONFIG_KIRKWOOD_SPI -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50Mhz */ - -#define FLASH_GPIO_PIN 0x00010000 - -#define MTDIDS_DEFAULT "nand0=orion_nand" -/* test-only: partitioning needs some tuning, this is just for tests */ -#define MTDPARTS_DEFAULT "mtdparts=" \ - "orion_nand:" \ - "-(" CONFIG_KM_UBI_PARTITION_NAME ")" - -#define CONFIG_KM_DEF_ENV_UPDATE \ - "update=" \ - "spi on;sf probe 0;sf erase 0 50000;" \ - "sf write ${u-boot_addr_r} 0 ${filesize};" \ - "spi off\0" - -#if defined(CONFIG_SYS_NO_FLASH) -#define CONFIG_KM_UBI_PARTITION_NAME "ubi0" -#undef CONFIG_FLASH_CFI_MTD -#undef CONFIG_JFFS2_CMDLINE -#endif - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -/* Kirkwood has 2k of Security SRAM, use it for SP */ -#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 -/* Do early setups now in board_init_f() */ -#define CONFIG_BOARD_EARLY_INIT_F - -/* - * resereved pram area at the end of memroy [hex] - * 8Mbytes for switch + 4Kbytes for bootcount - */ -#define CONFIG_KM_RESERVED_PRAM 0x801000 -/* address for the bootcount (taken from end of RAM) */ -#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) - -#endif /* _CONFIG_KM_ARM_H */ diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 2fcecaf..8639ddd 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -34,7 +34,7 @@ "netdev=eth2\0" \ /* include common defines/options for all 83xx Keymile boards */ -#include "km83xx-common.h" +#include "km/km83xx-common.h" #define CONFIG_MISC_INIT_R /* diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h index 55ed3f6..f8cd8e0 100644 --- a/include/configs/kmsupx5.h +++ b/include/configs/kmsupx5.h @@ -36,7 +36,7 @@ #define CONFIG_SYS_TEXT_BASE 0xF0000000 /* include common defines/options for all 8321 Keymile boards */ -#include "km8321-common.h" +#include "km/km8321-common.h" /* * Init Local Bus Memory Controller: diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 0745855..b736c56 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -37,8 +37,8 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 /* include common defines/options for all Keymile boards */ -#include "keymile-common.h" -#include "km-powerpc.h" +#include "km/keymile-common.h" +#include "km/km-powerpc.h" #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFE000000 @@ -88,6 +88,6 @@ #define CONFIG_KM_BOARD_EXTRA_ENV "" /* include further common stuff for all keymile 82xx boards */ -#include "km82xx-common.h" +#include "km/km82xx-common.h" #endif /* __CONFIG_H */ diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge2un.h index d3c7bdc..6256035 100644 --- a/include/configs/mgcoge2un.h +++ b/include/configs/mgcoge2un.h @@ -35,7 +35,7 @@ #define _CONFIG_MGCOGE2UN_H /* include common defines/options for all arm based Keymile boards */ -#include "km_arm.h" +#include "km/km_arm.h" /* * Version number information diff --git a/include/configs/mgcoge3ne.h b/include/configs/mgcoge3ne.h index 6f7e12f..6fa1584 100644 --- a/include/configs/mgcoge3ne.h +++ b/include/configs/mgcoge3ne.h @@ -37,8 +37,8 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 /* include common defines/options for all Keymile boards */ -#include "keymile-common.h" -#include "km-powerpc.h" +#include "km/keymile-common.h" +#include "km/km-powerpc.h" #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFE000000 @@ -88,7 +88,7 @@ #define CONFIG_KM_BOARD_EXTRA_ENV "bobcatreset=true\0" /* include further common stuff for all keymile 82xx boards */ -#include "km82xx-common.h" +#include "km/km82xx-common.h" /* bfticu address */ #define CONFIG_SYS_BFTICU_BASE 0x40000000 diff --git a/include/configs/suen3.h b/include/configs/suen3.h index 2b6f19e..aa4d778 100644 --- a/include/configs/suen3.h +++ b/include/configs/suen3.h @@ -34,7 +34,7 @@ #define _CONFIG_SUEN3_H /* include common defines/options for all arm based Keymile boards */ -#include "km_arm.h" +#include "km/km_arm.h" /* * Version number information diff --git a/include/configs/suen8.h b/include/configs/suen8.h index 3f60bc3..b680dfb 100644 --- a/include/configs/suen8.h +++ b/include/configs/suen8.h @@ -35,7 +35,7 @@ #define _CONFIG_SUEN8_H /* include common defines/options for all arm based Keymile boards */ -#include "km_arm.h" +#include "km/km_arm.h" /* * Version number information diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h index d9eb201..0b59d51 100644 --- a/include/configs/suvd3.h +++ b/include/configs/suvd3.h @@ -30,7 +30,7 @@ #define CONFIG_SYS_TEXT_BASE 0xF0000000 /* include common defines/options for all 8321 Keymile boards */ -#include "km8321-common.h" +#include "km/km8321-common.h" #define CONFIG_SYS_APP1_BASE 0xA0000000 #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */ diff --git a/include/configs/tuda1.h b/include/configs/tuda1.h index 1c0b3e0..853c00a 100644 --- a/include/configs/tuda1.h +++ b/include/configs/tuda1.h @@ -33,7 +33,7 @@ #define CONFIG_SYS_TEXT_BASE 0xF0000000 /* include common defines/options for all 8321 Keymile boards */ -#include "km8321-common.h" +#include "km/km8321-common.h" #define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */ #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */ diff --git a/include/configs/tuxa1.h b/include/configs/tuxa1.h index 012db96..ceeb5a3 100644 --- a/include/configs/tuxa1.h +++ b/include/configs/tuxa1.h @@ -33,7 +33,7 @@ #define CONFIG_SYS_TEXT_BASE 0xF0000000 /* include common defines/options for all 8321 Keymile boards */ -#include "km8321-common.h" +#include "km/km8321-common.h" #define CONFIG_SYS_LPXF_BASE 0xA0000000 /* LPXF */ #define CONFIG_SYS_LPXF_SIZE 256 /* Megabytes */ -- cgit v0.10.2