From 7530ae087a6b97e789c40070061ab32326c5e394 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 25 May 2016 15:20:38 +0530 Subject: mtd: nand: arasan_nfc: Correct nand ecc initialization Correct the nand ecc initialization code This fixes the issue of incorrect nand ecc init if no device is found in ecc_matrix then it endsup ecc init with junk initialization instead of the most suited one. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c index 2d73a05..caa7982 100644 --- a/drivers/mtd/nand/arasan_nfc.c +++ b/drivers/mtd/nand/arasan_nfc.c @@ -1058,20 +1058,20 @@ static int arasan_nand_ecc_init(struct mtd_info *mtd) if (found < 0) return 1; - regval = ecc_matrix[i].eccaddr | - (ecc_matrix[i].eccsize << ARASAN_NAND_ECC_SIZE_SHIFT) | - (ecc_matrix[i].bch << ARASAN_NAND_ECC_BCH_SHIFT); + regval = ecc_matrix[found].eccaddr | + (ecc_matrix[found].eccsize << ARASAN_NAND_ECC_SIZE_SHIFT) | + (ecc_matrix[found].bch << ARASAN_NAND_ECC_BCH_SHIFT); writel(regval, &arasan_nand_base->ecc_reg); - if (ecc_matrix[i].bch) { + if (ecc_matrix[found].bch) { regval = readl(&arasan_nand_base->memadr_reg2); regval &= ~ARASAN_NAND_MEM_ADDR2_BCH_MASK; - regval |= (ecc_matrix[i].bchval << + regval |= (ecc_matrix[found].bchval << ARASAN_NAND_MEM_ADDR2_BCH_SHIFT); writel(regval, &arasan_nand_base->memadr_reg2); } - nand_oob.eccbytes = ecc_matrix[i].eccsize; + nand_oob.eccbytes = ecc_matrix[found].eccsize; eccpos_start = mtd->oobsize - nand_oob.eccbytes; for (i = 0; i < nand_oob.eccbytes; i++) @@ -1080,9 +1080,9 @@ static int arasan_nand_ecc_init(struct mtd_info *mtd) nand_oob.oobfree[0].offset = 2; nand_oob.oobfree[0].length = eccpos_start - 2; - nand_chip->ecc.size = ecc_matrix[i].ecc_codeword_size; - nand_chip->ecc.strength = ecc_matrix[i].eccbits; - nand_chip->ecc.bytes = ecc_matrix[i].eccsize; + nand_chip->ecc.size = ecc_matrix[found].ecc_codeword_size; + nand_chip->ecc.strength = ecc_matrix[found].eccbits; + nand_chip->ecc.bytes = ecc_matrix[found].eccsize; nand_chip->ecc.layout = &nand_oob; return 0; -- cgit v0.10.2 From 1630d5582c2b8be129bcd2d3a0db03bc3349dfab Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 27 May 2016 11:25:49 +0200 Subject: ARM64: zynqmp: Enable CMD_NAND via Kconfig Simplify board file by enabling CMD_NAND via Kconfig. Signed-off-by: Michal Simek diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index f342ed2..7879b4d 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_DFU=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 77e6180..2edd180 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y CONFIG_CMD_DFU=y diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ffb6b34..c2c6eab 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -105,7 +105,6 @@ #endif #ifdef CONFIG_NAND_ARASAN -# define CONFIG_CMD_NAND # define CONFIG_CMD_NAND_LOCK_UNLOCK # define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_SELF_INIT -- cgit v0.10.2 From 91eeb80ee7cdc7833d752bdaa45ae2a1556c72cf Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 24 May 2016 11:42:26 +0200 Subject: microblaze: Select compilation flags via Kconfig Remove autogenerated config.mk and select CPU options via Kconfig. Signed-off-by: Michal Simek diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 461d7dc..01c157e 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -9,4 +9,20 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "microblaze-generic" +config XILINX_MICROBLAZE0_USE_PCMP_INSTR + int "USE_PCMP_INSTR range (0:1)" + default 0 + +config XILINX_MICROBLAZE0_USE_BARREL + int "USE_BARREL range (0:1)" + default 0 + +config XILINX_MICROBLAZE0_USE_DIV + int "USE_DIV range (0:1)" + default 0 + +config XILINX_MICROBLAZE0_USE_HW_MUL + int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" + default 0 + endif diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk index 95ef9c0..4b033f7 100644 --- a/board/xilinx/microblaze-generic/config.mk +++ b/board/xilinx/microblaze-generic/config.mk @@ -1,16 +1,16 @@ # -# (C) Copyright 2007 Michal Simek +# (C) Copyright 2007 - 2016 Michal Simek # -# Michal SIMEK +# Michal SIMEK # # SPDX-License-Identifier: GPL-2.0+ # -# CAUTION: This file is a faked configuration !!! -# There is no real target for the microblaze-generic -# configuration. You have to replace this file with -# the generated file from your Xilinx design flow. -# -PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift +# USE_HW_MUL can be 0, 1, or 2, defining a hierarchy of HW Mul support. +CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift +CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare + +PLATFORM_CPPFLAGS += $(CPUFLAGS-1) $(CPUFLAGS-2) diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 8c7e4b7..7e53b5e 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -2,6 +2,9 @@ CONFIG_MICROBLAZE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DM=y CONFIG_TARGET_MICROBLAZE_GENERIC=y +CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 +CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 +CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 CONFIG_SYS_TEXT_BASE=0x29000000 CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_SPL=y -- cgit v0.10.2 From 4ad1096e487f6bd03ec235263259aa97ef9cb2f1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 24 May 2016 13:23:59 +0200 Subject: microblaze: Add option to pass cpu version number Toolchain can use some flags by default based on cpu version. Signed-off-by: Michal Simek diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index 01c157e..c8b11ca 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -25,4 +25,8 @@ config XILINX_MICROBLAZE0_USE_HW_MUL int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" default 0 +config XILINX_MICROBLAZE0_HW_VER + string "Core version number" + default 7.10.d + endif diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk index 4b033f7..1dee2d6 100644 --- a/board/xilinx/microblaze-generic/config.mk +++ b/board/xilinx/microblaze-generic/config.mk @@ -6,6 +6,8 @@ # SPDX-License-Identifier: GPL-2.0+ # +CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER)) + # USE_HW_MUL can be 0, 1, or 2, defining a hierarchy of HW Mul support. CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul @@ -13,4 +15,6 @@ CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare +CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER)) + PLATFORM_CPPFLAGS += $(CPUFLAGS-1) $(CPUFLAGS-2) -- cgit v0.10.2 From ac551e3492fe7bf9b4e087f8ee454108c5098c6d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 24 May 2016 11:45:11 +0200 Subject: microblaze: Move MSR instruction selection to Kconfig Select MSR instructions via Kconfig instead of xparameters.h. Signed-off-by: Michal Simek diff --git a/arch/microblaze/include/asm/asm.h b/arch/microblaze/include/asm/asm.h index 11f3dd0..94f0562 100644 --- a/arch/microblaze/include/asm/asm.h +++ b/arch/microblaze/include/asm/asm.h @@ -50,7 +50,7 @@ #define NOP __asm__ __volatile__ ("nop"); /* use machine status registe USE_MSR_REG */ -#if XILINX_USE_MSR_INSTR == 1 +#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1 #define MSRSET(val) \ __asm__ __volatile__ ("msrset r0," #val ); diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index c8b11ca..02ac65c 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -9,6 +9,10 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "microblaze-generic" +config XILINX_MICROBLAZE0_USE_MSR_INSTR + int "USE_MSR_INSTR range (0:1)" + default 0 + config XILINX_MICROBLAZE0_USE_PCMP_INSTR int "USE_PCMP_INSTR range (0:1)" default 0 diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index dc5645b..ee7d087 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -14,7 +14,6 @@ #define XILINX_BOARD_NAME microblaze-generic /* Microblaze is microblaze_0 */ -#define XILINX_USE_MSR_INSTR 1 #define XILINX_FSL_NUMBER 3 /* GPIO is LEDs_4Bit*/ diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 7e53b5e..2ef713f 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -2,6 +2,7 @@ CONFIG_MICROBLAZE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_DM=y CONFIG_TARGET_MICROBLAZE_GENERIC=y +CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 -- cgit v0.10.2 From a1a6af82e2c7be4ef34e38e2d01dd337e8b32903 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 May 2016 10:13:37 +0200 Subject: ARM64: zynqmp: Enable Vitesse and RealTek ethernet phys Phys are available on zc1751-dc4 that's why enable them. Signed-off-by: Michal Simek diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index c2c6eab..455481d 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -189,6 +189,8 @@ # define CONFIG_PHY_NATSEMI # define CONFIG_PHY_TI # define CONFIG_PHY_GIGE +# define CONFIG_PHY_VITESSE +# define CONFIG_PHY_REALTEK # define PHY_ANEG_TIMEOUT 20000 #endif -- cgit v0.10.2 From ead66ab6dfc6fcf8bbd4d056e0a03b915c0e4450 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 20 May 2016 09:55:00 +0200 Subject: ARM64: zynqmp: Add debug uart for zc1751-dc2 Add debug uart for zc1751-dc2. Signed-off-by: Michal Simek diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 2edd180..67d36f3 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -41,6 +41,11 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SST=y CONFIG_DM_ETH=y CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_USB=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y -- cgit v0.10.2 From 08ac386bb292d3be19f77e7d782574e72646ea1b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 26 May 2016 08:06:38 +0200 Subject: ARM64: zynqmp: Add support for zc1751-dc4 zc1751-dc4 contains four GEMs. Signed-off-by: Michal Simek diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e76f56b..ed897cf 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -90,6 +90,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zcu102-revB.dtb \ zynqmp-zc1751-xm015-dc1.dtb \ zynqmp-zc1751-xm016-dc2.dtb \ + zynqmp-zc1751-xm018-dc4.dtb \ zynqmp-zc1751-xm019-dc5.dtb dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb am335x-evm.dtb \ am335x-evmsk.dtb \ diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts new file mode 100644 index 0000000..03f1ad7 --- /dev/null +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -0,0 +1,212 @@ +/* + * dts file for Xilinx ZynqMP zc1751-xm018-dc4 + * + * (C) Copyright 2015 - 2016, Xilinx, Inc. + * + * Michal Simek + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk.dtsi" + +/ { + model = "ZynqMP zc1751-xm018-dc4"; + compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; + + aliases { + can0 = &can0; + can1 = &can1; + ethernet0 = &gem0; + ethernet1 = &gem1; + ethernet2 = &gem2; + ethernet3 = &gem3; + gpio0 = &gpio; + i2c0 = &i2c0; + i2c1 = &i2c1; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + spi0 = &qspi; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; + }; +}; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +/* fpd_dma clk 667MHz, lpd_dma 500MHz */ +&fpd_dma_chan1 { + status = "okay"; + xlnx,include-sg; /* for testing purpose */ + xlnx,overfetch; /* for testing purpose */ + xlnx,ratectrl = <0>; /* for testing purpose */ + xlnx,src-issue = <31>; +}; + +&fpd_dma_chan2 { + status = "okay"; + xlnx,ratectrl = <100>; /* for testing purpose */ + xlnx,src-issue = <4>; /* for testing purpose */ +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; + xlnx,include-sg; /* for testing purpose */ +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; + xlnx,include-sg; /* for testing purpose */ +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; + xlnx,include-sg; /* for testing purpose */ +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; + +&lpd_dma_chan8 { + status = "okay"; +}; + +&xlnx_dp { + status = "okay"; +}; + +&xlnx_dpdma { + status = "okay"; +}; + +&gem0 { + status = "okay"; + local-mac-address = [00 0a 35 00 02 90]; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy0>; + ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */ + reg = <0>; + }; + ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */ + reg = <7>; + }; + ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */ + reg = <3>; + }; + ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */ + reg = <8>; + }; +}; + +&gem1 { + status = "okay"; + local-mac-address = [00 0a 35 00 02 91]; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy7>; +}; + +&gem2 { + status = "okay"; + local-mac-address = [00 0a 35 00 02 92]; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy3>; +}; + +&gem3 { + status = "okay"; + local-mac-address = [00 0a 35 00 02 93]; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy8>; +}; + +&gpio { + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig new file mode 100644 index 0000000..f7f3822 --- /dev/null +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4" +CONFIG_ARCH_ZYNQMP=y +CONFIG_DM_I2C=y +CONFIG_DM_GPIO=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_I2C=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_DM_MMC=y +CONFIG_ZYNQ_SDHCI=y +CONFIG_DM_ETH=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h new file mode 100644 index 0000000..fd2ec6a --- /dev/null +++ b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h @@ -0,0 +1,24 @@ +/* + * Configuration for Xilinx ZynqMP zc1751 XM018 DC4 + * + * (C) Copyright 2015 Xilinx, Inc. + * Michal Simek + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H +#define __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H + +#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm018 dc4" + +#define CONFIG_KERNEL_FDT_OFST_SIZE \ + "kernel_offset=0x400000\0" \ + "fdt_offset=0x2400000\0" \ + "kernel_size=0x2000000\0" \ + "fdt_size=0x80000\0" \ + "board=zc1751-dc4\0" + +#include + +#endif /* __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H */ -- cgit v0.10.2 From 9c152edd12ba57bb3e3a570652e6493a8264e5af Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 May 2016 10:41:26 +0200 Subject: ARM64: zynqmp: Extend page_table_size 0xc000 is not sufficient page table size if dc4 with 4 gems is enabled. Signed-off-by: Michal Simek diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 5dd3cd8..509f0aa 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -63,6 +63,11 @@ static struct mm_region zynqmp_mem_map[] = { }; struct mm_region *mem_map = zynqmp_mem_map; +u64 get_page_table_size(void) +{ + return 0x14000; +} + static unsigned int zynqmp_get_silicon_version_secure(void) { u32 ver; -- cgit v0.10.2 From 1a6a6e9a168fefc7b73bbe2619d4a0725cfa344a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 May 2016 14:57:02 +0200 Subject: ARM64: zynq: Fix boot.bin generation for Zynq and ZynqMP Fix boot.bin generation for Zynq and ZynqMP. Signed-off-by: Michal Simek Acked-by: Marek Vasut diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 6d2017d..0997fd9 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -158,11 +158,8 @@ ifeq ($(CONFIG_SYS_SOC),"at91") ALL-y += boot.bin endif -ifdef CONFIG_ARCH_ZYNQ -ALL-y += $(obj)/boot.bin -endif - -ALL-(CONFIG_ARCH_ZYNQMP) += $(obj)/boot.bin +ALL-$(CONFIG_ARCH_ZYNQ) += $(obj)/boot.bin +ALL-$(CONFIG_ARCH_ZYNQMP) += $(obj)/boot.bin all: $(ALL-y) -- cgit v0.10.2 From 340b0e3bb6e8808a7e683e030b3c5b5137715041 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 30 May 2016 16:06:54 +0200 Subject: env: Setup GD_FLG_ENV_DEFAULT flag when default environment are used Setup flag when default environment are used to be able to rewrite default distro boot variables based on SoC boot mode. Signed-off-by: Michal Simek Reviewed-by: Alexander Graf diff --git a/common/env_common.c b/common/env_common.c index af59c72..13db7dc 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -123,6 +123,7 @@ void set_default_env(const char *s) error("Environment import failed: errno = %d\n", errno); gd->flags |= GD_FLG_ENV_READY; + gd->flags |= GD_FLG_ENV_DEFAULT; } diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index f2810a1..0abcbe4 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -141,5 +141,6 @@ typedef struct global_data { #define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ #define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ #define GD_FLG_RECORD 0x01000 /* Record console */ +#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ #endif /* __ASM_GENERIC_GBL_DATA_H */ -- cgit v0.10.2 From 0c1b02a73636f77d8b9733f29c2b324471b9f5a1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 17 May 2016 08:38:53 +0200 Subject: ARM64: zynqmp: Enable support for SPL FIT images Enable support for RAM based FIT images read by SPL. Empty function for now to keep compiler happy. Signed-off-by: Michal Simek diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 7879b4d..facb3b0 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_CONSOLE is not set diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 5d641a5..1941653 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 67d36f3..4f3cd93 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index f7f3822..c7f58ba 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index f7c671b..59c754a 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index b370bc1..d579135 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 9764452..d88035d 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set -- cgit v0.10.2 From 0d169b8cd70975f60920b077d6ed96623db97d33 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 1 Jun 2016 14:29:33 +0200 Subject: ARM64: zynqmp: Enable AHCI when CONFIG_SATA_CEVA is defined Simplify zcu102 board file by moving CONFIG_AHCI enabling to common file. Signed-off-by: Michal Simek diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 455481d..795d586 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -211,7 +211,8 @@ # define CONFIG_SYS_EEPROM_SIZE (64 * 1024) #endif -#ifdef CONFIG_AHCI +#ifdef CONFIG_SATA_CEVA +#define CONFIG_AHCI #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h index 81079fe..09c4a51 100644 --- a/include/configs/xilinx_zynqmp_zcu102.h +++ b/include/configs/xilinx_zynqmp_zcu102.h @@ -41,7 +41,6 @@ #define CONFIG_CMD_PCA953X #define CONFIG_CMD_PCA953X_INFO -#define CONFIG_AHCI #define CONFIG_SATA_CEVA #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} -- cgit v0.10.2 From a8b6a156c0f7fb99502229e454bc9c3b38645280 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 1 Jun 2016 22:41:54 +0200 Subject: ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP When the CONFIG_BOOTP_SERVERIP option is set, we ignore all dhcp values for the tftp server and use our own serverip and file name instead. This is usually not what we want and I doubt it's set for a good reason on ZynqMP. It definitely hurts if we want to support uEFI PXE boot on it. So just remove the option for now. Signed-off-by: Alexander Graf Signed-off-by: Michal Simek diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 795d586..ac3de0a 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -76,7 +76,6 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -#define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_PXE #define CONFIG_BOOTP_SUBNETMASK -- cgit v0.10.2 From b72894f14da79cdcdab8007b079d922bd28e5ce7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 22 Apr 2016 14:28:54 +0200 Subject: ARM64: zynqmp: Add support for standard distro boot commands Nand and QSPI are not defined now but this will be extended. Based on selected bootmode boot_targets are rewritten. Patch also contains detection if variables are saved. If yes don't rewrite boot_targets variable. Also move variable setup to the end of file because SCSI needs to be defined before others macros are using it. Signed-off-by: Michal Simek Reviewed-by: Alexander Graf diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 4623cd4..f15dc5d 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -214,6 +215,13 @@ int board_late_init(void) { u32 reg = 0; u8 bootmode; + const char *mode; + char *new_targets; + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { + debug("Saved variables - Skipping\n"); + return 0; + } reg = readl(&crlapb_base->boot_mode); bootmode = reg & BOOT_MODES_MASK; @@ -222,37 +230,49 @@ int board_late_init(void) switch (bootmode) { case JTAG_MODE: puts("JTAG_MODE\n"); - setenv("modeboot", "jtagboot"); + mode = "pxe dhcp"; break; case QSPI_MODE_24BIT: case QSPI_MODE_32BIT: - setenv("modeboot", "qspiboot"); + mode = "qspi0"; puts("QSPI_MODE\n"); break; case EMMC_MODE: puts("EMMC_MODE\n"); - setenv("modeboot", "sdboot"); + mode = "mmc0"; break; case SD_MODE: puts("SD_MODE\n"); - setenv("modeboot", "sdboot"); + mode = "mmc0"; break; case SD_MODE1: puts("SD_MODE1\n"); #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1) - setenv("sdbootdev", "1"); + mode = "mmc1"; +#else + mode = "mmc0"; #endif - setenv("modeboot", "sdboot"); break; case NAND_MODE: puts("NAND_MODE\n"); - setenv("modeboot", "nandboot"); + mode = "nand0"; break; default: + mode = ""; printf("Invalid Boot Mode:0x%x\n", bootmode); break; } + /* + * One terminating char + one byte for space between mode + * and default boot_targets + */ + new_targets = calloc(1, strlen(mode) + + strlen(getenv("boot_targets")) + 2); + + sprintf(new_targets, "%s %s", mode, getenv("boot_targets")); + setenv("boot_targets", new_targets); + return 0; } diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ac3de0a..fc2e1f7 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -146,21 +146,6 @@ # define DFU_ALT_INFO #endif -/* Initial environment variables */ -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_addr=0x80000\0" \ - "fdt_addr=0x7000000\0" \ - "fdt_high=0x10000000\0" \ - CONFIG_KERNEL_FDT_OFST_SIZE \ - "sdbootdev=0\0"\ - "sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \ - "load mmc $sdbootdev:$partid $kernel_addr Image && " \ - "booti $kernel_addr - $fdt_addr\0" \ - DFU_ALT_INFO -#endif - -#define CONFIG_BOOTCOMMAND "run $modeboot" #define CONFIG_BOOTDELAY 3 #define CONFIG_BOARD_LATE_INIT @@ -230,6 +215,50 @@ #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_CLOCKS +#define ENV_MEM_LAYOUT_SETTINGS \ + "fdt_high=10000000\0" \ + "initrd_high=10000000\0" \ + "fdt_addr_r=0x40000000\0" \ + "pxefile_addr_r=0x10000000\0" \ + "kernel_addr_r=0x18000000\0" \ + "scriptaddr=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" \ + +#if defined(CONFIG_ZYNQ_SDHCI) +# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) +#else +# define BOOT_TARGET_DEVICES_MMC(func) +#endif + +#if defined(CONFIG_SATA_CEVA) +# define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) +#else +# define BOOT_TARGET_DEVICES_SCSI(func) +#endif + +#if defined(CONFIG_ZYNQMP_USB) +# define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1) +#else +# define BOOT_TARGET_DEVICES_USB(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_DEVICES_MMC(func) \ + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_SCSI(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include + +/* Initial environment variables */ +#ifndef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV \ + DFU_ALT_INFO +#endif + #define CONFIG_SPL_TEXT_BASE 0xfffc0000 #define CONFIG_SPL_MAX_SIZE 0x20000 diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index 9506355..c5bd5da 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -22,13 +22,6 @@ #define COUNTER_FREQUENCY 4000000 -#define CONFIG_KERNEL_FDT_OFST_SIZE \ - "kernel_offset=0x400000\0" \ - "fdt_offset=0x2400000\0" \ - "kernel_size=0x2000000\0" \ - "fdt_size=0x80000\0" \ - "board=ep108\0" - #include #endif /* __CONFIG_ZYNQMP_EP_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index 3c0ba88..c9f4432 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -17,13 +17,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1" -#define CONFIG_KERNEL_FDT_OFST_SIZE \ - "kernel_offset=0x400000\0" \ - "fdt_offset=0x2400000\0" \ - "kernel_size=0x2000000\0" \ - "fdt_size=0x80000\0" \ - "board=zc1751-dc1\0" - #include #endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h index 83ea624..526d0bb 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h @@ -14,13 +14,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm016 dc2" -#define CONFIG_KERNEL_FDT_OFST_SIZE \ - "kernel_offset=0x400000\0" \ - "fdt_offset=0x2400000\0" \ - "kernel_size=0x2000000\0" \ - "fdt_size=0x80000\0" \ - "board=zc1751-dc2\0" - #include #endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h index fd2ec6a..65277a6 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h @@ -12,13 +12,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm018 dc4" -#define CONFIG_KERNEL_FDT_OFST_SIZE \ - "kernel_offset=0x400000\0" \ - "fdt_offset=0x2400000\0" \ - "kernel_size=0x2000000\0" \ - "fdt_size=0x80000\0" \ - "board=zc1751-dc4\0" - #include #endif /* __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h index 4f8f5c1..76350d9 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h @@ -15,13 +15,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5" -#define CONFIG_KERNEL_FDT_OFST_SIZE \ - "kernel_offset=0x400000\0" \ - "fdt_offset=0x2400000\0" \ - "kernel_size=0x2000000\0" \ - "fdt_size=0x80000\0" \ - "board=zc1751-dc5\0" - #include #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */ diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h index 09c4a51..7ceab32 100644 --- a/include/configs/xilinx_zynqmp_zcu102.h +++ b/include/configs/xilinx_zynqmp_zcu102.h @@ -53,13 +53,6 @@ #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 #define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0x20 -#define CONFIG_KERNEL_FDT_OFST_SIZE \ - "kernel_offset=0x180000\0" \ - "fdt_offset=0x100000\0" \ - "kernel_size=0x1e00000\0" \ - "fdt_size=0x80000\0" \ - "board=zcu102\0" - #include #endif /* __CONFIG_ZYNQMP_ZCU102_H */ -- cgit v0.10.2 From 59e880560f49827458b82345bb5ccfb7cb93af8c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 3 Jun 2016 11:35:17 +0200 Subject: ARM64: zynqmp: Extend malloc space before relocation For boards which have more devices it is necessary to extend malloc space. Signed-off-by: Michal Simek diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index facb3b0..d3f093b 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep" CONFIG_ARCH_ZYNQMP=y -CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_ZYNQMP_USB=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 1941653..e160f8f 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1" CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_ZYNQMP_USB=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 4f3cd93..ffbedfa 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2" CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_ZYNQMP_USB=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index c7f58ba..6570348 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4" CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_SYS_TEXT_BASE=0x8000000 diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index 59c754a..e1fc8b0 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5" CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_SYS_TEXT_BASE=0x8000000 diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index d579135..7cd54411 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_GPIO=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index d88035d..20db671 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_GPIO=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 -- cgit v0.10.2